1 /* 2 * Copyright 2012-15 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 27 #ifndef __DAL_DPP_H__ 28 #define __DAL_DPP_H__ 29 30 #include "transform.h" 31 #include "cursor_reg_cache.h" 32 33 union defer_reg_writes { 34 struct { 35 bool disable_blnd_lut:1; 36 bool disable_3dlut:1; 37 bool disable_shaper:1; 38 bool disable_gamcor:1; 39 bool disable_dscl:1; 40 } bits; 41 uint32_t raw; 42 }; 43 44 struct dpp { 45 const struct dpp_funcs *funcs; 46 struct dc_context *ctx; 47 /** 48 * @inst: 49 * 50 * inst stands for "instance," and it is an id number that references a 51 * specific DPP. 52 */ 53 int inst; 54 struct dpp_caps *caps; 55 struct pwl_params regamma_params; 56 struct pwl_params degamma_params; 57 struct dpp_cursor_attributes cur_attr; 58 union defer_reg_writes deferred_reg_writes; 59 60 struct pwl_params shaper_params; 61 bool cm_bypass_mode; 62 63 struct cursor_position_cache_dpp pos; 64 struct cursor_attribute_cache_dpp att; 65 }; 66 67 struct dpp_input_csc_matrix { 68 enum dc_color_space color_space; 69 uint16_t regval[12]; 70 }; 71 72 static const struct dpp_input_csc_matrix __maybe_unused dpp_input_csc_matrix[] = { 73 {COLOR_SPACE_SRGB, 74 {0x2000, 0, 0, 0, 0, 0x2000, 0, 0, 0, 0, 0x2000, 0} }, 75 {COLOR_SPACE_SRGB_LIMITED, 76 {0x2000, 0, 0, 0, 0, 0x2000, 0, 0, 0, 0, 0x2000, 0} }, 77 {COLOR_SPACE_YCBCR601, 78 {0x2cdd, 0x2000, 0, 0xe991, 0xe926, 0x2000, 0xf4fd, 0x10ef, 79 0, 0x2000, 0x38b4, 0xe3a6} }, 80 {COLOR_SPACE_YCBCR601_LIMITED, 81 {0x3353, 0x2568, 0, 0xe400, 0xe5dc, 0x2568, 0xf367, 0x1108, 82 0, 0x2568, 0x40de, 0xdd3a} }, 83 {COLOR_SPACE_YCBCR709, 84 {0x3265, 0x2000, 0, 0xe6ce, 0xf105, 0x2000, 0xfa01, 0xa7d, 0, 85 0x2000, 0x3b61, 0xe24f} }, 86 87 {COLOR_SPACE_YCBCR709_LIMITED, 88 {0x39a6, 0x2568, 0, 0xe0d6, 0xeedd, 0x2568, 0xf925, 0x9a8, 0, 89 0x2568, 0x43ee, 0xdbb2} } 90 }; 91 92 struct dpp_grph_csc_adjustment { 93 struct fixed31_32 temperature_matrix[CSC_TEMPERATURE_MATRIX_SIZE]; 94 enum graphics_gamut_adjust_type gamut_adjust_type; 95 }; 96 97 struct cnv_color_keyer_params { 98 int color_keyer_en; 99 int color_keyer_mode; 100 int color_keyer_alpha_low; 101 int color_keyer_alpha_high; 102 int color_keyer_red_low; 103 int color_keyer_red_high; 104 int color_keyer_green_low; 105 int color_keyer_green_high; 106 int color_keyer_blue_low; 107 int color_keyer_blue_high; 108 }; 109 110 /* new for dcn2: set the 8bit alpha values based on the 2 bit alpha 111 *ALPHA_2BIT_LUT. ALPHA_2BIT_LUT0 default: 0b00000000 112 *ALPHA_2BIT_LUT. ALPHA_2BIT_LUT1 default: 0b01010101 113 *ALPHA_2BIT_LUT. ALPHA_2BIT_LUT2 default: 0b10101010 114 *ALPHA_2BIT_LUT. ALPHA_2BIT_LUT3 default: 0b11111111 115 */ 116 struct cnv_alpha_2bit_lut { 117 int lut0; 118 int lut1; 119 int lut2; 120 int lut3; 121 }; 122 123 struct dcn_dpp_state { 124 uint32_t is_enabled; 125 uint32_t igam_lut_mode; 126 uint32_t igam_input_format; 127 uint32_t dgam_lut_mode; 128 uint32_t rgam_lut_mode; 129 uint32_t gamut_remap_mode; 130 uint32_t gamut_remap_c11_c12; 131 uint32_t gamut_remap_c13_c14; 132 uint32_t gamut_remap_c21_c22; 133 uint32_t gamut_remap_c23_c24; 134 uint32_t gamut_remap_c31_c32; 135 uint32_t gamut_remap_c33_c34; 136 }; 137 138 struct CM_bias_params { 139 uint32_t cm_bias_cr_r; 140 uint32_t cm_bias_y_g; 141 uint32_t cm_bias_cb_b; 142 uint32_t cm_bias_format; 143 }; 144 145 struct dpp_funcs { 146 bool (*dpp_program_gamcor_lut)( 147 struct dpp *dpp_base, const struct pwl_params *params); 148 149 void (*dpp_set_pre_degam)(struct dpp *dpp_base, 150 enum dc_transfer_func_predefined tr); 151 152 void (*dpp_program_cm_dealpha)(struct dpp *dpp_base, 153 uint32_t enable, uint32_t additive_blending); 154 155 void (*dpp_program_cm_bias)( 156 struct dpp *dpp_base, 157 struct CM_bias_params *bias_params); 158 159 void (*dpp_read_state)(struct dpp *dpp, struct dcn_dpp_state *s); 160 161 void (*dpp_reset)(struct dpp *dpp); 162 163 void (*dpp_set_scaler)(struct dpp *dpp, 164 const struct scaler_data *scl_data); 165 166 void (*dpp_set_pixel_storage_depth)( 167 struct dpp *dpp, 168 enum lb_pixel_depth depth, 169 const struct bit_depth_reduction_params *bit_depth_params); 170 171 bool (*dpp_get_optimal_number_of_taps)( 172 struct dpp *dpp, 173 struct scaler_data *scl_data, 174 const struct scaling_taps *in_taps); 175 176 void (*dpp_set_gamut_remap)( 177 struct dpp *dpp, 178 const struct dpp_grph_csc_adjustment *adjust); 179 180 void (*dpp_set_csc_default)( 181 struct dpp *dpp, 182 enum dc_color_space colorspace); 183 184 void (*dpp_set_csc_adjustment)( 185 struct dpp *dpp, 186 const uint16_t *regval); 187 188 void (*dpp_power_on_regamma_lut)( 189 struct dpp *dpp, 190 bool power_on); 191 192 void (*dpp_program_regamma_lut)( 193 struct dpp *dpp, 194 const struct pwl_result_data *rgb, 195 uint32_t num); 196 197 void (*dpp_configure_regamma_lut)( 198 struct dpp *dpp, 199 bool is_ram_a); 200 201 void (*dpp_program_regamma_lutb_settings)( 202 struct dpp *dpp, 203 const struct pwl_params *params); 204 205 void (*dpp_program_regamma_luta_settings)( 206 struct dpp *dpp, 207 const struct pwl_params *params); 208 209 void (*dpp_program_regamma_pwl)( 210 struct dpp *dpp, 211 const struct pwl_params *params, 212 enum opp_regamma mode); 213 214 void (*dpp_program_bias_and_scale)( 215 struct dpp *dpp, 216 struct dc_bias_and_scale *params); 217 218 void (*dpp_set_degamma)( 219 struct dpp *dpp_base, 220 enum ipp_degamma_mode mode); 221 222 void (*dpp_program_input_lut)( 223 struct dpp *dpp_base, 224 const struct dc_gamma *gamma); 225 226 void (*dpp_program_degamma_pwl)(struct dpp *dpp_base, 227 const struct pwl_params *params); 228 229 void (*dpp_setup)( 230 struct dpp *dpp_base, 231 enum surface_pixel_format format, 232 enum expansion_mode mode, 233 struct dc_csc_transform input_csc_color_matrix, 234 enum dc_color_space input_color_space, 235 struct cnv_alpha_2bit_lut *alpha_2bit_lut); 236 237 void (*dpp_full_bypass)(struct dpp *dpp_base); 238 239 void (*set_cursor_attributes)( 240 struct dpp *dpp_base, 241 struct dc_cursor_attributes *cursor_attributes); 242 243 void (*set_cursor_position)( 244 struct dpp *dpp_base, 245 const struct dc_cursor_position *pos, 246 const struct dc_cursor_mi_param *param, 247 uint32_t width, 248 uint32_t height 249 ); 250 251 void (*dpp_set_hdr_multiplier)( 252 struct dpp *dpp_base, 253 uint32_t multiplier); 254 255 void (*set_optional_cursor_attributes)( 256 struct dpp *dpp_base, 257 struct dpp_cursor_attributes *attr); 258 259 void (*dpp_dppclk_control)( 260 struct dpp *dpp_base, 261 bool dppclk_div, 262 bool enable); 263 264 void (*dpp_deferred_update)( 265 struct dpp *dpp); 266 bool (*dpp_program_blnd_lut)( 267 struct dpp *dpp, 268 const struct pwl_params *params); 269 bool (*dpp_program_shaper_lut)( 270 struct dpp *dpp, 271 const struct pwl_params *params); 272 bool (*dpp_program_3dlut)( 273 struct dpp *dpp, 274 struct tetrahedral_params *params); 275 void (*dpp_cnv_set_alpha_keyer)( 276 struct dpp *dpp_base, 277 struct cnv_color_keyer_params *color_keyer); 278 }; 279 280 281 282 #endif 283