1 /******************************************************************************
2 *
3 * Copyright(c) 2009-2012 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * wlanfae <wlanfae@realtek.com>
23 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
24 * Hsinchu 300, Taiwan.
25 *
26 * Larry Finger <Larry.Finger@lwfinger.net>
27 *
28 *****************************************************************************/
29
30 #include "../wifi.h"
31 #include "../base.h"
32 #include "reg.h"
33 #include "def.h"
34 #include "phy.h"
35 #include "dm.h"
36 #include "fw.h"
37
38 #define UNDEC_SM_PWDB entry_min_undecoratedsmoothed_pwdb
39
40 struct dig_t de_digtable;
41
42 static const u32 ofdmswing_table[OFDM_TABLE_SIZE_92D] = {
43 0x7f8001fe, /* 0, +6.0dB */
44 0x788001e2, /* 1, +5.5dB */
45 0x71c001c7, /* 2, +5.0dB */
46 0x6b8001ae, /* 3, +4.5dB */
47 0x65400195, /* 4, +4.0dB */
48 0x5fc0017f, /* 5, +3.5dB */
49 0x5a400169, /* 6, +3.0dB */
50 0x55400155, /* 7, +2.5dB */
51 0x50800142, /* 8, +2.0dB */
52 0x4c000130, /* 9, +1.5dB */
53 0x47c0011f, /* 10, +1.0dB */
54 0x43c0010f, /* 11, +0.5dB */
55 0x40000100, /* 12, +0dB */
56 0x3c8000f2, /* 13, -0.5dB */
57 0x390000e4, /* 14, -1.0dB */
58 0x35c000d7, /* 15, -1.5dB */
59 0x32c000cb, /* 16, -2.0dB */
60 0x300000c0, /* 17, -2.5dB */
61 0x2d4000b5, /* 18, -3.0dB */
62 0x2ac000ab, /* 19, -3.5dB */
63 0x288000a2, /* 20, -4.0dB */
64 0x26000098, /* 21, -4.5dB */
65 0x24000090, /* 22, -5.0dB */
66 0x22000088, /* 23, -5.5dB */
67 0x20000080, /* 24, -6.0dB */
68 0x1e400079, /* 25, -6.5dB */
69 0x1c800072, /* 26, -7.0dB */
70 0x1b00006c, /* 27. -7.5dB */
71 0x19800066, /* 28, -8.0dB */
72 0x18000060, /* 29, -8.5dB */
73 0x16c0005b, /* 30, -9.0dB */
74 0x15800056, /* 31, -9.5dB */
75 0x14400051, /* 32, -10.0dB */
76 0x1300004c, /* 33, -10.5dB */
77 0x12000048, /* 34, -11.0dB */
78 0x11000044, /* 35, -11.5dB */
79 0x10000040, /* 36, -12.0dB */
80 0x0f00003c, /* 37, -12.5dB */
81 0x0e400039, /* 38, -13.0dB */
82 0x0d800036, /* 39, -13.5dB */
83 0x0cc00033, /* 40, -14.0dB */
84 0x0c000030, /* 41, -14.5dB */
85 0x0b40002d, /* 42, -15.0dB */
86 };
87
88 static const u8 cckswing_table_ch1ch13[CCK_TABLE_SIZE][8] = {
89 {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, /* 0, +0dB */
90 {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, /* 1, -0.5dB */
91 {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, /* 2, -1.0dB */
92 {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, /* 3, -1.5dB */
93 {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, /* 4, -2.0dB */
94 {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, /* 5, -2.5dB */
95 {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, /* 6, -3.0dB */
96 {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, /* 7, -3.5dB */
97 {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, /* 8, -4.0dB */
98 {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, /* 9, -4.5dB */
99 {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, /* 10, -5.0dB */
100 {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, /* 11, -5.5dB */
101 {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, /* 12, -6.0dB */
102 {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, /* 13, -6.5dB */
103 {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, /* 14, -7.0dB */
104 {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, /* 15, -7.5dB */
105 {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, /* 16, -8.0dB */
106 {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, /* 17, -8.5dB */
107 {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, /* 18, -9.0dB */
108 {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 19, -9.5dB */
109 {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 20, -10.0dB */
110 {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 21, -10.5dB */
111 {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 22, -11.0dB */
112 {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, /* 23, -11.5dB */
113 {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, /* 24, -12.0dB */
114 {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, /* 25, -12.5dB */
115 {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, /* 26, -13.0dB */
116 {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 27, -13.5dB */
117 {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 28, -14.0dB */
118 {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 29, -14.5dB */
119 {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 30, -15.0dB */
120 {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, /* 31, -15.5dB */
121 {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} /* 32, -16.0dB */
122 };
123
124 static const u8 cckswing_table_ch14[CCK_TABLE_SIZE][8] = {
125 {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, /* 0, +0dB */
126 {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, /* 1, -0.5dB */
127 {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, /* 2, -1.0dB */
128 {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, /* 3, -1.5dB */
129 {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, /* 4, -2.0dB */
130 {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, /* 5, -2.5dB */
131 {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, /* 6, -3.0dB */
132 {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, /* 7, -3.5dB */
133 {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, /* 8, -4.0dB */
134 {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, /* 9, -4.5dB */
135 {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, /* 10, -5.0dB */
136 {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 11, -5.5dB */
137 {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 12, -6.0dB */
138 {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, /* 13, -6.5dB */
139 {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, /* 14, -7.0dB */
140 {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 15, -7.5dB */
141 {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 16, -8.0dB */
142 {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 17, -8.5dB */
143 {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 18, -9.0dB */
144 {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 19, -9.5dB */
145 {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 20, -10.0dB */
146 {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 21, -10.5dB */
147 {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 22, -11.0dB */
148 {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 23, -11.5dB */
149 {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 24, -12.0dB */
150 {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 25, -12.5dB */
151 {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 26, -13.0dB */
152 {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 27, -13.5dB */
153 {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 28, -14.0dB */
154 {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 29, -14.5dB */
155 {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 30, -15.0dB */
156 {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 31, -15.5dB */
157 {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00} /* 32, -16.0dB */
158 };
159
rtl92d_dm_diginit(struct ieee80211_hw * hw)160 static void rtl92d_dm_diginit(struct ieee80211_hw *hw)
161 {
162 de_digtable.dig_enable_flag = true;
163 de_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;
164 de_digtable.cur_igvalue = 0x20;
165 de_digtable.pre_igvalue = 0x0;
166 de_digtable.cursta_connectctate = DIG_STA_DISCONNECT;
167 de_digtable.presta_connectstate = DIG_STA_DISCONNECT;
168 de_digtable.curmultista_connectstate = DIG_MULTISTA_DISCONNECT;
169 de_digtable.rssi_lowthresh = DM_DIG_THRESH_LOW;
170 de_digtable.rssi_highthresh = DM_DIG_THRESH_HIGH;
171 de_digtable.fa_lowthresh = DM_FALSEALARM_THRESH_LOW;
172 de_digtable.fa_highthresh = DM_FALSEALARM_THRESH_HIGH;
173 de_digtable.rx_gain_range_max = DM_DIG_FA_UPPER;
174 de_digtable.rx_gain_range_min = DM_DIG_FA_LOWER;
175 de_digtable.backoff_val = DM_DIG_BACKOFF_DEFAULT;
176 de_digtable.backoff_val_range_max = DM_DIG_BACKOFF_MAX;
177 de_digtable.backoff_val_range_min = DM_DIG_BACKOFF_MIN;
178 de_digtable.pre_cck_pd_state = CCK_PD_STAGE_LOWRSSI;
179 de_digtable.cur_cck_pd_state = CCK_PD_STAGE_MAX;
180 de_digtable.large_fa_hit = 0;
181 de_digtable.recover_cnt = 0;
182 de_digtable.forbidden_igi = DM_DIG_FA_LOWER;
183 }
184
rtl92d_dm_false_alarm_counter_statistics(struct ieee80211_hw * hw)185 static void rtl92d_dm_false_alarm_counter_statistics(struct ieee80211_hw *hw)
186 {
187 u32 ret_value;
188 struct rtl_priv *rtlpriv = rtl_priv(hw);
189 struct false_alarm_statistics *falsealm_cnt = &(rtlpriv->falsealm_cnt);
190 unsigned long flag = 0;
191
192 /* hold ofdm counter */
193 rtl_set_bbreg(hw, ROFDM0_LSTF, BIT(31), 1); /* hold page C counter */
194 rtl_set_bbreg(hw, ROFDM1_LSTF, BIT(31), 1); /*hold page D counter */
195
196 ret_value = rtl_get_bbreg(hw, ROFDM0_FRAMESYNC, BMASKDWORD);
197 falsealm_cnt->cnt_fast_fsync_fail = (ret_value & 0xffff);
198 falsealm_cnt->cnt_sb_search_fail = ((ret_value & 0xffff0000) >> 16);
199 ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER1, BMASKDWORD);
200 falsealm_cnt->cnt_parity_fail = ((ret_value & 0xffff0000) >> 16);
201 ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER2, BMASKDWORD);
202 falsealm_cnt->cnt_rate_illegal = (ret_value & 0xffff);
203 falsealm_cnt->cnt_crc8_fail = ((ret_value & 0xffff0000) >> 16);
204 ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER3, BMASKDWORD);
205 falsealm_cnt->cnt_mcs_fail = (ret_value & 0xffff);
206 falsealm_cnt->cnt_ofdm_fail = falsealm_cnt->cnt_parity_fail +
207 falsealm_cnt->cnt_rate_illegal +
208 falsealm_cnt->cnt_crc8_fail +
209 falsealm_cnt->cnt_mcs_fail +
210 falsealm_cnt->cnt_fast_fsync_fail +
211 falsealm_cnt->cnt_sb_search_fail;
212
213 if (rtlpriv->rtlhal.current_bandtype != BAND_ON_5G) {
214 /* hold cck counter */
215 rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
216 ret_value = rtl_get_bbreg(hw, RCCK0_FACOUNTERLOWER, BMASKBYTE0);
217 falsealm_cnt->cnt_cck_fail = ret_value;
218 ret_value = rtl_get_bbreg(hw, RCCK0_FACOUNTERUPPER, BMASKBYTE3);
219 falsealm_cnt->cnt_cck_fail += (ret_value & 0xff) << 8;
220 rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
221 } else {
222 falsealm_cnt->cnt_cck_fail = 0;
223 }
224
225 /* reset false alarm counter registers */
226 falsealm_cnt->cnt_all = falsealm_cnt->cnt_fast_fsync_fail +
227 falsealm_cnt->cnt_sb_search_fail +
228 falsealm_cnt->cnt_parity_fail +
229 falsealm_cnt->cnt_rate_illegal +
230 falsealm_cnt->cnt_crc8_fail +
231 falsealm_cnt->cnt_mcs_fail +
232 falsealm_cnt->cnt_cck_fail;
233
234 rtl_set_bbreg(hw, ROFDM1_LSTF, 0x08000000, 1);
235 /* update ofdm counter */
236 rtl_set_bbreg(hw, ROFDM1_LSTF, 0x08000000, 0);
237 /* update page C counter */
238 rtl_set_bbreg(hw, ROFDM0_LSTF, BIT(31), 0);
239 /* update page D counter */
240 rtl_set_bbreg(hw, ROFDM1_LSTF, BIT(31), 0);
241 if (rtlpriv->rtlhal.current_bandtype != BAND_ON_5G) {
242 /* reset cck counter */
243 rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
244 rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, 0x0000c000, 0);
245 /* enable cck counter */
246 rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, 0x0000c000, 2);
247 rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
248 }
249 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
250 "Cnt_Fast_Fsync_fail = %x, Cnt_SB_Search_fail = %x\n",
251 falsealm_cnt->cnt_fast_fsync_fail,
252 falsealm_cnt->cnt_sb_search_fail);
253 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
254 "Cnt_Parity_Fail = %x, Cnt_Rate_Illegal = %x, Cnt_Crc8_fail = %x, Cnt_Mcs_fail = %x\n",
255 falsealm_cnt->cnt_parity_fail,
256 falsealm_cnt->cnt_rate_illegal,
257 falsealm_cnt->cnt_crc8_fail,
258 falsealm_cnt->cnt_mcs_fail);
259 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
260 "Cnt_Ofdm_fail = %x, Cnt_Cck_fail = %x, Cnt_all = %x\n",
261 falsealm_cnt->cnt_ofdm_fail,
262 falsealm_cnt->cnt_cck_fail,
263 falsealm_cnt->cnt_all);
264 }
265
rtl92d_dm_find_minimum_rssi(struct ieee80211_hw * hw)266 static void rtl92d_dm_find_minimum_rssi(struct ieee80211_hw *hw)
267 {
268 struct rtl_priv *rtlpriv = rtl_priv(hw);
269 struct rtl_mac *mac = rtl_mac(rtlpriv);
270
271 /* Determine the minimum RSSI */
272 if ((mac->link_state < MAC80211_LINKED) &&
273 (rtlpriv->dm.UNDEC_SM_PWDB == 0)) {
274 de_digtable.min_undecorated_pwdb_for_dm = 0;
275 RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD,
276 "Not connected to any\n");
277 }
278 if (mac->link_state >= MAC80211_LINKED) {
279 if (mac->opmode == NL80211_IFTYPE_AP ||
280 mac->opmode == NL80211_IFTYPE_ADHOC) {
281 de_digtable.min_undecorated_pwdb_for_dm =
282 rtlpriv->dm.UNDEC_SM_PWDB;
283 RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD,
284 "AP Client PWDB = 0x%lx\n",
285 rtlpriv->dm.UNDEC_SM_PWDB);
286 } else {
287 de_digtable.min_undecorated_pwdb_for_dm =
288 rtlpriv->dm.undecorated_smoothed_pwdb;
289 RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD,
290 "STA Default Port PWDB = 0x%x\n",
291 de_digtable.min_undecorated_pwdb_for_dm);
292 }
293 } else {
294 de_digtable.min_undecorated_pwdb_for_dm =
295 rtlpriv->dm.UNDEC_SM_PWDB;
296 RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD,
297 "AP Ext Port or disconnect PWDB = 0x%x\n",
298 de_digtable.min_undecorated_pwdb_for_dm);
299 }
300
301 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "MinUndecoratedPWDBForDM =%d\n",
302 de_digtable.min_undecorated_pwdb_for_dm);
303 }
304
rtl92d_dm_cck_packet_detection_thresh(struct ieee80211_hw * hw)305 static void rtl92d_dm_cck_packet_detection_thresh(struct ieee80211_hw *hw)
306 {
307 struct rtl_priv *rtlpriv = rtl_priv(hw);
308 unsigned long flag = 0;
309
310 if (de_digtable.cursta_connectctate == DIG_STA_CONNECT) {
311 if (de_digtable.pre_cck_pd_state == CCK_PD_STAGE_LOWRSSI) {
312 if (de_digtable.min_undecorated_pwdb_for_dm <= 25)
313 de_digtable.cur_cck_pd_state =
314 CCK_PD_STAGE_LOWRSSI;
315 else
316 de_digtable.cur_cck_pd_state =
317 CCK_PD_STAGE_HIGHRSSI;
318 } else {
319 if (de_digtable.min_undecorated_pwdb_for_dm <= 20)
320 de_digtable.cur_cck_pd_state =
321 CCK_PD_STAGE_LOWRSSI;
322 else
323 de_digtable.cur_cck_pd_state =
324 CCK_PD_STAGE_HIGHRSSI;
325 }
326 } else {
327 de_digtable.cur_cck_pd_state = CCK_PD_STAGE_LOWRSSI;
328 }
329 if (de_digtable.pre_cck_pd_state != de_digtable.cur_cck_pd_state) {
330 if (de_digtable.cur_cck_pd_state == CCK_PD_STAGE_LOWRSSI) {
331 rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
332 rtl_set_bbreg(hw, RCCK0_CCA, BMASKBYTE2, 0x83);
333 rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
334 } else {
335 rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
336 rtl_set_bbreg(hw, RCCK0_CCA, BMASKBYTE2, 0xcd);
337 rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
338 }
339 de_digtable.pre_cck_pd_state = de_digtable.cur_cck_pd_state;
340 }
341 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "CurSTAConnectState=%s\n",
342 de_digtable.cursta_connectctate == DIG_STA_CONNECT ?
343 "DIG_STA_CONNECT " : "DIG_STA_DISCONNECT");
344 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "CCKPDStage=%s\n",
345 de_digtable.cur_cck_pd_state == CCK_PD_STAGE_LOWRSSI ?
346 "Low RSSI " : "High RSSI ");
347 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "is92d single phy =%x\n",
348 IS_92D_SINGLEPHY(rtlpriv->rtlhal.version));
349
350 }
351
rtl92d_dm_write_dig(struct ieee80211_hw * hw)352 void rtl92d_dm_write_dig(struct ieee80211_hw *hw)
353 {
354 struct rtl_priv *rtlpriv = rtl_priv(hw);
355
356 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
357 "cur_igvalue = 0x%x, pre_igvalue = 0x%x, backoff_val = %d\n",
358 de_digtable.cur_igvalue, de_digtable.pre_igvalue,
359 de_digtable.backoff_val);
360 if (de_digtable.dig_enable_flag == false) {
361 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "DIG is disabled\n");
362 de_digtable.pre_igvalue = 0x17;
363 return;
364 }
365 if (de_digtable.pre_igvalue != de_digtable.cur_igvalue) {
366 rtl_set_bbreg(hw, ROFDM0_XAAGCCORE1, 0x7f,
367 de_digtable.cur_igvalue);
368 rtl_set_bbreg(hw, ROFDM0_XBAGCCORE1, 0x7f,
369 de_digtable.cur_igvalue);
370 de_digtable.pre_igvalue = de_digtable.cur_igvalue;
371 }
372 }
373
rtl92d_early_mode_enabled(struct rtl_priv * rtlpriv)374 static void rtl92d_early_mode_enabled(struct rtl_priv *rtlpriv)
375 {
376 if ((rtlpriv->mac80211.link_state >= MAC80211_LINKED) &&
377 (rtlpriv->mac80211.vendor == PEER_CISCO)) {
378 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "IOT_PEER = CISCO\n");
379 if (de_digtable.last_min_undecorated_pwdb_for_dm >= 50
380 && de_digtable.min_undecorated_pwdb_for_dm < 50) {
381 rtl_write_byte(rtlpriv, REG_EARLY_MODE_CONTROL, 0x00);
382 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
383 "Early Mode Off\n");
384 } else if (de_digtable.last_min_undecorated_pwdb_for_dm <= 55 &&
385 de_digtable.min_undecorated_pwdb_for_dm > 55) {
386 rtl_write_byte(rtlpriv, REG_EARLY_MODE_CONTROL, 0x0f);
387 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
388 "Early Mode On\n");
389 }
390 } else if (!(rtl_read_byte(rtlpriv, REG_EARLY_MODE_CONTROL) & 0xf)) {
391 rtl_write_byte(rtlpriv, REG_EARLY_MODE_CONTROL, 0x0f);
392 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "Early Mode On\n");
393 }
394 }
395
rtl92d_dm_dig(struct ieee80211_hw * hw)396 static void rtl92d_dm_dig(struct ieee80211_hw *hw)
397 {
398 struct rtl_priv *rtlpriv = rtl_priv(hw);
399 u8 value_igi = de_digtable.cur_igvalue;
400 struct false_alarm_statistics *falsealm_cnt = &(rtlpriv->falsealm_cnt);
401
402 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "==>\n");
403 if (rtlpriv->rtlhal.earlymode_enable) {
404 rtl92d_early_mode_enabled(rtlpriv);
405 de_digtable.last_min_undecorated_pwdb_for_dm =
406 de_digtable.min_undecorated_pwdb_for_dm;
407 }
408 if (!rtlpriv->dm.dm_initialgain_enable)
409 return;
410
411 /* because we will send data pkt when scanning
412 * this will cause some ap like gear-3700 wep TP
413 * lower if we retrun here, this is the diff of
414 * mac80211 driver vs ieee80211 driver */
415 /* if (rtlpriv->mac80211.act_scanning)
416 * return; */
417
418 /* Not STA mode return tmp */
419 if (rtlpriv->mac80211.opmode != NL80211_IFTYPE_STATION)
420 return;
421 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "progress\n");
422 /* Decide the current status and if modify initial gain or not */
423 if (rtlpriv->mac80211.link_state >= MAC80211_LINKED)
424 de_digtable.cursta_connectctate = DIG_STA_CONNECT;
425 else
426 de_digtable.cursta_connectctate = DIG_STA_DISCONNECT;
427
428 /* adjust initial gain according to false alarm counter */
429 if (falsealm_cnt->cnt_all < DM_DIG_FA_TH0)
430 value_igi--;
431 else if (falsealm_cnt->cnt_all < DM_DIG_FA_TH1)
432 value_igi += 0;
433 else if (falsealm_cnt->cnt_all < DM_DIG_FA_TH2)
434 value_igi++;
435 else if (falsealm_cnt->cnt_all >= DM_DIG_FA_TH2)
436 value_igi += 2;
437 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
438 "dm_DIG() Before: large_fa_hit=%d, forbidden_igi=%x\n",
439 de_digtable.large_fa_hit, de_digtable.forbidden_igi);
440 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
441 "dm_DIG() Before: Recover_cnt=%d, rx_gain_range_min=%x\n",
442 de_digtable.recover_cnt, de_digtable.rx_gain_range_min);
443
444 /* deal with abnorally large false alarm */
445 if (falsealm_cnt->cnt_all > 10000) {
446 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
447 "dm_DIG(): Abnormally false alarm case\n");
448
449 de_digtable.large_fa_hit++;
450 if (de_digtable.forbidden_igi < de_digtable.cur_igvalue) {
451 de_digtable.forbidden_igi = de_digtable.cur_igvalue;
452 de_digtable.large_fa_hit = 1;
453 }
454 if (de_digtable.large_fa_hit >= 3) {
455 if ((de_digtable.forbidden_igi + 1) > DM_DIG_MAX)
456 de_digtable.rx_gain_range_min = DM_DIG_MAX;
457 else
458 de_digtable.rx_gain_range_min =
459 (de_digtable.forbidden_igi + 1);
460 de_digtable.recover_cnt = 3600; /* 3600=2hr */
461 }
462 } else {
463 /* Recovery mechanism for IGI lower bound */
464 if (de_digtable.recover_cnt != 0) {
465 de_digtable.recover_cnt--;
466 } else {
467 if (de_digtable.large_fa_hit == 0) {
468 if ((de_digtable.forbidden_igi - 1) <
469 DM_DIG_FA_LOWER) {
470 de_digtable.forbidden_igi =
471 DM_DIG_FA_LOWER;
472 de_digtable.rx_gain_range_min =
473 DM_DIG_FA_LOWER;
474
475 } else {
476 de_digtable.forbidden_igi--;
477 de_digtable.rx_gain_range_min =
478 (de_digtable.forbidden_igi + 1);
479 }
480 } else if (de_digtable.large_fa_hit == 3) {
481 de_digtable.large_fa_hit = 0;
482 }
483 }
484 }
485 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
486 "dm_DIG() After: large_fa_hit=%d, forbidden_igi=%x\n",
487 de_digtable.large_fa_hit, de_digtable.forbidden_igi);
488 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
489 "dm_DIG() After: recover_cnt=%d, rx_gain_range_min=%x\n",
490 de_digtable.recover_cnt, de_digtable.rx_gain_range_min);
491
492 if (value_igi > DM_DIG_MAX)
493 value_igi = DM_DIG_MAX;
494 else if (value_igi < de_digtable.rx_gain_range_min)
495 value_igi = de_digtable.rx_gain_range_min;
496 de_digtable.cur_igvalue = value_igi;
497 rtl92d_dm_write_dig(hw);
498 if (rtlpriv->rtlhal.current_bandtype != BAND_ON_5G)
499 rtl92d_dm_cck_packet_detection_thresh(hw);
500 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "<<==\n");
501 }
502
rtl92d_dm_init_dynamic_txpower(struct ieee80211_hw * hw)503 static void rtl92d_dm_init_dynamic_txpower(struct ieee80211_hw *hw)
504 {
505 struct rtl_priv *rtlpriv = rtl_priv(hw);
506
507 rtlpriv->dm.dynamic_txpower_enable = true;
508 rtlpriv->dm.last_dtp_lvl = TXHIGHPWRLEVEL_NORMAL;
509 rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
510 }
511
rtl92d_dm_dynamic_txpower(struct ieee80211_hw * hw)512 static void rtl92d_dm_dynamic_txpower(struct ieee80211_hw *hw)
513 {
514 struct rtl_priv *rtlpriv = rtl_priv(hw);
515 struct rtl_phy *rtlphy = &(rtlpriv->phy);
516 struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
517 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
518 long undecorated_smoothed_pwdb;
519
520 if ((!rtlpriv->dm.dynamic_txpower_enable)
521 || rtlpriv->dm.dm_flag & HAL_DM_HIPWR_DISABLE) {
522 rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
523 return;
524 }
525 if ((mac->link_state < MAC80211_LINKED) &&
526 (rtlpriv->dm.UNDEC_SM_PWDB == 0)) {
527 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
528 "Not connected to any\n");
529 rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
530 rtlpriv->dm.last_dtp_lvl = TXHIGHPWRLEVEL_NORMAL;
531 return;
532 }
533 if (mac->link_state >= MAC80211_LINKED) {
534 if (mac->opmode == NL80211_IFTYPE_ADHOC) {
535 undecorated_smoothed_pwdb =
536 rtlpriv->dm.UNDEC_SM_PWDB;
537 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
538 "IBSS Client PWDB = 0x%lx\n",
539 undecorated_smoothed_pwdb);
540 } else {
541 undecorated_smoothed_pwdb =
542 rtlpriv->dm.undecorated_smoothed_pwdb;
543 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
544 "STA Default Port PWDB = 0x%lx\n",
545 undecorated_smoothed_pwdb);
546 }
547 } else {
548 undecorated_smoothed_pwdb =
549 rtlpriv->dm.UNDEC_SM_PWDB;
550
551 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
552 "AP Ext Port PWDB = 0x%lx\n",
553 undecorated_smoothed_pwdb);
554 }
555 if (rtlhal->current_bandtype == BAND_ON_5G) {
556 if (undecorated_smoothed_pwdb >= 0x33) {
557 rtlpriv->dm.dynamic_txhighpower_lvl =
558 TXHIGHPWRLEVEL_LEVEL2;
559 RT_TRACE(rtlpriv, COMP_HIPWR, DBG_LOUD,
560 "5G:TxHighPwrLevel_Level2 (TxPwr=0x0)\n");
561 } else if ((undecorated_smoothed_pwdb < 0x33)
562 && (undecorated_smoothed_pwdb >= 0x2b)) {
563 rtlpriv->dm.dynamic_txhighpower_lvl =
564 TXHIGHPWRLEVEL_LEVEL1;
565 RT_TRACE(rtlpriv, COMP_HIPWR, DBG_LOUD,
566 "5G:TxHighPwrLevel_Level1 (TxPwr=0x10)\n");
567 } else if (undecorated_smoothed_pwdb < 0x2b) {
568 rtlpriv->dm.dynamic_txhighpower_lvl =
569 TXHIGHPWRLEVEL_NORMAL;
570 RT_TRACE(rtlpriv, COMP_HIPWR, DBG_LOUD,
571 "5G:TxHighPwrLevel_Normal\n");
572 }
573 } else {
574 if (undecorated_smoothed_pwdb >=
575 TX_POWER_NEAR_FIELD_THRESH_LVL2) {
576 rtlpriv->dm.dynamic_txhighpower_lvl =
577 TXHIGHPWRLEVEL_LEVEL2;
578 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
579 "TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x0)\n");
580 } else
581 if ((undecorated_smoothed_pwdb <
582 (TX_POWER_NEAR_FIELD_THRESH_LVL2 - 3))
583 && (undecorated_smoothed_pwdb >=
584 TX_POWER_NEAR_FIELD_THRESH_LVL1)) {
585
586 rtlpriv->dm.dynamic_txhighpower_lvl =
587 TXHIGHPWRLEVEL_LEVEL1;
588 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
589 "TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x10)\n");
590 } else if (undecorated_smoothed_pwdb <
591 (TX_POWER_NEAR_FIELD_THRESH_LVL1 - 5)) {
592 rtlpriv->dm.dynamic_txhighpower_lvl =
593 TXHIGHPWRLEVEL_NORMAL;
594 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
595 "TXHIGHPWRLEVEL_NORMAL\n");
596 }
597 }
598 if ((rtlpriv->dm.dynamic_txhighpower_lvl != rtlpriv->dm.last_dtp_lvl)) {
599 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
600 "PHY_SetTxPowerLevel8192S() Channel = %d\n",
601 rtlphy->current_channel);
602 rtl92d_phy_set_txpower_level(hw, rtlphy->current_channel);
603 }
604 rtlpriv->dm.last_dtp_lvl = rtlpriv->dm.dynamic_txhighpower_lvl;
605 }
606
rtl92d_dm_pwdb_monitor(struct ieee80211_hw * hw)607 static void rtl92d_dm_pwdb_monitor(struct ieee80211_hw *hw)
608 {
609 struct rtl_priv *rtlpriv = rtl_priv(hw);
610
611 /* AP & ADHOC & MESH will return tmp */
612 if (rtlpriv->mac80211.opmode != NL80211_IFTYPE_STATION)
613 return;
614 /* Indicate Rx signal strength to FW. */
615 if (rtlpriv->dm.useramask) {
616 u32 temp = rtlpriv->dm.undecorated_smoothed_pwdb;
617
618 temp <<= 16;
619 temp |= 0x100;
620 /* fw v12 cmdid 5:use max macid ,for nic ,
621 * default macid is 0 ,max macid is 1 */
622 rtl92d_fill_h2c_cmd(hw, H2C_RSSI_REPORT, 3, (u8 *) (&temp));
623 } else {
624 rtl_write_byte(rtlpriv, 0x4fe,
625 (u8) rtlpriv->dm.undecorated_smoothed_pwdb);
626 }
627 }
628
rtl92d_dm_init_edca_turbo(struct ieee80211_hw * hw)629 void rtl92d_dm_init_edca_turbo(struct ieee80211_hw *hw)
630 {
631 struct rtl_priv *rtlpriv = rtl_priv(hw);
632
633 rtlpriv->dm.current_turbo_edca = false;
634 rtlpriv->dm.is_any_nonbepkts = false;
635 rtlpriv->dm.is_cur_rdlstate = false;
636 }
637
rtl92d_dm_check_edca_turbo(struct ieee80211_hw * hw)638 static void rtl92d_dm_check_edca_turbo(struct ieee80211_hw *hw)
639 {
640 struct rtl_priv *rtlpriv = rtl_priv(hw);
641 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
642 static u64 last_txok_cnt;
643 static u64 last_rxok_cnt;
644 u64 cur_txok_cnt;
645 u64 cur_rxok_cnt;
646 u32 edca_be_ul = 0x5ea42b;
647 u32 edca_be_dl = 0x5ea42b;
648
649 if (mac->link_state != MAC80211_LINKED) {
650 rtlpriv->dm.current_turbo_edca = false;
651 goto exit;
652 }
653
654 /* Enable BEQ TxOP limit configuration in wireless G-mode. */
655 /* To check whether we shall force turn on TXOP configuration. */
656 if ((!rtlpriv->dm.disable_framebursting) &&
657 (rtlpriv->sec.pairwise_enc_algorithm == WEP40_ENCRYPTION ||
658 rtlpriv->sec.pairwise_enc_algorithm == WEP104_ENCRYPTION ||
659 rtlpriv->sec.pairwise_enc_algorithm == TKIP_ENCRYPTION)) {
660 /* Force TxOP limit to 0x005e for UL. */
661 if (!(edca_be_ul & 0xffff0000))
662 edca_be_ul |= 0x005e0000;
663 /* Force TxOP limit to 0x005e for DL. */
664 if (!(edca_be_dl & 0xffff0000))
665 edca_be_dl |= 0x005e0000;
666 }
667
668 if ((!rtlpriv->dm.is_any_nonbepkts) &&
669 (!rtlpriv->dm.disable_framebursting)) {
670 cur_txok_cnt = rtlpriv->stats.txbytesunicast - last_txok_cnt;
671 cur_rxok_cnt = rtlpriv->stats.rxbytesunicast - last_rxok_cnt;
672 if (cur_rxok_cnt > 4 * cur_txok_cnt) {
673 if (!rtlpriv->dm.is_cur_rdlstate ||
674 !rtlpriv->dm.current_turbo_edca) {
675 rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM,
676 edca_be_dl);
677 rtlpriv->dm.is_cur_rdlstate = true;
678 }
679 } else {
680 if (rtlpriv->dm.is_cur_rdlstate ||
681 !rtlpriv->dm.current_turbo_edca) {
682 rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM,
683 edca_be_ul);
684 rtlpriv->dm.is_cur_rdlstate = false;
685 }
686 }
687 rtlpriv->dm.current_turbo_edca = true;
688 } else {
689 if (rtlpriv->dm.current_turbo_edca) {
690 u8 tmp = AC0_BE;
691 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_AC_PARAM,
692 (u8 *) (&tmp));
693 rtlpriv->dm.current_turbo_edca = false;
694 }
695 }
696
697 exit:
698 rtlpriv->dm.is_any_nonbepkts = false;
699 last_txok_cnt = rtlpriv->stats.txbytesunicast;
700 last_rxok_cnt = rtlpriv->stats.rxbytesunicast;
701 }
702
rtl92d_dm_rxgain_tracking_thermalmeter(struct ieee80211_hw * hw)703 static void rtl92d_dm_rxgain_tracking_thermalmeter(struct ieee80211_hw *hw)
704 {
705 struct rtl_priv *rtlpriv = rtl_priv(hw);
706 u8 index_mapping[RX_INDEX_MAPPING_NUM] = {
707 0x0f, 0x0f, 0x0d, 0x0c, 0x0b,
708 0x0a, 0x09, 0x08, 0x07, 0x06,
709 0x05, 0x04, 0x04, 0x03, 0x02
710 };
711 int i;
712 u32 u4tmp;
713
714 u4tmp = (index_mapping[(rtlpriv->efuse.eeprom_thermalmeter -
715 rtlpriv->dm.thermalvalue_rxgain)]) << 12;
716 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
717 "===> Rx Gain %x\n", u4tmp);
718 for (i = RF90_PATH_A; i < rtlpriv->phy.num_total_rfpath; i++)
719 rtl_set_rfreg(hw, i, 0x3C, BRFREGOFFSETMASK,
720 (rtlpriv->phy.reg_rf3c[i] & (~(0xF000))) | u4tmp);
721 }
722
rtl92d_bandtype_2_4G(struct ieee80211_hw * hw,long * temp_cckg,u8 * cck_index_old)723 static void rtl92d_bandtype_2_4G(struct ieee80211_hw *hw, long *temp_cckg,
724 u8 *cck_index_old)
725 {
726 struct rtl_priv *rtlpriv = rtl_priv(hw);
727 int i;
728 unsigned long flag = 0;
729 long temp_cck;
730
731 /* Query CCK default setting From 0xa24 */
732 rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
733 temp_cck = rtl_get_bbreg(hw, RCCK0_TXFILTER2,
734 BMASKDWORD) & BMASKCCK;
735 rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
736 for (i = 0; i < CCK_TABLE_LENGTH; i++) {
737 if (rtlpriv->dm.cck_inch14) {
738 if (!memcmp((void *)&temp_cck,
739 (void *)&cckswing_table_ch14[i][2], 4)) {
740 *cck_index_old = (u8) i;
741 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
742 "Initial reg0x%x = 0x%lx, cck_index=0x%x, ch 14 %d\n",
743 RCCK0_TXFILTER2, temp_cck,
744 *cck_index_old,
745 rtlpriv->dm.cck_inch14);
746 break;
747 }
748 } else {
749 if (!memcmp((void *) &temp_cck,
750 &cckswing_table_ch1ch13[i][2], 4)) {
751 *cck_index_old = (u8) i;
752 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
753 "Initial reg0x%x = 0x%lx, cck_index = 0x%x, ch14 %d\n",
754 RCCK0_TXFILTER2, temp_cck,
755 *cck_index_old,
756 rtlpriv->dm.cck_inch14);
757 break;
758 }
759 }
760 }
761 *temp_cckg = temp_cck;
762 }
763
rtl92d_bandtype_5G(struct rtl_hal * rtlhal,u8 * ofdm_index,bool * internal_pa,u8 thermalvalue,u8 delta,u8 rf,struct rtl_efuse * rtlefuse,struct rtl_priv * rtlpriv,struct rtl_phy * rtlphy,u8 index_mapping[5][INDEX_MAPPING_NUM],u8 index_mapping_pa[8][INDEX_MAPPING_NUM])764 static void rtl92d_bandtype_5G(struct rtl_hal *rtlhal, u8 *ofdm_index,
765 bool *internal_pa, u8 thermalvalue, u8 delta,
766 u8 rf, struct rtl_efuse *rtlefuse,
767 struct rtl_priv *rtlpriv, struct rtl_phy *rtlphy,
768 u8 index_mapping[5][INDEX_MAPPING_NUM],
769 u8 index_mapping_pa[8][INDEX_MAPPING_NUM])
770 {
771 int i;
772 u8 index;
773 u8 offset = 0;
774
775 for (i = 0; i < rf; i++) {
776 if (rtlhal->macphymode == DUALMAC_DUALPHY &&
777 rtlhal->interfaceindex == 1) /* MAC 1 5G */
778 *internal_pa = rtlefuse->internal_pa_5g[1];
779 else
780 *internal_pa = rtlefuse->internal_pa_5g[i];
781 if (*internal_pa) {
782 if (rtlhal->interfaceindex == 1 || i == rf)
783 offset = 4;
784 else
785 offset = 0;
786 if (rtlphy->current_channel >= 100 &&
787 rtlphy->current_channel <= 165)
788 offset += 2;
789 } else {
790 if (rtlhal->interfaceindex == 1 || i == rf)
791 offset = 2;
792 else
793 offset = 0;
794 }
795 if (thermalvalue > rtlefuse->eeprom_thermalmeter)
796 offset++;
797 if (*internal_pa) {
798 if (delta > INDEX_MAPPING_NUM - 1)
799 index = index_mapping_pa[offset]
800 [INDEX_MAPPING_NUM - 1];
801 else
802 index =
803 index_mapping_pa[offset][delta];
804 } else {
805 if (delta > INDEX_MAPPING_NUM - 1)
806 index =
807 index_mapping[offset][INDEX_MAPPING_NUM - 1];
808 else
809 index = index_mapping[offset][delta];
810 }
811 if (thermalvalue > rtlefuse->eeprom_thermalmeter) {
812 if (*internal_pa && thermalvalue > 0x12) {
813 ofdm_index[i] = rtlpriv->dm.ofdm_index[i] -
814 ((delta / 2) * 3 + (delta % 2));
815 } else {
816 ofdm_index[i] -= index;
817 }
818 } else {
819 ofdm_index[i] += index;
820 }
821 }
822 }
823
rtl92d_dm_txpower_tracking_callback_thermalmeter(struct ieee80211_hw * hw)824 static void rtl92d_dm_txpower_tracking_callback_thermalmeter(
825 struct ieee80211_hw *hw)
826 {
827 struct rtl_priv *rtlpriv = rtl_priv(hw);
828 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
829 struct rtl_phy *rtlphy = &(rtlpriv->phy);
830 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
831 u8 thermalvalue, delta, delta_lck, delta_iqk, delta_rxgain;
832 u8 offset, thermalvalue_avg_count = 0;
833 u32 thermalvalue_avg = 0;
834 bool internal_pa = false;
835 long ele_a = 0, ele_d, temp_cck, val_x, value32;
836 long val_y, ele_c = 0;
837 u8 ofdm_index[2];
838 u8 cck_index = 0;
839 u8 ofdm_index_old[2];
840 u8 cck_index_old = 0;
841 u8 index;
842 int i;
843 bool is2t = IS_92D_SINGLEPHY(rtlhal->version);
844 u8 ofdm_min_index = 6, ofdm_min_index_internal_pa = 3, rf;
845 u8 indexforchannel =
846 rtl92d_get_rightchnlplace_for_iqk(rtlphy->current_channel);
847 u8 index_mapping[5][INDEX_MAPPING_NUM] = {
848 /* 5G, path A/MAC 0, decrease power */
849 {0, 1, 3, 6, 8, 9, 11, 13, 14, 16, 17, 18, 18},
850 /* 5G, path A/MAC 0, increase power */
851 {0, 2, 4, 5, 7, 10, 12, 14, 16, 18, 18, 18, 18},
852 /* 5G, path B/MAC 1, decrease power */
853 {0, 2, 3, 6, 8, 9, 11, 13, 14, 16, 17, 18, 18},
854 /* 5G, path B/MAC 1, increase power */
855 {0, 2, 4, 5, 7, 10, 13, 16, 16, 18, 18, 18, 18},
856 /* 2.4G, for decreas power */
857 {0, 1, 2, 3, 4, 5, 6, 7, 7, 8, 9, 10, 10},
858 };
859 u8 index_mapping_internal_pa[8][INDEX_MAPPING_NUM] = {
860 /* 5G, path A/MAC 0, ch36-64, decrease power */
861 {0, 1, 2, 4, 6, 7, 9, 11, 12, 14, 15, 16, 16},
862 /* 5G, path A/MAC 0, ch36-64, increase power */
863 {0, 2, 4, 5, 7, 10, 12, 14, 16, 18, 18, 18, 18},
864 /* 5G, path A/MAC 0, ch100-165, decrease power */
865 {0, 1, 2, 3, 5, 6, 8, 10, 11, 13, 14, 15, 15},
866 /* 5G, path A/MAC 0, ch100-165, increase power */
867 {0, 2, 4, 5, 7, 10, 12, 14, 16, 18, 18, 18, 18},
868 /* 5G, path B/MAC 1, ch36-64, decrease power */
869 {0, 1, 2, 4, 6, 7, 9, 11, 12, 14, 15, 16, 16},
870 /* 5G, path B/MAC 1, ch36-64, increase power */
871 {0, 2, 4, 5, 7, 10, 13, 16, 16, 18, 18, 18, 18},
872 /* 5G, path B/MAC 1, ch100-165, decrease power */
873 {0, 1, 2, 3, 5, 6, 8, 9, 10, 12, 13, 14, 14},
874 /* 5G, path B/MAC 1, ch100-165, increase power */
875 {0, 2, 4, 5, 7, 10, 13, 16, 16, 18, 18, 18, 18},
876 };
877
878 rtlpriv->dm.txpower_trackinginit = true;
879 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, "\n");
880 thermalvalue = (u8) rtl_get_rfreg(hw, RF90_PATH_A, RF_T_METER, 0xf800);
881 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
882 "Readback Thermal Meter = 0x%x pre thermal meter 0x%x eeprom_thermalmeter 0x%x\n",
883 thermalvalue,
884 rtlpriv->dm.thermalvalue, rtlefuse->eeprom_thermalmeter);
885 rtl92d_phy_ap_calibrate(hw, (thermalvalue -
886 rtlefuse->eeprom_thermalmeter));
887 if (is2t)
888 rf = 2;
889 else
890 rf = 1;
891 if (thermalvalue) {
892 ele_d = rtl_get_bbreg(hw, ROFDM0_XATxIQIMBALANCE,
893 BMASKDWORD) & BMASKOFDM_D;
894 for (i = 0; i < OFDM_TABLE_SIZE_92D; i++) {
895 if (ele_d == (ofdmswing_table[i] & BMASKOFDM_D)) {
896 ofdm_index_old[0] = (u8) i;
897
898 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
899 "Initial pathA ele_d reg0x%x = 0x%lx, ofdm_index=0x%x\n",
900 ROFDM0_XATxIQIMBALANCE,
901 ele_d, ofdm_index_old[0]);
902 break;
903 }
904 }
905 if (is2t) {
906 ele_d = rtl_get_bbreg(hw, ROFDM0_XBTxIQIMBALANCE,
907 BMASKDWORD) & BMASKOFDM_D;
908 for (i = 0; i < OFDM_TABLE_SIZE_92D; i++) {
909 if (ele_d ==
910 (ofdmswing_table[i] & BMASKOFDM_D)) {
911 ofdm_index_old[1] = (u8) i;
912 RT_TRACE(rtlpriv, COMP_POWER_TRACKING,
913 DBG_LOUD,
914 "Initial pathB ele_d reg 0x%x = 0x%lx, ofdm_index = 0x%x\n",
915 ROFDM0_XBTxIQIMBALANCE, ele_d,
916 ofdm_index_old[1]);
917 break;
918 }
919 }
920 }
921 if (rtlhal->current_bandtype == BAND_ON_2_4G) {
922 rtl92d_bandtype_2_4G(hw, &temp_cck, &cck_index_old);
923 } else {
924 temp_cck = 0x090e1317;
925 cck_index_old = 12;
926 }
927
928 if (!rtlpriv->dm.thermalvalue) {
929 rtlpriv->dm.thermalvalue =
930 rtlefuse->eeprom_thermalmeter;
931 rtlpriv->dm.thermalvalue_lck = thermalvalue;
932 rtlpriv->dm.thermalvalue_iqk = thermalvalue;
933 rtlpriv->dm.thermalvalue_rxgain =
934 rtlefuse->eeprom_thermalmeter;
935 for (i = 0; i < rf; i++)
936 rtlpriv->dm.ofdm_index[i] = ofdm_index_old[i];
937 rtlpriv->dm.cck_index = cck_index_old;
938 }
939 if (rtlhal->reloadtxpowerindex) {
940 for (i = 0; i < rf; i++)
941 rtlpriv->dm.ofdm_index[i] = ofdm_index_old[i];
942 rtlpriv->dm.cck_index = cck_index_old;
943 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
944 "reload ofdm index for band switch\n");
945 }
946 rtlpriv->dm.thermalvalue_avg
947 [rtlpriv->dm.thermalvalue_avg_index] = thermalvalue;
948 rtlpriv->dm.thermalvalue_avg_index++;
949 if (rtlpriv->dm.thermalvalue_avg_index == AVG_THERMAL_NUM)
950 rtlpriv->dm.thermalvalue_avg_index = 0;
951 for (i = 0; i < AVG_THERMAL_NUM; i++) {
952 if (rtlpriv->dm.thermalvalue_avg[i]) {
953 thermalvalue_avg +=
954 rtlpriv->dm.thermalvalue_avg[i];
955 thermalvalue_avg_count++;
956 }
957 }
958 if (thermalvalue_avg_count)
959 thermalvalue = (u8) (thermalvalue_avg /
960 thermalvalue_avg_count);
961 if (rtlhal->reloadtxpowerindex) {
962 delta = (thermalvalue > rtlefuse->eeprom_thermalmeter) ?
963 (thermalvalue - rtlefuse->eeprom_thermalmeter) :
964 (rtlefuse->eeprom_thermalmeter - thermalvalue);
965 rtlhal->reloadtxpowerindex = false;
966 rtlpriv->dm.done_txpower = false;
967 } else if (rtlpriv->dm.done_txpower) {
968 delta = (thermalvalue > rtlpriv->dm.thermalvalue) ?
969 (thermalvalue - rtlpriv->dm.thermalvalue) :
970 (rtlpriv->dm.thermalvalue - thermalvalue);
971 } else {
972 delta = (thermalvalue > rtlefuse->eeprom_thermalmeter) ?
973 (thermalvalue - rtlefuse->eeprom_thermalmeter) :
974 (rtlefuse->eeprom_thermalmeter - thermalvalue);
975 }
976 delta_lck = (thermalvalue > rtlpriv->dm.thermalvalue_lck) ?
977 (thermalvalue - rtlpriv->dm.thermalvalue_lck) :
978 (rtlpriv->dm.thermalvalue_lck - thermalvalue);
979 delta_iqk = (thermalvalue > rtlpriv->dm.thermalvalue_iqk) ?
980 (thermalvalue - rtlpriv->dm.thermalvalue_iqk) :
981 (rtlpriv->dm.thermalvalue_iqk - thermalvalue);
982 delta_rxgain =
983 (thermalvalue > rtlpriv->dm.thermalvalue_rxgain) ?
984 (thermalvalue - rtlpriv->dm.thermalvalue_rxgain) :
985 (rtlpriv->dm.thermalvalue_rxgain - thermalvalue);
986 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
987 "Readback Thermal Meter = 0x%x pre thermal meter 0x%x eeprom_thermalmeter 0x%x delta 0x%x delta_lck 0x%x delta_iqk 0x%x\n",
988 thermalvalue, rtlpriv->dm.thermalvalue,
989 rtlefuse->eeprom_thermalmeter, delta, delta_lck,
990 delta_iqk);
991 if ((delta_lck > rtlefuse->delta_lck) &&
992 (rtlefuse->delta_lck != 0)) {
993 rtlpriv->dm.thermalvalue_lck = thermalvalue;
994 rtl92d_phy_lc_calibrate(hw);
995 }
996 if (delta > 0 && rtlpriv->dm.txpower_track_control) {
997 rtlpriv->dm.done_txpower = true;
998 delta = (thermalvalue > rtlefuse->eeprom_thermalmeter) ?
999 (thermalvalue - rtlefuse->eeprom_thermalmeter) :
1000 (rtlefuse->eeprom_thermalmeter - thermalvalue);
1001 if (rtlhal->current_bandtype == BAND_ON_2_4G) {
1002 offset = 4;
1003 if (delta > INDEX_MAPPING_NUM - 1)
1004 index = index_mapping[offset]
1005 [INDEX_MAPPING_NUM - 1];
1006 else
1007 index = index_mapping[offset][delta];
1008 if (thermalvalue > rtlpriv->dm.thermalvalue) {
1009 for (i = 0; i < rf; i++)
1010 ofdm_index[i] -= delta;
1011 cck_index -= delta;
1012 } else {
1013 for (i = 0; i < rf; i++)
1014 ofdm_index[i] += index;
1015 cck_index += index;
1016 }
1017 } else if (rtlhal->current_bandtype == BAND_ON_5G) {
1018 rtl92d_bandtype_5G(rtlhal, ofdm_index,
1019 &internal_pa, thermalvalue,
1020 delta, rf, rtlefuse, rtlpriv,
1021 rtlphy, index_mapping,
1022 index_mapping_internal_pa);
1023 }
1024 if (is2t) {
1025 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1026 "temp OFDM_A_index=0x%x, OFDM_B_index = 0x%x,cck_index=0x%x\n",
1027 rtlpriv->dm.ofdm_index[0],
1028 rtlpriv->dm.ofdm_index[1],
1029 rtlpriv->dm.cck_index);
1030 } else {
1031 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1032 "temp OFDM_A_index=0x%x,cck_index = 0x%x\n",
1033 rtlpriv->dm.ofdm_index[0],
1034 rtlpriv->dm.cck_index);
1035 }
1036 for (i = 0; i < rf; i++) {
1037 if (ofdm_index[i] > OFDM_TABLE_SIZE_92D - 1)
1038 ofdm_index[i] = OFDM_TABLE_SIZE_92D - 1;
1039 else if (ofdm_index[i] < ofdm_min_index)
1040 ofdm_index[i] = ofdm_min_index;
1041 }
1042 if (rtlhal->current_bandtype == BAND_ON_2_4G) {
1043 if (cck_index > CCK_TABLE_SIZE - 1) {
1044 cck_index = CCK_TABLE_SIZE - 1;
1045 } else if (internal_pa ||
1046 rtlhal->current_bandtype ==
1047 BAND_ON_2_4G) {
1048 if (ofdm_index[i] <
1049 ofdm_min_index_internal_pa)
1050 ofdm_index[i] =
1051 ofdm_min_index_internal_pa;
1052 } else if (cck_index < 0) {
1053 cck_index = 0;
1054 }
1055 }
1056 if (is2t) {
1057 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1058 "new OFDM_A_index=0x%x, OFDM_B_index = 0x%x, cck_index=0x%x\n",
1059 ofdm_index[0], ofdm_index[1],
1060 cck_index);
1061 } else {
1062 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1063 "new OFDM_A_index=0x%x,cck_index = 0x%x\n",
1064 ofdm_index[0], cck_index);
1065 }
1066 ele_d = (ofdmswing_table[(u8) ofdm_index[0]] &
1067 0xFFC00000) >> 22;
1068 val_x = rtlphy->iqk_matrix_regsetting
1069 [indexforchannel].value[0][0];
1070 val_y = rtlphy->iqk_matrix_regsetting
1071 [indexforchannel].value[0][1];
1072 if (val_x != 0) {
1073 if ((val_x & 0x00000200) != 0)
1074 val_x = val_x | 0xFFFFFC00;
1075 ele_a =
1076 ((val_x * ele_d) >> 8) & 0x000003FF;
1077
1078 /* new element C = element D x Y */
1079 if ((val_y & 0x00000200) != 0)
1080 val_y = val_y | 0xFFFFFC00;
1081 ele_c = ((val_y * ele_d) >> 8) & 0x000003FF;
1082
1083 /* wirte new elements A, C, D to regC80 and
1084 * regC94, element B is always 0 */
1085 value32 = (ele_d << 22) | ((ele_c & 0x3F) <<
1086 16) | ele_a;
1087 rtl_set_bbreg(hw, ROFDM0_XATxIQIMBALANCE,
1088 BMASKDWORD, value32);
1089
1090 value32 = (ele_c & 0x000003C0) >> 6;
1091 rtl_set_bbreg(hw, ROFDM0_XCTxAFE, BMASKH4BITS,
1092 value32);
1093
1094 value32 = ((val_x * ele_d) >> 7) & 0x01;
1095 rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD, BIT(24),
1096 value32);
1097
1098 } else {
1099 rtl_set_bbreg(hw, ROFDM0_XATxIQIMBALANCE,
1100 BMASKDWORD,
1101 ofdmswing_table
1102 [(u8)ofdm_index[0]]);
1103 rtl_set_bbreg(hw, ROFDM0_XCTxAFE, BMASKH4BITS,
1104 0x00);
1105 rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
1106 BIT(24), 0x00);
1107 }
1108
1109 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1110 "TxPwrTracking for interface %d path A: X = 0x%lx, Y = 0x%lx ele_A = 0x%lx ele_C = 0x%lx ele_D = 0x%lx 0xe94 = 0x%lx 0xe9c = 0x%lx\n",
1111 rtlhal->interfaceindex,
1112 val_x, val_y, ele_a, ele_c, ele_d,
1113 val_x, val_y);
1114
1115 if (rtlhal->current_bandtype == BAND_ON_2_4G) {
1116 /* Adjust CCK according to IQK result */
1117 if (!rtlpriv->dm.cck_inch14) {
1118 rtl_write_byte(rtlpriv, 0xa22,
1119 cckswing_table_ch1ch13
1120 [(u8)cck_index][0]);
1121 rtl_write_byte(rtlpriv, 0xa23,
1122 cckswing_table_ch1ch13
1123 [(u8)cck_index][1]);
1124 rtl_write_byte(rtlpriv, 0xa24,
1125 cckswing_table_ch1ch13
1126 [(u8)cck_index][2]);
1127 rtl_write_byte(rtlpriv, 0xa25,
1128 cckswing_table_ch1ch13
1129 [(u8)cck_index][3]);
1130 rtl_write_byte(rtlpriv, 0xa26,
1131 cckswing_table_ch1ch13
1132 [(u8)cck_index][4]);
1133 rtl_write_byte(rtlpriv, 0xa27,
1134 cckswing_table_ch1ch13
1135 [(u8)cck_index][5]);
1136 rtl_write_byte(rtlpriv, 0xa28,
1137 cckswing_table_ch1ch13
1138 [(u8)cck_index][6]);
1139 rtl_write_byte(rtlpriv, 0xa29,
1140 cckswing_table_ch1ch13
1141 [(u8)cck_index][7]);
1142 } else {
1143 rtl_write_byte(rtlpriv, 0xa22,
1144 cckswing_table_ch14
1145 [(u8)cck_index][0]);
1146 rtl_write_byte(rtlpriv, 0xa23,
1147 cckswing_table_ch14
1148 [(u8)cck_index][1]);
1149 rtl_write_byte(rtlpriv, 0xa24,
1150 cckswing_table_ch14
1151 [(u8)cck_index][2]);
1152 rtl_write_byte(rtlpriv, 0xa25,
1153 cckswing_table_ch14
1154 [(u8)cck_index][3]);
1155 rtl_write_byte(rtlpriv, 0xa26,
1156 cckswing_table_ch14
1157 [(u8)cck_index][4]);
1158 rtl_write_byte(rtlpriv, 0xa27,
1159 cckswing_table_ch14
1160 [(u8)cck_index][5]);
1161 rtl_write_byte(rtlpriv, 0xa28,
1162 cckswing_table_ch14
1163 [(u8)cck_index][6]);
1164 rtl_write_byte(rtlpriv, 0xa29,
1165 cckswing_table_ch14
1166 [(u8)cck_index][7]);
1167 }
1168 }
1169 if (is2t) {
1170 ele_d = (ofdmswing_table[(u8) ofdm_index[1]] &
1171 0xFFC00000) >> 22;
1172 val_x = rtlphy->iqk_matrix_regsetting
1173 [indexforchannel].value[0][4];
1174 val_y = rtlphy->iqk_matrix_regsetting
1175 [indexforchannel].value[0][5];
1176 if (val_x != 0) {
1177 if ((val_x & 0x00000200) != 0)
1178 /* consider minus */
1179 val_x = val_x | 0xFFFFFC00;
1180 ele_a = ((val_x * ele_d) >> 8) &
1181 0x000003FF;
1182 /* new element C = element D x Y */
1183 if ((val_y & 0x00000200) != 0)
1184 val_y =
1185 val_y | 0xFFFFFC00;
1186 ele_c =
1187 ((val_y *
1188 ele_d) >> 8) & 0x00003FF;
1189 /* write new elements A, C, D to regC88
1190 * and regC9C, element B is always 0
1191 */
1192 value32 = (ele_d << 22) |
1193 ((ele_c & 0x3F) << 16) |
1194 ele_a;
1195 rtl_set_bbreg(hw,
1196 ROFDM0_XBTxIQIMBALANCE,
1197 BMASKDWORD, value32);
1198 value32 = (ele_c & 0x000003C0) >> 6;
1199 rtl_set_bbreg(hw, ROFDM0_XDTxAFE,
1200 BMASKH4BITS, value32);
1201 value32 = ((val_x * ele_d) >> 7) & 0x01;
1202 rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
1203 BIT(28), value32);
1204 } else {
1205 rtl_set_bbreg(hw,
1206 ROFDM0_XBTxIQIMBALANCE,
1207 BMASKDWORD,
1208 ofdmswing_table
1209 [(u8) ofdm_index[1]]);
1210 rtl_set_bbreg(hw, ROFDM0_XDTxAFE,
1211 BMASKH4BITS, 0x00);
1212 rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
1213 BIT(28), 0x00);
1214 }
1215 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1216 "TxPwrTracking path B: X = 0x%lx, Y = 0x%lx ele_A = 0x%lx ele_C = 0x%lx ele_D = 0x%lx 0xeb4 = 0x%lx 0xebc = 0x%lx\n",
1217 val_x, val_y, ele_a, ele_c,
1218 ele_d, val_x, val_y);
1219 }
1220 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1221 "TxPwrTracking 0xc80 = 0x%x, 0xc94 = 0x%x RF 0x24 = 0x%x\n",
1222 rtl_get_bbreg(hw, 0xc80, BMASKDWORD),
1223 rtl_get_bbreg(hw, 0xc94, BMASKDWORD),
1224 rtl_get_rfreg(hw, RF90_PATH_A, 0x24,
1225 BRFREGOFFSETMASK));
1226 }
1227 if ((delta_iqk > rtlefuse->delta_iqk) &&
1228 (rtlefuse->delta_iqk != 0)) {
1229 rtl92d_phy_reset_iqk_result(hw);
1230 rtlpriv->dm.thermalvalue_iqk = thermalvalue;
1231 rtl92d_phy_iq_calibrate(hw);
1232 }
1233 if (delta_rxgain > 0 && rtlhal->current_bandtype == BAND_ON_5G
1234 && thermalvalue <= rtlefuse->eeprom_thermalmeter) {
1235 rtlpriv->dm.thermalvalue_rxgain = thermalvalue;
1236 rtl92d_dm_rxgain_tracking_thermalmeter(hw);
1237 }
1238 if (rtlpriv->dm.txpower_track_control)
1239 rtlpriv->dm.thermalvalue = thermalvalue;
1240 }
1241
1242 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, "<===\n");
1243 }
1244
rtl92d_dm_initialize_txpower_tracking(struct ieee80211_hw * hw)1245 static void rtl92d_dm_initialize_txpower_tracking(struct ieee80211_hw *hw)
1246 {
1247 struct rtl_priv *rtlpriv = rtl_priv(hw);
1248
1249 rtlpriv->dm.txpower_tracking = true;
1250 rtlpriv->dm.txpower_trackinginit = false;
1251 rtlpriv->dm.txpower_track_control = true;
1252 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1253 "pMgntInfo->txpower_tracking = %d\n",
1254 rtlpriv->dm.txpower_tracking);
1255 }
1256
rtl92d_dm_check_txpower_tracking_thermal_meter(struct ieee80211_hw * hw)1257 void rtl92d_dm_check_txpower_tracking_thermal_meter(struct ieee80211_hw *hw)
1258 {
1259 struct rtl_priv *rtlpriv = rtl_priv(hw);
1260 static u8 tm_trigger;
1261
1262 if (!rtlpriv->dm.txpower_tracking)
1263 return;
1264
1265 if (!tm_trigger) {
1266 rtl_set_rfreg(hw, RF90_PATH_A, RF_T_METER, BIT(17) |
1267 BIT(16), 0x03);
1268 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1269 "Trigger 92S Thermal Meter!!\n");
1270 tm_trigger = 1;
1271 return;
1272 } else {
1273 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1274 "Schedule TxPowerTracking direct call!!\n");
1275 rtl92d_dm_txpower_tracking_callback_thermalmeter(hw);
1276 tm_trigger = 0;
1277 }
1278 }
1279
rtl92d_dm_init_rate_adaptive_mask(struct ieee80211_hw * hw)1280 void rtl92d_dm_init_rate_adaptive_mask(struct ieee80211_hw *hw)
1281 {
1282 struct rtl_priv *rtlpriv = rtl_priv(hw);
1283 struct rate_adaptive *ra = &(rtlpriv->ra);
1284
1285 ra->ratr_state = DM_RATR_STA_INIT;
1286 ra->pre_ratr_state = DM_RATR_STA_INIT;
1287 if (rtlpriv->dm.dm_type == DM_TYPE_BYDRIVER)
1288 rtlpriv->dm.useramask = true;
1289 else
1290 rtlpriv->dm.useramask = false;
1291 }
1292
rtl92d_dm_init(struct ieee80211_hw * hw)1293 void rtl92d_dm_init(struct ieee80211_hw *hw)
1294 {
1295 struct rtl_priv *rtlpriv = rtl_priv(hw);
1296
1297 rtlpriv->dm.dm_type = DM_TYPE_BYDRIVER;
1298 rtl92d_dm_diginit(hw);
1299 rtl92d_dm_init_dynamic_txpower(hw);
1300 rtl92d_dm_init_edca_turbo(hw);
1301 rtl92d_dm_init_rate_adaptive_mask(hw);
1302 rtl92d_dm_initialize_txpower_tracking(hw);
1303 }
1304
rtl92d_dm_watchdog(struct ieee80211_hw * hw)1305 void rtl92d_dm_watchdog(struct ieee80211_hw *hw)
1306 {
1307 struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1308 bool fw_current_inpsmode = false;
1309 bool fwps_awake = true;
1310
1311 /* 1. RF is OFF. (No need to do DM.)
1312 * 2. Fw is under power saving mode for FwLPS.
1313 * (Prevent from SW/FW I/O racing.)
1314 * 3. IPS workitem is scheduled. (Prevent from IPS sequence
1315 * to be swapped with DM.
1316 * 4. RFChangeInProgress is TRUE.
1317 * (Prevent from broken by IPS/HW/SW Rf off.) */
1318
1319 if ((ppsc->rfpwr_state == ERFON) && ((!fw_current_inpsmode) &&
1320 fwps_awake) && (!ppsc->rfchange_inprogress)) {
1321 rtl92d_dm_pwdb_monitor(hw);
1322 rtl92d_dm_false_alarm_counter_statistics(hw);
1323 rtl92d_dm_find_minimum_rssi(hw);
1324 rtl92d_dm_dig(hw);
1325 /* rtl92d_dm_dynamic_bb_powersaving(hw); */
1326 rtl92d_dm_dynamic_txpower(hw);
1327 /* rtl92d_dm_check_txpower_tracking_thermal_meter(hw); */
1328 /* rtl92d_dm_refresh_rate_adaptive_mask(hw); */
1329 /* rtl92d_dm_interrupt_migration(hw); */
1330 rtl92d_dm_check_edca_turbo(hw);
1331 }
1332 }
1333