1 /*
2 * Copyright 2012-15 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26 #include <linux/delay.h>
27 #include <linux/slab.h>
28
29 #include "dm_services.h"
30 #include "basics/dc_common.h"
31 #include "dc.h"
32 #include "core_types.h"
33 #include "resource.h"
34 #include "ipp.h"
35 #include "timing_generator.h"
36
37 #define DC_LOGGER dc->ctx->logger
38
39 /*******************************************************************************
40 * Private functions
41 ******************************************************************************/
update_stream_signal(struct dc_stream_state * stream,struct dc_sink * sink)42 void update_stream_signal(struct dc_stream_state *stream, struct dc_sink *sink)
43 {
44 if (sink->sink_signal == SIGNAL_TYPE_NONE)
45 stream->signal = stream->link->connector_signal;
46 else
47 stream->signal = sink->sink_signal;
48
49 if (dc_is_dvi_signal(stream->signal)) {
50 if (stream->ctx->dc->caps.dual_link_dvi &&
51 (stream->timing.pix_clk_100hz / 10) > TMDS_MAX_PIXEL_CLOCK &&
52 sink->sink_signal != SIGNAL_TYPE_DVI_SINGLE_LINK)
53 stream->signal = SIGNAL_TYPE_DVI_DUAL_LINK;
54 else
55 stream->signal = SIGNAL_TYPE_DVI_SINGLE_LINK;
56 }
57 }
58
dc_stream_construct(struct dc_stream_state * stream,struct dc_sink * dc_sink_data)59 static bool dc_stream_construct(struct dc_stream_state *stream,
60 struct dc_sink *dc_sink_data)
61 {
62 uint32_t i = 0;
63
64 stream->sink = dc_sink_data;
65 dc_sink_retain(dc_sink_data);
66
67 stream->ctx = dc_sink_data->ctx;
68 stream->link = dc_sink_data->link;
69 stream->sink_patches = dc_sink_data->edid_caps.panel_patch;
70 stream->converter_disable_audio = dc_sink_data->converter_disable_audio;
71 stream->qs_bit = dc_sink_data->edid_caps.qs_bit;
72 stream->qy_bit = dc_sink_data->edid_caps.qy_bit;
73
74 /* Copy audio modes */
75 /* TODO - Remove this translation */
76 for (i = 0; i < (dc_sink_data->edid_caps.audio_mode_count); i++)
77 {
78 stream->audio_info.modes[i].channel_count = dc_sink_data->edid_caps.audio_modes[i].channel_count;
79 stream->audio_info.modes[i].format_code = dc_sink_data->edid_caps.audio_modes[i].format_code;
80 stream->audio_info.modes[i].sample_rates.all = dc_sink_data->edid_caps.audio_modes[i].sample_rate;
81 stream->audio_info.modes[i].sample_size = dc_sink_data->edid_caps.audio_modes[i].sample_size;
82 }
83 stream->audio_info.mode_count = dc_sink_data->edid_caps.audio_mode_count;
84 stream->audio_info.audio_latency = dc_sink_data->edid_caps.audio_latency;
85 stream->audio_info.video_latency = dc_sink_data->edid_caps.video_latency;
86 memmove(
87 stream->audio_info.display_name,
88 dc_sink_data->edid_caps.display_name,
89 AUDIO_INFO_DISPLAY_NAME_SIZE_IN_CHARS);
90 stream->audio_info.manufacture_id = dc_sink_data->edid_caps.manufacturer_id;
91 stream->audio_info.product_id = dc_sink_data->edid_caps.product_id;
92 stream->audio_info.flags.all = dc_sink_data->edid_caps.speaker_flags;
93
94 if (dc_sink_data->dc_container_id != NULL) {
95 struct dc_container_id *dc_container_id = dc_sink_data->dc_container_id;
96
97 stream->audio_info.port_id[0] = dc_container_id->portId[0];
98 stream->audio_info.port_id[1] = dc_container_id->portId[1];
99 } else {
100 /* TODO - WindowDM has implemented,
101 other DMs need Unhardcode port_id */
102 stream->audio_info.port_id[0] = 0x5558859e;
103 stream->audio_info.port_id[1] = 0xd989449;
104 }
105
106 /* EDID CAP translation for HDMI 2.0 */
107 stream->timing.flags.LTE_340MCSC_SCRAMBLE = dc_sink_data->edid_caps.lte_340mcsc_scramble;
108
109 memset(&stream->timing.dsc_cfg, 0, sizeof(stream->timing.dsc_cfg));
110 stream->timing.dsc_cfg.num_slices_h = 0;
111 stream->timing.dsc_cfg.num_slices_v = 0;
112 stream->timing.dsc_cfg.bits_per_pixel = 128;
113 stream->timing.dsc_cfg.block_pred_enable = 1;
114 stream->timing.dsc_cfg.linebuf_depth = 9;
115 stream->timing.dsc_cfg.version_minor = 2;
116 stream->timing.dsc_cfg.ycbcr422_simple = 0;
117
118 update_stream_signal(stream, dc_sink_data);
119
120 stream->out_transfer_func = dc_create_transfer_func();
121 if (stream->out_transfer_func == NULL) {
122 dc_sink_release(dc_sink_data);
123 return false;
124 }
125 stream->out_transfer_func->type = TF_TYPE_BYPASS;
126
127 stream->stream_id = stream->ctx->dc_stream_id_count;
128 stream->ctx->dc_stream_id_count++;
129
130 return true;
131 }
132
dc_stream_destruct(struct dc_stream_state * stream)133 static void dc_stream_destruct(struct dc_stream_state *stream)
134 {
135 dc_sink_release(stream->sink);
136 if (stream->out_transfer_func != NULL) {
137 dc_transfer_func_release(stream->out_transfer_func);
138 stream->out_transfer_func = NULL;
139 }
140 }
141
dc_stream_retain(struct dc_stream_state * stream)142 void dc_stream_retain(struct dc_stream_state *stream)
143 {
144 kref_get(&stream->refcount);
145 }
146
dc_stream_free(struct kref * kref)147 static void dc_stream_free(struct kref *kref)
148 {
149 struct dc_stream_state *stream = container_of(kref, struct dc_stream_state, refcount);
150
151 dc_stream_destruct(stream);
152 kfree(stream);
153 }
154
dc_stream_release(struct dc_stream_state * stream)155 void dc_stream_release(struct dc_stream_state *stream)
156 {
157 if (stream != NULL) {
158 kref_put(&stream->refcount, dc_stream_free);
159 }
160 }
161
dc_create_stream_for_sink(struct dc_sink * sink)162 struct dc_stream_state *dc_create_stream_for_sink(
163 struct dc_sink *sink)
164 {
165 struct dc_stream_state *stream;
166
167 if (sink == NULL)
168 return NULL;
169
170 stream = kzalloc(sizeof(struct dc_stream_state), GFP_KERNEL);
171 if (stream == NULL)
172 goto alloc_fail;
173
174 if (dc_stream_construct(stream, sink) == false)
175 goto construct_fail;
176
177 kref_init(&stream->refcount);
178
179 return stream;
180
181 construct_fail:
182 kfree(stream);
183
184 alloc_fail:
185 return NULL;
186 }
187
dc_copy_stream(const struct dc_stream_state * stream)188 struct dc_stream_state *dc_copy_stream(const struct dc_stream_state *stream)
189 {
190 struct dc_stream_state *new_stream;
191
192 new_stream = kmemdup(stream, sizeof(struct dc_stream_state), GFP_KERNEL);
193 if (!new_stream)
194 return NULL;
195
196 if (new_stream->sink)
197 dc_sink_retain(new_stream->sink);
198
199 if (new_stream->out_transfer_func)
200 dc_transfer_func_retain(new_stream->out_transfer_func);
201
202 new_stream->stream_id = new_stream->ctx->dc_stream_id_count;
203 new_stream->ctx->dc_stream_id_count++;
204
205 /* If using dynamic encoder assignment, wait till stream committed to assign encoder. */
206 if (new_stream->ctx->dc->res_pool->funcs->link_encs_assign)
207 new_stream->link_enc = NULL;
208
209 kref_init(&new_stream->refcount);
210
211 return new_stream;
212 }
213
214 /**
215 * dc_stream_get_status_from_state - Get stream status from given dc state
216 * @state: DC state to find the stream status in
217 * @stream: The stream to get the stream status for
218 *
219 * The given stream is expected to exist in the given dc state. Otherwise, NULL
220 * will be returned.
221 */
dc_stream_get_status_from_state(struct dc_state * state,struct dc_stream_state * stream)222 struct dc_stream_status *dc_stream_get_status_from_state(
223 struct dc_state *state,
224 struct dc_stream_state *stream)
225 {
226 uint8_t i;
227
228 if (state == NULL)
229 return NULL;
230
231 for (i = 0; i < state->stream_count; i++) {
232 if (stream == state->streams[i])
233 return &state->stream_status[i];
234 }
235
236 return NULL;
237 }
238
239 /**
240 * dc_stream_get_status() - Get current stream status of the given stream state
241 * @stream: The stream to get the stream status for.
242 *
243 * The given stream is expected to exist in dc->current_state. Otherwise, NULL
244 * will be returned.
245 */
dc_stream_get_status(struct dc_stream_state * stream)246 struct dc_stream_status *dc_stream_get_status(
247 struct dc_stream_state *stream)
248 {
249 struct dc *dc = stream->ctx->dc;
250 return dc_stream_get_status_from_state(dc->current_state, stream);
251 }
252
program_cursor_attributes(struct dc * dc,struct dc_stream_state * stream,const struct dc_cursor_attributes * attributes)253 static void program_cursor_attributes(
254 struct dc *dc,
255 struct dc_stream_state *stream,
256 const struct dc_cursor_attributes *attributes)
257 {
258 int i;
259 struct resource_context *res_ctx;
260 struct pipe_ctx *pipe_to_program = NULL;
261
262 if (!stream)
263 return;
264
265 res_ctx = &dc->current_state->res_ctx;
266
267 for (i = 0; i < MAX_PIPES; i++) {
268 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i];
269
270 if (pipe_ctx->stream != stream)
271 continue;
272
273 if (!pipe_to_program) {
274 pipe_to_program = pipe_ctx;
275 dc->hwss.cursor_lock(dc, pipe_to_program, true);
276 if (pipe_to_program->next_odm_pipe)
277 dc->hwss.cursor_lock(dc, pipe_to_program->next_odm_pipe, true);
278 }
279
280 dc->hwss.set_cursor_attribute(pipe_ctx);
281 if (dc->hwss.set_cursor_sdr_white_level)
282 dc->hwss.set_cursor_sdr_white_level(pipe_ctx);
283 }
284
285 if (pipe_to_program) {
286 dc->hwss.cursor_lock(dc, pipe_to_program, false);
287 if (pipe_to_program->next_odm_pipe)
288 dc->hwss.cursor_lock(dc, pipe_to_program->next_odm_pipe, false);
289 }
290 }
291
292 #ifndef TRIM_FSFT
293 /*
294 * dc_optimize_timing_for_fsft() - dc to optimize timing
295 */
dc_optimize_timing_for_fsft(struct dc_stream_state * pStream,unsigned int max_input_rate_in_khz)296 bool dc_optimize_timing_for_fsft(
297 struct dc_stream_state *pStream,
298 unsigned int max_input_rate_in_khz)
299 {
300 struct dc *dc;
301
302 dc = pStream->ctx->dc;
303
304 return (dc->hwss.optimize_timing_for_fsft &&
305 dc->hwss.optimize_timing_for_fsft(dc, &pStream->timing, max_input_rate_in_khz));
306 }
307 #endif
308
309 /*
310 * dc_stream_set_cursor_attributes() - Update cursor attributes and set cursor surface address
311 */
dc_stream_set_cursor_attributes(struct dc_stream_state * stream,const struct dc_cursor_attributes * attributes)312 bool dc_stream_set_cursor_attributes(
313 struct dc_stream_state *stream,
314 const struct dc_cursor_attributes *attributes)
315 {
316 struct dc *dc;
317 bool reset_idle_optimizations = false;
318
319 if (NULL == stream) {
320 dm_error("DC: dc_stream is NULL!\n");
321 return false;
322 }
323 if (NULL == attributes) {
324 dm_error("DC: attributes is NULL!\n");
325 return false;
326 }
327
328 if (attributes->address.quad_part == 0) {
329 dm_output_to_console("DC: Cursor address is 0!\n");
330 return false;
331 }
332
333 dc = stream->ctx->dc;
334 stream->cursor_attributes = *attributes;
335
336 dc_z10_restore(dc);
337 /* disable idle optimizations while updating cursor */
338 if (dc->idle_optimizations_allowed) {
339 dc_allow_idle_optimizations(dc, false);
340 reset_idle_optimizations = true;
341 }
342
343 program_cursor_attributes(dc, stream, attributes);
344
345 /* re-enable idle optimizations if necessary */
346 if (reset_idle_optimizations)
347 dc_allow_idle_optimizations(dc, true);
348
349 return true;
350 }
351
program_cursor_position(struct dc * dc,struct dc_stream_state * stream,const struct dc_cursor_position * position)352 static void program_cursor_position(
353 struct dc *dc,
354 struct dc_stream_state *stream,
355 const struct dc_cursor_position *position)
356 {
357 int i;
358 struct resource_context *res_ctx;
359 struct pipe_ctx *pipe_to_program = NULL;
360
361 if (!stream)
362 return;
363
364 res_ctx = &dc->current_state->res_ctx;
365
366 for (i = 0; i < MAX_PIPES; i++) {
367 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i];
368
369 if (pipe_ctx->stream != stream ||
370 (!pipe_ctx->plane_res.mi && !pipe_ctx->plane_res.hubp) ||
371 !pipe_ctx->plane_state ||
372 (!pipe_ctx->plane_res.xfm && !pipe_ctx->plane_res.dpp) ||
373 (!pipe_ctx->plane_res.ipp && !pipe_ctx->plane_res.dpp))
374 continue;
375
376 if (!pipe_to_program) {
377 pipe_to_program = pipe_ctx;
378 dc->hwss.cursor_lock(dc, pipe_to_program, true);
379 }
380
381 dc->hwss.set_cursor_position(pipe_ctx);
382 }
383
384 if (pipe_to_program)
385 dc->hwss.cursor_lock(dc, pipe_to_program, false);
386 }
387
dc_stream_set_cursor_position(struct dc_stream_state * stream,const struct dc_cursor_position * position)388 bool dc_stream_set_cursor_position(
389 struct dc_stream_state *stream,
390 const struct dc_cursor_position *position)
391 {
392 struct dc *dc;
393 bool reset_idle_optimizations = false;
394
395 if (NULL == stream) {
396 dm_error("DC: dc_stream is NULL!\n");
397 return false;
398 }
399
400 if (NULL == position) {
401 dm_error("DC: cursor position is NULL!\n");
402 return false;
403 }
404
405 dc = stream->ctx->dc;
406 dc_z10_restore(dc);
407
408 /* disable idle optimizations if enabling cursor */
409 if (dc->idle_optimizations_allowed && !stream->cursor_position.enable && position->enable) {
410 dc_allow_idle_optimizations(dc, false);
411 reset_idle_optimizations = true;
412 }
413
414 stream->cursor_position = *position;
415
416 program_cursor_position(dc, stream, position);
417 /* re-enable idle optimizations if necessary */
418 if (reset_idle_optimizations)
419 dc_allow_idle_optimizations(dc, true);
420
421 return true;
422 }
423
dc_stream_add_writeback(struct dc * dc,struct dc_stream_state * stream,struct dc_writeback_info * wb_info)424 bool dc_stream_add_writeback(struct dc *dc,
425 struct dc_stream_state *stream,
426 struct dc_writeback_info *wb_info)
427 {
428 bool isDrc = false;
429 int i = 0;
430 struct dwbc *dwb;
431
432 if (stream == NULL) {
433 dm_error("DC: dc_stream is NULL!\n");
434 return false;
435 }
436
437 if (wb_info == NULL) {
438 dm_error("DC: dc_writeback_info is NULL!\n");
439 return false;
440 }
441
442 if (wb_info->dwb_pipe_inst >= MAX_DWB_PIPES) {
443 dm_error("DC: writeback pipe is invalid!\n");
444 return false;
445 }
446
447 wb_info->dwb_params.out_transfer_func = stream->out_transfer_func;
448
449 dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst];
450 dwb->dwb_is_drc = false;
451
452 /* recalculate and apply DML parameters */
453
454 for (i = 0; i < stream->num_wb_info; i++) {
455 /*dynamic update*/
456 if (stream->writeback_info[i].wb_enabled &&
457 stream->writeback_info[i].dwb_pipe_inst == wb_info->dwb_pipe_inst) {
458 stream->writeback_info[i] = *wb_info;
459 isDrc = true;
460 }
461 }
462
463 if (!isDrc) {
464 stream->writeback_info[stream->num_wb_info++] = *wb_info;
465 }
466
467 if (dc->hwss.enable_writeback) {
468 struct dc_stream_status *stream_status = dc_stream_get_status(stream);
469 struct dwbc *dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst];
470 dwb->otg_inst = stream_status->primary_otg_inst;
471 }
472 if (IS_DIAG_DC(dc->ctx->dce_environment)) {
473 if (!dc->hwss.update_bandwidth(dc, dc->current_state)) {
474 dm_error("DC: update_bandwidth failed!\n");
475 return false;
476 }
477
478 /* enable writeback */
479 if (dc->hwss.enable_writeback) {
480 struct dwbc *dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst];
481
482 if (dwb->funcs->is_enabled(dwb)) {
483 /* writeback pipe already enabled, only need to update */
484 dc->hwss.update_writeback(dc, wb_info, dc->current_state);
485 } else {
486 /* Enable writeback pipe from scratch*/
487 dc->hwss.enable_writeback(dc, wb_info, dc->current_state);
488 }
489 }
490 }
491 return true;
492 }
493
dc_stream_remove_writeback(struct dc * dc,struct dc_stream_state * stream,uint32_t dwb_pipe_inst)494 bool dc_stream_remove_writeback(struct dc *dc,
495 struct dc_stream_state *stream,
496 uint32_t dwb_pipe_inst)
497 {
498 int i = 0, j = 0;
499 if (stream == NULL) {
500 dm_error("DC: dc_stream is NULL!\n");
501 return false;
502 }
503
504 if (dwb_pipe_inst >= MAX_DWB_PIPES) {
505 dm_error("DC: writeback pipe is invalid!\n");
506 return false;
507 }
508
509 // stream->writeback_info[dwb_pipe_inst].wb_enabled = false;
510 for (i = 0; i < stream->num_wb_info; i++) {
511 /*dynamic update*/
512 if (stream->writeback_info[i].wb_enabled &&
513 stream->writeback_info[i].dwb_pipe_inst == dwb_pipe_inst) {
514 stream->writeback_info[i].wb_enabled = false;
515 }
516 }
517
518 /* remove writeback info for disabled writeback pipes from stream */
519 for (i = 0, j = 0; i < stream->num_wb_info; i++) {
520 if (stream->writeback_info[i].wb_enabled) {
521 if (i != j)
522 /* trim the array */
523 stream->writeback_info[j] = stream->writeback_info[i];
524 j++;
525 }
526 }
527 stream->num_wb_info = j;
528
529 if (IS_DIAG_DC(dc->ctx->dce_environment)) {
530 /* recalculate and apply DML parameters */
531 if (!dc->hwss.update_bandwidth(dc, dc->current_state)) {
532 dm_error("DC: update_bandwidth failed!\n");
533 return false;
534 }
535
536 /* disable writeback */
537 if (dc->hwss.disable_writeback)
538 dc->hwss.disable_writeback(dc, dwb_pipe_inst);
539 }
540 return true;
541 }
542
dc_stream_warmup_writeback(struct dc * dc,int num_dwb,struct dc_writeback_info * wb_info)543 bool dc_stream_warmup_writeback(struct dc *dc,
544 int num_dwb,
545 struct dc_writeback_info *wb_info)
546 {
547 if (dc->hwss.mmhubbub_warmup)
548 return dc->hwss.mmhubbub_warmup(dc, num_dwb, wb_info);
549 else
550 return false;
551 }
dc_stream_get_vblank_counter(const struct dc_stream_state * stream)552 uint32_t dc_stream_get_vblank_counter(const struct dc_stream_state *stream)
553 {
554 uint8_t i;
555 struct dc *dc = stream->ctx->dc;
556 struct resource_context *res_ctx =
557 &dc->current_state->res_ctx;
558
559 for (i = 0; i < MAX_PIPES; i++) {
560 struct timing_generator *tg = res_ctx->pipe_ctx[i].stream_res.tg;
561
562 if (res_ctx->pipe_ctx[i].stream != stream)
563 continue;
564
565 return tg->funcs->get_frame_count(tg);
566 }
567
568 return 0;
569 }
570
dc_stream_send_dp_sdp(const struct dc_stream_state * stream,const uint8_t * custom_sdp_message,unsigned int sdp_message_size)571 bool dc_stream_send_dp_sdp(const struct dc_stream_state *stream,
572 const uint8_t *custom_sdp_message,
573 unsigned int sdp_message_size)
574 {
575 int i;
576 struct dc *dc;
577 struct resource_context *res_ctx;
578
579 if (stream == NULL) {
580 dm_error("DC: dc_stream is NULL!\n");
581 return false;
582 }
583
584 dc = stream->ctx->dc;
585 res_ctx = &dc->current_state->res_ctx;
586
587 for (i = 0; i < MAX_PIPES; i++) {
588 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i];
589
590 if (pipe_ctx->stream != stream)
591 continue;
592
593 if (dc->hwss.send_immediate_sdp_message != NULL)
594 dc->hwss.send_immediate_sdp_message(pipe_ctx,
595 custom_sdp_message,
596 sdp_message_size);
597 else
598 DC_LOG_WARNING("%s:send_immediate_sdp_message not implemented on this ASIC\n",
599 __func__);
600
601 }
602
603 return true;
604 }
605
dc_stream_get_scanoutpos(const struct dc_stream_state * stream,uint32_t * v_blank_start,uint32_t * v_blank_end,uint32_t * h_position,uint32_t * v_position)606 bool dc_stream_get_scanoutpos(const struct dc_stream_state *stream,
607 uint32_t *v_blank_start,
608 uint32_t *v_blank_end,
609 uint32_t *h_position,
610 uint32_t *v_position)
611 {
612 uint8_t i;
613 bool ret = false;
614 struct dc *dc = stream->ctx->dc;
615 struct resource_context *res_ctx =
616 &dc->current_state->res_ctx;
617
618 for (i = 0; i < MAX_PIPES; i++) {
619 struct timing_generator *tg = res_ctx->pipe_ctx[i].stream_res.tg;
620
621 if (res_ctx->pipe_ctx[i].stream != stream)
622 continue;
623
624 tg->funcs->get_scanoutpos(tg,
625 v_blank_start,
626 v_blank_end,
627 h_position,
628 v_position);
629
630 ret = true;
631 break;
632 }
633
634 return ret;
635 }
636
dc_stream_dmdata_status_done(struct dc * dc,struct dc_stream_state * stream)637 bool dc_stream_dmdata_status_done(struct dc *dc, struct dc_stream_state *stream)
638 {
639 struct pipe_ctx *pipe = NULL;
640 int i;
641
642 if (!dc->hwss.dmdata_status_done)
643 return false;
644
645 for (i = 0; i < MAX_PIPES; i++) {
646 pipe = &dc->current_state->res_ctx.pipe_ctx[i];
647 if (pipe->stream == stream)
648 break;
649 }
650 /* Stream not found, by default we'll assume HUBP fetched dm data */
651 if (i == MAX_PIPES)
652 return true;
653
654 return dc->hwss.dmdata_status_done(pipe);
655 }
656
dc_stream_set_dynamic_metadata(struct dc * dc,struct dc_stream_state * stream,struct dc_dmdata_attributes * attr)657 bool dc_stream_set_dynamic_metadata(struct dc *dc,
658 struct dc_stream_state *stream,
659 struct dc_dmdata_attributes *attr)
660 {
661 struct pipe_ctx *pipe_ctx = NULL;
662 struct hubp *hubp;
663 int i;
664
665 /* Dynamic metadata is only supported on HDMI or DP */
666 if (!dc_is_hdmi_signal(stream->signal) && !dc_is_dp_signal(stream->signal))
667 return false;
668
669 /* Check hardware support */
670 if (!dc->hwss.program_dmdata_engine)
671 return false;
672
673 for (i = 0; i < MAX_PIPES; i++) {
674 pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i];
675 if (pipe_ctx->stream == stream)
676 break;
677 }
678
679 if (i == MAX_PIPES)
680 return false;
681
682 hubp = pipe_ctx->plane_res.hubp;
683 if (hubp == NULL)
684 return false;
685
686 pipe_ctx->stream->dmdata_address = attr->address;
687
688 dc->hwss.program_dmdata_engine(pipe_ctx);
689
690 if (hubp->funcs->dmdata_set_attributes != NULL &&
691 pipe_ctx->stream->dmdata_address.quad_part != 0) {
692 hubp->funcs->dmdata_set_attributes(hubp, attr);
693 }
694
695 return true;
696 }
697
dc_stream_add_dsc_to_resource(struct dc * dc,struct dc_state * state,struct dc_stream_state * stream)698 enum dc_status dc_stream_add_dsc_to_resource(struct dc *dc,
699 struct dc_state *state,
700 struct dc_stream_state *stream)
701 {
702 if (dc->res_pool->funcs->add_dsc_to_stream_resource) {
703 return dc->res_pool->funcs->add_dsc_to_stream_resource(dc, state, stream);
704 } else {
705 return DC_NO_DSC_RESOURCE;
706 }
707 }
708
dc_stream_get_pipe_ctx(struct dc_stream_state * stream)709 struct pipe_ctx *dc_stream_get_pipe_ctx(struct dc_stream_state *stream)
710 {
711 int i = 0;
712
713 for (i = 0; i < MAX_PIPES; i++) {
714 struct pipe_ctx *pipe = &stream->ctx->dc->current_state->res_ctx.pipe_ctx[i];
715
716 if (pipe->stream == stream)
717 return pipe;
718 }
719
720 return NULL;
721 }
722
dc_stream_log(const struct dc * dc,const struct dc_stream_state * stream)723 void dc_stream_log(const struct dc *dc, const struct dc_stream_state *stream)
724 {
725 DC_LOG_DC(
726 "core_stream 0x%p: src: %d, %d, %d, %d; dst: %d, %d, %d, %d, colorSpace:%d\n",
727 stream,
728 stream->src.x,
729 stream->src.y,
730 stream->src.width,
731 stream->src.height,
732 stream->dst.x,
733 stream->dst.y,
734 stream->dst.width,
735 stream->dst.height,
736 stream->output_color_space);
737 DC_LOG_DC(
738 "\tpix_clk_khz: %d, h_total: %d, v_total: %d, pixelencoder:%d, displaycolorDepth:%d\n",
739 stream->timing.pix_clk_100hz / 10,
740 stream->timing.h_total,
741 stream->timing.v_total,
742 stream->timing.pixel_encoding,
743 stream->timing.display_color_depth);
744 DC_LOG_DC(
745 "\tlink: %d\n",
746 stream->link->link_index);
747
748 DC_LOG_DC(
749 "\tdsc: %d, mst_pbn: %d\n",
750 stream->timing.flags.DSC,
751 stream->timing.dsc_cfg.mst_pbn);
752
753 if (stream->sink) {
754 if (stream->sink->sink_signal != SIGNAL_TYPE_VIRTUAL &&
755 stream->sink->sink_signal != SIGNAL_TYPE_NONE) {
756
757 DC_LOG_DC(
758 "\tdispname: %s signal: %x\n",
759 stream->sink->edid_caps.display_name,
760 stream->signal);
761 }
762 }
763 }
764
765