1 /***************************************************************************** 2 * Copyright 2001 - 2009 Broadcom Corporation. All rights reserved. 3 * 4 * Unless you and Broadcom execute a separate written software license 5 * agreement governing use of this software, this software is licensed to you 6 * under the terms of the GNU General Public License version 2, available at 7 * http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). 8 * 9 * Notwithstanding the above, under no circumstances may you combine this 10 * software in any way with any other Broadcom software provided under a 11 * license other than the GPL, without Broadcom's express prior written 12 * consent. 13 *****************************************************************************/ 14 #include <mach/csp/chipcHw_def.h> 15 16 #define CLK_TYPE_PRIMARY 1 /* primary clock must NOT have a parent */ 17 #define CLK_TYPE_PLL1 2 /* PPL1 */ 18 #define CLK_TYPE_PLL2 4 /* PPL2 */ 19 #define CLK_TYPE_PROGRAMMABLE 8 /* programmable clock rate */ 20 #define CLK_TYPE_BYPASSABLE 16 /* parent can be changed */ 21 22 #define CLK_MODE_XTAL 1 /* clock source is from crystal */ 23 24 struct clk { 25 const char *name; /* clock name */ 26 unsigned int type; /* clock type */ 27 unsigned int mode; /* current mode */ 28 volatile int use_bypass; /* indicate if it's in bypass mode */ 29 chipcHw_CLOCK_e csp_id; /* clock ID for CSP CHIPC */ 30 unsigned long rate_hz; /* clock rate in Hz */ 31 unsigned int use_cnt; /* usage count */ 32 struct clk *parent; /* parent clock */ 33 }; 34