1 /* 2 * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved. 3 * Copyright (c) 2005, 2006, 2007, 2008 Mellanox Technologies. All rights reserved. 4 * Copyright (c) 2006, 2007 Cisco Systems. All rights reserved. 5 * 6 * This software is available to you under a choice of one of two 7 * licenses. You may choose to be licensed under the terms of the GNU 8 * General Public License (GPL) Version 2, available from the file 9 * COPYING in the main directory of this source tree, or the 10 * OpenIB.org BSD license below: 11 * 12 * Redistribution and use in source and binary forms, with or 13 * without modification, are permitted provided that the following 14 * conditions are met: 15 * 16 * - Redistributions of source code must retain the above 17 * copyright notice, this list of conditions and the following 18 * disclaimer. 19 * 20 * - Redistributions in binary form must reproduce the above 21 * copyright notice, this list of conditions and the following 22 * disclaimer in the documentation and/or other materials 23 * provided with the distribution. 24 * 25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 32 * SOFTWARE. 33 */ 34 35 #ifndef MLX4_FW_H 36 #define MLX4_FW_H 37 38 #include "mlx4.h" 39 #include "icm.h" 40 41 struct mlx4_mod_stat_cfg { 42 u8 log_pg_sz; 43 u8 log_pg_sz_m; 44 }; 45 46 struct mlx4_dev_cap { 47 int max_srq_sz; 48 int max_qp_sz; 49 int reserved_qps; 50 int max_qps; 51 int reserved_srqs; 52 int max_srqs; 53 int max_cq_sz; 54 int reserved_cqs; 55 int max_cqs; 56 int max_mpts; 57 int reserved_eqs; 58 int max_eqs; 59 int reserved_mtts; 60 int max_mrw_sz; 61 int reserved_mrws; 62 int max_mtt_seg; 63 int max_requester_per_qp; 64 int max_responder_per_qp; 65 int max_rdma_global; 66 int local_ca_ack_delay; 67 int num_ports; 68 u32 max_msg_sz; 69 int ib_mtu[MLX4_MAX_PORTS + 1]; 70 int max_port_width[MLX4_MAX_PORTS + 1]; 71 int max_vl[MLX4_MAX_PORTS + 1]; 72 int max_gids[MLX4_MAX_PORTS + 1]; 73 int max_pkeys[MLX4_MAX_PORTS + 1]; 74 u64 def_mac[MLX4_MAX_PORTS + 1]; 75 u16 eth_mtu[MLX4_MAX_PORTS + 1]; 76 int trans_type[MLX4_MAX_PORTS + 1]; 77 int vendor_oui[MLX4_MAX_PORTS + 1]; 78 u16 wavelength[MLX4_MAX_PORTS + 1]; 79 u64 trans_code[MLX4_MAX_PORTS + 1]; 80 u16 stat_rate_support; 81 u64 flags; 82 int reserved_uars; 83 int uar_size; 84 int min_page_sz; 85 int bf_reg_size; 86 int bf_regs_per_page; 87 int max_sq_sg; 88 int max_sq_desc_sz; 89 int max_rq_sg; 90 int max_rq_desc_sz; 91 int max_qp_per_mcg; 92 int reserved_mgms; 93 int max_mcgs; 94 int reserved_pds; 95 int max_pds; 96 int reserved_xrcds; 97 int max_xrcds; 98 int qpc_entry_sz; 99 int rdmarc_entry_sz; 100 int altc_entry_sz; 101 int aux_entry_sz; 102 int srq_entry_sz; 103 int cqc_entry_sz; 104 int eqc_entry_sz; 105 int dmpt_entry_sz; 106 int cmpt_entry_sz; 107 int mtt_entry_sz; 108 int resize_srq; 109 u32 bmme_flags; 110 u32 reserved_lkey; 111 u64 max_icm_sz; 112 int max_gso_sz; 113 u8 supported_port_types[MLX4_MAX_PORTS + 1]; 114 u8 suggested_type[MLX4_MAX_PORTS + 1]; 115 u8 default_sense[MLX4_MAX_PORTS + 1]; 116 u8 log_max_macs[MLX4_MAX_PORTS + 1]; 117 u8 log_max_vlans[MLX4_MAX_PORTS + 1]; 118 u32 max_counters; 119 }; 120 121 struct mlx4_func_cap { 122 u8 num_ports; 123 u8 flags; 124 u32 pf_context_behaviour; 125 int qp_quota; 126 int cq_quota; 127 int srq_quota; 128 int mpt_quota; 129 int mtt_quota; 130 int max_eq; 131 int reserved_eq; 132 int mcg_quota; 133 u8 physical_port[MLX4_MAX_PORTS + 1]; 134 u8 port_flags[MLX4_MAX_PORTS + 1]; 135 }; 136 137 struct mlx4_adapter { 138 char board_id[MLX4_BOARD_ID_LEN]; 139 u8 inta_pin; 140 }; 141 142 struct mlx4_init_hca_param { 143 u64 qpc_base; 144 u64 rdmarc_base; 145 u64 auxc_base; 146 u64 altc_base; 147 u64 srqc_base; 148 u64 cqc_base; 149 u64 eqc_base; 150 u64 mc_base; 151 u64 dmpt_base; 152 u64 cmpt_base; 153 u64 mtt_base; 154 u64 global_caps; 155 u16 log_mc_entry_sz; 156 u16 log_mc_hash_sz; 157 u8 log_num_qps; 158 u8 log_num_srqs; 159 u8 log_num_cqs; 160 u8 log_num_eqs; 161 u8 log_rd_per_qp; 162 u8 log_mc_table_sz; 163 u8 log_mpt_sz; 164 u8 log_uar_sz; 165 u8 uar_page_sz; /* log pg sz in 4k chunks */ 166 }; 167 168 struct mlx4_init_ib_param { 169 int port_width; 170 int vl_cap; 171 int mtu_cap; 172 u16 gid_cap; 173 u16 pkey_cap; 174 int set_guid0; 175 u64 guid0; 176 int set_node_guid; 177 u64 node_guid; 178 int set_si_guid; 179 u64 si_guid; 180 }; 181 182 struct mlx4_set_ib_param { 183 int set_si_guid; 184 int reset_qkey_viol; 185 u64 si_guid; 186 u32 cap_mask; 187 }; 188 189 int mlx4_QUERY_DEV_CAP(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap); 190 int mlx4_QUERY_FUNC_CAP(struct mlx4_dev *dev, struct mlx4_func_cap *func_cap); 191 int mlx4_QUERY_FUNC_CAP_wrapper(struct mlx4_dev *dev, int slave, 192 struct mlx4_vhcr *vhcr, 193 struct mlx4_cmd_mailbox *inbox, 194 struct mlx4_cmd_mailbox *outbox, 195 struct mlx4_cmd_info *cmd); 196 int mlx4_MAP_FA(struct mlx4_dev *dev, struct mlx4_icm *icm); 197 int mlx4_UNMAP_FA(struct mlx4_dev *dev); 198 int mlx4_RUN_FW(struct mlx4_dev *dev); 199 int mlx4_QUERY_FW(struct mlx4_dev *dev); 200 int mlx4_QUERY_ADAPTER(struct mlx4_dev *dev, struct mlx4_adapter *adapter); 201 int mlx4_INIT_HCA(struct mlx4_dev *dev, struct mlx4_init_hca_param *param); 202 int mlx4_QUERY_HCA(struct mlx4_dev *dev, struct mlx4_init_hca_param *param); 203 int mlx4_CLOSE_HCA(struct mlx4_dev *dev, int panic); 204 int mlx4_map_cmd(struct mlx4_dev *dev, u16 op, struct mlx4_icm *icm, u64 virt); 205 int mlx4_SET_ICM_SIZE(struct mlx4_dev *dev, u64 icm_size, u64 *aux_pages); 206 int mlx4_MAP_ICM_AUX(struct mlx4_dev *dev, struct mlx4_icm *icm); 207 int mlx4_UNMAP_ICM_AUX(struct mlx4_dev *dev); 208 int mlx4_NOP(struct mlx4_dev *dev); 209 int mlx4_MOD_STAT_CFG(struct mlx4_dev *dev, struct mlx4_mod_stat_cfg *cfg); 210 211 #endif /* MLX4_FW_H */ 212