1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * SMP initialisation and IPI support
4 * Based on arch/arm/kernel/smp.c
5 *
6 * Copyright (C) 2012 ARM Ltd.
7 */
8
9 #include <linux/acpi.h>
10 #include <linux/arm_sdei.h>
11 #include <linux/delay.h>
12 #include <linux/init.h>
13 #include <linux/spinlock.h>
14 #include <linux/sched/mm.h>
15 #include <linux/sched/hotplug.h>
16 #include <linux/sched/task_stack.h>
17 #include <linux/interrupt.h>
18 #include <linux/cache.h>
19 #include <linux/profile.h>
20 #include <linux/errno.h>
21 #include <linux/mm.h>
22 #include <linux/err.h>
23 #include <linux/cpu.h>
24 #include <linux/smp.h>
25 #include <linux/seq_file.h>
26 #include <linux/irq.h>
27 #include <linux/irqchip/arm-gic-v3.h>
28 #include <linux/percpu.h>
29 #include <linux/clockchips.h>
30 #include <linux/completion.h>
31 #include <linux/of.h>
32 #include <linux/irq_work.h>
33 #include <linux/kernel_stat.h>
34 #include <linux/kexec.h>
35 #include <linux/kvm_host.h>
36
37 #include <asm/alternative.h>
38 #include <asm/atomic.h>
39 #include <asm/cacheflush.h>
40 #include <asm/cpu.h>
41 #include <asm/cputype.h>
42 #include <asm/cpu_ops.h>
43 #include <asm/daifflags.h>
44 #include <asm/kvm_mmu.h>
45 #include <asm/mmu_context.h>
46 #include <asm/numa.h>
47 #include <asm/processor.h>
48 #include <asm/smp_plat.h>
49 #include <asm/sections.h>
50 #include <asm/tlbflush.h>
51 #include <asm/ptrace.h>
52 #include <asm/virt.h>
53
54 #define CREATE_TRACE_POINTS
55 #include <trace/events/ipi.h>
56
57 DEFINE_PER_CPU_READ_MOSTLY(int, cpu_number);
58 EXPORT_PER_CPU_SYMBOL(cpu_number);
59
60 /*
61 * as from 2.5, kernels no longer have an init_tasks structure
62 * so we need some other way of telling a new secondary core
63 * where to place its SVC stack
64 */
65 struct secondary_data secondary_data;
66 /* Number of CPUs which aren't online, but looping in kernel text. */
67 static int cpus_stuck_in_kernel;
68
69 enum ipi_msg_type {
70 IPI_RESCHEDULE,
71 IPI_CALL_FUNC,
72 IPI_CPU_STOP,
73 IPI_CPU_CRASH_STOP,
74 IPI_TIMER,
75 IPI_IRQ_WORK,
76 IPI_WAKEUP,
77 NR_IPI
78 };
79
80 static int ipi_irq_base __read_mostly;
81 static int nr_ipi __read_mostly = NR_IPI;
82 static struct irq_desc *ipi_desc[NR_IPI] __read_mostly;
83
84 static void ipi_setup(int cpu);
85
86 #ifdef CONFIG_HOTPLUG_CPU
87 static void ipi_teardown(int cpu);
88 static int op_cpu_kill(unsigned int cpu);
89 #else
op_cpu_kill(unsigned int cpu)90 static inline int op_cpu_kill(unsigned int cpu)
91 {
92 return -ENOSYS;
93 }
94 #endif
95
96
97 /*
98 * Boot a secondary CPU, and assign it the specified idle task.
99 * This also gives us the initial stack to use for this CPU.
100 */
boot_secondary(unsigned int cpu,struct task_struct * idle)101 static int boot_secondary(unsigned int cpu, struct task_struct *idle)
102 {
103 const struct cpu_operations *ops = get_cpu_ops(cpu);
104
105 if (ops->cpu_boot)
106 return ops->cpu_boot(cpu);
107
108 return -EOPNOTSUPP;
109 }
110
111 static DECLARE_COMPLETION(cpu_running);
112
__cpu_up(unsigned int cpu,struct task_struct * idle)113 int __cpu_up(unsigned int cpu, struct task_struct *idle)
114 {
115 int ret;
116 long status;
117
118 /*
119 * We need to tell the secondary core where to find its stack and the
120 * page tables.
121 */
122 secondary_data.task = idle;
123 update_cpu_boot_status(CPU_MMU_OFF);
124
125 /* Now bring the CPU into our world */
126 ret = boot_secondary(cpu, idle);
127 if (ret) {
128 pr_err("CPU%u: failed to boot: %d\n", cpu, ret);
129 return ret;
130 }
131
132 /*
133 * CPU was successfully started, wait for it to come online or
134 * time out.
135 */
136 wait_for_completion_timeout(&cpu_running,
137 msecs_to_jiffies(5000));
138 if (cpu_online(cpu))
139 return 0;
140
141 pr_crit("CPU%u: failed to come online\n", cpu);
142 secondary_data.task = NULL;
143 status = READ_ONCE(secondary_data.status);
144 if (status == CPU_MMU_OFF)
145 status = READ_ONCE(__early_cpu_boot_status);
146
147 switch (status & CPU_BOOT_STATUS_MASK) {
148 default:
149 pr_err("CPU%u: failed in unknown state : 0x%lx\n",
150 cpu, status);
151 cpus_stuck_in_kernel++;
152 break;
153 case CPU_KILL_ME:
154 if (!op_cpu_kill(cpu)) {
155 pr_crit("CPU%u: died during early boot\n", cpu);
156 break;
157 }
158 pr_crit("CPU%u: may not have shut down cleanly\n", cpu);
159 fallthrough;
160 case CPU_STUCK_IN_KERNEL:
161 pr_crit("CPU%u: is stuck in kernel\n", cpu);
162 if (status & CPU_STUCK_REASON_52_BIT_VA)
163 pr_crit("CPU%u: does not support 52-bit VAs\n", cpu);
164 if (status & CPU_STUCK_REASON_NO_GRAN) {
165 pr_crit("CPU%u: does not support %luK granule\n",
166 cpu, PAGE_SIZE / SZ_1K);
167 }
168 cpus_stuck_in_kernel++;
169 break;
170 case CPU_PANIC_KERNEL:
171 panic("CPU%u detected unsupported configuration\n", cpu);
172 }
173
174 return -EIO;
175 }
176
init_gic_priority_masking(void)177 static void init_gic_priority_masking(void)
178 {
179 u32 cpuflags;
180
181 if (WARN_ON(!gic_enable_sre()))
182 return;
183
184 cpuflags = read_sysreg(daif);
185
186 WARN_ON(!(cpuflags & PSR_I_BIT));
187 WARN_ON(!(cpuflags & PSR_F_BIT));
188
189 gic_write_pmr(GIC_PRIO_IRQON | GIC_PRIO_PSR_I_SET);
190 }
191
192 /*
193 * This is the secondary CPU boot entry. We're using this CPUs
194 * idle thread stack, but a set of temporary page tables.
195 */
secondary_start_kernel(void)196 asmlinkage notrace void secondary_start_kernel(void)
197 {
198 u64 mpidr = read_cpuid_mpidr() & MPIDR_HWID_BITMASK;
199 struct mm_struct *mm = &init_mm;
200 const struct cpu_operations *ops;
201 unsigned int cpu = smp_processor_id();
202
203 /*
204 * All kernel threads share the same mm context; grab a
205 * reference and switch to it.
206 */
207 mmgrab(mm);
208 current->active_mm = mm;
209
210 /*
211 * TTBR0 is only used for the identity mapping at this stage. Make it
212 * point to zero page to avoid speculatively fetching new entries.
213 */
214 cpu_uninstall_idmap();
215
216 if (system_uses_irq_prio_masking())
217 init_gic_priority_masking();
218
219 rcu_cpu_starting(cpu);
220 trace_hardirqs_off();
221
222 /*
223 * If the system has established the capabilities, make sure
224 * this CPU ticks all of those. If it doesn't, the CPU will
225 * fail to come online.
226 */
227 check_local_cpu_capabilities();
228
229 ops = get_cpu_ops(cpu);
230 if (ops->cpu_postboot)
231 ops->cpu_postboot();
232
233 /*
234 * Log the CPU info before it is marked online and might get read.
235 */
236 cpuinfo_store_cpu();
237 store_cpu_topology(cpu);
238
239 /*
240 * Enable GIC and timers.
241 */
242 notify_cpu_starting(cpu);
243
244 ipi_setup(cpu);
245
246 numa_add_cpu(cpu);
247
248 /*
249 * OK, now it's safe to let the boot CPU continue. Wait for
250 * the CPU migration code to notice that the CPU is online
251 * before we continue.
252 */
253 pr_info("CPU%u: Booted secondary processor 0x%010lx [0x%08x]\n",
254 cpu, (unsigned long)mpidr,
255 read_cpuid_id());
256 update_cpu_boot_status(CPU_BOOT_SUCCESS);
257 set_cpu_online(cpu, true);
258 complete(&cpu_running);
259
260 local_daif_restore(DAIF_PROCCTX);
261
262 /*
263 * OK, it's off to the idle thread for us
264 */
265 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
266 }
267
268 #ifdef CONFIG_HOTPLUG_CPU
op_cpu_disable(unsigned int cpu)269 static int op_cpu_disable(unsigned int cpu)
270 {
271 const struct cpu_operations *ops = get_cpu_ops(cpu);
272
273 /*
274 * If we don't have a cpu_die method, abort before we reach the point
275 * of no return. CPU0 may not have an cpu_ops, so test for it.
276 */
277 if (!ops || !ops->cpu_die)
278 return -EOPNOTSUPP;
279
280 /*
281 * We may need to abort a hot unplug for some other mechanism-specific
282 * reason.
283 */
284 if (ops->cpu_disable)
285 return ops->cpu_disable(cpu);
286
287 return 0;
288 }
289
290 /*
291 * __cpu_disable runs on the processor to be shutdown.
292 */
__cpu_disable(void)293 int __cpu_disable(void)
294 {
295 unsigned int cpu = smp_processor_id();
296 int ret;
297
298 ret = op_cpu_disable(cpu);
299 if (ret)
300 return ret;
301
302 remove_cpu_topology(cpu);
303 numa_remove_cpu(cpu);
304
305 /*
306 * Take this CPU offline. Once we clear this, we can't return,
307 * and we must not schedule until we're ready to give up the cpu.
308 */
309 set_cpu_online(cpu, false);
310 ipi_teardown(cpu);
311
312 /*
313 * OK - migrate IRQs away from this CPU
314 */
315 irq_migrate_all_off_this_cpu();
316
317 return 0;
318 }
319
op_cpu_kill(unsigned int cpu)320 static int op_cpu_kill(unsigned int cpu)
321 {
322 const struct cpu_operations *ops = get_cpu_ops(cpu);
323
324 /*
325 * If we have no means of synchronising with the dying CPU, then assume
326 * that it is really dead. We can only wait for an arbitrary length of
327 * time and hope that it's dead, so let's skip the wait and just hope.
328 */
329 if (!ops->cpu_kill)
330 return 0;
331
332 return ops->cpu_kill(cpu);
333 }
334
335 /*
336 * called on the thread which is asking for a CPU to be shutdown -
337 * waits until shutdown has completed, or it is timed out.
338 */
__cpu_die(unsigned int cpu)339 void __cpu_die(unsigned int cpu)
340 {
341 int err;
342
343 if (!cpu_wait_death(cpu, 5)) {
344 pr_crit("CPU%u: cpu didn't die\n", cpu);
345 return;
346 }
347 pr_debug("CPU%u: shutdown\n", cpu);
348
349 /*
350 * Now that the dying CPU is beyond the point of no return w.r.t.
351 * in-kernel synchronisation, try to get the firwmare to help us to
352 * verify that it has really left the kernel before we consider
353 * clobbering anything it might still be using.
354 */
355 err = op_cpu_kill(cpu);
356 if (err)
357 pr_warn("CPU%d may not have shut down cleanly: %d\n", cpu, err);
358 }
359
360 /*
361 * Called from the idle thread for the CPU which has been shutdown.
362 *
363 */
cpu_die(void)364 void cpu_die(void)
365 {
366 unsigned int cpu = smp_processor_id();
367 const struct cpu_operations *ops = get_cpu_ops(cpu);
368
369 idle_task_exit();
370
371 local_daif_mask();
372
373 /* Tell __cpu_die() that this CPU is now safe to dispose of */
374 (void)cpu_report_death();
375
376 /*
377 * Actually shutdown the CPU. This must never fail. The specific hotplug
378 * mechanism must perform all required cache maintenance to ensure that
379 * no dirty lines are lost in the process of shutting down the CPU.
380 */
381 ops->cpu_die(cpu);
382
383 BUG();
384 }
385 #endif
386
__cpu_try_die(int cpu)387 static void __cpu_try_die(int cpu)
388 {
389 #ifdef CONFIG_HOTPLUG_CPU
390 const struct cpu_operations *ops = get_cpu_ops(cpu);
391
392 if (ops && ops->cpu_die)
393 ops->cpu_die(cpu);
394 #endif
395 }
396
397 /*
398 * Kill the calling secondary CPU, early in bringup before it is turned
399 * online.
400 */
cpu_die_early(void)401 void cpu_die_early(void)
402 {
403 int cpu = smp_processor_id();
404
405 pr_crit("CPU%d: will not boot\n", cpu);
406
407 /* Mark this CPU absent */
408 set_cpu_present(cpu, 0);
409 rcu_report_dead(cpu);
410
411 if (IS_ENABLED(CONFIG_HOTPLUG_CPU)) {
412 update_cpu_boot_status(CPU_KILL_ME);
413 __cpu_try_die(cpu);
414 }
415
416 update_cpu_boot_status(CPU_STUCK_IN_KERNEL);
417
418 cpu_park_loop();
419 }
420
hyp_mode_check(void)421 static void __init hyp_mode_check(void)
422 {
423 if (is_hyp_mode_available())
424 pr_info("CPU: All CPU(s) started at EL2\n");
425 else if (is_hyp_mode_mismatched())
426 WARN_TAINT(1, TAINT_CPU_OUT_OF_SPEC,
427 "CPU: CPUs started in inconsistent modes");
428 else
429 pr_info("CPU: All CPU(s) started at EL1\n");
430 if (IS_ENABLED(CONFIG_KVM) && !is_kernel_in_hyp_mode()) {
431 kvm_compute_layout();
432 kvm_apply_hyp_relocations();
433 }
434 }
435
smp_cpus_done(unsigned int max_cpus)436 void __init smp_cpus_done(unsigned int max_cpus)
437 {
438 pr_info("SMP: Total of %d processors activated.\n", num_online_cpus());
439 setup_cpu_features();
440 hyp_mode_check();
441 apply_alternatives_all();
442 mark_linear_text_alias_ro();
443 }
444
smp_prepare_boot_cpu(void)445 void __init smp_prepare_boot_cpu(void)
446 {
447 /*
448 * The runtime per-cpu areas have been allocated by
449 * setup_per_cpu_areas(), and CPU0's boot time per-cpu area will be
450 * freed shortly, so we must move over to the runtime per-cpu area.
451 */
452 set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
453 cpuinfo_store_boot_cpu();
454
455 /*
456 * We now know enough about the boot CPU to apply the
457 * alternatives that cannot wait until interrupt handling
458 * and/or scheduling is enabled.
459 */
460 apply_boot_alternatives();
461
462 /* Conditionally switch to GIC PMR for interrupt masking */
463 if (system_uses_irq_prio_masking())
464 init_gic_priority_masking();
465
466 kasan_init_hw_tags();
467 }
468
469 /*
470 * Duplicate MPIDRs are a recipe for disaster. Scan all initialized
471 * entries and check for duplicates. If any is found just ignore the
472 * cpu. cpu_logical_map was initialized to INVALID_HWID to avoid
473 * matching valid MPIDR values.
474 */
is_mpidr_duplicate(unsigned int cpu,u64 hwid)475 static bool __init is_mpidr_duplicate(unsigned int cpu, u64 hwid)
476 {
477 unsigned int i;
478
479 for (i = 1; (i < cpu) && (i < NR_CPUS); i++)
480 if (cpu_logical_map(i) == hwid)
481 return true;
482 return false;
483 }
484
485 /*
486 * Initialize cpu operations for a logical cpu and
487 * set it in the possible mask on success
488 */
smp_cpu_setup(int cpu)489 static int __init smp_cpu_setup(int cpu)
490 {
491 const struct cpu_operations *ops;
492
493 if (init_cpu_ops(cpu))
494 return -ENODEV;
495
496 ops = get_cpu_ops(cpu);
497 if (ops->cpu_init(cpu))
498 return -ENODEV;
499
500 set_cpu_possible(cpu, true);
501
502 return 0;
503 }
504
505 static bool bootcpu_valid __initdata;
506 static unsigned int cpu_count = 1;
507
508 #ifdef CONFIG_ACPI
509 static struct acpi_madt_generic_interrupt cpu_madt_gicc[NR_CPUS];
510
acpi_cpu_get_madt_gicc(int cpu)511 struct acpi_madt_generic_interrupt *acpi_cpu_get_madt_gicc(int cpu)
512 {
513 return &cpu_madt_gicc[cpu];
514 }
515 EXPORT_SYMBOL_GPL(acpi_cpu_get_madt_gicc);
516
517 /*
518 * acpi_map_gic_cpu_interface - parse processor MADT entry
519 *
520 * Carry out sanity checks on MADT processor entry and initialize
521 * cpu_logical_map on success
522 */
523 static void __init
acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt * processor)524 acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt *processor)
525 {
526 u64 hwid = processor->arm_mpidr;
527
528 if (!(processor->flags & ACPI_MADT_ENABLED)) {
529 pr_debug("skipping disabled CPU entry with 0x%llx MPIDR\n", hwid);
530 return;
531 }
532
533 if (hwid & ~MPIDR_HWID_BITMASK || hwid == INVALID_HWID) {
534 pr_err("skipping CPU entry with invalid MPIDR 0x%llx\n", hwid);
535 return;
536 }
537
538 if (is_mpidr_duplicate(cpu_count, hwid)) {
539 pr_err("duplicate CPU MPIDR 0x%llx in MADT\n", hwid);
540 return;
541 }
542
543 /* Check if GICC structure of boot CPU is available in the MADT */
544 if (cpu_logical_map(0) == hwid) {
545 if (bootcpu_valid) {
546 pr_err("duplicate boot CPU MPIDR: 0x%llx in MADT\n",
547 hwid);
548 return;
549 }
550 bootcpu_valid = true;
551 cpu_madt_gicc[0] = *processor;
552 return;
553 }
554
555 if (cpu_count >= NR_CPUS)
556 return;
557
558 /* map the logical cpu id to cpu MPIDR */
559 set_cpu_logical_map(cpu_count, hwid);
560
561 cpu_madt_gicc[cpu_count] = *processor;
562
563 /*
564 * Set-up the ACPI parking protocol cpu entries
565 * while initializing the cpu_logical_map to
566 * avoid parsing MADT entries multiple times for
567 * nothing (ie a valid cpu_logical_map entry should
568 * contain a valid parking protocol data set to
569 * initialize the cpu if the parking protocol is
570 * the only available enable method).
571 */
572 acpi_set_mailbox_entry(cpu_count, processor);
573
574 cpu_count++;
575 }
576
577 static int __init
acpi_parse_gic_cpu_interface(union acpi_subtable_headers * header,const unsigned long end)578 acpi_parse_gic_cpu_interface(union acpi_subtable_headers *header,
579 const unsigned long end)
580 {
581 struct acpi_madt_generic_interrupt *processor;
582
583 processor = (struct acpi_madt_generic_interrupt *)header;
584 if (BAD_MADT_GICC_ENTRY(processor, end))
585 return -EINVAL;
586
587 acpi_table_print_madt_entry(&header->common);
588
589 acpi_map_gic_cpu_interface(processor);
590
591 return 0;
592 }
593
acpi_parse_and_init_cpus(void)594 static void __init acpi_parse_and_init_cpus(void)
595 {
596 int i;
597
598 /*
599 * do a walk of MADT to determine how many CPUs
600 * we have including disabled CPUs, and get information
601 * we need for SMP init.
602 */
603 acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_INTERRUPT,
604 acpi_parse_gic_cpu_interface, 0);
605
606 /*
607 * In ACPI, SMP and CPU NUMA information is provided in separate
608 * static tables, namely the MADT and the SRAT.
609 *
610 * Thus, it is simpler to first create the cpu logical map through
611 * an MADT walk and then map the logical cpus to their node ids
612 * as separate steps.
613 */
614 acpi_map_cpus_to_nodes();
615
616 for (i = 0; i < nr_cpu_ids; i++)
617 early_map_cpu_to_node(i, acpi_numa_get_nid(i));
618 }
619 #else
620 #define acpi_parse_and_init_cpus(...) do { } while (0)
621 #endif
622
623 /*
624 * Enumerate the possible CPU set from the device tree and build the
625 * cpu logical map array containing MPIDR values related to logical
626 * cpus. Assumes that cpu_logical_map(0) has already been initialized.
627 */
of_parse_and_init_cpus(void)628 static void __init of_parse_and_init_cpus(void)
629 {
630 struct device_node *dn;
631
632 for_each_of_cpu_node(dn) {
633 u64 hwid = of_get_cpu_hwid(dn, 0);
634
635 if (hwid & ~MPIDR_HWID_BITMASK)
636 goto next;
637
638 if (is_mpidr_duplicate(cpu_count, hwid)) {
639 pr_err("%pOF: duplicate cpu reg properties in the DT\n",
640 dn);
641 goto next;
642 }
643
644 /*
645 * The numbering scheme requires that the boot CPU
646 * must be assigned logical id 0. Record it so that
647 * the logical map built from DT is validated and can
648 * be used.
649 */
650 if (hwid == cpu_logical_map(0)) {
651 if (bootcpu_valid) {
652 pr_err("%pOF: duplicate boot cpu reg property in DT\n",
653 dn);
654 goto next;
655 }
656
657 bootcpu_valid = true;
658 early_map_cpu_to_node(0, of_node_to_nid(dn));
659
660 /*
661 * cpu_logical_map has already been
662 * initialized and the boot cpu doesn't need
663 * the enable-method so continue without
664 * incrementing cpu.
665 */
666 continue;
667 }
668
669 if (cpu_count >= NR_CPUS)
670 goto next;
671
672 pr_debug("cpu logical map 0x%llx\n", hwid);
673 set_cpu_logical_map(cpu_count, hwid);
674
675 early_map_cpu_to_node(cpu_count, of_node_to_nid(dn));
676 next:
677 cpu_count++;
678 }
679 }
680
681 /*
682 * Enumerate the possible CPU set from the device tree or ACPI and build the
683 * cpu logical map array containing MPIDR values related to logical
684 * cpus. Assumes that cpu_logical_map(0) has already been initialized.
685 */
smp_init_cpus(void)686 void __init smp_init_cpus(void)
687 {
688 int i;
689
690 if (acpi_disabled)
691 of_parse_and_init_cpus();
692 else
693 acpi_parse_and_init_cpus();
694
695 if (cpu_count > nr_cpu_ids)
696 pr_warn("Number of cores (%d) exceeds configured maximum of %u - clipping\n",
697 cpu_count, nr_cpu_ids);
698
699 if (!bootcpu_valid) {
700 pr_err("missing boot CPU MPIDR, not enabling secondaries\n");
701 return;
702 }
703
704 /*
705 * We need to set the cpu_logical_map entries before enabling
706 * the cpus so that cpu processor description entries (DT cpu nodes
707 * and ACPI MADT entries) can be retrieved by matching the cpu hwid
708 * with entries in cpu_logical_map while initializing the cpus.
709 * If the cpu set-up fails, invalidate the cpu_logical_map entry.
710 */
711 for (i = 1; i < nr_cpu_ids; i++) {
712 if (cpu_logical_map(i) != INVALID_HWID) {
713 if (smp_cpu_setup(i))
714 set_cpu_logical_map(i, INVALID_HWID);
715 }
716 }
717 }
718
smp_prepare_cpus(unsigned int max_cpus)719 void __init smp_prepare_cpus(unsigned int max_cpus)
720 {
721 const struct cpu_operations *ops;
722 int err;
723 unsigned int cpu;
724 unsigned int this_cpu;
725
726 init_cpu_topology();
727
728 this_cpu = smp_processor_id();
729 store_cpu_topology(this_cpu);
730 numa_store_cpu_info(this_cpu);
731 numa_add_cpu(this_cpu);
732
733 /*
734 * If UP is mandated by "nosmp" (which implies "maxcpus=0"), don't set
735 * secondary CPUs present.
736 */
737 if (max_cpus == 0)
738 return;
739
740 /*
741 * Initialise the present map (which describes the set of CPUs
742 * actually populated at the present time) and release the
743 * secondaries from the bootloader.
744 */
745 for_each_possible_cpu(cpu) {
746
747 per_cpu(cpu_number, cpu) = cpu;
748
749 if (cpu == smp_processor_id())
750 continue;
751
752 ops = get_cpu_ops(cpu);
753 if (!ops)
754 continue;
755
756 err = ops->cpu_prepare(cpu);
757 if (err)
758 continue;
759
760 set_cpu_present(cpu, true);
761 numa_store_cpu_info(cpu);
762 }
763 }
764
765 static const char *ipi_types[NR_IPI] __tracepoint_string = {
766 [IPI_RESCHEDULE] = "Rescheduling interrupts",
767 [IPI_CALL_FUNC] = "Function call interrupts",
768 [IPI_CPU_STOP] = "CPU stop interrupts",
769 [IPI_CPU_CRASH_STOP] = "CPU stop (for crash dump) interrupts",
770 [IPI_TIMER] = "Timer broadcast interrupts",
771 [IPI_IRQ_WORK] = "IRQ work interrupts",
772 [IPI_WAKEUP] = "CPU wake-up interrupts",
773 };
774
775 static void smp_cross_call(const struct cpumask *target, unsigned int ipinr);
776
777 unsigned long irq_err_count;
778
arch_show_interrupts(struct seq_file * p,int prec)779 int arch_show_interrupts(struct seq_file *p, int prec)
780 {
781 unsigned int cpu, i;
782
783 for (i = 0; i < NR_IPI; i++) {
784 seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i,
785 prec >= 4 ? " " : "");
786 for_each_online_cpu(cpu)
787 seq_printf(p, "%10u ", irq_desc_kstat_cpu(ipi_desc[i], cpu));
788 seq_printf(p, " %s\n", ipi_types[i]);
789 }
790
791 seq_printf(p, "%*s: %10lu\n", prec, "Err", irq_err_count);
792 return 0;
793 }
794
arch_send_call_function_ipi_mask(const struct cpumask * mask)795 void arch_send_call_function_ipi_mask(const struct cpumask *mask)
796 {
797 smp_cross_call(mask, IPI_CALL_FUNC);
798 }
799
arch_send_call_function_single_ipi(int cpu)800 void arch_send_call_function_single_ipi(int cpu)
801 {
802 smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC);
803 }
804
805 #ifdef CONFIG_ARM64_ACPI_PARKING_PROTOCOL
arch_send_wakeup_ipi_mask(const struct cpumask * mask)806 void arch_send_wakeup_ipi_mask(const struct cpumask *mask)
807 {
808 smp_cross_call(mask, IPI_WAKEUP);
809 }
810 #endif
811
812 #ifdef CONFIG_IRQ_WORK
arch_irq_work_raise(void)813 void arch_irq_work_raise(void)
814 {
815 smp_cross_call(cpumask_of(smp_processor_id()), IPI_IRQ_WORK);
816 }
817 #endif
818
local_cpu_stop(void)819 static void local_cpu_stop(void)
820 {
821 set_cpu_online(smp_processor_id(), false);
822
823 local_daif_mask();
824 sdei_mask_local_cpu();
825 cpu_park_loop();
826 }
827
828 /*
829 * We need to implement panic_smp_self_stop() for parallel panic() calls, so
830 * that cpu_online_mask gets correctly updated and smp_send_stop() can skip
831 * CPUs that have already stopped themselves.
832 */
panic_smp_self_stop(void)833 void panic_smp_self_stop(void)
834 {
835 local_cpu_stop();
836 }
837
838 #ifdef CONFIG_KEXEC_CORE
839 static atomic_t waiting_for_crash_ipi = ATOMIC_INIT(0);
840 #endif
841
ipi_cpu_crash_stop(unsigned int cpu,struct pt_regs * regs)842 static void ipi_cpu_crash_stop(unsigned int cpu, struct pt_regs *regs)
843 {
844 #ifdef CONFIG_KEXEC_CORE
845 crash_save_cpu(regs, cpu);
846
847 atomic_dec(&waiting_for_crash_ipi);
848
849 local_irq_disable();
850 sdei_mask_local_cpu();
851
852 if (IS_ENABLED(CONFIG_HOTPLUG_CPU))
853 __cpu_try_die(cpu);
854
855 /* just in case */
856 cpu_park_loop();
857 #endif
858 }
859
860 /*
861 * Main handler for inter-processor interrupts
862 */
do_handle_IPI(int ipinr)863 static void do_handle_IPI(int ipinr)
864 {
865 unsigned int cpu = smp_processor_id();
866
867 if ((unsigned)ipinr < NR_IPI)
868 trace_ipi_entry_rcuidle(ipi_types[ipinr]);
869
870 switch (ipinr) {
871 case IPI_RESCHEDULE:
872 scheduler_ipi();
873 break;
874
875 case IPI_CALL_FUNC:
876 generic_smp_call_function_interrupt();
877 break;
878
879 case IPI_CPU_STOP:
880 local_cpu_stop();
881 break;
882
883 case IPI_CPU_CRASH_STOP:
884 if (IS_ENABLED(CONFIG_KEXEC_CORE)) {
885 ipi_cpu_crash_stop(cpu, get_irq_regs());
886
887 unreachable();
888 }
889 break;
890
891 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
892 case IPI_TIMER:
893 tick_receive_broadcast();
894 break;
895 #endif
896
897 #ifdef CONFIG_IRQ_WORK
898 case IPI_IRQ_WORK:
899 irq_work_run();
900 break;
901 #endif
902
903 #ifdef CONFIG_ARM64_ACPI_PARKING_PROTOCOL
904 case IPI_WAKEUP:
905 WARN_ONCE(!acpi_parking_protocol_valid(cpu),
906 "CPU%u: Wake-up IPI outside the ACPI parking protocol\n",
907 cpu);
908 break;
909 #endif
910
911 default:
912 pr_crit("CPU%u: Unknown IPI message 0x%x\n", cpu, ipinr);
913 break;
914 }
915
916 if ((unsigned)ipinr < NR_IPI)
917 trace_ipi_exit_rcuidle(ipi_types[ipinr]);
918 }
919
ipi_handler(int irq,void * data)920 static irqreturn_t ipi_handler(int irq, void *data)
921 {
922 do_handle_IPI(irq - ipi_irq_base);
923 return IRQ_HANDLED;
924 }
925
smp_cross_call(const struct cpumask * target,unsigned int ipinr)926 static void smp_cross_call(const struct cpumask *target, unsigned int ipinr)
927 {
928 trace_ipi_raise(target, ipi_types[ipinr]);
929 __ipi_send_mask(ipi_desc[ipinr], target);
930 }
931
ipi_setup(int cpu)932 static void ipi_setup(int cpu)
933 {
934 int i;
935
936 if (WARN_ON_ONCE(!ipi_irq_base))
937 return;
938
939 for (i = 0; i < nr_ipi; i++)
940 enable_percpu_irq(ipi_irq_base + i, 0);
941 }
942
943 #ifdef CONFIG_HOTPLUG_CPU
ipi_teardown(int cpu)944 static void ipi_teardown(int cpu)
945 {
946 int i;
947
948 if (WARN_ON_ONCE(!ipi_irq_base))
949 return;
950
951 for (i = 0; i < nr_ipi; i++)
952 disable_percpu_irq(ipi_irq_base + i);
953 }
954 #endif
955
set_smp_ipi_range(int ipi_base,int n)956 void __init set_smp_ipi_range(int ipi_base, int n)
957 {
958 int i;
959
960 WARN_ON(n < NR_IPI);
961 nr_ipi = min(n, NR_IPI);
962
963 for (i = 0; i < nr_ipi; i++) {
964 int err;
965
966 err = request_percpu_irq(ipi_base + i, ipi_handler,
967 "IPI", &cpu_number);
968 WARN_ON(err);
969
970 ipi_desc[i] = irq_to_desc(ipi_base + i);
971 irq_set_status_flags(ipi_base + i, IRQ_HIDDEN);
972 }
973
974 ipi_irq_base = ipi_base;
975
976 /* Setup the boot CPU immediately */
977 ipi_setup(smp_processor_id());
978 }
979
smp_send_reschedule(int cpu)980 void smp_send_reschedule(int cpu)
981 {
982 smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
983 }
984
985 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
tick_broadcast(const struct cpumask * mask)986 void tick_broadcast(const struct cpumask *mask)
987 {
988 smp_cross_call(mask, IPI_TIMER);
989 }
990 #endif
991
992 /*
993 * The number of CPUs online, not counting this CPU (which may not be
994 * fully online and so not counted in num_online_cpus()).
995 */
num_other_online_cpus(void)996 static inline unsigned int num_other_online_cpus(void)
997 {
998 unsigned int this_cpu_online = cpu_online(smp_processor_id());
999
1000 return num_online_cpus() - this_cpu_online;
1001 }
1002
smp_send_stop(void)1003 void smp_send_stop(void)
1004 {
1005 unsigned long timeout;
1006
1007 if (num_other_online_cpus()) {
1008 cpumask_t mask;
1009
1010 cpumask_copy(&mask, cpu_online_mask);
1011 cpumask_clear_cpu(smp_processor_id(), &mask);
1012
1013 if (system_state <= SYSTEM_RUNNING)
1014 pr_crit("SMP: stopping secondary CPUs\n");
1015 smp_cross_call(&mask, IPI_CPU_STOP);
1016 }
1017
1018 /* Wait up to one second for other CPUs to stop */
1019 timeout = USEC_PER_SEC;
1020 while (num_other_online_cpus() && timeout--)
1021 udelay(1);
1022
1023 if (num_other_online_cpus())
1024 pr_warn("SMP: failed to stop secondary CPUs %*pbl\n",
1025 cpumask_pr_args(cpu_online_mask));
1026
1027 sdei_mask_local_cpu();
1028 }
1029
1030 #ifdef CONFIG_KEXEC_CORE
crash_smp_send_stop(void)1031 void crash_smp_send_stop(void)
1032 {
1033 static int cpus_stopped;
1034 cpumask_t mask;
1035 unsigned long timeout;
1036
1037 /*
1038 * This function can be called twice in panic path, but obviously
1039 * we execute this only once.
1040 */
1041 if (cpus_stopped)
1042 return;
1043
1044 cpus_stopped = 1;
1045
1046 /*
1047 * If this cpu is the only one alive at this point in time, online or
1048 * not, there are no stop messages to be sent around, so just back out.
1049 */
1050 if (num_other_online_cpus() == 0) {
1051 sdei_mask_local_cpu();
1052 return;
1053 }
1054
1055 cpumask_copy(&mask, cpu_online_mask);
1056 cpumask_clear_cpu(smp_processor_id(), &mask);
1057
1058 atomic_set(&waiting_for_crash_ipi, num_other_online_cpus());
1059
1060 pr_crit("SMP: stopping secondary CPUs\n");
1061 smp_cross_call(&mask, IPI_CPU_CRASH_STOP);
1062
1063 /* Wait up to one second for other CPUs to stop */
1064 timeout = USEC_PER_SEC;
1065 while ((atomic_read(&waiting_for_crash_ipi) > 0) && timeout--)
1066 udelay(1);
1067
1068 if (atomic_read(&waiting_for_crash_ipi) > 0)
1069 pr_warn("SMP: failed to stop secondary CPUs %*pbl\n",
1070 cpumask_pr_args(&mask));
1071
1072 sdei_mask_local_cpu();
1073 }
1074
smp_crash_stop_failed(void)1075 bool smp_crash_stop_failed(void)
1076 {
1077 return (atomic_read(&waiting_for_crash_ipi) > 0);
1078 }
1079 #endif
1080
have_cpu_die(void)1081 static bool have_cpu_die(void)
1082 {
1083 #ifdef CONFIG_HOTPLUG_CPU
1084 int any_cpu = raw_smp_processor_id();
1085 const struct cpu_operations *ops = get_cpu_ops(any_cpu);
1086
1087 if (ops && ops->cpu_die)
1088 return true;
1089 #endif
1090 return false;
1091 }
1092
cpus_are_stuck_in_kernel(void)1093 bool cpus_are_stuck_in_kernel(void)
1094 {
1095 bool smp_spin_tables = (num_possible_cpus() > 1 && !have_cpu_die());
1096
1097 return !!cpus_stuck_in_kernel || smp_spin_tables ||
1098 is_protected_kvm_enabled();
1099 }
1100