1 /* 2 * 3 * This file is subject to the terms and conditions of the GNU General Public 4 * License. See the file "COPYING" in the main directory of this archive 5 * for more details. 6 * 7 * Copyright (C) 2000-2003 Silicon Graphics, Inc. All rights reserved. 8 */ 9 10 11 #ifndef _ASM_IA64_SN_SN_CPUID_H 12 #define _ASM_IA64_SN_SN_CPUID_H 13 14 #include <linux/config.h> 15 #include <linux/smp.h> 16 #include <linux/sched.h> 17 #include <linux/mmzone.h> 18 #include <asm/sn/types.h> 19 #include <asm/current.h> 20 #include <asm/nodedata.h> 21 #include <asm/sn/pda.h> 22 23 24 /* 25 * Functions for converting between cpuids, nodeids and NASIDs. 26 * 27 * These are for SGI platforms only. 28 * 29 */ 30 31 32 33 34 /* 35 * Definitions of terms (these definitions are for IA64 ONLY. Other architectures 36 * use cpuid/cpunum quite defferently): 37 * 38 * CPUID - a number in range of 0..NR_CPUS-1 that uniquely identifies 39 * the cpu. The value cpuid has no significance on IA64 other than 40 * the boot cpu is 0. 41 * smp_processor_id() returns the cpuid of the current cpu. 42 * 43 * CPUNUM - On IA64, a cpunum and cpuid are the same. This is NOT true 44 * on other architectures like IA32. 45 * 46 * CPU_PHYSICAL_ID (also known as HARD_PROCESSOR_ID) 47 * This is the same as 31:24 of the processor LID register 48 * hard_smp_processor_id()- cpu_physical_id of current processor 49 * cpu_physical_id(cpuid) - convert a <cpuid> to a <physical_cpuid> 50 * cpu_logical_id(phy_id) - convert a <physical_cpuid> to a <cpuid> 51 * * not real efficient - don't use in perf critical code 52 * 53 * LID - processor defined register (see PRM V2). 54 * 55 * On SN2 56 * 31:28 - id Contains 0-3 to identify the cpu on the node 57 * 27:16 - eid Contains the NASID 58 * 59 * 60 * 61 * The following assumes the following mappings for LID register values: 62 * 63 * The macros convert between cpu physical ids & slice/nasid/cnodeid. 64 * These terms are described below: 65 * 66 * 67 * Brick 68 * ----- ----- ----- ----- CPU 69 * | 0 | | 1 | | 0 | | 1 | SLICE 70 * ----- ----- ----- ----- 71 * | | | | 72 * | | | | 73 * 0 | | 2 0 | | 2 FSB SLOT 74 * ------- ------- 75 * | | 76 * | | 77 * | | 78 * ------------ ------------- 79 * | | | | 80 * | SHUB | | SHUB | NASID (0..MAX_NASIDS) 81 * | |----- | | CNODEID (0..num_compact_nodes-1) 82 * | | | | 83 * | | | | 84 * ------------ ------------- 85 * | | 86 * 87 * 88 */ 89 90 #ifndef CONFIG_SMP 91 #define cpu_logical_id(cpu) 0 92 #define cpu_physical_id(cpuid) ((ia64_get_lid() >> 16) & 0xffff) 93 #endif 94 95 /* 96 * macros for some of these exist in sn/addrs.h & sn/arch.h, etc. However, 97 * trying #include these files here causes circular dependencies. 98 */ 99 #define cpu_physical_id_to_nasid(cpi) ((cpi) &0xfff) 100 #define cpu_physical_id_to_slice(cpi) ((cpi>>12) & 3) 101 #define get_nasid() ((ia64_get_lid() >> 16) & 0xfff) 102 #define get_slice() ((ia64_get_lid() >> 28) & 0xf) 103 #define get_node_number(addr) (((unsigned long)(addr)>>38) & 0x7ff) 104 105 /* 106 * NOTE: id & eid refer to Intel's definitions of the LID register 107 * 108 * NOTE: on non-MP systems, only cpuid 0 exists 109 */ 110 #define id_eid_to_cpu_physical_id(id,eid) (((id)<<8) | (eid)) 111 112 #define nasid_slice_to_cpuid(nasid,slice) (cpu_logical_id(nasid_slice_to_cpu_physical_id((nasid),(slice)))) 113 114 #define nasid_slice_to_cpu_physical_id(nasid, slice) (((slice)<<12) | (nasid)) 115 116 /* 117 * The following table/struct is used for managing PTC coherency domains. 118 */ 119 typedef struct { 120 u8 domain; 121 u8 reserved; 122 u16 sapicid; 123 } sn_sapicid_info_t; 124 125 extern sn_sapicid_info_t sn_sapicid_info[]; /* indexed by cpuid */ 126 extern short physical_node_map[]; /* indexed by nasid to get cnode */ 127 128 129 /* 130 * cpuid_to_slice - convert a cpuid to the slice that it resides on 131 * There are 4 cpus per node. This function returns 0 .. 3) 132 */ 133 #define cpuid_to_slice(cpuid) (cpu_physical_id_to_slice(cpu_physical_id(cpuid))) 134 135 136 /* 137 * cpuid_to_nasid - convert a cpuid to the NASID that it resides on 138 */ 139 #define cpuid_to_nasid(cpuid) (cpu_physical_id_to_nasid(cpu_physical_id(cpuid))) 140 141 142 /* 143 * cpuid_to_cnodeid - convert a cpuid to the cnode that it resides on 144 */ 145 #define cpuid_to_cnodeid(cpuid) (physical_node_map[cpuid_to_nasid(cpuid)]) 146 147 148 /* 149 * cnodeid_to_nasid - convert a cnodeid to a NASID 150 * Macro relies on pg_data for a node being on the node itself. 151 * Just extract the NASID from the pointer. 152 * 153 */ 154 #define cnodeid_to_nasid(cnodeid) pda.cnodeid_to_nasid_table[cnodeid] 155 156 157 /* 158 * nasid_to_cnodeid - convert a NASID to a cnodeid 159 */ 160 #define nasid_to_cnodeid(nasid) (physical_node_map[nasid]) 161 162 163 /* 164 * cnode_slice_to_cpuid - convert a codeid & slice to a cpuid 165 */ 166 167 #define cnode_slice_to_cpuid(cnodeid,slice) (nasid_slice_to_cpuid(cnodeid_to_nasid(cnodeid),(slice))) 168 169 170 /* 171 * cpuid_to_subnode - convert a cpuid to the subnode it resides on. 172 * slice 0 & 1 are on subnode 0 173 * slice 2 & 3 are on subnode 1. 174 */ 175 #define cpuid_to_subnode(cpuid) ((cpuid_to_slice(cpuid)<2) ? 0 : 1) 176 177 178 #define smp_physical_node_id() (cpuid_to_nasid(smp_processor_id())) 179 180 181 #endif /* _ASM_IA64_SN_SN_CPUID_H */ 182 183