1 /* 2 * mtip32xx.h - Header file for the P320 SSD Block Driver 3 * Copyright (C) 2011 Micron Technology, Inc. 4 * 5 * Portions of this code were derived from works subjected to the 6 * following copyright: 7 * Copyright (C) 2009 Integrated Device Technology, Inc. 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 */ 20 21 #ifndef __MTIP32XX_H__ 22 #define __MTIP32XX_H__ 23 24 #include <linux/spinlock.h> 25 #include <linux/rwsem.h> 26 #include <linux/ata.h> 27 #include <linux/interrupt.h> 28 #include <linux/genhd.h> 29 #include <linux/version.h> 30 31 /* Offset of Subsystem Device ID in pci confoguration space */ 32 #define PCI_SUBSYSTEM_DEVICEID 0x2E 33 34 /* offset of Device Control register in PCIe extended capabilites space */ 35 #define PCIE_CONFIG_EXT_DEVICE_CONTROL_OFFSET 0x48 36 37 /* # of times to retry timed out/failed IOs */ 38 #define MTIP_MAX_RETRIES 2 39 40 /* Various timeout values in ms */ 41 #define MTIP_NCQ_COMMAND_TIMEOUT_MS 5000 42 #define MTIP_IOCTL_COMMAND_TIMEOUT_MS 5000 43 #define MTIP_INTERNAL_COMMAND_TIMEOUT_MS 5000 44 45 /* check for timeouts every 500ms */ 46 #define MTIP_TIMEOUT_CHECK_PERIOD 500 47 48 /* ftl rebuild */ 49 #define MTIP_FTL_REBUILD_OFFSET 142 50 #define MTIP_FTL_REBUILD_MAGIC 0xED51 51 #define MTIP_FTL_REBUILD_TIMEOUT_MS 2400000 52 53 /* Macro to extract the tag bit number from a tag value. */ 54 #define MTIP_TAG_BIT(tag) (tag & 0x1F) 55 56 /* 57 * Macro to extract the tag index from a tag value. The index 58 * is used to access the correct s_active/Command Issue register based 59 * on the tag value. 60 */ 61 #define MTIP_TAG_INDEX(tag) (tag >> 5) 62 63 /* 64 * Maximum number of scatter gather entries 65 * a single command may have. 66 */ 67 #define MTIP_MAX_SG 128 68 69 /* 70 * Maximum number of slot groups (Command Issue & s_active registers) 71 * NOTE: This is the driver maximum; check dd->slot_groups for actual value. 72 */ 73 #define MTIP_MAX_SLOT_GROUPS 8 74 75 /* Internal command tag. */ 76 #define MTIP_TAG_INTERNAL 0 77 78 /* Micron Vendor ID & P320x SSD Device ID */ 79 #define PCI_VENDOR_ID_MICRON 0x1344 80 #define P320_DEVICE_ID 0x5150 81 82 /* Driver name and version strings */ 83 #define MTIP_DRV_NAME "mtip32xx" 84 #define MTIP_DRV_VERSION "1.2.6os3" 85 86 /* Maximum number of minor device numbers per device. */ 87 #define MTIP_MAX_MINORS 16 88 89 /* Maximum number of supported command slots. */ 90 #define MTIP_MAX_COMMAND_SLOTS (MTIP_MAX_SLOT_GROUPS * 32) 91 92 /* 93 * Per-tag bitfield size in longs. 94 * Linux bit manipulation functions 95 * (i.e. test_and_set_bit, find_next_zero_bit) 96 * manipulate memory in longs, so we try to make the math work. 97 * take the slot groups and find the number of longs, rounding up. 98 * Careful! i386 and x86_64 use different size longs! 99 */ 100 #define U32_PER_LONG (sizeof(long) / sizeof(u32)) 101 #define SLOTBITS_IN_LONGS ((MTIP_MAX_SLOT_GROUPS + \ 102 (U32_PER_LONG-1))/U32_PER_LONG) 103 104 /* BAR number used to access the HBA registers. */ 105 #define MTIP_ABAR 5 106 107 #ifdef DEBUG 108 #define dbg_printk(format, arg...) \ 109 printk(pr_fmt(format), ##arg); 110 #else 111 #define dbg_printk(format, arg...) 112 #endif 113 114 #define __force_bit2int (unsigned int __force) 115 116 /* below are bit numbers in 'flags' defined in mtip_port */ 117 #define MTIP_PF_IC_ACTIVE_BIT 0 /* pio/ioctl */ 118 #define MTIP_PF_EH_ACTIVE_BIT 1 /* error handling */ 119 #define MTIP_PF_SE_ACTIVE_BIT 2 /* secure erase */ 120 #define MTIP_PF_DM_ACTIVE_BIT 3 /* download microcde */ 121 #define MTIP_PF_PAUSE_IO ((1 << MTIP_PF_IC_ACTIVE_BIT) | \ 122 (1 << MTIP_PF_EH_ACTIVE_BIT) | \ 123 (1 << MTIP_PF_SE_ACTIVE_BIT) | \ 124 (1 << MTIP_PF_DM_ACTIVE_BIT)) 125 126 #define MTIP_PF_SVC_THD_ACTIVE_BIT 4 127 #define MTIP_PF_ISSUE_CMDS_BIT 5 128 #define MTIP_PF_REBUILD_BIT 6 129 #define MTIP_PF_SVC_THD_STOP_BIT 8 130 131 /* below are bit numbers in 'dd_flag' defined in driver_data */ 132 #define MTIP_DDF_REMOVE_PENDING_BIT 1 133 #define MTIP_DDF_OVER_TEMP_BIT 2 134 #define MTIP_DDF_WRITE_PROTECT_BIT 3 135 #define MTIP_DDF_STOP_IO ((1 << MTIP_DDF_REMOVE_PENDING_BIT) | \ 136 (1 << MTIP_DDF_OVER_TEMP_BIT) | \ 137 (1 << MTIP_DDF_WRITE_PROTECT_BIT)) 138 139 #define MTIP_DDF_CLEANUP_BIT 5 140 #define MTIP_DDF_RESUME_BIT 6 141 #define MTIP_DDF_INIT_DONE_BIT 7 142 #define MTIP_DDF_REBUILD_FAILED_BIT 8 143 144 __packed struct smart_attr{ 145 u8 attr_id; 146 u16 flags; 147 u8 cur; 148 u8 worst; 149 u32 data; 150 u8 res[3]; 151 }; 152 153 /* Register Frame Information Structure (FIS), host to device. */ 154 struct host_to_dev_fis { 155 /* 156 * FIS type. 157 * - 27h Register FIS, host to device. 158 * - 34h Register FIS, device to host. 159 * - 39h DMA Activate FIS, device to host. 160 * - 41h DMA Setup FIS, bi-directional. 161 * - 46h Data FIS, bi-directional. 162 * - 58h BIST Activate FIS, bi-directional. 163 * - 5Fh PIO Setup FIS, device to host. 164 * - A1h Set Device Bits FIS, device to host. 165 */ 166 unsigned char type; 167 unsigned char opts; 168 unsigned char command; 169 unsigned char features; 170 171 union { 172 unsigned char lba_low; 173 unsigned char sector; 174 }; 175 union { 176 unsigned char lba_mid; 177 unsigned char cyl_low; 178 }; 179 union { 180 unsigned char lba_hi; 181 unsigned char cyl_hi; 182 }; 183 union { 184 unsigned char device; 185 unsigned char head; 186 }; 187 188 union { 189 unsigned char lba_low_ex; 190 unsigned char sector_ex; 191 }; 192 union { 193 unsigned char lba_mid_ex; 194 unsigned char cyl_low_ex; 195 }; 196 union { 197 unsigned char lba_hi_ex; 198 unsigned char cyl_hi_ex; 199 }; 200 unsigned char features_ex; 201 202 unsigned char sect_count; 203 unsigned char sect_cnt_ex; 204 unsigned char res2; 205 unsigned char control; 206 207 unsigned int res3; 208 }; 209 210 /* Command header structure. */ 211 struct mtip_cmd_hdr { 212 /* 213 * Command options. 214 * - Bits 31:16 Number of PRD entries. 215 * - Bits 15:8 Unused in this implementation. 216 * - Bit 7 Prefetch bit, informs the drive to prefetch PRD entries. 217 * - Bit 6 Write bit, should be set when writing data to the device. 218 * - Bit 5 Unused in this implementation. 219 * - Bits 4:0 Length of the command FIS in DWords (DWord = 4 bytes). 220 */ 221 unsigned int opts; 222 /* This field is unsed when using NCQ. */ 223 union { 224 unsigned int byte_count; 225 unsigned int status; 226 }; 227 /* 228 * Lower 32 bits of the command table address associated with this 229 * header. The command table addresses must be 128 byte aligned. 230 */ 231 unsigned int ctba; 232 /* 233 * If 64 bit addressing is used this field is the upper 32 bits 234 * of the command table address associated with this command. 235 */ 236 unsigned int ctbau; 237 /* Reserved and unused. */ 238 unsigned int res[4]; 239 }; 240 241 /* Command scatter gather structure (PRD). */ 242 struct mtip_cmd_sg { 243 /* 244 * Low 32 bits of the data buffer address. For P320 this 245 * address must be 8 byte aligned signified by bits 2:0 being 246 * set to 0. 247 */ 248 unsigned int dba; 249 /* 250 * When 64 bit addressing is used this field is the upper 251 * 32 bits of the data buffer address. 252 */ 253 unsigned int dba_upper; 254 /* Unused. */ 255 unsigned int reserved; 256 /* 257 * Bit 31: interrupt when this data block has been transferred. 258 * Bits 30..22: reserved 259 * Bits 21..0: byte count (minus 1). For P320 the byte count must be 260 * 8 byte aligned signified by bits 2:0 being set to 1. 261 */ 262 unsigned int info; 263 }; 264 struct mtip_port; 265 266 /* Structure used to describe a command. */ 267 struct mtip_cmd { 268 269 struct mtip_cmd_hdr *command_header; /* ptr to command header entry */ 270 271 dma_addr_t command_header_dma; /* corresponding physical address */ 272 273 void *command; /* ptr to command table entry */ 274 275 dma_addr_t command_dma; /* corresponding physical address */ 276 277 void *comp_data; /* data passed to completion function comp_func() */ 278 /* 279 * Completion function called by the ISR upon completion of 280 * a command. 281 */ 282 void (*comp_func)(struct mtip_port *port, 283 int tag, 284 void *data, 285 int status); 286 /* Additional callback function that may be called by comp_func() */ 287 void (*async_callback)(void *data, int status); 288 289 void *async_data; /* Addl. data passed to async_callback() */ 290 291 int scatter_ents; /* Number of scatter list entries used */ 292 293 struct scatterlist sg[MTIP_MAX_SG]; /* Scatter list entries */ 294 295 int retries; /* The number of retries left for this command. */ 296 297 int direction; /* Data transfer direction */ 298 299 unsigned long comp_time; /* command completion time, in jiffies */ 300 301 atomic_t active; /* declares if this command sent to the drive. */ 302 }; 303 304 /* Structure used to describe a port. */ 305 struct mtip_port { 306 /* Pointer back to the driver data for this port. */ 307 struct driver_data *dd; 308 /* 309 * Used to determine if the data pointed to by the 310 * identify field is valid. 311 */ 312 unsigned long identify_valid; 313 /* Base address of the memory mapped IO for the port. */ 314 void __iomem *mmio; 315 /* Array of pointers to the memory mapped s_active registers. */ 316 void __iomem *s_active[MTIP_MAX_SLOT_GROUPS]; 317 /* Array of pointers to the memory mapped completed registers. */ 318 void __iomem *completed[MTIP_MAX_SLOT_GROUPS]; 319 /* Array of pointers to the memory mapped Command Issue registers. */ 320 void __iomem *cmd_issue[MTIP_MAX_SLOT_GROUPS]; 321 /* 322 * Pointer to the beginning of the command header memory as used 323 * by the driver. 324 */ 325 void *command_list; 326 /* 327 * Pointer to the beginning of the command header memory as used 328 * by the DMA. 329 */ 330 dma_addr_t command_list_dma; 331 /* 332 * Pointer to the beginning of the RX FIS memory as used 333 * by the driver. 334 */ 335 void *rxfis; 336 /* 337 * Pointer to the beginning of the RX FIS memory as used 338 * by the DMA. 339 */ 340 dma_addr_t rxfis_dma; 341 /* 342 * Pointer to the beginning of the command table memory as used 343 * by the driver. 344 */ 345 void *command_table; 346 /* 347 * Pointer to the beginning of the command table memory as used 348 * by the DMA. 349 */ 350 dma_addr_t command_tbl_dma; 351 /* 352 * Pointer to the beginning of the identify data memory as used 353 * by the driver. 354 */ 355 u16 *identify; 356 /* 357 * Pointer to the beginning of the identify data memory as used 358 * by the DMA. 359 */ 360 dma_addr_t identify_dma; 361 /* 362 * Pointer to the beginning of a sector buffer that is used 363 * by the driver when issuing internal commands. 364 */ 365 u16 *sector_buffer; 366 /* 367 * Pointer to the beginning of a sector buffer that is used 368 * by the DMA when the driver issues internal commands. 369 */ 370 dma_addr_t sector_buffer_dma; 371 /* 372 * Bit significant, used to determine if a command slot has 373 * been allocated. i.e. the slot is in use. Bits are cleared 374 * when the command slot and all associated data structures 375 * are no longer needed. 376 */ 377 u16 *log_buf; 378 dma_addr_t log_buf_dma; 379 380 u8 *smart_buf; 381 dma_addr_t smart_buf_dma; 382 383 unsigned long allocated[SLOTBITS_IN_LONGS]; 384 /* 385 * used to queue commands when an internal command is in progress 386 * or error handling is active 387 */ 388 unsigned long cmds_to_issue[SLOTBITS_IN_LONGS]; 389 /* 390 * Array of command slots. Structure includes pointers to the 391 * command header and command table, and completion function and data 392 * pointers. 393 */ 394 struct mtip_cmd commands[MTIP_MAX_COMMAND_SLOTS]; 395 /* Used by mtip_service_thread to wait for an event */ 396 wait_queue_head_t svc_wait; 397 /* 398 * indicates the state of the port. Also, helps the service thread 399 * to determine its action on wake up. 400 */ 401 unsigned long flags; 402 /* 403 * Timer used to complete commands that have been active for too long. 404 */ 405 struct timer_list cmd_timer; 406 unsigned long ic_pause_timer; 407 /* 408 * Semaphore used to block threads if there are no 409 * command slots available. 410 */ 411 struct semaphore cmd_slot; 412 /* Spinlock for working around command-issue bug. */ 413 spinlock_t cmd_issue_lock; 414 }; 415 416 /* 417 * Driver private data structure. 418 * 419 * One structure is allocated per probed device. 420 */ 421 struct driver_data { 422 void __iomem *mmio; /* Base address of the HBA registers. */ 423 424 int major; /* Major device number. */ 425 426 int instance; /* Instance number. First device probed is 0, ... */ 427 428 struct gendisk *disk; /* Pointer to our gendisk structure. */ 429 430 struct pci_dev *pdev; /* Pointer to the PCI device structure. */ 431 432 struct request_queue *queue; /* Our request queue. */ 433 434 struct mtip_port *port; /* Pointer to the port data structure. */ 435 436 /* Tasklet used to process the bottom half of the ISR. */ 437 struct tasklet_struct tasklet; 438 439 unsigned product_type; /* magic value declaring the product type */ 440 441 unsigned slot_groups; /* number of slot groups the product supports */ 442 443 unsigned long index; /* Index to determine the disk name */ 444 445 unsigned long dd_flag; /* NOTE: use atomic bit operations on this */ 446 447 struct task_struct *mtip_svc_handler; /* task_struct of svc thd */ 448 }; 449 450 #endif 451