1 /*
2  * Copyright 2012-15 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25 
26 
27 #ifndef __DAL_DPP_H__
28 #define __DAL_DPP_H__
29 
30 #include "transform.h"
31 #include "cursor_reg_cache.h"
32 
33 union defer_reg_writes {
34 	struct {
35 		bool disable_blnd_lut:1;
36 		bool disable_3dlut:1;
37 		bool disable_shaper:1;
38 		bool disable_gamcor:1;
39 		bool disable_dscl:1;
40 	} bits;
41 	uint32_t raw;
42 };
43 
44 struct dpp {
45 	const struct dpp_funcs *funcs;
46 	struct dc_context *ctx;
47 	/**
48 	 * @inst:
49 	 *
50 	 * inst stands for "instance," and it is an id number that references a
51 	 * specific DPP.
52 	 */
53 	int inst;
54 	struct dpp_caps *caps;
55 	struct pwl_params regamma_params;
56 	struct pwl_params degamma_params;
57 	struct dpp_cursor_attributes cur_attr;
58 	union defer_reg_writes deferred_reg_writes;
59 
60 	struct pwl_params shaper_params;
61 	bool cm_bypass_mode;
62 
63 	struct cursor_position_cache_dpp  pos;
64 	struct cursor_attribute_cache_dpp att;
65 };
66 
67 struct dpp_input_csc_matrix {
68 	enum dc_color_space color_space;
69 	uint16_t regval[12];
70 };
71 
72 static const struct dpp_input_csc_matrix __maybe_unused dpp_input_csc_matrix[] = {
73 	{ COLOR_SPACE_SRGB,
74 		{ 0x2000, 0,      0,      0,
75 		  0,      0x2000, 0,      0,
76 		  0,      0,      0x2000, 0 } },
77 	{ COLOR_SPACE_SRGB_LIMITED,
78 		{ 0x2000, 0,      0,      0,
79 		  0,      0x2000, 0,      0,
80 		  0,      0,      0x2000, 0 } },
81 	{ COLOR_SPACE_YCBCR601,
82 		{ 0x2cdd, 0x2000, 0,      0xe991,
83 		  0xe926, 0x2000, 0xf4fd, 0x10ef,
84 		  0,      0x2000, 0x38b4, 0xe3a6 } },
85 	{ COLOR_SPACE_YCBCR601_LIMITED,
86 		{ 0x3353, 0x2568, 0,      0xe400,
87 		  0xe5dc, 0x2568, 0xf367, 0x1108,
88 		  0,      0x2568, 0x40de, 0xdd3a } },
89 	{ COLOR_SPACE_YCBCR709,
90 		{ 0x3265, 0x2000, 0,      0xe6ce,
91 		  0xf105, 0x2000, 0xfa01, 0xa7d,
92 		  0,      0x2000, 0x3b61, 0xe24f } },
93 	{ COLOR_SPACE_YCBCR709_LIMITED,
94 		{ 0x39a6, 0x2568, 0,      0xe0d6,
95 		  0xeedd, 0x2568, 0xf925, 0x9a8,
96 		  0,      0x2568, 0x43ee, 0xdbb2 } },
97 	{ COLOR_SPACE_2020_YCBCR,
98 		{ 0x2F30, 0x2000, 0,      0xE869,
99 		  0xEDB7, 0x2000, 0xFABC, 0xBC6,
100 		  0,      0x2000, 0x3C34, 0xE1E6 } },
101 	{ COLOR_SPACE_2020_RGB_LIMITEDRANGE,
102 		{ 0x35E0, 0x255F, 0,      0xE2B3,
103 		  0xEB20, 0x255F, 0xF9FD, 0xB1E,
104 		  0,      0x255F, 0x44BD, 0xDB43 } }
105 };
106 
107 struct dpp_grph_csc_adjustment {
108 	struct fixed31_32 temperature_matrix[CSC_TEMPERATURE_MATRIX_SIZE];
109 	enum graphics_gamut_adjust_type gamut_adjust_type;
110 };
111 
112 struct cnv_color_keyer_params {
113 	int color_keyer_en;
114 	int color_keyer_mode;
115 	int color_keyer_alpha_low;
116 	int color_keyer_alpha_high;
117 	int color_keyer_red_low;
118 	int color_keyer_red_high;
119 	int color_keyer_green_low;
120 	int color_keyer_green_high;
121 	int color_keyer_blue_low;
122 	int color_keyer_blue_high;
123 };
124 
125 /* new for dcn2: set the 8bit alpha values based on the 2 bit alpha
126  *ALPHA_2BIT_LUT. ALPHA_2BIT_LUT0   default: 0b00000000
127  *ALPHA_2BIT_LUT. ALPHA_2BIT_LUT1   default: 0b01010101
128  *ALPHA_2BIT_LUT. ALPHA_2BIT_LUT2   default: 0b10101010
129  *ALPHA_2BIT_LUT. ALPHA_2BIT_LUT3   default: 0b11111111
130  */
131 struct cnv_alpha_2bit_lut {
132 	int lut0;
133 	int lut1;
134 	int lut2;
135 	int lut3;
136 };
137 
138 struct dcn_dpp_state {
139 	uint32_t is_enabled;
140 	uint32_t igam_lut_mode;
141 	uint32_t igam_input_format;
142 	uint32_t dgam_lut_mode;
143 	uint32_t rgam_lut_mode;
144 	uint32_t gamut_remap_mode;
145 	uint32_t gamut_remap_c11_c12;
146 	uint32_t gamut_remap_c13_c14;
147 	uint32_t gamut_remap_c21_c22;
148 	uint32_t gamut_remap_c23_c24;
149 	uint32_t gamut_remap_c31_c32;
150 	uint32_t gamut_remap_c33_c34;
151 };
152 
153 struct CM_bias_params {
154 	uint32_t cm_bias_cr_r;
155 	uint32_t cm_bias_y_g;
156 	uint32_t cm_bias_cb_b;
157 	uint32_t cm_bias_format;
158 };
159 
160 struct dpp_funcs {
161 	bool (*dpp_program_gamcor_lut)(
162 		struct dpp *dpp_base, const struct pwl_params *params);
163 
164 	void (*dpp_set_pre_degam)(struct dpp *dpp_base,
165 			enum dc_transfer_func_predefined tr);
166 
167 	void (*dpp_program_cm_dealpha)(struct dpp *dpp_base,
168 		uint32_t enable, uint32_t additive_blending);
169 
170 	void (*dpp_program_cm_bias)(
171 		struct dpp *dpp_base,
172 		struct CM_bias_params *bias_params);
173 
174 	void (*dpp_read_state)(struct dpp *dpp, struct dcn_dpp_state *s);
175 
176 	void (*dpp_reset)(struct dpp *dpp);
177 
178 	void (*dpp_set_scaler)(struct dpp *dpp,
179 			const struct scaler_data *scl_data);
180 
181 	void (*dpp_set_pixel_storage_depth)(
182 			struct dpp *dpp,
183 			enum lb_pixel_depth depth,
184 			const struct bit_depth_reduction_params *bit_depth_params);
185 
186 	bool (*dpp_get_optimal_number_of_taps)(
187 			struct dpp *dpp,
188 			struct scaler_data *scl_data,
189 			const struct scaling_taps *in_taps);
190 
191 	void (*dpp_set_gamut_remap)(
192 			struct dpp *dpp,
193 			const struct dpp_grph_csc_adjustment *adjust);
194 
195 	void (*dpp_set_csc_default)(
196 		struct dpp *dpp,
197 		enum dc_color_space colorspace);
198 
199 	void (*dpp_set_csc_adjustment)(
200 		struct dpp *dpp,
201 		const uint16_t *regval);
202 
203 	void (*dpp_power_on_regamma_lut)(
204 		struct dpp *dpp,
205 		bool power_on);
206 
207 	void (*dpp_program_regamma_lut)(
208 			struct dpp *dpp,
209 			const struct pwl_result_data *rgb,
210 			uint32_t num);
211 
212 	void (*dpp_configure_regamma_lut)(
213 			struct dpp *dpp,
214 			bool is_ram_a);
215 
216 	void (*dpp_program_regamma_lutb_settings)(
217 			struct dpp *dpp,
218 			const struct pwl_params *params);
219 
220 	void (*dpp_program_regamma_luta_settings)(
221 			struct dpp *dpp,
222 			const struct pwl_params *params);
223 
224 	void (*dpp_program_regamma_pwl)(
225 		struct dpp *dpp,
226 		const struct pwl_params *params,
227 		enum opp_regamma mode);
228 
229 	void (*dpp_program_bias_and_scale)(
230 			struct dpp *dpp,
231 			struct dc_bias_and_scale *params);
232 
233 	void (*dpp_set_degamma)(
234 			struct dpp *dpp_base,
235 			enum ipp_degamma_mode mode);
236 
237 	void (*dpp_program_input_lut)(
238 			struct dpp *dpp_base,
239 			const struct dc_gamma *gamma);
240 
241 	void (*dpp_program_degamma_pwl)(struct dpp *dpp_base,
242 									 const struct pwl_params *params);
243 
244 	void (*dpp_setup)(
245 			struct dpp *dpp_base,
246 			enum surface_pixel_format format,
247 			enum expansion_mode mode,
248 			struct dc_csc_transform input_csc_color_matrix,
249 			enum dc_color_space input_color_space,
250 			struct cnv_alpha_2bit_lut *alpha_2bit_lut);
251 
252 	void (*dpp_full_bypass)(struct dpp *dpp_base);
253 
254 	void (*set_cursor_attributes)(
255 			struct dpp *dpp_base,
256 			struct dc_cursor_attributes *cursor_attributes);
257 
258 	void (*set_cursor_position)(
259 			struct dpp *dpp_base,
260 			const struct dc_cursor_position *pos,
261 			const struct dc_cursor_mi_param *param,
262 			uint32_t width,
263 			uint32_t height
264 			);
265 
266 	void (*dpp_set_hdr_multiplier)(
267 			struct dpp *dpp_base,
268 			uint32_t multiplier);
269 
270 	void (*set_optional_cursor_attributes)(
271 			struct dpp *dpp_base,
272 			struct dpp_cursor_attributes *attr);
273 
274 	void (*dpp_dppclk_control)(
275 			struct dpp *dpp_base,
276 			bool dppclk_div,
277 			bool enable);
278 
279 	void (*dpp_deferred_update)(
280 			struct dpp *dpp);
281 	bool (*dpp_program_blnd_lut)(
282 			struct dpp *dpp,
283 			const struct pwl_params *params);
284 	bool (*dpp_program_shaper_lut)(
285 			struct dpp *dpp,
286 			const struct pwl_params *params);
287 	bool (*dpp_program_3dlut)(
288 			struct dpp *dpp,
289 			struct tetrahedral_params *params);
290 	void (*dpp_cnv_set_alpha_keyer)(
291 			struct dpp *dpp_base,
292 			struct cnv_color_keyer_params *color_keyer);
293 };
294 
295 
296 
297 #endif
298