/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/ |
D | clk_mgr.c | 99 void clk_mgr_exit_optimized_pwr_state(const struct dc *dc, struct clk_mgr *clk_mgr) in clk_mgr_exit_optimized_pwr_state() 124 void clk_mgr_optimize_pwr_state(const struct dc *dc, struct clk_mgr *clk_mgr) in clk_mgr_optimize_pwr_state() 154 struct clk_mgr_internal *clk_mgr = kzalloc(sizeof(*clk_mgr), GFP_KERNEL); in dc_clk_mgr_create() local 167 struct clk_mgr_internal *clk_mgr = kzalloc(sizeof(*clk_mgr), GFP_KERNEL); in dc_clk_mgr_create() local 177 struct clk_mgr_internal *clk_mgr = kzalloc(sizeof(*clk_mgr), GFP_KERNEL); in dc_clk_mgr_create() local 187 struct clk_mgr_internal *clk_mgr = kzalloc(sizeof(*clk_mgr), GFP_KERNEL); in dc_clk_mgr_create() local 211 struct clk_mgr_internal *clk_mgr = kzalloc(sizeof(*clk_mgr), GFP_KERNEL); in dc_clk_mgr_create() local 225 struct clk_mgr_internal *clk_mgr = kzalloc(sizeof(*clk_mgr), GFP_KERNEL); in dc_clk_mgr_create() local 253 struct clk_mgr_internal *clk_mgr = kzalloc(sizeof(*clk_mgr), GFP_KERNEL); in dc_clk_mgr_create() local 280 struct clk_mgr_vgh *clk_mgr = kzalloc(sizeof(*clk_mgr), GFP_KERNEL); in dc_clk_mgr_create() local [all …]
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/ |
D | dcn30_clk_mgr_smu_msg.c | 55 static uint32_t dcn30_smu_wait_for_response(struct clk_mgr_internal *clk_mgr, unsigned int delay_us… in dcn30_smu_wait_for_response() 77 static bool dcn30_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr, uint32_t msg_id, uint32… in dcn30_smu_send_msg_with_param() 110 bool dcn30_smu_test_message(struct clk_mgr_internal *clk_mgr, uint32_t input) in dcn30_smu_test_message() 124 bool dcn30_smu_get_smu_version(struct clk_mgr_internal *clk_mgr, unsigned int *version) in dcn30_smu_get_smu_version() 140 bool dcn30_smu_check_driver_if_version(struct clk_mgr_internal *clk_mgr) in dcn30_smu_check_driver_if_version() 159 bool dcn30_smu_check_msg_header_version(struct clk_mgr_internal *clk_mgr) in dcn30_smu_check_msg_header_version() 177 void dcn30_smu_set_dram_addr_high(struct clk_mgr_internal *clk_mgr, uint32_t addr_high) in dcn30_smu_set_dram_addr_high() 185 void dcn30_smu_set_dram_addr_low(struct clk_mgr_internal *clk_mgr, uint32_t addr_low) in dcn30_smu_set_dram_addr_low() 193 void dcn30_smu_transfer_wm_table_smu_2_dram(struct clk_mgr_internal *clk_mgr) in dcn30_smu_transfer_wm_table_smu_2_dram() 201 void dcn30_smu_transfer_wm_table_dram_2_smu(struct clk_mgr_internal *clk_mgr) in dcn30_smu_transfer_wm_table_dram_2_smu() [all …]
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D | dcn30_clk_mgr.c | 80 static void dcn3_init_single_clock(struct clk_mgr_internal *clk_mgr, uint32_t clk, unsigned int *en… in dcn3_init_single_clock() 101 static void dcn3_build_wm_range_table(struct clk_mgr_internal *clk_mgr) in dcn3_build_wm_range_table() 110 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn3_init_clocks() local 172 static int dcn30_get_vco_frequency_from_reg(struct clk_mgr_internal *clk_mgr) in dcn30_get_vco_frequency_from_reg() 196 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn3_update_clocks() local 328 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn3_notify_wm_ranges() local 359 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn3_set_hard_min_memclk() local 380 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn3_set_hard_max_memclk() local 391 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn3_set_max_memclk() local 400 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn3_set_min_memclk() local [all …]
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/ |
D | dcn301_smu.c | 79 static uint32_t dcn301_smu_wait_for_response(struct clk_mgr_internal *clk_mgr, unsigned int delay_u… in dcn301_smu_wait_for_response() 97 static int dcn301_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr, in dcn301_smu_send_msg_with_param() 129 int dcn301_smu_get_smu_version(struct clk_mgr_internal *clk_mgr) in dcn301_smu_get_smu_version() 141 int dcn301_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz) in dcn301_smu_set_dispclk() 156 int dcn301_smu_set_dprefclk(struct clk_mgr_internal *clk_mgr) in dcn301_smu_set_dprefclk() 172 int dcn301_smu_set_hard_min_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_dcfclk_khz) in dcn301_smu_set_hard_min_dcfclk() 190 int dcn301_smu_set_min_deep_sleep_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_min_ds_dcf… in dcn301_smu_set_min_deep_sleep_dcfclk() 204 int dcn301_smu_set_dppclk(struct clk_mgr_internal *clk_mgr, int requested_dpp_khz) in dcn301_smu_set_dppclk() 218 void dcn301_smu_set_display_idle_optimization(struct clk_mgr_internal *clk_mgr, uint32_t idle_info) in dcn301_smu_set_display_idle_optimization() 230 void dcn301_smu_enable_phy_refclk_pwrdwn(struct clk_mgr_internal *clk_mgr, bool enable) in dcn301_smu_enable_phy_refclk_pwrdwn() [all …]
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D | vg_clk_mgr.c | 55 #define TO_CLK_MGR_VGH(clk_mgr)\ argument 99 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in vg_update_clocks() local 187 static int get_vco_frequency_from_reg(struct clk_mgr_internal *clk_mgr) in get_vco_frequency_from_reg() 220 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in vg_dump_clk_registers_internal() local 374 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in vg_enable_pme_wa() local 379 static void vg_init_clocks(struct clk_mgr *clk_mgr) in vg_init_clocks() 446 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in vg_notify_wm_ranges() local 547 struct clk_mgr_internal *clk_mgr, in vg_clk_mgr_helper_populate_bw_params() 623 static void vg_get_dpm_table_from_smu(struct clk_mgr_internal *clk_mgr, in vg_get_dpm_table_from_smu() 645 struct clk_mgr_vgh *clk_mgr, in vg_clk_mgr_construct() [all …]
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/ |
D | dcn31_smu.c | 86 static uint32_t dcn31_smu_wait_for_response(struct clk_mgr_internal *clk_mgr, unsigned int delay_us… in dcn31_smu_wait_for_response() 104 static int dcn31_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr, in dcn31_smu_send_msg_with_param() 148 int dcn31_smu_get_smu_version(struct clk_mgr_internal *clk_mgr) in dcn31_smu_get_smu_version() 157 int dcn31_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz) in dcn31_smu_set_dispclk() 173 int dcn31_smu_set_dprefclk(struct clk_mgr_internal *clk_mgr) in dcn31_smu_set_dprefclk() 190 int dcn31_smu_set_hard_min_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_dcfclk_khz) in dcn31_smu_set_hard_min_dcfclk() 212 int dcn31_smu_set_min_deep_sleep_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_min_ds_dcfc… in dcn31_smu_set_min_deep_sleep_dcfclk() 230 int dcn31_smu_set_dppclk(struct clk_mgr_internal *clk_mgr, int requested_dpp_khz) in dcn31_smu_set_dppclk() 245 void dcn31_smu_set_display_idle_optimization(struct clk_mgr_internal *clk_mgr, uint32_t idle_info) in dcn31_smu_set_display_idle_optimization() 260 void dcn31_smu_enable_phy_refclk_pwrdwn(struct clk_mgr_internal *clk_mgr, bool enable) in dcn31_smu_enable_phy_refclk_pwrdwn() [all …]
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D | dcn31_clk_mgr.c | 71 #define TO_CLK_MGR_DCN31(clk_mgr)\ argument 132 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn31_update_clocks() local 257 static int get_vco_frequency_from_reg(struct clk_mgr_internal *clk_mgr) in get_vco_frequency_from_reg() 289 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn31_enable_pme_wa() local 294 void dcn31_init_clocks(struct clk_mgr *clk_mgr) in dcn31_init_clocks() 476 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn31_notify_wm_ranges() local 497 static void dcn31_get_dpm_table_from_smu(struct clk_mgr_internal *clk_mgr, in dcn31_get_dpm_table_from_smu() 553 static void dcn31_clk_mgr_helper_populate_bw_params(struct clk_mgr_internal *clk_mgr, in dcn31_clk_mgr_helper_populate_bw_params() 630 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn31_set_low_power_state() local 669 struct clk_mgr_dcn31 *clk_mgr, in dcn31_clk_mgr_construct() [all …]
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/ |
D | dcn316_smu.c | 102 static uint32_t dcn316_smu_wait_for_response(struct clk_mgr_internal *clk_mgr, unsigned int delay_u… in dcn316_smu_wait_for_response() 121 struct clk_mgr_internal *clk_mgr, in dcn316_smu_send_msg_with_param() 154 int dcn316_smu_get_smu_version(struct clk_mgr_internal *clk_mgr) in dcn316_smu_get_smu_version() 163 int dcn316_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz) in dcn316_smu_set_dispclk() 179 int dcn316_smu_set_hard_min_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_dcfclk_khz) in dcn316_smu_set_hard_min_dcfclk() 201 int dcn316_smu_set_min_deep_sleep_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_min_ds_dcf… in dcn316_smu_set_min_deep_sleep_dcfclk() 219 int dcn316_smu_set_dppclk(struct clk_mgr_internal *clk_mgr, int requested_dpp_khz) in dcn316_smu_set_dppclk() 234 void dcn316_smu_set_display_idle_optimization(struct clk_mgr_internal *clk_mgr, uint32_t idle_info) in dcn316_smu_set_display_idle_optimization() 249 void dcn316_smu_enable_phy_refclk_pwrdwn(struct clk_mgr_internal *clk_mgr, bool enable) in dcn316_smu_enable_phy_refclk_pwrdwn() 267 void dcn316_smu_set_dram_addr_high(struct clk_mgr_internal *clk_mgr, uint32_t addr_high) in dcn316_smu_set_dram_addr_high() [all …]
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D | dcn316_clk_mgr.c | 79 #define TO_CLK_MGR_DCN316(clk_mgr)\ argument 138 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn316_enable_pme_wa() local 148 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn316_update_clocks() local 412 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn316_notify_wm_ranges() local 433 static void dcn316_get_dpm_table_from_smu(struct clk_mgr_internal *clk_mgr, in dcn316_get_dpm_table_from_smu() 490 struct clk_mgr_internal *clk_mgr, in dcn316_clk_mgr_helper_populate_bw_params() 583 static int get_vco_frequency_from_reg(struct clk_mgr_internal *clk_mgr) in get_vco_frequency_from_reg() 615 struct clk_mgr_dcn316 *clk_mgr, in dcn316_clk_mgr_construct() 716 struct clk_mgr_dcn316 *clk_mgr = TO_CLK_MGR_DCN316(clk_mgr_int); in dcn316_clk_mgr_destroy() local
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/ |
D | dcn315_smu.c | 114 static uint32_t dcn315_smu_wait_for_response(struct clk_mgr_internal *clk_mgr, unsigned int delay_u… in dcn315_smu_wait_for_response() 133 struct clk_mgr_internal *clk_mgr, in dcn315_smu_send_msg_with_param() 168 int dcn315_smu_get_smu_version(struct clk_mgr_internal *clk_mgr) in dcn315_smu_get_smu_version() 177 int dcn315_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz) in dcn315_smu_set_dispclk() 193 int dcn315_smu_set_hard_min_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_dcfclk_khz) in dcn315_smu_set_hard_min_dcfclk() 215 int dcn315_smu_set_min_deep_sleep_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_min_ds_dcf… in dcn315_smu_set_min_deep_sleep_dcfclk() 233 int dcn315_smu_set_dppclk(struct clk_mgr_internal *clk_mgr, int requested_dpp_khz) in dcn315_smu_set_dppclk() 248 void dcn315_smu_set_display_idle_optimization(struct clk_mgr_internal *clk_mgr, uint32_t idle_info) in dcn315_smu_set_display_idle_optimization() 263 void dcn315_smu_enable_phy_refclk_pwrdwn(struct clk_mgr_internal *clk_mgr, bool enable) in dcn315_smu_enable_phy_refclk_pwrdwn() 281 void dcn315_smu_enable_pme_wa(struct clk_mgr_internal *clk_mgr) in dcn315_smu_enable_pme_wa() [all …]
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D | dcn315_clk_mgr.c | 51 #define TO_CLK_MGR_DCN315(clk_mgr)\ argument 116 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn315_update_clocks() local 420 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn315_notify_wm_ranges() local 441 static void dcn315_get_dpm_table_from_smu(struct clk_mgr_internal *clk_mgr, in dcn315_get_dpm_table_from_smu() 475 struct clk_mgr_internal *clk_mgr, in dcn315_clk_mgr_helper_populate_bw_params() 588 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn315_enable_pme_wa() local 606 struct clk_mgr_dcn315 *clk_mgr, in dcn315_clk_mgr_construct() 738 struct clk_mgr_dcn315 *clk_mgr = TO_CLK_MGR_DCN315(clk_mgr_int); in dcn315_clk_mgr_destroy() local
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/ |
D | dcn314_smu.c | 101 static uint32_t dcn314_smu_wait_for_response(struct clk_mgr_internal *clk_mgr, unsigned int delay_u… in dcn314_smu_wait_for_response() 119 static int dcn314_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr, in dcn314_smu_send_msg_with_param() 163 int dcn314_smu_get_smu_version(struct clk_mgr_internal *clk_mgr) in dcn314_smu_get_smu_version() 172 int dcn314_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz) in dcn314_smu_set_dispclk() 188 int dcn314_smu_set_dprefclk(struct clk_mgr_internal *clk_mgr) in dcn314_smu_set_dprefclk() 205 int dcn314_smu_set_hard_min_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_dcfclk_khz) in dcn314_smu_set_hard_min_dcfclk() 229 int dcn314_smu_set_min_deep_sleep_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_min_ds_dcf… in dcn314_smu_set_min_deep_sleep_dcfclk() 247 int dcn314_smu_set_dppclk(struct clk_mgr_internal *clk_mgr, int requested_dpp_khz) in dcn314_smu_set_dppclk() 262 void dcn314_smu_set_display_idle_optimization(struct clk_mgr_internal *clk_mgr, uint32_t idle_info) in dcn314_smu_set_display_idle_optimization() 277 void dcn314_smu_enable_phy_refclk_pwrdwn(struct clk_mgr_internal *clk_mgr, bool enable) in dcn314_smu_enable_phy_refclk_pwrdwn() [all …]
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D | dcn314_clk_mgr.c | 93 #define TO_CLK_MGR_DCN314(clk_mgr)\ argument 163 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn314_update_clocks() local 289 static int get_vco_frequency_from_reg(struct clk_mgr_internal *clk_mgr) in get_vco_frequency_from_reg() 321 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn314_enable_pme_wa() local 495 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn314_notify_wm_ranges() local 516 static void dcn314_get_dpm_table_from_smu(struct clk_mgr_internal *clk_mgr, in dcn314_get_dpm_table_from_smu() 569 static void dcn314_clk_mgr_helper_populate_bw_params(struct clk_mgr_internal *clk_mgr, in dcn314_clk_mgr_helper_populate_bw_params() 719 struct clk_mgr_dcn314 *clk_mgr, in dcn314_clk_mgr_construct() 854 struct clk_mgr_dcn314 *clk_mgr = TO_CLK_MGR_DCN314(clk_mgr_int); in dcn314_clk_mgr_destroy() local
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/ |
D | rn_clk_mgr_vbios_smu.c | 78 static uint32_t rn_smu_wait_for_response(struct clk_mgr_internal *clk_mgr, unsigned int delay_us, u… in rn_smu_wait_for_response() 97 static int rn_vbios_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr, in rn_vbios_smu_send_msg_with_param() 129 int rn_vbios_smu_get_smu_version(struct clk_mgr_internal *clk_mgr) in rn_vbios_smu_get_smu_version() 138 int rn_vbios_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz) in rn_vbios_smu_set_dispclk() 165 int rn_vbios_smu_set_dprefclk(struct clk_mgr_internal *clk_mgr) in rn_vbios_smu_set_dprefclk() 179 int rn_vbios_smu_set_hard_min_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_dcfclk_khz) in rn_vbios_smu_set_hard_min_dcfclk() 198 int rn_vbios_smu_set_min_deep_sleep_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_min_ds_d… in rn_vbios_smu_set_min_deep_sleep_dcfclk() 213 void rn_vbios_smu_set_phyclk(struct clk_mgr_internal *clk_mgr, int requested_phyclk_khz) in rn_vbios_smu_set_phyclk() 221 int rn_vbios_smu_set_dppclk(struct clk_mgr_internal *clk_mgr, int requested_dpp_khz) in rn_vbios_smu_set_dppclk() 237 void rn_vbios_smu_set_dcn_low_power_state(struct clk_mgr_internal *clk_mgr, enum dcn_pwr_state stat… in rn_vbios_smu_set_dcn_low_power_state() [all …]
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D | rn_clk_mgr.c | 89 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in rn_set_low_power_state() local 106 static void rn_update_clocks_update_dpp_dto(struct clk_mgr_internal *clk_mgr, in rn_update_clocks_update_dpp_dto() 135 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in rn_update_clocks() local 253 static int get_vco_frequency_from_reg(struct clk_mgr_internal *clk_mgr) in get_vco_frequency_from_reg() 286 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in rn_dump_clk_registers_internal() local 440 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in rn_enable_pme_wa() local 445 static void rn_init_clocks(struct clk_mgr *clk_mgr) in rn_init_clocks() 514 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in rn_notify_wm_ranges() local 546 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in rn_notify_link_rate_change() local 700 struct clk_mgr_internal *clk_mgr, in rn_clk_mgr_construct()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/ |
D | dcn32_clk_mgr.c | 125 static void dcn32_init_single_clock(struct clk_mgr_internal *clk_mgr, PPCLK_e clk, unsigned int *en… in dcn32_init_single_clock() 148 static void dcn32_build_wm_range_table(struct clk_mgr_internal *clk_mgr) in dcn32_build_wm_range_table() 157 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn32_init_clocks() local 236 static void dcn32_update_clocks_update_dtb_dto(struct clk_mgr_internal *clk_mgr, in dcn32_update_clocks_update_dtb_dto() 276 static void dcn32_update_dppclk_dispclk_freq(struct clk_mgr_internal *clk_mgr, struct dc_clocks *ne… in dcn32_update_dppclk_dispclk_freq() 297 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn32_update_clocks() local 479 static uint32_t dcn32_get_vco_frequency_from_reg(struct clk_mgr_internal *clk_mgr) in dcn32_get_vco_frequency_from_reg() 506 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn32_dump_clk_registers() local 569 static void dcn32_clock_read_ss_info(struct clk_mgr_internal *clk_mgr) in dcn32_clock_read_ss_info() 602 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn32_notify_wm_ranges() local [all …]
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D | dcn32_clk_mgr_smu_msg.c | 50 static uint32_t dcn32_smu_wait_for_response(struct clk_mgr_internal *clk_mgr, unsigned int delay_us… in dcn32_smu_wait_for_response() 68 static bool dcn32_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr, uint32_t msg_id, uint32… in dcn32_smu_send_msg_with_param() 93 void dcn32_smu_send_fclk_pstate_message(struct clk_mgr_internal *clk_mgr, bool enable) in dcn32_smu_send_fclk_pstate_message() 101 void dcn32_smu_send_cab_for_uclk_message(struct clk_mgr_internal *clk_mgr, unsigned int num_ways) in dcn32_smu_send_cab_for_uclk_message() 109 void dcn32_smu_transfer_wm_table_dram_2_smu(struct clk_mgr_internal *clk_mgr) in dcn32_smu_transfer_wm_table_dram_2_smu() 117 void dcn32_smu_set_pme_workaround(struct clk_mgr_internal *clk_mgr) in dcn32_smu_set_pme_workaround() 126 unsigned int dcn32_smu_set_hard_min_by_freq(struct clk_mgr_internal *clk_mgr, uint32_t clk, uint16_… in dcn32_smu_set_hard_min_by_freq()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/ |
D | dcn20_clk_mgr.c | 104 void dcn20_update_clocks_update_dpp_dto(struct clk_mgr_internal *clk_mgr, in dcn20_update_clocks_update_dpp_dto() 127 void dcn20_update_clocks_update_dentist(struct clk_mgr_internal *clk_mgr, struct dc_state *context) in dcn20_update_clocks_update_dentist() 220 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn2_update_clocks() local 343 void dcn2_update_clocks_fpga(struct clk_mgr *clk_mgr, in dcn2_update_clocks_fpga() 403 void dcn2_init_clocks(struct clk_mgr *clk_mgr) in dcn2_init_clocks() 413 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn2_enable_pme_wa() local 427 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn2_read_clocks_from_hw_dentist() local 449 void dcn2_get_clock(struct clk_mgr *clk_mgr, in dcn2_get_clock() 495 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn2_notify_link_rate_change() local 530 struct clk_mgr_internal *clk_mgr, in dcn20_clk_mgr_construct()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/ |
D | rv1_clk_mgr.c | 37 static void rv1_init_clocks(struct clk_mgr *clk_mgr) in rv1_init_clocks() 42 static int rv1_determine_dppclk_threshold(struct clk_mgr_internal *clk_mgr, struct dc_clocks *new_c… in rv1_determine_dppclk_threshold() 89 struct clk_mgr_internal *clk_mgr, in ramp_up_dispclk_with_dpp() 194 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in rv1_update_clocks() local 296 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in rv1_enable_pme_wa() local 319 void rv1_clk_mgr_construct(struct dc_context *ctx, struct clk_mgr_internal *clk_mgr, struct pp_smu_… in rv1_clk_mgr_construct()
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D | rv1_clk_mgr_vbios_smu.c | 86 static uint32_t rv1_smu_wait_for_response(struct clk_mgr_internal *clk_mgr, unsigned int delay_us, … in rv1_smu_wait_for_response() 104 static int rv1_vbios_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr, in rv1_vbios_smu_send_msg_with_param() 126 int rv1_vbios_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz) in rv1_vbios_smu_set_dispclk() 149 int rv1_vbios_smu_set_dprefclk(struct clk_mgr_internal *clk_mgr) in rv1_vbios_smu_set_dprefclk()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dce/ |
D | dce_clk_mgr.c | 148 static int dce_get_dp_ref_freq_khz(struct clk_mgr *clk_mgr) in dce_get_dp_ref_freq_khz() 174 int dce12_get_dp_ref_freq_khz(struct clk_mgr *clk_mgr) in dce12_get_dp_ref_freq_khz() 214 struct clk_mgr *clk_mgr, in dce_get_required_clocks_state() 247 struct clk_mgr *clk_mgr, in dce_set_clock() 288 int dce112_set_clock(struct clk_mgr *clk_mgr, int requested_clk_khz) in dce112_set_clock() 468 void dce121_clock_patch_xgmi_ss_info(struct clk_mgr *clk_mgr) in dce121_clock_patch_xgmi_ss_info() 672 static void dce_update_clocks(struct clk_mgr *clk_mgr, in dce_update_clocks() 699 static void dce11_update_clocks(struct clk_mgr *clk_mgr, in dce11_update_clocks() 726 static void dce112_update_clocks(struct clk_mgr *clk_mgr, in dce112_update_clocks() 753 static void dce12_update_clocks(struct clk_mgr *clk_mgr, in dce12_update_clocks() [all …]
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/inc/hw/ |
D | clk_mgr.h | 298 struct clk_mgr { struct 300 struct clk_mgr_funcs *funcs; argument 315 struct clk_mgr *dc_clk_mgr_create(struct dc_context *ctx, struct pp_smu_funcs *pp_smu, struct dccg … argument
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/ |
D | dcn201_clk_mgr.c | 77 static void dcn201_init_clocks(struct clk_mgr *clk_mgr) in dcn201_init_clocks() 90 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn201_update_clocks() local 173 struct clk_mgr_internal *clk_mgr, in dcn201_clk_mgr_construct()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/ |
D | dce112_clk_mgr.c | 126 int dce112_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_clk_khz) in dce112_set_dispclk() 169 int dce112_set_dprefclk(struct clk_mgr_internal *clk_mgr) in dce112_set_dprefclk() 229 struct clk_mgr_internal *clk_mgr) in dce112_clk_mgr_construct()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dce120/ |
D | dce120_clk_mgr.c | 128 void dce120_clk_mgr_construct(struct dc_context *ctx, struct clk_mgr_internal *clk_mgr) in dce120_clk_mgr_construct() 140 void dce121_clk_mgr_construct(struct dc_context *ctx, struct clk_mgr_internal *clk_mgr) in dce121_clk_mgr_construct()
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