Searched defs:ch_inst (Results 1 – 5 of 5) sorted by relevance
| /linux-5.19.10/drivers/gpu/drm/amd/amdgpu/ |
| D | umc_v8_7.c | 45 uint32_t ch_inst) in get_umc_v8_7_reg_offset()
51 uint32_t umc_inst, uint32_t ch_inst, in umc_v8_7_ecc_info_query_correctable_error_count()
70 uint32_t umc_inst, uint32_t ch_inst, in umc_v8_7_ecc_info_querry_uncorrectable_error_count()
96 uint32_t ch_inst = 0; in umc_v8_7_ecc_info_query_ras_error_count() local
113 uint32_t ch_inst, in umc_v8_7_ecc_info_query_error_address()
160 uint32_t ch_inst = 0; in umc_v8_7_ecc_info_query_ras_error_address() local
215 uint32_t ch_inst = 0; in umc_v8_7_clear_error_count() local
301 uint32_t ch_inst = 0; in umc_v8_7_query_ras_error_count() local
323 uint32_t ch_inst, in umc_v8_7_query_error_address()
379 uint32_t ch_inst = 0; in umc_v8_7_query_ras_error_address() local
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| D | umc_v6_7.c | 48 uint32_t ch_inst) in get_umc_v6_7_reg_offset()
62 uint32_t ch_inst) in get_umc_v6_7_channel_index()
102 uint32_t umc_inst, uint32_t ch_inst, in umc_v6_7_ecc_info_query_correctable_error_count()
126 uint32_t umc_inst, uint32_t ch_inst, in umc_v6_7_ecc_info_querry_uncorrectable_error_count()
158 uint32_t ch_inst = 0; in umc_v6_7_ecc_info_query_ras_error_count() local
174 uint32_t ch_inst, in umc_v6_7_ecc_info_query_error_address()
239 uint32_t ch_inst = 0; in umc_v6_7_ecc_info_query_ras_error_address() local
368 uint32_t ch_inst = 0; in umc_v6_7_reset_error_count() local
387 uint32_t ch_inst = 0; in umc_v6_7_query_ras_error_count() local
410 uint32_t ch_inst, in umc_v6_7_query_error_address()
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| D | umc_v6_1.c | 89 uint32_t ch_inst) in get_umc_6_reg_offset()
148 uint32_t ch_inst = 0; in umc_v6_1_clear_error_count() local
260 uint32_t ch_inst = 0; in umc_v6_1_query_ras_error_count() local
298 uint32_t ch_inst, in umc_v6_1_query_error_address()
363 uint32_t ch_inst = 0; in umc_v6_1_query_ras_error_address() local
436 uint32_t ch_inst = 0; in umc_v6_1_err_cnt_init() local
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| D | amdgpu_umc.h | 41 #define LOOP_UMC_CH_INST(ch_inst) for ((ch_inst) = 0; (ch_inst) < adev->umc.channel_inst_num; (ch_i… argument
42 #define LOOP_UMC_INST_AND_CH(umc_inst, ch_inst) LOOP_UMC_INST((umc_inst)) LOOP_UMC_CH_INST((ch_inst… argument
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| D | amdgpu_ras.c | 2821 uint32_t ch_inst, channel_index = 0; in amdgpu_bad_page_notifier() local
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