1 /*
2 * Celleb setup code
3 *
4 * (C) Copyright 2006-2007 TOSHIBA CORPORATION
5 *
6 * This code is based on arch/powerpc/platforms/cell/setup.c:
7 * Copyright (C) 1995 Linus Torvalds
8 * Adapted from 'alpha' version by Gary Thomas
9 * Modified by Cort Dougan (cort@cs.nmt.edu)
10 * Modified by PPC64 Team, IBM Corp
11 * Modified by Cell Team, IBM Deutschland Entwicklung GmbH
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License along
24 * with this program; if not, write to the Free Software Foundation, Inc.,
25 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
26 */
27
28 #undef DEBUG
29
30 #include <linux/cpu.h>
31 #include <linux/sched.h>
32 #include <linux/kernel.h>
33 #include <linux/export.h>
34 #include <linux/mm.h>
35 #include <linux/stddef.h>
36 #include <linux/unistd.h>
37 #include <linux/reboot.h>
38 #include <linux/init.h>
39 #include <linux/delay.h>
40 #include <linux/irq.h>
41 #include <linux/seq_file.h>
42 #include <linux/root_dev.h>
43 #include <linux/console.h>
44 #include <linux/of_platform.h>
45
46 #include <asm/mmu.h>
47 #include <asm/processor.h>
48 #include <asm/io.h>
49 #include <asm/prom.h>
50 #include <asm/machdep.h>
51 #include <asm/cputable.h>
52 #include <asm/irq.h>
53 #include <asm/time.h>
54 #include <asm/spu_priv1.h>
55 #include <asm/firmware.h>
56 #include <asm/rtas.h>
57 #include <asm/cell-regs.h>
58
59 #include "beat_interrupt.h"
60 #include "beat_wrapper.h"
61 #include "beat.h"
62 #include "celleb_pci.h"
63 #include "interrupt.h"
64 #include "pervasive.h"
65 #include "ras.h"
66
67 static char celleb_machine_type[128] = "Celleb";
68
celleb_show_cpuinfo(struct seq_file * m)69 static void celleb_show_cpuinfo(struct seq_file *m)
70 {
71 struct device_node *root;
72 const char *model = "";
73
74 root = of_find_node_by_path("/");
75 if (root)
76 model = of_get_property(root, "model", NULL);
77 /* using "CHRP" is to trick anaconda into installing FCx into Celleb */
78 seq_printf(m, "machine\t\t: %s %s\n", celleb_machine_type, model);
79 of_node_put(root);
80 }
81
celleb_machine_type_hack(char * ptr)82 static int __init celleb_machine_type_hack(char *ptr)
83 {
84 strlcpy(celleb_machine_type, ptr, sizeof(celleb_machine_type));
85 return 0;
86 }
87
88 __setup("celleb_machine_type_hack=", celleb_machine_type_hack);
89
celleb_progress(char * s,unsigned short hex)90 static void celleb_progress(char *s, unsigned short hex)
91 {
92 printk("*** %04x : %s\n", hex, s ? s : "");
93 }
94
celleb_setup_arch_common(void)95 static void __init celleb_setup_arch_common(void)
96 {
97 /* init to some ~sane value until calibrate_delay() runs */
98 loops_per_jiffy = 50000000;
99
100 #ifdef CONFIG_DUMMY_CONSOLE
101 conswitchp = &dummy_con;
102 #endif
103 }
104
105 static struct of_device_id celleb_bus_ids[] __initdata = {
106 { .type = "scc", },
107 { .type = "ioif", }, /* old style */
108 {},
109 };
110
celleb_publish_devices(void)111 static int __init celleb_publish_devices(void)
112 {
113 /* Publish OF platform devices for southbridge IOs */
114 of_platform_bus_probe(NULL, celleb_bus_ids, NULL);
115
116 return 0;
117 }
118 machine_device_initcall(celleb_beat, celleb_publish_devices);
119 machine_device_initcall(celleb_native, celleb_publish_devices);
120
121
122 /*
123 * functions for Celleb-Beat
124 */
celleb_setup_arch_beat(void)125 static void __init celleb_setup_arch_beat(void)
126 {
127 #ifdef CONFIG_SPU_BASE
128 spu_priv1_ops = &spu_priv1_beat_ops;
129 spu_management_ops = &spu_management_of_ops;
130 #endif
131
132 celleb_setup_arch_common();
133 }
134
celleb_probe_beat(void)135 static int __init celleb_probe_beat(void)
136 {
137 unsigned long root = of_get_flat_dt_root();
138
139 if (!of_flat_dt_is_compatible(root, "Beat"))
140 return 0;
141
142 powerpc_firmware_features |= FW_FEATURE_CELLEB_ALWAYS
143 | FW_FEATURE_BEAT | FW_FEATURE_LPAR;
144 hpte_init_beat_v3();
145
146 return 1;
147 }
148
149
150 /*
151 * functions for Celleb-native
152 */
celleb_init_IRQ_native(void)153 static void __init celleb_init_IRQ_native(void)
154 {
155 iic_init_IRQ();
156 spider_init_IRQ();
157 }
158
celleb_setup_arch_native(void)159 static void __init celleb_setup_arch_native(void)
160 {
161 #ifdef CONFIG_SPU_BASE
162 spu_priv1_ops = &spu_priv1_mmio_ops;
163 spu_management_ops = &spu_management_of_ops;
164 #endif
165
166 cbe_regs_init();
167
168 #ifdef CONFIG_CBE_RAS
169 cbe_ras_init();
170 #endif
171
172 #ifdef CONFIG_SMP
173 smp_init_cell();
174 #endif
175
176 cbe_pervasive_init();
177
178 /* XXX: nvram initialization should be added */
179
180 celleb_setup_arch_common();
181 }
182
celleb_probe_native(void)183 static int __init celleb_probe_native(void)
184 {
185 unsigned long root = of_get_flat_dt_root();
186
187 if (of_flat_dt_is_compatible(root, "Beat") ||
188 !of_flat_dt_is_compatible(root, "TOSHIBA,Celleb"))
189 return 0;
190
191 powerpc_firmware_features |= FW_FEATURE_CELLEB_ALWAYS;
192 hpte_init_native();
193
194 return 1;
195 }
196
197
198 /*
199 * machine definitions
200 */
define_machine(celleb_beat)201 define_machine(celleb_beat) {
202 .name = "Cell Reference Set (Beat)",
203 .probe = celleb_probe_beat,
204 .setup_arch = celleb_setup_arch_beat,
205 .show_cpuinfo = celleb_show_cpuinfo,
206 .restart = beat_restart,
207 .power_off = beat_power_off,
208 .halt = beat_halt,
209 .get_rtc_time = beat_get_rtc_time,
210 .set_rtc_time = beat_set_rtc_time,
211 .calibrate_decr = generic_calibrate_decr,
212 .progress = celleb_progress,
213 .power_save = beat_power_save,
214 .nvram_size = beat_nvram_get_size,
215 .nvram_read = beat_nvram_read,
216 .nvram_write = beat_nvram_write,
217 .set_dabr = beat_set_xdabr,
218 .init_IRQ = beatic_init_IRQ,
219 .get_irq = beatic_get_irq,
220 .pci_probe_mode = celleb_pci_probe_mode,
221 .pci_setup_phb = celleb_setup_phb,
222 #ifdef CONFIG_KEXEC
223 .kexec_cpu_down = beat_kexec_cpu_down,
224 #endif
225 };
226
define_machine(celleb_native)227 define_machine(celleb_native) {
228 .name = "Cell Reference Set (native)",
229 .probe = celleb_probe_native,
230 .setup_arch = celleb_setup_arch_native,
231 .show_cpuinfo = celleb_show_cpuinfo,
232 .restart = rtas_restart,
233 .power_off = rtas_power_off,
234 .halt = rtas_halt,
235 .get_boot_time = rtas_get_boot_time,
236 .get_rtc_time = rtas_get_rtc_time,
237 .set_rtc_time = rtas_set_rtc_time,
238 .calibrate_decr = generic_calibrate_decr,
239 .progress = celleb_progress,
240 .pci_probe_mode = celleb_pci_probe_mode,
241 .pci_setup_phb = celleb_setup_phb,
242 .init_IRQ = celleb_init_IRQ_native,
243 };
244