1 /*******************************************************************************
2
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 #include "e1000.h"
30
31 /* Change Log
32 * 7.0.36 10-Mar-2006
33 * o fixups for compilation issues on older kernels
34 * 7.0.35 3-Mar-2006
35 * 7.0.34
36 * o Major performance fixes by understanding relationship of rx_buffer_len
37 * to window size growth. _ps and legacy receive paths changed
38 * o merge with kernel changes
39 * o legacy receive path went back to single descriptor model for jumbos
40 * 7.0.33 3-Feb-2006
41 * o Added another fix for the pass false carrier bit
42 */
43
44 char e1000_driver_name[] = "e1000";
45 static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
46 #ifndef CONFIG_E1000_NAPI
47 #define DRIVERNAPI
48 #else
49 #define DRIVERNAPI "-NAPI"
50 #endif
51 #define DRV_VERSION "7.3.20-k4"DRIVERNAPI
52 char e1000_driver_version[] = DRV_VERSION;
53 static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
54
55 /* e1000_pci_tbl - PCI Device ID Table
56 *
57 * Last entry must be all 0s
58 *
59 * Macro expands to...
60 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
61 */
62 static struct pci_device_id e1000_pci_tbl[] = {
63 INTEL_E1000_ETHERNET_DEVICE(0x1000),
64 INTEL_E1000_ETHERNET_DEVICE(0x1001),
65 INTEL_E1000_ETHERNET_DEVICE(0x1004),
66 INTEL_E1000_ETHERNET_DEVICE(0x1008),
67 INTEL_E1000_ETHERNET_DEVICE(0x1009),
68 INTEL_E1000_ETHERNET_DEVICE(0x100C),
69 INTEL_E1000_ETHERNET_DEVICE(0x100D),
70 INTEL_E1000_ETHERNET_DEVICE(0x100E),
71 INTEL_E1000_ETHERNET_DEVICE(0x100F),
72 INTEL_E1000_ETHERNET_DEVICE(0x1010),
73 INTEL_E1000_ETHERNET_DEVICE(0x1011),
74 INTEL_E1000_ETHERNET_DEVICE(0x1012),
75 INTEL_E1000_ETHERNET_DEVICE(0x1013),
76 INTEL_E1000_ETHERNET_DEVICE(0x1014),
77 INTEL_E1000_ETHERNET_DEVICE(0x1015),
78 INTEL_E1000_ETHERNET_DEVICE(0x1016),
79 INTEL_E1000_ETHERNET_DEVICE(0x1017),
80 INTEL_E1000_ETHERNET_DEVICE(0x1018),
81 INTEL_E1000_ETHERNET_DEVICE(0x1019),
82 INTEL_E1000_ETHERNET_DEVICE(0x101A),
83 INTEL_E1000_ETHERNET_DEVICE(0x101D),
84 INTEL_E1000_ETHERNET_DEVICE(0x101E),
85 INTEL_E1000_ETHERNET_DEVICE(0x1026),
86 INTEL_E1000_ETHERNET_DEVICE(0x1027),
87 INTEL_E1000_ETHERNET_DEVICE(0x1028),
88 INTEL_E1000_ETHERNET_DEVICE(0x1049),
89 INTEL_E1000_ETHERNET_DEVICE(0x104A),
90 INTEL_E1000_ETHERNET_DEVICE(0x104B),
91 INTEL_E1000_ETHERNET_DEVICE(0x104C),
92 INTEL_E1000_ETHERNET_DEVICE(0x104D),
93 INTEL_E1000_ETHERNET_DEVICE(0x105E),
94 INTEL_E1000_ETHERNET_DEVICE(0x105F),
95 INTEL_E1000_ETHERNET_DEVICE(0x1060),
96 INTEL_E1000_ETHERNET_DEVICE(0x1075),
97 INTEL_E1000_ETHERNET_DEVICE(0x1076),
98 INTEL_E1000_ETHERNET_DEVICE(0x1077),
99 INTEL_E1000_ETHERNET_DEVICE(0x1078),
100 INTEL_E1000_ETHERNET_DEVICE(0x1079),
101 INTEL_E1000_ETHERNET_DEVICE(0x107A),
102 INTEL_E1000_ETHERNET_DEVICE(0x107B),
103 INTEL_E1000_ETHERNET_DEVICE(0x107C),
104 INTEL_E1000_ETHERNET_DEVICE(0x107D),
105 INTEL_E1000_ETHERNET_DEVICE(0x107E),
106 INTEL_E1000_ETHERNET_DEVICE(0x107F),
107 INTEL_E1000_ETHERNET_DEVICE(0x108A),
108 INTEL_E1000_ETHERNET_DEVICE(0x108B),
109 INTEL_E1000_ETHERNET_DEVICE(0x108C),
110 INTEL_E1000_ETHERNET_DEVICE(0x1096),
111 INTEL_E1000_ETHERNET_DEVICE(0x1098),
112 INTEL_E1000_ETHERNET_DEVICE(0x1099),
113 INTEL_E1000_ETHERNET_DEVICE(0x109A),
114 INTEL_E1000_ETHERNET_DEVICE(0x10A4),
115 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
116 INTEL_E1000_ETHERNET_DEVICE(0x10B9),
117 INTEL_E1000_ETHERNET_DEVICE(0x10BA),
118 INTEL_E1000_ETHERNET_DEVICE(0x10BB),
119 INTEL_E1000_ETHERNET_DEVICE(0x10BC),
120 INTEL_E1000_ETHERNET_DEVICE(0x10C4),
121 INTEL_E1000_ETHERNET_DEVICE(0x10C5),
122 /* required last entry */
123 {0,}
124 };
125
126 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
127
128 int e1000_up(struct e1000_adapter *adapter);
129 void e1000_down(struct e1000_adapter *adapter);
130 void e1000_reinit_locked(struct e1000_adapter *adapter);
131 void e1000_reset(struct e1000_adapter *adapter);
132 int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
133 int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
134 int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
135 void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
136 void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
137 static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
138 struct e1000_tx_ring *txdr);
139 static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
140 struct e1000_rx_ring *rxdr);
141 static void e1000_free_tx_resources(struct e1000_adapter *adapter,
142 struct e1000_tx_ring *tx_ring);
143 static void e1000_free_rx_resources(struct e1000_adapter *adapter,
144 struct e1000_rx_ring *rx_ring);
145 void e1000_update_stats(struct e1000_adapter *adapter);
146
147 static int e1000_init_module(void);
148 static void e1000_exit_module(void);
149 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
150 static void __devexit e1000_remove(struct pci_dev *pdev);
151 static int e1000_alloc_queues(struct e1000_adapter *adapter);
152 static int e1000_sw_init(struct e1000_adapter *adapter);
153 static int e1000_open(struct net_device *netdev);
154 static int e1000_close(struct net_device *netdev);
155 static void e1000_configure_tx(struct e1000_adapter *adapter);
156 static void e1000_configure_rx(struct e1000_adapter *adapter);
157 static void e1000_setup_rctl(struct e1000_adapter *adapter);
158 static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
159 static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
160 static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
161 struct e1000_tx_ring *tx_ring);
162 static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
163 struct e1000_rx_ring *rx_ring);
164 static void e1000_set_multi(struct net_device *netdev);
165 static void e1000_update_phy_info(unsigned long data);
166 static void e1000_watchdog(unsigned long data);
167 static void e1000_82547_tx_fifo_stall(unsigned long data);
168 static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
169 static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
170 static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
171 static int e1000_set_mac(struct net_device *netdev, void *p);
172 static irqreturn_t e1000_intr(int irq, void *data);
173 static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
174 struct e1000_tx_ring *tx_ring);
175 #ifdef CONFIG_E1000_NAPI
176 static int e1000_clean(struct net_device *poll_dev, int *budget);
177 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
178 struct e1000_rx_ring *rx_ring,
179 int *work_done, int work_to_do);
180 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
181 struct e1000_rx_ring *rx_ring,
182 int *work_done, int work_to_do);
183 #else
184 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
185 struct e1000_rx_ring *rx_ring);
186 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
187 struct e1000_rx_ring *rx_ring);
188 #endif
189 static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
190 struct e1000_rx_ring *rx_ring,
191 int cleaned_count);
192 static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
193 struct e1000_rx_ring *rx_ring,
194 int cleaned_count);
195 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
196 #ifdef SIOCGMIIPHY
197 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
198 int cmd);
199 #endif
200 void e1000_set_ethtool_ops(struct net_device *netdev);
201 #ifdef ETHTOOL_OPS_COMPAT
202 extern int ethtool_ioctl(struct ifreq *ifr);
203 #endif
204 static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
205 static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
206 static void e1000_tx_timeout(struct net_device *dev);
207 static void e1000_reset_task(struct net_device *dev);
208 static void e1000_smartspeed(struct e1000_adapter *adapter);
209 static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
210 struct sk_buff *skb);
211
212 #ifdef NETIF_F_HW_VLAN_TX
213 static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
214 static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
215 static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
216 static void e1000_restore_vlan(struct e1000_adapter *adapter);
217 #endif
218
219 static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
220 #ifdef CONFIG_PM
221 static int e1000_resume(struct pci_dev *pdev);
222 #endif
223
224 #ifdef CONFIG_NET_POLL_CONTROLLER
225 /* for netdump / net console */
226 static void e1000_netpoll (struct net_device *netdev);
227 #endif
228
229 extern void e1000_check_options(struct e1000_adapter *adapter);
230
231 #define COPYBREAK_DEFAULT 256
232 static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
233 module_param(copybreak, int, 0644);
234 MODULE_PARM_DESC(copybreak,
235 "Maximum size of packet that is copied to a new buffer on receive");
236
237 static int e1000_notify_reboot(struct notifier_block *, unsigned long event, void *ptr);
238 static struct notifier_block e1000_notifier_reboot = {
239 .notifier_call = e1000_notify_reboot,
240 .next = NULL,
241 .priority = 0
242 };
243
244 static struct pci_driver e1000_driver = {
245 .name = e1000_driver_name,
246 .id_table = e1000_pci_tbl,
247 .probe = e1000_probe,
248 .remove = __devexit_p(e1000_remove),
249 #ifdef CONFIG_PM
250 /* Power Managment Hooks */
251 .suspend = e1000_suspend,
252 .resume = e1000_resume,
253 #endif
254 };
255
256 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
257 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
258 MODULE_LICENSE("GPL");
259 MODULE_VERSION(DRV_VERSION);
260
261 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
262 module_param(debug, int, 0);
263 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
264
265 /**
266 * e1000_init_module - Driver Registration Routine
267 *
268 * e1000_init_module is the first routine called when the driver is
269 * loaded. All it does is register with the PCI subsystem.
270 **/
271
272 static int __init
e1000_init_module(void)273 e1000_init_module(void)
274 {
275 int ret;
276 printk(KERN_INFO "%s - version %s\n",
277 e1000_driver_string, e1000_driver_version);
278
279 printk(KERN_INFO "%s\n", e1000_copyright);
280
281 ret = pci_module_init(&e1000_driver);
282 if (ret >= 0) {
283 register_reboot_notifier(&e1000_notifier_reboot);
284 }
285 if (copybreak != COPYBREAK_DEFAULT) {
286 if (copybreak == 0)
287 printk(KERN_INFO "e1000: copybreak disabled\n");
288 else
289 printk(KERN_INFO "e1000: copybreak enabled for "
290 "packets <= %u bytes\n", copybreak);
291 }
292 return ret;
293 }
294
295 module_init(e1000_init_module);
296
297 /**
298 * e1000_exit_module - Driver Exit Cleanup Routine
299 *
300 * e1000_exit_module is called just before the driver is removed
301 * from memory.
302 **/
303
304 static void __exit
e1000_exit_module(void)305 e1000_exit_module(void)
306 {
307 unregister_reboot_notifier(&e1000_notifier_reboot);
308 pci_unregister_driver(&e1000_driver);
309 }
310
311 module_exit(e1000_exit_module);
312
e1000_request_irq(struct e1000_adapter * adapter)313 static int e1000_request_irq(struct e1000_adapter *adapter)
314 {
315 struct net_device *netdev = adapter->netdev;
316 int flags, err = 0;
317
318 flags = IRQF_SHARED;
319 if ((err = request_irq(adapter->pdev->irq, &e1000_intr, flags,
320 netdev->name, netdev)))
321 DPRINTK(PROBE, ERR,
322 "Unable to allocate interrupt Error: %d\n", err);
323
324 return err;
325 }
326
e1000_free_irq(struct e1000_adapter * adapter)327 static void e1000_free_irq(struct e1000_adapter *adapter)
328 {
329 struct net_device *netdev = adapter->netdev;
330
331 free_irq(adapter->pdev->irq, netdev);
332
333 }
334
335 /**
336 * e1000_irq_disable - Mask off interrupt generation on the NIC
337 * @adapter: board private structure
338 **/
339
340 static void
e1000_irq_disable(struct e1000_adapter * adapter)341 e1000_irq_disable(struct e1000_adapter *adapter)
342 {
343 atomic_inc(&adapter->irq_sem);
344 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
345 E1000_WRITE_FLUSH(&adapter->hw);
346 synchronize_irq(adapter->pdev->irq);
347 }
348
349 /**
350 * e1000_irq_enable - Enable default interrupt generation settings
351 * @adapter: board private structure
352 **/
353
354 static void
e1000_irq_enable(struct e1000_adapter * adapter)355 e1000_irq_enable(struct e1000_adapter *adapter)
356 {
357 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
358 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
359 E1000_WRITE_FLUSH(&adapter->hw);
360 }
361 }
362 #ifdef NETIF_F_HW_VLAN_TX
363
364 static void
e1000_update_mng_vlan(struct e1000_adapter * adapter)365 e1000_update_mng_vlan(struct e1000_adapter *adapter)
366 {
367 struct net_device *netdev = adapter->netdev;
368 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
369 uint16_t old_vid = adapter->mng_vlan_id;
370 if (adapter->vlgrp) {
371 if (!adapter->vlgrp->vlan_devices[vid]) {
372 if (adapter->hw.mng_cookie.status &
373 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
374 e1000_vlan_rx_add_vid(netdev, vid);
375 adapter->mng_vlan_id = vid;
376 } else
377 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
378
379 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
380 (vid != old_vid) &&
381 !adapter->vlgrp->vlan_devices[old_vid])
382 e1000_vlan_rx_kill_vid(netdev, old_vid);
383 } else
384 adapter->mng_vlan_id = vid;
385 }
386 }
387 #endif
388
389 /**
390 * e1000_release_hw_control - release control of the h/w to f/w
391 * @adapter: address of board private structure
392 *
393 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
394 * For ASF and Pass Through versions of f/w this means that the
395 * driver is no longer loaded. For AMT version (only with 82573) i
396 * of the f/w this means that the network i/f is closed.
397 *
398 **/
399
400 static void
e1000_release_hw_control(struct e1000_adapter * adapter)401 e1000_release_hw_control(struct e1000_adapter *adapter)
402 {
403 uint32_t ctrl_ext;
404 uint32_t swsm;
405 uint32_t extcnf;
406
407 /* Let firmware taken over control of h/w */
408 switch (adapter->hw.mac_type) {
409 case e1000_82571:
410 case e1000_82572:
411 case e1000_80003es2lan:
412 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
413 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
414 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
415 break;
416 case e1000_82573:
417 swsm = E1000_READ_REG(&adapter->hw, SWSM);
418 E1000_WRITE_REG(&adapter->hw, SWSM,
419 swsm & ~E1000_SWSM_DRV_LOAD);
420 case e1000_ich8lan:
421 extcnf = E1000_READ_REG(&adapter->hw, CTRL_EXT);
422 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
423 extcnf & ~E1000_CTRL_EXT_DRV_LOAD);
424 break;
425 default:
426 break;
427 }
428 }
429
430 /**
431 * e1000_get_hw_control - get control of the h/w from f/w
432 * @adapter: address of board private structure
433 *
434 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
435 * For ASF and Pass Through versions of f/w this means that
436 * the driver is loaded. For AMT version (only with 82573)
437 * of the f/w this means that the network i/f is open.
438 *
439 **/
440
441 static void
e1000_get_hw_control(struct e1000_adapter * adapter)442 e1000_get_hw_control(struct e1000_adapter *adapter)
443 {
444 uint32_t ctrl_ext;
445 uint32_t swsm;
446 uint32_t extcnf;
447
448 /* Let firmware know the driver has taken over */
449 switch (adapter->hw.mac_type) {
450 case e1000_82571:
451 case e1000_82572:
452 case e1000_80003es2lan:
453 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
454 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
455 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
456 break;
457 case e1000_82573:
458 swsm = E1000_READ_REG(&adapter->hw, SWSM);
459 E1000_WRITE_REG(&adapter->hw, SWSM,
460 swsm | E1000_SWSM_DRV_LOAD);
461 break;
462 case e1000_ich8lan:
463 extcnf = E1000_READ_REG(&adapter->hw, EXTCNF_CTRL);
464 E1000_WRITE_REG(&adapter->hw, EXTCNF_CTRL,
465 extcnf | E1000_EXTCNF_CTRL_SWFLAG);
466 break;
467 default:
468 break;
469 }
470 }
471
472 static void
e1000_init_manageability(struct e1000_adapter * adapter)473 e1000_init_manageability(struct e1000_adapter *adapter)
474 {
475 if (adapter->en_mng_pt) {
476 uint32_t manc2h = E1000_READ_REG(&adapter->hw, MANC2H);
477 uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);
478
479 /* disable hardware interception of ARP */
480 manc &= ~(E1000_MANC_ARP_EN);
481
482 /* enable receiving management packets to the host */
483 /* this will probably generate destination unreachable messages
484 * from the host OS, but the packets will be handled on SMBUS */
485 if (adapter->hw.mac_type >= e1000_82571) {
486 manc |= E1000_MANC_EN_MNG2HOST;
487 #define E1000_MNG2HOST_PORT_623 (1 << 5)
488 #define E1000_MNG2HOST_PORT_664 (1 << 6)
489 manc2h |= E1000_MNG2HOST_PORT_623;
490 manc2h |= E1000_MNG2HOST_PORT_664;
491 E1000_WRITE_REG(&adapter->hw, MANC2H, manc2h);
492 }
493
494 E1000_WRITE_REG(&adapter->hw, MANC, manc);
495 }
496 }
497
498 static void
e1000_release_manageability(struct e1000_adapter * adapter)499 e1000_release_manageability(struct e1000_adapter *adapter)
500 {
501 if (adapter->en_mng_pt) {
502 uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);
503
504 /* re-enable hardware interception of ARP */
505 manc |= E1000_MANC_ARP_EN;
506
507 if (adapter->hw.mac_type >= e1000_82571)
508 manc &= ~E1000_MANC_EN_MNG2HOST;
509
510 /* don't explicitly have to mess with MANC2H since
511 * MANC has an enable disable that gates MANC2H */
512
513 /* XXX stop the hardware watchdog ? */
514
515 E1000_WRITE_REG(&adapter->hw, MANC, manc);
516 }
517 }
518
519 int
e1000_up(struct e1000_adapter * adapter)520 e1000_up(struct e1000_adapter *adapter)
521 {
522 struct net_device *netdev = adapter->netdev;
523 int i;
524
525 /* hardware has been reset, we need to reload some things */
526
527 e1000_set_multi(netdev);
528
529 #ifdef NETIF_F_HW_VLAN_TX
530 e1000_restore_vlan(adapter);
531 #endif
532
533 e1000_init_manageability(adapter);
534
535 e1000_configure_tx(adapter);
536 e1000_setup_rctl(adapter);
537 e1000_configure_rx(adapter);
538 /* call E1000_DESC_UNUSED which always leaves
539 * at least 1 descriptor unused to make sure
540 * next_to_use != next_to_clean */
541 for (i = 0; i < adapter->num_rx_queues; i++) {
542 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
543 adapter->alloc_rx_buf(adapter, ring,
544 E1000_DESC_UNUSED(ring));
545 }
546
547 adapter->tx_queue_len = netdev->tx_queue_len;
548
549 #ifdef CONFIG_E1000_NAPI
550 netif_poll_enable(netdev);
551 #endif
552 e1000_irq_enable(adapter);
553
554 clear_bit(__E1000_DOWN, &adapter->flags);
555
556 /* fire a link change interrupt to start the watchdog */
557 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_LSC);
558 return 0;
559 }
560
561 /**
562 * e1000_power_up_phy - restore link in case the phy was powered down
563 * @adapter: address of board private structure
564 *
565 * The phy may be powered down to save power and turn off link when the
566 * driver is unloaded and wake on lan is not enabled (among others)
567 * *** this routine MUST be followed by a call to e1000_reset ***
568 *
569 **/
570
e1000_power_up_phy(struct e1000_adapter * adapter)571 void e1000_power_up_phy(struct e1000_adapter *adapter)
572 {
573 uint16_t mii_reg = 0;
574
575 /* Just clear the power down bit to wake the phy back up */
576 if (adapter->hw.media_type == e1000_media_type_copper) {
577 /* according to the manual, the phy will retain its
578 * settings across a power-down/up cycle */
579 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
580 mii_reg &= ~MII_CR_POWER_DOWN;
581 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
582 }
583 }
584
e1000_power_down_phy(struct e1000_adapter * adapter)585 static void e1000_power_down_phy(struct e1000_adapter *adapter)
586 {
587 /* Power down the PHY so no link is implied when interface is down *
588 * The PHY cannot be powered down if any of the following is TRUE *
589 * (a) WoL is enabled
590 * (b) AMT is active
591 * (c) SoL/IDER session is active */
592 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
593 adapter->hw.media_type == e1000_media_type_copper) {
594 uint16_t mii_reg = 0;
595
596 switch (adapter->hw.mac_type) {
597 case e1000_82540:
598 case e1000_82545:
599 case e1000_82545_rev_3:
600 case e1000_82546:
601 case e1000_82546_rev_3:
602 case e1000_82541:
603 case e1000_82541_rev_2:
604 case e1000_82547:
605 case e1000_82547_rev_2:
606 if (E1000_READ_REG(&adapter->hw, MANC) &
607 E1000_MANC_SMBUS_EN)
608 goto out;
609 break;
610 case e1000_82571:
611 case e1000_82572:
612 case e1000_82573:
613 case e1000_80003es2lan:
614 case e1000_ich8lan:
615 if (e1000_check_mng_mode(&adapter->hw) ||
616 e1000_check_phy_reset_block(&adapter->hw))
617 goto out;
618 break;
619 default:
620 goto out;
621 }
622 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
623 mii_reg |= MII_CR_POWER_DOWN;
624 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
625 mdelay(1);
626 }
627 out:
628 return;
629 }
630
631 void
e1000_down(struct e1000_adapter * adapter)632 e1000_down(struct e1000_adapter *adapter)
633 {
634 struct net_device *netdev = adapter->netdev;
635
636 /* signal that we're down so the interrupt handler does not
637 * reschedule our watchdog timer */
638 set_bit(__E1000_DOWN, &adapter->flags);
639
640 e1000_irq_disable(adapter);
641
642 del_timer_sync(&adapter->tx_fifo_stall_timer);
643 del_timer_sync(&adapter->watchdog_timer);
644 del_timer_sync(&adapter->phy_info_timer);
645
646 #ifdef CONFIG_E1000_NAPI
647 netif_poll_disable(netdev);
648 #endif
649 netdev->tx_queue_len = adapter->tx_queue_len;
650 adapter->link_speed = 0;
651 adapter->link_duplex = 0;
652 netif_carrier_off(netdev);
653 netif_stop_queue(netdev);
654
655 e1000_reset(adapter);
656 e1000_clean_all_tx_rings(adapter);
657 e1000_clean_all_rx_rings(adapter);
658 }
659
660 void
e1000_reinit_locked(struct e1000_adapter * adapter)661 e1000_reinit_locked(struct e1000_adapter *adapter)
662 {
663 WARN_ON(in_interrupt());
664 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
665 msleep(1);
666 e1000_down(adapter);
667 e1000_up(adapter);
668 clear_bit(__E1000_RESETTING, &adapter->flags);
669 }
670
671 void
e1000_reset(struct e1000_adapter * adapter)672 e1000_reset(struct e1000_adapter *adapter)
673 {
674 uint32_t pba = 0, tx_space, min_tx_space, min_rx_space;
675 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
676 boolean_t legacy_pba_adjust = FALSE;
677
678 /* Repartition Pba for greater than 9k mtu
679 * To take effect CTRL.RST is required.
680 */
681
682 switch (adapter->hw.mac_type) {
683 case e1000_82542_rev2_0:
684 case e1000_82542_rev2_1:
685 case e1000_82543:
686 case e1000_82544:
687 case e1000_82540:
688 case e1000_82541:
689 case e1000_82541_rev_2:
690 legacy_pba_adjust = TRUE;
691 pba = E1000_PBA_48K;
692 break;
693 case e1000_82545:
694 case e1000_82545_rev_3:
695 case e1000_82546:
696 case e1000_82546_rev_3:
697 pba = E1000_PBA_48K;
698 break;
699 case e1000_82547:
700 case e1000_82547_rev_2:
701 legacy_pba_adjust = TRUE;
702 pba = E1000_PBA_30K;
703 break;
704 case e1000_82571:
705 case e1000_82572:
706 case e1000_80003es2lan:
707 pba = E1000_PBA_38K;
708 break;
709 case e1000_82573:
710 #define E1000_PBA_20K 0x0014
711 pba = E1000_PBA_20K;
712 break;
713 case e1000_ich8lan:
714 pba = E1000_PBA_8K;
715 case e1000_undefined:
716 case e1000_num_macs:
717 break;
718 }
719
720 if (legacy_pba_adjust == TRUE) {
721 if (adapter->netdev->mtu > E1000_RXBUFFER_8192)
722 pba -= 8; /* allocate more FIFO for Tx */
723
724 if (adapter->hw.mac_type == e1000_82547) {
725 adapter->tx_fifo_head = 0;
726 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
727 adapter->tx_fifo_size =
728 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
729 atomic_set(&adapter->tx_fifo_stall, 0);
730 }
731 } else if (adapter->hw.max_frame_size > MAXIMUM_ETHERNET_FRAME_SIZE) {
732 /* adjust PBA for jumbo frames */
733 E1000_WRITE_REG(&adapter->hw, PBA, pba);
734
735 /* To maintain wire speed transmits, the Tx FIFO should be
736 * large enough to accomodate two full transmit packets,
737 * rounded up to the next 1KB and expressed in KB. Likewise,
738 * the Rx FIFO should be large enough to accomodate at least
739 * one full receive packet and is similarly rounded up and
740 * expressed in KB. */
741 pba = E1000_READ_REG(&adapter->hw, PBA);
742 /* upper 16 bits has Tx packet buffer allocation size in KB */
743 tx_space = pba >> 16;
744 /* lower 16 bits has Rx packet buffer allocation size in KB */
745 pba &= 0xffff;
746 /* don't include ethernet FCS because hardware appends/strips */
747 min_tx_space =
748 min_rx_space = adapter->netdev->mtu + ENET_HEADER_SIZE +
749 VLAN_TAG_SIZE;
750 min_tx_space *= 2;
751 E1000_ROUNDUP(min_tx_space, 1024);
752 min_tx_space >>= 10;
753 E1000_ROUNDUP(min_rx_space, 1024);
754 min_rx_space >>= 10;
755
756 /* If current Tx allocation is less than the min Tx FIFO size,
757 * and the min Tx FIFO size is less than the current Rx FIFO
758 * allocation, take space away from current Rx allocation */
759 if (tx_space < min_tx_space &&
760 ((min_tx_space - tx_space) < pba)) {
761 pba = pba - (min_tx_space - tx_space);
762
763 /* PCI/PCIx hardware has PBA alignment constraints */
764 switch (adapter->hw.mac_type) {
765 case e1000_82545 ... e1000_82546_rev_3:
766 pba &= ~(E1000_PBA_8K - 1);
767 break;
768 default:
769 break;
770 }
771
772 /* if short on rx space, rx wins and must trump tx
773 * adjustment or use Early Receive if available */
774 if (pba < min_rx_space) {
775 switch (adapter->hw.mac_type) {
776 case e1000_82573:
777 /* ERT enabled in e1000_configure_rx */
778 break;
779 default:
780 pba = min_rx_space;
781 break;
782 }
783 }
784 }
785 }
786
787 E1000_WRITE_REG(&adapter->hw, PBA, pba);
788
789 /* flow control settings */
790 /* Set the FC high water mark to 90% of the FIFO size.
791 * Required to clear last 3 LSB */
792 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
793 /* We can't use 90% on small FIFOs because the remainder
794 * would be less than 1 full frame. In this case, we size
795 * it to allow at least a full frame above the high water
796 * mark. */
797 if (pba < E1000_PBA_16K)
798 fc_high_water_mark = (pba * 1024) - 1600;
799
800 adapter->hw.fc_high_water = fc_high_water_mark;
801 adapter->hw.fc_low_water = fc_high_water_mark - 8;
802 if (adapter->hw.mac_type == e1000_80003es2lan)
803 adapter->hw.fc_pause_time = 0xFFFF;
804 else
805 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
806 adapter->hw.fc_send_xon = 1;
807 adapter->hw.fc = adapter->hw.original_fc;
808
809 /* Allow time for pending master requests to run */
810 e1000_reset_hw(&adapter->hw);
811 if (adapter->hw.mac_type >= e1000_82544)
812 E1000_WRITE_REG(&adapter->hw, WUC, 0);
813
814 if (e1000_init_hw(&adapter->hw))
815 DPRINTK(PROBE, ERR, "Hardware Error\n");
816 #ifdef NETIF_F_HW_VLAN_TX
817 e1000_update_mng_vlan(adapter);
818 #endif
819 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
820 if (adapter->hw.mac_type >= e1000_82544 &&
821 adapter->hw.mac_type <= e1000_82547_rev_2 &&
822 adapter->hw.autoneg == 1 &&
823 adapter->hw.autoneg_advertised == ADVERTISE_1000_FULL) {
824 uint32_t ctrl = E1000_READ_REG(&adapter->hw, CTRL);
825 /* clear phy power management bit if we are in gig only mode,
826 * which if enabled will attempt negotiation to 100Mb, which
827 * can cause a loss of link at power off or driver unload */
828 ctrl &= ~E1000_CTRL_SWDPIN3;
829 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
830 }
831
832 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
833 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
834
835 e1000_reset_adaptive(&adapter->hw);
836 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
837
838 if (!adapter->smart_power_down &&
839 (adapter->hw.mac_type == e1000_82571 ||
840 adapter->hw.mac_type == e1000_82572)) {
841 uint16_t phy_data = 0;
842 /* speed up time to link by disabling smart power down, ignore
843 * the return value of this function because there is nothing
844 * different we would do if it failed */
845 e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
846 &phy_data);
847 phy_data &= ~IGP02E1000_PM_SPD;
848 e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
849 phy_data);
850 }
851
852 e1000_release_manageability(adapter);
853 }
854
855 /**
856 * e1000_probe - Device Initialization Routine
857 * @pdev: PCI device information struct
858 * @ent: entry in e1000_pci_tbl
859 *
860 * Returns 0 on success, negative on failure
861 *
862 * e1000_probe initializes an adapter identified by a pci_dev structure.
863 * The OS initialization, configuring of the adapter private structure,
864 * and a hardware reset occur.
865 **/
866
867 static int __devinit
e1000_probe(struct pci_dev * pdev,const struct pci_device_id * ent)868 e1000_probe(struct pci_dev *pdev,
869 const struct pci_device_id *ent)
870 {
871 struct net_device *netdev;
872 struct e1000_adapter *adapter;
873 unsigned long mmio_start, mmio_len;
874 unsigned long flash_start, flash_len;
875
876 static int cards_found = 0;
877 static int global_quad_port_a = 0; /* global ksp3 port a indication */
878 int i, err, pci_using_dac;
879 uint16_t eeprom_data = 0;
880 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
881 if ((err = pci_enable_device(pdev)))
882 return err;
883
884 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
885 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
886 pci_using_dac = 1;
887 } else {
888 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
889 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
890 E1000_ERR("No usable DMA configuration, aborting\n");
891 goto err_dma;
892 }
893 pci_using_dac = 0;
894 }
895
896 if ((err = pci_request_regions(pdev, e1000_driver_name)))
897 goto err_pci_reg;
898
899 pci_set_master(pdev);
900
901 err = -ENOMEM;
902 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
903 if (!netdev)
904 goto err_alloc_etherdev;
905
906 SET_MODULE_OWNER(netdev);
907 SET_NETDEV_DEV(netdev, &pdev->dev);
908
909 pci_set_drvdata(pdev, netdev);
910 adapter = netdev_priv(netdev);
911 adapter->netdev = netdev;
912 adapter->pdev = pdev;
913 adapter->hw.back = adapter;
914 adapter->msg_enable = (1 << debug) - 1;
915
916 mmio_start = pci_resource_start(pdev, BAR_0);
917 mmio_len = pci_resource_len(pdev, BAR_0);
918
919 err = -EIO;
920 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
921 if (!adapter->hw.hw_addr)
922 goto err_ioremap;
923
924 for (i = BAR_1; i <= BAR_5; i++) {
925 if (pci_resource_len(pdev, i) == 0)
926 continue;
927 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
928 adapter->hw.io_base = pci_resource_start(pdev, i);
929 break;
930 }
931 }
932
933 netdev->open = &e1000_open;
934 netdev->stop = &e1000_close;
935 netdev->hard_start_xmit = &e1000_xmit_frame;
936 netdev->get_stats = &e1000_get_stats;
937 netdev->set_multicast_list = &e1000_set_multi;
938 netdev->set_mac_address = &e1000_set_mac;
939 netdev->change_mtu = &e1000_change_mtu;
940 netdev->do_ioctl = &e1000_ioctl;
941 e1000_set_ethtool_ops(netdev);
942 #ifdef HAVE_TX_TIMEOUT
943 netdev->tx_timeout = &e1000_tx_timeout;
944 netdev->watchdog_timeo = 5 * HZ;
945 #endif
946 #ifdef CONFIG_E1000_NAPI
947 netdev->poll = &e1000_clean;
948 netdev->weight = 64;
949 #endif
950 #ifdef NETIF_F_HW_VLAN_TX
951 netdev->vlan_rx_register = e1000_vlan_rx_register;
952 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
953 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
954 #endif
955 #ifdef CONFIG_NET_POLL_CONTROLLER
956 netdev->poll_controller = e1000_netpoll;
957 #endif
958 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
959
960 netdev->mem_start = mmio_start;
961 netdev->mem_end = mmio_start + mmio_len;
962 netdev->base_addr = adapter->hw.io_base;
963
964 adapter->bd_number = cards_found;
965
966 /* setup the private structure */
967
968 if ((err = e1000_sw_init(adapter)))
969 goto err_sw_init;
970
971 err = -EIO;
972 /* Flash BAR mapping must happen after e1000_sw_init
973 * because it depends on mac_type */
974 if ((adapter->hw.mac_type == e1000_ich8lan) &&
975 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
976 flash_start = pci_resource_start(pdev, 1);
977 flash_len = pci_resource_len(pdev, 1);
978 adapter->hw.flash_address = ioremap(flash_start, flash_len);
979 if (!adapter->hw.flash_address)
980 goto err_flashmap;
981 }
982
983 if (e1000_check_phy_reset_block(&adapter->hw))
984 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
985
986 #ifdef MAX_SKB_FRAGS
987 if (adapter->hw.mac_type >= e1000_82543) {
988 #ifdef NETIF_F_HW_VLAN_TX
989 netdev->features = NETIF_F_SG |
990 NETIF_F_HW_CSUM |
991 NETIF_F_HW_VLAN_TX |
992 NETIF_F_HW_VLAN_RX |
993 NETIF_F_HW_VLAN_FILTER;
994 if (adapter->hw.mac_type == e1000_ich8lan)
995 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
996 #else
997 netdev->features = NETIF_F_SG | NETIF_F_HW_CSUM;
998 #endif
999 }
1000
1001 if (pci_using_dac)
1002 netdev->features |= NETIF_F_HIGHDMA;
1003
1004 #endif
1005 #ifdef NETIF_F_LLTX
1006 netdev->features |= NETIF_F_LLTX;
1007 #endif
1008
1009 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
1010
1011 /* initialize eeprom parameters */
1012
1013 if (e1000_init_eeprom_params(&adapter->hw)) {
1014 E1000_ERR("EEPROM initialization failed\n");
1015 goto err_eeprom;
1016 }
1017
1018 /* before reading the EEPROM, reset the controller to
1019 * put the device in a known good starting state */
1020
1021 e1000_reset_hw(&adapter->hw);
1022
1023 /* make sure the EEPROM is good */
1024
1025 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
1026 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
1027 goto err_eeprom;
1028 }
1029
1030 /* copy the MAC address out of the EEPROM */
1031
1032 if (e1000_read_mac_addr(&adapter->hw))
1033 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
1034 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
1035 #ifdef ETHTOOL_GPERMADDR
1036 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
1037
1038 if (!is_valid_ether_addr(netdev->perm_addr)) {
1039 #else
1040 if (!is_valid_ether_addr(netdev->dev_addr)) {
1041 #endif
1042 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1043 goto err_eeprom;
1044 }
1045
1046 e1000_get_bus_info(&adapter->hw);
1047
1048 init_timer(&adapter->tx_fifo_stall_timer);
1049 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
1050 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
1051
1052 init_timer(&adapter->watchdog_timer);
1053 adapter->watchdog_timer.function = &e1000_watchdog;
1054 adapter->watchdog_timer.data = (unsigned long) adapter;
1055
1056 init_timer(&adapter->phy_info_timer);
1057 adapter->phy_info_timer.function = &e1000_update_phy_info;
1058 adapter->phy_info_timer.data = (unsigned long) adapter;
1059
1060 INIT_WORK(&adapter->reset_task,
1061 (void (*)(void *))e1000_reset_task, netdev);
1062
1063 e1000_check_options(adapter);
1064
1065 /* Initial Wake on LAN setting
1066 * If APM wake is enabled in the EEPROM,
1067 * enable the ACPI Magic Packet filter
1068 */
1069
1070 switch (adapter->hw.mac_type) {
1071 case e1000_82542_rev2_0:
1072 case e1000_82542_rev2_1:
1073 case e1000_82543:
1074 break;
1075 case e1000_82544:
1076 e1000_read_eeprom(&adapter->hw,
1077 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
1078 eeprom_apme_mask = E1000_EEPROM_82544_APM;
1079 break;
1080 case e1000_ich8lan:
1081 e1000_read_eeprom(&adapter->hw,
1082 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
1083 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
1084 break;
1085 case e1000_82546:
1086 case e1000_82546_rev_3:
1087 case e1000_82571:
1088 case e1000_80003es2lan:
1089 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
1090 e1000_read_eeprom(&adapter->hw,
1091 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
1092 break;
1093 }
1094 /* Fall Through */
1095 default:
1096 e1000_read_eeprom(&adapter->hw,
1097 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1098 break;
1099 }
1100 if (eeprom_data & eeprom_apme_mask)
1101 adapter->eeprom_wol |= E1000_WUFC_MAG;
1102
1103 /* now that we have the eeprom settings, apply the special cases
1104 * where the eeprom may be wrong or the board simply won't support
1105 * wake on lan on a particular port */
1106 switch (pdev->device) {
1107 case E1000_DEV_ID_82546GB_PCIE:
1108 adapter->eeprom_wol = 0;
1109 break;
1110 case E1000_DEV_ID_82546EB_FIBER:
1111 case E1000_DEV_ID_82546GB_FIBER:
1112 case E1000_DEV_ID_82571EB_FIBER:
1113 /* Wake events only supported on port A for dual fiber
1114 * regardless of eeprom setting */
1115 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
1116 adapter->eeprom_wol = 0;
1117 break;
1118 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1119 case E1000_DEV_ID_82571EB_QUAD_COPPER:
1120 case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:
1121 /* if quad port adapter, disable WoL on all but port A */
1122 if (global_quad_port_a != 0)
1123 adapter->eeprom_wol = 0;
1124 else
1125 adapter->quad_port_a = 1;
1126 /* Reset for multiple quad port adapters */
1127 if (++global_quad_port_a == 4)
1128 global_quad_port_a = 0;
1129 break;
1130 }
1131
1132 /* initialize the wol settings based on the eeprom settings */
1133 adapter->wol = adapter->eeprom_wol;
1134
1135 /* print bus type/speed/width info */
1136 {
1137 struct e1000_hw *hw = &adapter->hw;
1138 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
1139 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
1140 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
1141 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
1142 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
1143 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
1144 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
1145 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
1146 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
1147 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
1148 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
1149 "32-bit"));
1150 }
1151
1152 for (i = 0; i < 6; i++)
1153 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
1154
1155 /* reset the hardware with the new settings */
1156 e1000_reset(adapter);
1157
1158 /* If the controller is 82573 and f/w is AMT, do not set
1159 * DRV_LOAD until the interface is up. For all other cases,
1160 * let the f/w know that the h/w is now under the control
1161 * of the driver. */
1162 if (adapter->hw.mac_type != e1000_82573 ||
1163 !e1000_check_mng_mode(&adapter->hw))
1164 e1000_get_hw_control(adapter);
1165
1166 strcpy(netdev->name, "eth%d");
1167 if ((err = register_netdev(netdev)))
1168 goto err_register;
1169
1170 /* tell the stack to leave us alone until e1000_open() is called */
1171 netif_carrier_off(netdev);
1172 netif_stop_queue(netdev);
1173
1174 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1175
1176 cards_found++;
1177 return 0;
1178
1179 err_register:
1180 e1000_release_hw_control(adapter);
1181 err_eeprom:
1182 if (!e1000_check_phy_reset_block(&adapter->hw))
1183 e1000_phy_hw_reset(&adapter->hw);
1184
1185 if (adapter->hw.flash_address)
1186 iounmap(adapter->hw.flash_address);
1187 err_flashmap:
1188 #ifdef CONFIG_E1000_NAPI
1189 for (i = 0; i < adapter->num_rx_queues; i++)
1190 dev_put(&adapter->polling_netdev[i]);
1191 #endif
1192
1193 kfree(adapter->tx_ring);
1194 kfree(adapter->rx_ring);
1195 #ifdef CONFIG_E1000_NAPI
1196 kfree(adapter->polling_netdev);
1197 #endif
1198 err_sw_init:
1199 iounmap(adapter->hw.hw_addr);
1200 err_ioremap:
1201 free_netdev(netdev);
1202 err_alloc_etherdev:
1203 pci_release_regions(pdev);
1204 err_pci_reg:
1205 err_dma:
1206 pci_disable_device(pdev);
1207 return err;
1208 }
1209
1210 /**
1211 * e1000_remove - Device Removal Routine
1212 * @pdev: PCI device information struct
1213 *
1214 * e1000_remove is called by the PCI subsystem to alert the driver
1215 * that it should release a PCI device. The could be caused by a
1216 * Hot-Plug event, or because the driver is going to be removed from
1217 * memory.
1218 **/
1219
1220 static void __devexit
1221 e1000_remove(struct pci_dev *pdev)
1222 {
1223 struct net_device *netdev = pci_get_drvdata(pdev);
1224 struct e1000_adapter *adapter = netdev_priv(netdev);
1225 #ifdef CONFIG_E1000_NAPI
1226 int i;
1227 #endif
1228
1229 flush_scheduled_work();
1230
1231 e1000_release_manageability(adapter);
1232
1233 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1234 * would have already happened in close and is redundant. */
1235 e1000_release_hw_control(adapter);
1236
1237 unregister_netdev(netdev);
1238 #ifdef CONFIG_E1000_NAPI
1239 for (i = 0; i < adapter->num_rx_queues; i++)
1240 dev_put(&adapter->polling_netdev[i]);
1241 #endif
1242
1243 if (!e1000_check_phy_reset_block(&adapter->hw))
1244 e1000_phy_hw_reset(&adapter->hw);
1245
1246 kfree(adapter->tx_ring);
1247 kfree(adapter->rx_ring);
1248 #ifdef CONFIG_E1000_NAPI
1249 kfree(adapter->polling_netdev);
1250 #endif
1251
1252 iounmap(adapter->hw.hw_addr);
1253 if (adapter->hw.flash_address)
1254 iounmap(adapter->hw.flash_address);
1255 pci_release_regions(pdev);
1256
1257 free_netdev(netdev);
1258
1259 pci_disable_device(pdev);
1260 }
1261
1262 /**
1263 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1264 * @adapter: board private structure to initialize
1265 *
1266 * e1000_sw_init initializes the Adapter private data structure.
1267 * Fields are initialized based on PCI device information and
1268 * OS network device settings (MTU size).
1269 **/
1270
1271 static int __devinit
1272 e1000_sw_init(struct e1000_adapter *adapter)
1273 {
1274 struct e1000_hw *hw = &adapter->hw;
1275 struct net_device *netdev = adapter->netdev;
1276 struct pci_dev *pdev = adapter->pdev;
1277 #ifdef CONFIG_E1000_NAPI
1278 int i;
1279 #endif
1280
1281 /* PCI config space info */
1282
1283 hw->vendor_id = pdev->vendor;
1284 hw->device_id = pdev->device;
1285 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1286 hw->subsystem_id = pdev->subsystem_device;
1287
1288 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
1289
1290 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1291
1292 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1293 adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
1294 hw->max_frame_size = netdev->mtu +
1295 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1296 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1297
1298 /* identify the MAC */
1299
1300 if (e1000_set_mac_type(hw)) {
1301 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1302 return -EIO;
1303 }
1304
1305 switch (hw->mac_type) {
1306 default:
1307 break;
1308 case e1000_82541:
1309 case e1000_82547:
1310 case e1000_82541_rev_2:
1311 case e1000_82547_rev_2:
1312 hw->phy_init_script = 1;
1313 break;
1314 }
1315
1316 e1000_set_media_type(hw);
1317
1318 hw->wait_autoneg_complete = FALSE;
1319 hw->tbi_compatibility_en = TRUE;
1320 hw->adaptive_ifs = TRUE;
1321
1322 /* Copper options */
1323
1324 if (hw->media_type == e1000_media_type_copper) {
1325 hw->mdix = AUTO_ALL_MODES;
1326 hw->disable_polarity_correction = FALSE;
1327 hw->master_slave = E1000_MASTER_SLAVE;
1328 }
1329
1330 adapter->num_tx_queues = 1;
1331 adapter->num_rx_queues = 1;
1332
1333 if (e1000_alloc_queues(adapter)) {
1334 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1335 return -ENOMEM;
1336 }
1337
1338 #ifdef CONFIG_E1000_NAPI
1339 for (i = 0; i < adapter->num_rx_queues; i++) {
1340 adapter->polling_netdev[i].priv = adapter;
1341 adapter->polling_netdev[i].poll = &e1000_clean;
1342 adapter->polling_netdev[i].weight = 64;
1343 dev_hold(&adapter->polling_netdev[i]);
1344 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1345 }
1346 spin_lock_init(&adapter->tx_queue_lock);
1347 #endif
1348
1349 atomic_set(&adapter->irq_sem, 1);
1350 spin_lock_init(&adapter->stats_lock);
1351
1352 set_bit(__E1000_DOWN, &adapter->flags);
1353 return 0;
1354 }
1355
1356 /**
1357 * e1000_alloc_queues - Allocate memory for all rings
1358 * @adapter: board private structure to initialize
1359 *
1360 * We allocate one ring per queue at run-time since we don't know the
1361 * number of queues at compile-time. The polling_netdev array is
1362 * intended for Multiqueue, but should work fine with a single queue.
1363 **/
1364
1365 static int __devinit
1366 e1000_alloc_queues(struct e1000_adapter *adapter)
1367 {
1368 int size;
1369
1370 size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
1371 adapter->tx_ring = kmalloc(size, GFP_KERNEL);
1372 if (!adapter->tx_ring)
1373 return -ENOMEM;
1374 memset(adapter->tx_ring, 0, size);
1375
1376 size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
1377 adapter->rx_ring = kmalloc(size, GFP_KERNEL);
1378 if (!adapter->rx_ring) {
1379 kfree(adapter->tx_ring);
1380 return -ENOMEM;
1381 }
1382 memset(adapter->rx_ring, 0, size);
1383
1384 #ifdef CONFIG_E1000_NAPI
1385 size = sizeof(struct net_device) * adapter->num_rx_queues;
1386 adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
1387 if (!adapter->polling_netdev) {
1388 kfree(adapter->tx_ring);
1389 kfree(adapter->rx_ring);
1390 return -ENOMEM;
1391 }
1392 memset(adapter->polling_netdev, 0, size);
1393 #endif
1394
1395 return E1000_SUCCESS;
1396 }
1397
1398 /**
1399 * e1000_open - Called when a network interface is made active
1400 * @netdev: network interface device structure
1401 *
1402 * Returns 0 on success, negative value on failure
1403 *
1404 * The open entry point is called when a network interface is made
1405 * active by the system (IFF_UP). At this point all resources needed
1406 * for transmit and receive operations are allocated, the interrupt
1407 * handler is registered with the OS, the watchdog timer is started,
1408 * and the stack is notified that the interface is ready.
1409 **/
1410
1411 static int
1412 e1000_open(struct net_device *netdev)
1413 {
1414 struct e1000_adapter *adapter = netdev_priv(netdev);
1415 int err;
1416
1417 /* disallow open during test */
1418 if (test_bit(__E1000_TESTING, &adapter->flags))
1419 return -EBUSY;
1420
1421 /* allocate transmit descriptors */
1422 if ((err = e1000_setup_all_tx_resources(adapter)))
1423 goto err_setup_tx;
1424
1425 /* allocate receive descriptors */
1426 if ((err = e1000_setup_all_rx_resources(adapter)))
1427 goto err_setup_rx;
1428
1429 err = e1000_request_irq(adapter);
1430 if (err)
1431 goto err_req_irq;
1432
1433 e1000_power_up_phy(adapter);
1434
1435 if ((err = e1000_up(adapter)))
1436 goto err_up;
1437 #ifdef NETIF_F_HW_VLAN_TX
1438 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1439 if ((adapter->hw.mng_cookie.status &
1440 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1441 e1000_update_mng_vlan(adapter);
1442 }
1443 #endif
1444
1445 /* If AMT is enabled, let the firmware know that the network
1446 * interface is now open */
1447 if (adapter->hw.mac_type == e1000_82573 &&
1448 e1000_check_mng_mode(&adapter->hw))
1449 e1000_get_hw_control(adapter);
1450
1451 return E1000_SUCCESS;
1452
1453 err_up:
1454 e1000_power_down_phy(adapter);
1455 e1000_free_irq(adapter);
1456 err_req_irq:
1457 e1000_free_all_rx_resources(adapter);
1458 err_setup_rx:
1459 e1000_free_all_tx_resources(adapter);
1460 err_setup_tx:
1461 e1000_reset(adapter);
1462
1463 return err;
1464 }
1465
1466 /**
1467 * e1000_close - Disables a network interface
1468 * @netdev: network interface device structure
1469 *
1470 * Returns 0, this is not allowed to fail
1471 *
1472 * The close entry point is called when an interface is de-activated
1473 * by the OS. The hardware is still under the drivers control, but
1474 * needs to be disabled. A global MAC reset is issued to stop the
1475 * hardware, and all transmit and receive resources are freed.
1476 **/
1477
1478 static int
1479 e1000_close(struct net_device *netdev)
1480 {
1481 struct e1000_adapter *adapter = netdev_priv(netdev);
1482
1483 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1484 e1000_down(adapter);
1485 e1000_power_down_phy(adapter);
1486 e1000_free_irq(adapter);
1487
1488 e1000_free_all_tx_resources(adapter);
1489 e1000_free_all_rx_resources(adapter);
1490
1491 #ifdef NETIF_F_HW_VLAN_TX
1492 /* kill manageability vlan ID if supported, but not if a vlan with
1493 * the same ID is registered on the host OS (let 8021q kill it) */
1494 if ((adapter->hw.mng_cookie.status &
1495 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1496 !(adapter->vlgrp &&
1497 adapter->vlgrp->vlan_devices[adapter->mng_vlan_id])) {
1498 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1499 }
1500 #endif
1501
1502 /* If AMT is enabled, let the firmware know that the network
1503 * interface is now closed */
1504 if (adapter->hw.mac_type == e1000_82573 &&
1505 e1000_check_mng_mode(&adapter->hw))
1506 e1000_release_hw_control(adapter);
1507
1508 return 0;
1509 }
1510
1511 /**
1512 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1513 * @adapter: address of board private structure
1514 * @start: address of beginning of memory
1515 * @len: length of memory
1516 **/
1517 static boolean_t
1518 e1000_check_64k_bound(struct e1000_adapter *adapter,
1519 void *start, unsigned long len)
1520 {
1521 unsigned long begin = (unsigned long) start;
1522 unsigned long end = begin + len;
1523
1524 /* First rev 82545 and 82546 need to not allow any memory
1525 * write location to cross 64k boundary due to errata 23 */
1526 if (adapter->hw.mac_type == e1000_82545 ||
1527 adapter->hw.mac_type == e1000_82546) {
1528 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1529 }
1530
1531 return TRUE;
1532 }
1533
1534 /**
1535 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1536 * @adapter: board private structure
1537 * @txdr: tx descriptor ring (for a specific queue) to setup
1538 *
1539 * Return 0 on success, negative on failure
1540 **/
1541
1542 static int
1543 e1000_setup_tx_resources(struct e1000_adapter *adapter,
1544 struct e1000_tx_ring *txdr)
1545 {
1546 struct pci_dev *pdev = adapter->pdev;
1547 int size;
1548
1549 size = sizeof(struct e1000_buffer) * txdr->count;
1550 txdr->buffer_info = vmalloc(size);
1551 if (!txdr->buffer_info) {
1552 DPRINTK(PROBE, ERR,
1553 "Unable to allocate memory for the transmit descriptor ring\n");
1554 return -ENOMEM;
1555 }
1556 memset(txdr->buffer_info, 0, size);
1557
1558 /* round up to nearest 4K */
1559
1560 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1561 E1000_ROUNDUP(txdr->size, 4096);
1562
1563 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1564 if (!txdr->desc) {
1565 setup_tx_desc_die:
1566 vfree(txdr->buffer_info);
1567 DPRINTK(PROBE, ERR,
1568 "Unable to allocate memory for the transmit descriptor ring\n");
1569 return -ENOMEM;
1570 }
1571
1572 /* Fix for errata 23, can't cross 64kB boundary */
1573 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1574 void *olddesc = txdr->desc;
1575 dma_addr_t olddma = txdr->dma;
1576 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1577 "at %p\n", txdr->size, txdr->desc);
1578 /* Try again, without freeing the previous */
1579 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1580 /* Failed allocation, critical failure */
1581 if (!txdr->desc) {
1582 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1583 goto setup_tx_desc_die;
1584 }
1585
1586 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1587 /* give up */
1588 pci_free_consistent(pdev, txdr->size, txdr->desc,
1589 txdr->dma);
1590 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1591 DPRINTK(PROBE, ERR,
1592 "Unable to allocate aligned memory "
1593 "for the transmit descriptor ring\n");
1594 vfree(txdr->buffer_info);
1595 return -ENOMEM;
1596 } else {
1597 /* Free old allocation, new allocation was successful */
1598 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1599 }
1600 }
1601 memset(txdr->desc, 0, txdr->size);
1602
1603 txdr->next_to_use = 0;
1604 txdr->next_to_clean = 0;
1605 spin_lock_init(&txdr->tx_lock);
1606
1607 return 0;
1608 }
1609
1610 /**
1611 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1612 * (Descriptors) for all queues
1613 * @adapter: board private structure
1614 *
1615 * Return 0 on success, negative on failure
1616 **/
1617
1618 int
1619 e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1620 {
1621 int i, err = 0;
1622
1623 for (i = 0; i < adapter->num_tx_queues; i++) {
1624 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1625 if (err) {
1626 DPRINTK(PROBE, ERR,
1627 "Allocation for Tx Queue %u failed\n", i);
1628 for (i-- ; i >= 0; i--)
1629 e1000_free_tx_resources(adapter,
1630 &adapter->tx_ring[i]);
1631 break;
1632 }
1633 }
1634
1635 return err;
1636 }
1637
1638 /**
1639 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1640 * @adapter: board private structure
1641 *
1642 * Configure the Tx unit of the MAC after a reset.
1643 **/
1644
1645 static void
1646 e1000_configure_tx(struct e1000_adapter *adapter)
1647 {
1648 uint64_t tdba;
1649 struct e1000_hw *hw = &adapter->hw;
1650 uint32_t tdlen, tctl, tipg, tarc;
1651 uint32_t ipgr1, ipgr2;
1652
1653 /* Setup the HW Tx Head and Tail descriptor pointers */
1654
1655 switch (adapter->num_tx_queues) {
1656 case 1:
1657 default:
1658 tdba = adapter->tx_ring[0].dma;
1659 tdlen = adapter->tx_ring[0].count *
1660 sizeof(struct e1000_tx_desc);
1661 E1000_WRITE_REG(hw, TDLEN, tdlen);
1662 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1663 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
1664 E1000_WRITE_REG(hw, TDT, 0);
1665 E1000_WRITE_REG(hw, TDH, 0);
1666 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1667 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
1668 break;
1669 }
1670
1671 /* Set the default values for the Tx Inter Packet Gap timer */
1672 if (adapter->hw.mac_type <= e1000_82547_rev_2 &&
1673 (hw->media_type == e1000_media_type_fiber ||
1674 hw->media_type == e1000_media_type_internal_serdes))
1675 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1676 else
1677 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1678
1679 switch (hw->mac_type) {
1680 case e1000_82542_rev2_0:
1681 case e1000_82542_rev2_1:
1682 tipg = DEFAULT_82542_TIPG_IPGT;
1683 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1684 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1685 break;
1686 case e1000_80003es2lan:
1687 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1688 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1689 break;
1690 default:
1691 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1692 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1693 break;
1694 }
1695 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1696 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1697 E1000_WRITE_REG(hw, TIPG, tipg);
1698
1699 /* Set the Tx Interrupt Delay register */
1700
1701 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1702 if (hw->mac_type >= e1000_82540)
1703 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1704
1705 /* Program the Transmit Control Register */
1706
1707 tctl = E1000_READ_REG(hw, TCTL);
1708 tctl &= ~E1000_TCTL_CT;
1709 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1710 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1711
1712 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1713 tarc = E1000_READ_REG(hw, TARC0);
1714 /* set the speed mode bit, we'll clear it if we're not at
1715 * gigabit link later */
1716 #define SPEED_MODE_BIT (1 << 21)
1717 tarc |= SPEED_MODE_BIT;
1718 E1000_WRITE_REG(hw, TARC0, tarc);
1719 } else if (hw->mac_type == e1000_80003es2lan) {
1720 tarc = E1000_READ_REG(hw, TARC0);
1721 tarc |= 1;
1722 E1000_WRITE_REG(hw, TARC0, tarc);
1723 tarc = E1000_READ_REG(hw, TARC1);
1724 tarc |= 1;
1725 E1000_WRITE_REG(hw, TARC1, tarc);
1726 }
1727
1728 e1000_config_collision_dist(hw);
1729
1730 /* Setup Transmit Descriptor Settings for eop descriptor */
1731 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1732
1733 /* only set IDE if we are delaying interrupts using the timers */
1734 if (adapter->tx_int_delay)
1735 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1736
1737 if (hw->mac_type < e1000_82543)
1738 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1739 else
1740 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1741
1742 /* Cache if we're 82544 running in PCI-X because we'll
1743 * need this to apply a workaround later in the send path. */
1744 if (hw->mac_type == e1000_82544 &&
1745 hw->bus_type == e1000_bus_type_pcix)
1746 adapter->pcix_82544 = 1;
1747
1748 E1000_WRITE_REG(hw, TCTL, tctl);
1749
1750 }
1751
1752 /**
1753 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1754 * @adapter: board private structure
1755 * @rxdr: rx descriptor ring (for a specific queue) to setup
1756 *
1757 * Returns 0 on success, negative on failure
1758 **/
1759
1760 static int
1761 e1000_setup_rx_resources(struct e1000_adapter *adapter,
1762 struct e1000_rx_ring *rxdr)
1763 {
1764 struct pci_dev *pdev = adapter->pdev;
1765 int size, desc_len;
1766
1767 size = sizeof(struct e1000_buffer) * rxdr->count;
1768 rxdr->buffer_info = vmalloc(size);
1769 if (!rxdr->buffer_info) {
1770 DPRINTK(PROBE, ERR,
1771 "Unable to allocate memory for the receive descriptor ring\n");
1772 return -ENOMEM;
1773 }
1774 memset(rxdr->buffer_info, 0, size);
1775
1776 size = sizeof(struct e1000_ps_page) * rxdr->count;
1777 rxdr->ps_page = kmalloc(size, GFP_KERNEL);
1778 if (!rxdr->ps_page) {
1779 vfree(rxdr->buffer_info);
1780 DPRINTK(PROBE, ERR,
1781 "Unable to allocate memory for the receive descriptor ring\n");
1782 return -ENOMEM;
1783 }
1784 memset(rxdr->ps_page, 0, size);
1785
1786 size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
1787 rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
1788 if (!rxdr->ps_page_dma) {
1789 vfree(rxdr->buffer_info);
1790 kfree(rxdr->ps_page);
1791 DPRINTK(PROBE, ERR,
1792 "Unable to allocate memory for the receive descriptor ring\n");
1793 return -ENOMEM;
1794 }
1795 memset(rxdr->ps_page_dma, 0, size);
1796
1797 if (adapter->hw.mac_type <= e1000_82547_rev_2)
1798 desc_len = sizeof(struct e1000_rx_desc);
1799 else
1800 desc_len = sizeof(union e1000_rx_desc_packet_split);
1801
1802 /* Round up to nearest 4K */
1803
1804 rxdr->size = rxdr->count * desc_len;
1805 E1000_ROUNDUP(rxdr->size, 4096);
1806
1807 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1808
1809 if (!rxdr->desc) {
1810 DPRINTK(PROBE, ERR,
1811 "Unable to allocate memory for the receive descriptor ring\n");
1812 setup_rx_desc_die:
1813 vfree(rxdr->buffer_info);
1814 kfree(rxdr->ps_page);
1815 kfree(rxdr->ps_page_dma);
1816 return -ENOMEM;
1817 }
1818
1819 /* Fix for errata 23, can't cross 64kB boundary */
1820 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1821 void *olddesc = rxdr->desc;
1822 dma_addr_t olddma = rxdr->dma;
1823 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1824 "at %p\n", rxdr->size, rxdr->desc);
1825 /* Try again, without freeing the previous */
1826 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1827 /* Failed allocation, critical failure */
1828 if (!rxdr->desc) {
1829 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1830 DPRINTK(PROBE, ERR,
1831 "Unable to allocate memory "
1832 "for the receive descriptor ring\n");
1833 goto setup_rx_desc_die;
1834 }
1835
1836 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1837 /* give up */
1838 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1839 rxdr->dma);
1840 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1841 DPRINTK(PROBE, ERR,
1842 "Unable to allocate aligned memory "
1843 "for the receive descriptor ring\n");
1844 goto setup_rx_desc_die;
1845 } else {
1846 /* Free old allocation, new allocation was successful */
1847 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1848 }
1849 }
1850 memset(rxdr->desc, 0, rxdr->size);
1851
1852 rxdr->next_to_clean = 0;
1853 rxdr->next_to_use = 0;
1854
1855 return 0;
1856 }
1857
1858 /**
1859 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1860 * (Descriptors) for all queues
1861 * @adapter: board private structure
1862 *
1863 * Return 0 on success, negative on failure
1864 **/
1865
1866 int
1867 e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1868 {
1869 int i, err = 0;
1870
1871 for (i = 0; i < adapter->num_rx_queues; i++) {
1872 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1873 if (err) {
1874 DPRINTK(PROBE, ERR,
1875 "Allocation for Rx Queue %u failed\n", i);
1876 for (i-- ; i >= 0; i--)
1877 e1000_free_rx_resources(adapter,
1878 &adapter->rx_ring[i]);
1879 break;
1880 }
1881 }
1882
1883 return err;
1884 }
1885
1886 /**
1887 * e1000_setup_rctl - configure the receive control registers
1888 * @adapter: Board private structure
1889 **/
1890 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1891 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1892 static void
1893 e1000_setup_rctl(struct e1000_adapter *adapter)
1894 {
1895 uint32_t rctl, rfctl;
1896 uint32_t psrctl = 0;
1897
1898 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1899
1900 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1901
1902 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1903 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1904 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1905
1906 /* disable the stripping of CRC because it breaks
1907 * BMC firmware connected over SMBUS
1908 if (adapter->hw.mac_type > e1000_82543)
1909 rctl |= E1000_RCTL_SECRC;
1910 */
1911
1912 if (adapter->hw.tbi_compatibility_on == 1)
1913 rctl |= E1000_RCTL_SBP;
1914 else
1915 rctl &= ~E1000_RCTL_SBP;
1916
1917 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1918 rctl &= ~E1000_RCTL_LPE;
1919 else
1920 rctl |= E1000_RCTL_LPE;
1921
1922 /* Setup buffer sizes */
1923 rctl &= ~E1000_RCTL_SZ_4096;
1924 rctl |= E1000_RCTL_BSEX;
1925 switch (adapter->rx_buffer_len) {
1926 case E1000_RXBUFFER_256:
1927 rctl |= E1000_RCTL_SZ_256;
1928 rctl &= ~E1000_RCTL_BSEX;
1929 break;
1930 case E1000_RXBUFFER_512:
1931 rctl |= E1000_RCTL_SZ_512;
1932 rctl &= ~E1000_RCTL_BSEX;
1933 break;
1934 case E1000_RXBUFFER_1024:
1935 rctl |= E1000_RCTL_SZ_1024;
1936 rctl &= ~E1000_RCTL_BSEX;
1937 break;
1938 case E1000_RXBUFFER_2048:
1939 default:
1940 rctl |= E1000_RCTL_SZ_2048;
1941 rctl &= ~E1000_RCTL_BSEX;
1942 break;
1943 case E1000_RXBUFFER_4096:
1944 rctl |= E1000_RCTL_SZ_4096;
1945 break;
1946 case E1000_RXBUFFER_8192:
1947 rctl |= E1000_RCTL_SZ_8192;
1948 break;
1949 case E1000_RXBUFFER_16384:
1950 rctl |= E1000_RCTL_SZ_16384;
1951 break;
1952 }
1953
1954 if (adapter->rx_ps_pages) {
1955 /* Configure extra packet-split registers */
1956 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1957 rfctl |= E1000_RFCTL_EXTEN;
1958 /* disable packet split support for IPv6 extension headers,
1959 * because some malformed IPv6 headers can hang the RX */
1960 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
1961 E1000_RFCTL_NEW_IPV6_EXT_DIS);
1962
1963 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1964
1965 /* disable the stripping of CRC because it breaks
1966 * BMC firmware connected over SMBUS */
1967 rctl |= E1000_RCTL_DTYP_PS /* | E1000_RCTL_SECRC */;
1968
1969 psrctl |= adapter->rx_ps_bsize0 >>
1970 E1000_PSRCTL_BSIZE0_SHIFT;
1971
1972 switch (adapter->rx_ps_pages) {
1973 case 3:
1974 psrctl |= PAGE_SIZE <<
1975 E1000_PSRCTL_BSIZE3_SHIFT;
1976 case 2:
1977 psrctl |= PAGE_SIZE <<
1978 E1000_PSRCTL_BSIZE2_SHIFT;
1979 case 1:
1980 psrctl |= PAGE_SIZE >>
1981 E1000_PSRCTL_BSIZE1_SHIFT;
1982 break;
1983 }
1984
1985 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1986 }
1987
1988 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1989 }
1990
1991 /**
1992 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1993 * @adapter: board private structure
1994 *
1995 * Configure the Rx unit of the MAC after a reset.
1996 **/
1997
1998 static void
1999 e1000_configure_rx(struct e1000_adapter *adapter)
2000 {
2001 uint64_t rdba;
2002 struct e1000_hw *hw = &adapter->hw;
2003 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
2004
2005 if (adapter->rx_ps_pages) {
2006 /* this is a 32 byte descriptor */
2007 rdlen = adapter->rx_ring[0].count *
2008 sizeof(union e1000_rx_desc_packet_split);
2009 adapter->clean_rx = e1000_clean_rx_irq_ps;
2010 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
2011 } else {
2012 rdlen = adapter->rx_ring[0].count *
2013 sizeof(struct e1000_rx_desc);
2014 adapter->clean_rx = e1000_clean_rx_irq;
2015 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2016 }
2017
2018 /* disable receives while setting up the descriptors */
2019 rctl = E1000_READ_REG(hw, RCTL);
2020 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
2021
2022 /* set the Receive Delay Timer Register */
2023 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
2024
2025 if (hw->mac_type >= e1000_82540) {
2026 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
2027 if (adapter->itr_setting != 0)
2028 E1000_WRITE_REG(hw, ITR,
2029 1000000000 / (adapter->itr * 256));
2030 }
2031
2032 if (hw->mac_type >= e1000_82571) {
2033 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
2034 /* Reset delay timers after every interrupt */
2035 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
2036 #ifdef CONFIG_E1000_NAPI
2037 /* Auto-Mask interrupts upon ICR access */
2038 ctrl_ext |= E1000_CTRL_EXT_IAME;
2039 E1000_WRITE_REG(hw, IAM, 0xffffffff);
2040 #endif
2041 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
2042 E1000_WRITE_FLUSH(hw);
2043 }
2044
2045 /* Setup the HW Rx Head and Tail Descriptor Pointers and
2046 * the Base and Length of the Rx Descriptor Ring */
2047 switch (adapter->num_rx_queues) {
2048 case 1:
2049 default:
2050 rdba = adapter->rx_ring[0].dma;
2051 E1000_WRITE_REG(hw, RDLEN, rdlen);
2052 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
2053 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
2054 E1000_WRITE_REG(hw, RDT, 0);
2055 E1000_WRITE_REG(hw, RDH, 0);
2056 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
2057 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
2058 break;
2059 }
2060
2061 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
2062 if (hw->mac_type >= e1000_82543) {
2063 rxcsum = E1000_READ_REG(hw, RXCSUM);
2064 if (adapter->rx_csum == TRUE) {
2065 rxcsum |= E1000_RXCSUM_TUOFL;
2066
2067 /* Enable 82571 IPv4 payload checksum for UDP fragments
2068 * Must be used in conjunction with packet-split. */
2069 if ((hw->mac_type >= e1000_82571) &&
2070 (adapter->rx_ps_pages)) {
2071 rxcsum |= E1000_RXCSUM_IPPCSE;
2072 }
2073 } else {
2074 rxcsum &= ~E1000_RXCSUM_TUOFL;
2075 /* don't need to clear IPPCSE as it defaults to 0 */
2076 }
2077 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
2078 }
2079
2080 /* enable early receives on 82573, only takes effect if using > 2048
2081 * byte total frame size. for example only for jumbo frames */
2082 #define E1000_ERT_2048 0x100
2083 if (hw->mac_type == e1000_82573)
2084 E1000_WRITE_REG(hw, ERT, E1000_ERT_2048);
2085
2086 /* Enable Receives */
2087 E1000_WRITE_REG(hw, RCTL, rctl);
2088 }
2089
2090 /**
2091 * e1000_free_tx_resources - Free Tx Resources per Queue
2092 * @adapter: board private structure
2093 * @tx_ring: Tx descriptor ring for a specific queue
2094 *
2095 * Free all transmit software resources
2096 **/
2097
2098 static void
2099 e1000_free_tx_resources(struct e1000_adapter *adapter,
2100 struct e1000_tx_ring *tx_ring)
2101 {
2102 struct pci_dev *pdev = adapter->pdev;
2103
2104 e1000_clean_tx_ring(adapter, tx_ring);
2105
2106 vfree(tx_ring->buffer_info);
2107 tx_ring->buffer_info = NULL;
2108
2109 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
2110
2111 tx_ring->desc = NULL;
2112 }
2113
2114 /**
2115 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
2116 * @adapter: board private structure
2117 *
2118 * Free all transmit software resources
2119 **/
2120
2121 void
2122 e1000_free_all_tx_resources(struct e1000_adapter *adapter)
2123 {
2124 int i;
2125
2126 for (i = 0; i < adapter->num_tx_queues; i++)
2127 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
2128 }
2129
2130 static void
2131 e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
2132 struct e1000_buffer *buffer_info)
2133 {
2134 if (buffer_info->dma) {
2135 pci_unmap_page(adapter->pdev,
2136 buffer_info->dma,
2137 buffer_info->length,
2138 PCI_DMA_TODEVICE);
2139 buffer_info->dma = 0;
2140 }
2141 if (buffer_info->skb) {
2142 dev_kfree_skb_any(buffer_info->skb);
2143 buffer_info->skb = NULL;
2144 }
2145 /* buffer_info must be completely set up in the transmit path */
2146 }
2147
2148 /**
2149 * e1000_clean_tx_ring - Free Tx Buffers
2150 * @adapter: board private structure
2151 * @tx_ring: ring to be cleaned
2152 **/
2153
2154 static void
2155 e1000_clean_tx_ring(struct e1000_adapter *adapter,
2156 struct e1000_tx_ring *tx_ring)
2157 {
2158 struct e1000_buffer *buffer_info;
2159 unsigned long size;
2160 unsigned int i;
2161
2162 /* Free all the Tx ring sk_buffs */
2163
2164 for (i = 0; i < tx_ring->count; i++) {
2165 buffer_info = &tx_ring->buffer_info[i];
2166 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2167 }
2168
2169 size = sizeof(struct e1000_buffer) * tx_ring->count;
2170 memset(tx_ring->buffer_info, 0, size);
2171
2172 /* Zero out the descriptor ring */
2173
2174 memset(tx_ring->desc, 0, tx_ring->size);
2175
2176 tx_ring->next_to_use = 0;
2177 tx_ring->next_to_clean = 0;
2178 tx_ring->last_tx_tso = 0;
2179
2180 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
2181 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
2182 }
2183
2184 /**
2185 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2186 * @adapter: board private structure
2187 **/
2188
2189 static void
2190 e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
2191 {
2192 int i;
2193
2194 for (i = 0; i < adapter->num_tx_queues; i++)
2195 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
2196 }
2197
2198 /**
2199 * e1000_free_rx_resources - Free Rx Resources
2200 * @adapter: board private structure
2201 * @rx_ring: ring to clean the resources from
2202 *
2203 * Free all receive software resources
2204 **/
2205
2206 static void
2207 e1000_free_rx_resources(struct e1000_adapter *adapter,
2208 struct e1000_rx_ring *rx_ring)
2209 {
2210 struct pci_dev *pdev = adapter->pdev;
2211
2212 e1000_clean_rx_ring(adapter, rx_ring);
2213
2214 vfree(rx_ring->buffer_info);
2215 rx_ring->buffer_info = NULL;
2216 kfree(rx_ring->ps_page);
2217 rx_ring->ps_page = NULL;
2218 kfree(rx_ring->ps_page_dma);
2219 rx_ring->ps_page_dma = NULL;
2220
2221 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2222
2223 rx_ring->desc = NULL;
2224 }
2225
2226 /**
2227 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
2228 * @adapter: board private structure
2229 *
2230 * Free all receive software resources
2231 **/
2232
2233 void
2234 e1000_free_all_rx_resources(struct e1000_adapter *adapter)
2235 {
2236 int i;
2237
2238 for (i = 0; i < adapter->num_rx_queues; i++)
2239 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2240 }
2241
2242 /**
2243 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2244 * @adapter: board private structure
2245 * @rx_ring: ring to free buffers from
2246 **/
2247
2248 static void
2249 e1000_clean_rx_ring(struct e1000_adapter *adapter,
2250 struct e1000_rx_ring *rx_ring)
2251 {
2252 struct e1000_buffer *buffer_info;
2253 struct e1000_ps_page *ps_page;
2254 struct e1000_ps_page_dma *ps_page_dma;
2255 struct pci_dev *pdev = adapter->pdev;
2256 unsigned long size;
2257 unsigned int i, j;
2258
2259 /* Free all the Rx ring sk_buffs */
2260 for (i = 0; i < rx_ring->count; i++) {
2261 buffer_info = &rx_ring->buffer_info[i];
2262 if (buffer_info->skb) {
2263 pci_unmap_single(pdev,
2264 buffer_info->dma,
2265 buffer_info->length,
2266 PCI_DMA_FROMDEVICE);
2267
2268 dev_kfree_skb(buffer_info->skb);
2269 buffer_info->skb = NULL;
2270 }
2271 ps_page = &rx_ring->ps_page[i];
2272 ps_page_dma = &rx_ring->ps_page_dma[i];
2273 for (j = 0; j < adapter->rx_ps_pages; j++) {
2274 if (!ps_page->ps_page[j]) break;
2275 pci_unmap_page(pdev,
2276 ps_page_dma->ps_page_dma[j],
2277 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2278 ps_page_dma->ps_page_dma[j] = 0;
2279 put_page(ps_page->ps_page[j]);
2280 ps_page->ps_page[j] = NULL;
2281 }
2282 }
2283
2284 size = sizeof(struct e1000_buffer) * rx_ring->count;
2285 memset(rx_ring->buffer_info, 0, size);
2286 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2287 memset(rx_ring->ps_page, 0, size);
2288 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2289 memset(rx_ring->ps_page_dma, 0, size);
2290
2291 /* Zero out the descriptor ring */
2292
2293 memset(rx_ring->desc, 0, rx_ring->size);
2294
2295 rx_ring->next_to_clean = 0;
2296 rx_ring->next_to_use = 0;
2297
2298 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2299 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2300 }
2301
2302 /**
2303 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2304 * @adapter: board private structure
2305 **/
2306
2307 static void
2308 e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2309 {
2310 int i;
2311
2312 for (i = 0; i < adapter->num_rx_queues; i++)
2313 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2314 }
2315
2316 /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2317 * and memory write and invalidate disabled for certain operations
2318 */
2319 static void
2320 e1000_enter_82542_rst(struct e1000_adapter *adapter)
2321 {
2322 struct net_device *netdev = adapter->netdev;
2323 uint32_t rctl;
2324
2325 e1000_pci_clear_mwi(&adapter->hw);
2326
2327 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2328 rctl |= E1000_RCTL_RST;
2329 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2330 E1000_WRITE_FLUSH(&adapter->hw);
2331 mdelay(5);
2332
2333 if (netif_running(netdev))
2334 e1000_clean_all_rx_rings(adapter);
2335 }
2336
2337 static void
2338 e1000_leave_82542_rst(struct e1000_adapter *adapter)
2339 {
2340 struct net_device *netdev = adapter->netdev;
2341 uint32_t rctl;
2342
2343 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2344 rctl &= ~E1000_RCTL_RST;
2345 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2346 E1000_WRITE_FLUSH(&adapter->hw);
2347 mdelay(5);
2348
2349 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
2350 e1000_pci_set_mwi(&adapter->hw);
2351
2352 if (netif_running(netdev)) {
2353 /* No need to loop, because 82542 supports only 1 queue */
2354 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
2355 e1000_configure_rx(adapter);
2356 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
2357 }
2358 }
2359
2360 /**
2361 * e1000_set_mac - Change the Ethernet Address of the NIC
2362 * @netdev: network interface device structure
2363 * @p: pointer to an address structure
2364 *
2365 * Returns 0 on success, negative on failure
2366 **/
2367
2368 static int
2369 e1000_set_mac(struct net_device *netdev, void *p)
2370 {
2371 struct e1000_adapter *adapter = netdev_priv(netdev);
2372 struct sockaddr *addr = p;
2373
2374 if (!is_valid_ether_addr(addr->sa_data))
2375 return -EADDRNOTAVAIL;
2376
2377 /* 82542 2.0 needs to be in reset to write receive address registers */
2378
2379 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2380 e1000_enter_82542_rst(adapter);
2381
2382 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2383 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2384
2385 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2386
2387 /* With 82571 controllers, LAA may be overwritten (with the default)
2388 * due to controller reset from the other port. */
2389 if (adapter->hw.mac_type == e1000_82571) {
2390 /* activate the work around */
2391 adapter->hw.laa_is_present = 1;
2392
2393 /* Hold a copy of the LAA in RAR[14] This is done so that
2394 * between the time RAR[0] gets clobbered and the time it
2395 * gets fixed (in e1000_watchdog), the actual LAA is in one
2396 * of the RARs and no incoming packets directed to this port
2397 * are dropped. Eventaully the LAA will be in RAR[0] and
2398 * RAR[14] */
2399 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
2400 E1000_RAR_ENTRIES - 1);
2401 }
2402
2403 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2404 e1000_leave_82542_rst(adapter);
2405
2406 return 0;
2407 }
2408
2409 /**
2410 * e1000_set_multi - Multicast and Promiscuous mode set
2411 * @netdev: network interface device structure
2412 *
2413 * The set_multi entry point is called whenever the multicast address
2414 * list or the network interface flags are updated. This routine is
2415 * responsible for configuring the hardware for proper multicast,
2416 * promiscuous mode, and all-multi behavior.
2417 **/
2418
2419 static void
2420 e1000_set_multi(struct net_device *netdev)
2421 {
2422 struct e1000_adapter *adapter = netdev_priv(netdev);
2423 struct e1000_hw *hw = &adapter->hw;
2424 struct dev_mc_list *mc_ptr;
2425 uint32_t rctl;
2426 uint32_t hash_value;
2427 int i, rar_entries = E1000_RAR_ENTRIES;
2428 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2429 E1000_NUM_MTA_REGISTERS_ICHXLAN :
2430 E1000_NUM_MTA_REGISTERS;
2431
2432 if (adapter->hw.mac_type == e1000_ich8lan)
2433 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
2434
2435 /* reserve RAR[14] for LAA over-write work-around */
2436 if (adapter->hw.mac_type == e1000_82571)
2437 rar_entries--;
2438
2439 /* Check for Promiscuous and All Multicast modes */
2440
2441 rctl = E1000_READ_REG(hw, RCTL);
2442
2443 if (netdev->flags & IFF_PROMISC) {
2444 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2445 } else if (netdev->flags & IFF_ALLMULTI) {
2446 rctl |= E1000_RCTL_MPE;
2447 rctl &= ~E1000_RCTL_UPE;
2448 } else {
2449 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2450 }
2451
2452 E1000_WRITE_REG(hw, RCTL, rctl);
2453
2454 /* 82542 2.0 needs to be in reset to write receive address registers */
2455
2456 if (hw->mac_type == e1000_82542_rev2_0)
2457 e1000_enter_82542_rst(adapter);
2458
2459 /* load the first 14 multicast address into the exact filters 1-14
2460 * RAR 0 is used for the station MAC adddress
2461 * if there are not 14 addresses, go ahead and clear the filters
2462 * -- with 82571 controllers only 0-13 entries are filled here
2463 */
2464 mc_ptr = netdev->mc_list;
2465
2466 for (i = 1; i < rar_entries; i++) {
2467 if (mc_ptr) {
2468 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2469 mc_ptr = mc_ptr->next;
2470 } else {
2471 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2472 E1000_WRITE_FLUSH(hw);
2473 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2474 E1000_WRITE_FLUSH(hw);
2475 }
2476 }
2477
2478 /* clear the old settings from the multicast hash table */
2479
2480 for (i = 0; i < mta_reg_count; i++) {
2481 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
2482 E1000_WRITE_FLUSH(hw);
2483 }
2484
2485 /* load any remaining addresses into the hash table */
2486
2487 for (; mc_ptr; mc_ptr = mc_ptr->next) {
2488 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2489 e1000_mta_set(hw, hash_value);
2490 }
2491
2492 if (hw->mac_type == e1000_82542_rev2_0)
2493 e1000_leave_82542_rst(adapter);
2494 }
2495
2496 /* Need to wait a few seconds after link up to get diagnostic information from
2497 * the phy */
2498
2499 static void
2500 e1000_update_phy_info(unsigned long data)
2501 {
2502 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2503 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2504 }
2505
2506 /**
2507 * e1000_82547_tx_fifo_stall - Timer Call-back
2508 * @data: pointer to adapter cast into an unsigned long
2509 **/
2510
2511 static void
2512 e1000_82547_tx_fifo_stall(unsigned long data)
2513 {
2514 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2515 struct net_device *netdev = adapter->netdev;
2516 uint32_t tctl;
2517
2518 if (atomic_read(&adapter->tx_fifo_stall)) {
2519 if ((E1000_READ_REG(&adapter->hw, TDT) ==
2520 E1000_READ_REG(&adapter->hw, TDH)) &&
2521 (E1000_READ_REG(&adapter->hw, TDFT) ==
2522 E1000_READ_REG(&adapter->hw, TDFH)) &&
2523 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2524 E1000_READ_REG(&adapter->hw, TDFHS))) {
2525 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2526 E1000_WRITE_REG(&adapter->hw, TCTL,
2527 tctl & ~E1000_TCTL_EN);
2528 E1000_WRITE_REG(&adapter->hw, TDFT,
2529 adapter->tx_head_addr);
2530 E1000_WRITE_REG(&adapter->hw, TDFH,
2531 adapter->tx_head_addr);
2532 E1000_WRITE_REG(&adapter->hw, TDFTS,
2533 adapter->tx_head_addr);
2534 E1000_WRITE_REG(&adapter->hw, TDFHS,
2535 adapter->tx_head_addr);
2536 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2537 E1000_WRITE_FLUSH(&adapter->hw);
2538
2539 adapter->tx_fifo_head = 0;
2540 atomic_set(&adapter->tx_fifo_stall, 0);
2541 netif_wake_queue(netdev);
2542 } else {
2543 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2544 }
2545 }
2546 }
2547
2548 /**
2549 * e1000_watchdog - Timer Call-back
2550 * @data: pointer to adapter cast into an unsigned long
2551 **/
2552 static void
2553 e1000_watchdog(unsigned long data)
2554 {
2555 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2556 struct net_device *netdev = adapter->netdev;
2557 struct e1000_tx_ring *txdr = adapter->tx_ring;
2558 uint32_t link, tctl;
2559 int32_t ret_val;
2560
2561 ret_val = e1000_check_for_link(&adapter->hw);
2562 if ((ret_val == E1000_ERR_PHY) &&
2563 (adapter->hw.phy_type == e1000_phy_igp_3) &&
2564 (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
2565 /* See e1000_kumeran_lock_loss_workaround() */
2566 DPRINTK(LINK, INFO,
2567 "Gigabit has been disabled, downgrading speed\n");
2568 }
2569
2570 if (adapter->hw.mac_type == e1000_82573) {
2571 e1000_enable_tx_pkt_filtering(&adapter->hw);
2572 #ifdef NETIF_F_HW_VLAN_TX
2573 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2574 e1000_update_mng_vlan(adapter);
2575 #endif
2576 }
2577
2578 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
2579 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2580 link = !adapter->hw.serdes_link_down;
2581 else
2582 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2583
2584 if (link) {
2585 if (!netif_carrier_ok(netdev)) {
2586 uint32_t ctrl;
2587 boolean_t txb2b = 1;
2588 e1000_get_speed_and_duplex(&adapter->hw,
2589 &adapter->link_speed,
2590 &adapter->link_duplex);
2591
2592 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
2593 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s, "
2594 "Flow Control: %s\n",
2595 adapter->link_speed,
2596 adapter->link_duplex == FULL_DUPLEX ?
2597 "Full Duplex" : "Half Duplex",
2598 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2599 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2600 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2601 E1000_CTRL_TFCE) ? "TX" : "None" )));
2602
2603 /* tweak tx_queue_len according to speed/duplex
2604 * and adjust the timeout factor */
2605 netdev->tx_queue_len = adapter->tx_queue_len;
2606 adapter->tx_timeout_factor = 1;
2607 switch (adapter->link_speed) {
2608 case SPEED_10:
2609 txb2b = 0;
2610 netdev->tx_queue_len = 10;
2611 adapter->tx_timeout_factor = 8;
2612 break;
2613 case SPEED_100:
2614 txb2b = 0;
2615 netdev->tx_queue_len = 100;
2616 /* maybe add some timeout factor ? */
2617 break;
2618 }
2619
2620 if ((adapter->hw.mac_type == e1000_82571 ||
2621 adapter->hw.mac_type == e1000_82572) &&
2622 txb2b == 0) {
2623 uint32_t tarc0;
2624 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
2625 tarc0 &= ~SPEED_MODE_BIT;
2626 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2627 }
2628
2629 /* enable transmits in the hardware, need to do this
2630 * after setting TARC0 */
2631 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2632 tctl |= E1000_TCTL_EN;
2633 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2634
2635 netif_carrier_on(netdev);
2636 netif_wake_queue(netdev);
2637 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2638 adapter->smartspeed = 0;
2639 } else {
2640 /* make sure the receive unit is started */
2641 if (adapter->hw.mac_type == e1000_80003es2lan) {
2642 struct e1000_hw *hw = &adapter->hw;
2643 uint32_t rctl = E1000_READ_REG(hw, RCTL);
2644 E1000_WRITE_REG(hw, RCTL, rctl | E1000_RCTL_EN);
2645 }
2646 }
2647 } else {
2648 if (netif_carrier_ok(netdev)) {
2649 adapter->link_speed = 0;
2650 adapter->link_duplex = 0;
2651 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2652 netif_carrier_off(netdev);
2653 netif_stop_queue(netdev);
2654 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2655
2656 /* 80003ES2LAN workaround--
2657 * For packet buffer work-around on link down event;
2658 * disable receives in the ISR and
2659 * reset device here in the watchdog
2660 */
2661 if (adapter->hw.mac_type == e1000_80003es2lan)
2662 /* reset device */
2663 schedule_work(&adapter->reset_task);
2664 }
2665
2666 e1000_smartspeed(adapter);
2667 }
2668
2669 e1000_update_stats(adapter);
2670
2671 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2672 adapter->tpt_old = adapter->stats.tpt;
2673 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2674 adapter->colc_old = adapter->stats.colc;
2675
2676 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2677 adapter->gorcl_old = adapter->stats.gorcl;
2678 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2679 adapter->gotcl_old = adapter->stats.gotcl;
2680
2681 e1000_update_adaptive(&adapter->hw);
2682
2683 if (!netif_carrier_ok(netdev)) {
2684 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
2685 /* We've lost link, so the controller stops DMA,
2686 * but we've got queued Tx work that's never going
2687 * to get done, so reset controller to flush Tx.
2688 * (Do the reset outside of interrupt context). */
2689 adapter->tx_timeout_count++;
2690 schedule_work(&adapter->reset_task);
2691 }
2692 }
2693
2694 /* Cause software interrupt to ensure rx ring is cleaned */
2695 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2696
2697 /* Force detection of hung controller every watchdog period */
2698 adapter->detect_tx_hung = TRUE;
2699
2700 /* With 82571 controllers, LAA may be overwritten due to controller
2701 * reset from the other port. Set the appropriate LAA in RAR[0] */
2702 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2703 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2704
2705 /* Reset the timer */
2706 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2707 }
2708
2709 enum latency_range {
2710 lowest_latency = 0,
2711 low_latency = 1,
2712 bulk_latency = 2,
2713 latency_invalid = 255
2714 };
2715
2716 /**
2717 * e1000_update_itr - update the dynamic ITR value based on statistics
2718 * Stores a new ITR value based on packets and byte
2719 * counts during the last interrupt. The advantage of per interrupt
2720 * computation is faster updates and more accurate ITR for the current
2721 * traffic pattern. Constants in this function were computed
2722 * based on theoretical maximum wire speed and thresholds were set based
2723 * on testing data as well as attempting to minimize response time
2724 * while increasing bulk throughput.
2725 * this functionality is controlled by the InterruptThrottleRate module
2726 * parameter (see e1000_param.c)
2727 * @adapter: pointer to adapter
2728 * @itr_setting: current adapter->itr
2729 * @packets: the number of packets during this measurement interval
2730 * @bytes: the number of bytes during this measurement interval
2731 **/
2732 static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2733 uint16_t itr_setting,
2734 int packets,
2735 int bytes)
2736 {
2737 unsigned int retval = itr_setting;
2738 struct e1000_hw *hw = &adapter->hw;
2739
2740 if (unlikely(hw->mac_type < e1000_82540))
2741 goto update_itr_done;
2742
2743 if (packets == 0)
2744 goto update_itr_done;
2745
2746 switch (itr_setting) {
2747 case lowest_latency:
2748 /* handle TSO and jumbo frames */
2749 if (bytes/packets > 8000)
2750 retval = bulk_latency;
2751 else if ((packets < 5) && (bytes > 512)) {
2752 retval = low_latency;
2753 }
2754 break;
2755 case low_latency: /* 50 usec aka 20000 ints/s */
2756 if (bytes > 10000) {
2757 /* this if handles the TSO accounting */
2758 if (bytes/packets > 8000) {
2759 retval = bulk_latency;
2760 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
2761 retval = bulk_latency;
2762 } else if ((packets > 35)) {
2763 retval = lowest_latency;
2764 }
2765 } else if (bytes/packets > 2000) {
2766 retval = bulk_latency;
2767 } else if (packets <= 2 && bytes < 512) {
2768 retval = lowest_latency;
2769 }
2770 break;
2771 case bulk_latency: /* 250 usec aka 4000 ints/s */
2772 if (bytes > 25000) {
2773 if (packets > 35) {
2774 retval = low_latency;
2775 }
2776 } else if (bytes < 6000) {
2777 retval = low_latency;
2778 }
2779 break;
2780 }
2781
2782 update_itr_done:
2783 return retval;
2784 }
2785
2786 static void e1000_set_itr(struct e1000_adapter *adapter)
2787 {
2788 struct e1000_hw *hw = &adapter->hw;
2789 uint16_t current_itr;
2790 uint32_t new_itr = adapter->itr;
2791
2792 if (unlikely(hw->mac_type < e1000_82540))
2793 return;
2794
2795 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2796 if (unlikely(adapter->link_speed != SPEED_1000)) {
2797 current_itr = 0;
2798 new_itr = 4000;
2799 goto set_itr_now;
2800 }
2801
2802 adapter->tx_itr = e1000_update_itr(adapter,
2803 adapter->tx_itr,
2804 adapter->total_tx_packets,
2805 adapter->total_tx_bytes);
2806 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2807 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2808 adapter->tx_itr = low_latency;
2809
2810 adapter->rx_itr = e1000_update_itr(adapter,
2811 adapter->rx_itr,
2812 adapter->total_rx_packets,
2813 adapter->total_rx_bytes);
2814 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2815 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2816 adapter->rx_itr = low_latency;
2817
2818 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2819
2820 switch (current_itr) {
2821 /* counts and packets in update_itr are dependent on these numbers */
2822 case lowest_latency:
2823 new_itr = 70000;
2824 break;
2825 case low_latency:
2826 new_itr = 20000; /* aka hwitr = ~200 */
2827 break;
2828 case bulk_latency:
2829 new_itr = 4000;
2830 break;
2831 default:
2832 break;
2833 }
2834
2835 set_itr_now:
2836 if (new_itr != adapter->itr) {
2837 /* this attempts to bias the interrupt rate towards Bulk
2838 * by adding intermediate steps when interrupt rate is
2839 * increasing */
2840 new_itr = new_itr > adapter->itr ?
2841 min(adapter->itr + (new_itr >> 2), new_itr) :
2842 new_itr;
2843 adapter->itr = new_itr;
2844 E1000_WRITE_REG(hw, ITR, 1000000000 / (new_itr * 256));
2845 }
2846
2847 return;
2848 }
2849
2850 #define E1000_TX_FLAGS_CSUM 0x00000001
2851 #define E1000_TX_FLAGS_VLAN 0x00000002
2852 #define E1000_TX_FLAGS_TSO 0x00000004
2853 #define E1000_TX_FLAGS_IPV4 0x00000008
2854 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2855 #define E1000_TX_FLAGS_VLAN_SHIFT 16
2856
2857 static int
2858 e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2859 struct sk_buff *skb)
2860 {
2861 return FALSE;
2862 }
2863
2864 static boolean_t
2865 e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2866 struct sk_buff *skb)
2867 {
2868 struct e1000_context_desc *context_desc;
2869 struct e1000_buffer *buffer_info;
2870 unsigned int i;
2871 uint8_t css;
2872
2873 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
2874 css = skb->h.raw - skb->data;
2875
2876 i = tx_ring->next_to_use;
2877 buffer_info = &tx_ring->buffer_info[i];
2878 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2879
2880 context_desc->lower_setup.ip_config = 0;
2881 context_desc->upper_setup.tcp_fields.tucss = css;
2882 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
2883 context_desc->upper_setup.tcp_fields.tucse = 0;
2884 context_desc->tcp_seg_setup.data = 0;
2885 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2886
2887 buffer_info->time_stamp = jiffies;
2888 buffer_info->next_to_watch = i;
2889
2890 if (unlikely(++i == tx_ring->count)) i = 0;
2891 tx_ring->next_to_use = i;
2892
2893 return TRUE;
2894 }
2895
2896 return FALSE;
2897 }
2898
2899 #define E1000_MAX_TXD_PWR 12
2900 #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2901
2902 static int
2903 e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2904 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2905 unsigned int nr_frags, unsigned int mss)
2906 {
2907 struct e1000_buffer *buffer_info;
2908 unsigned int len = skb->len;
2909 unsigned int offset = 0, size, count = 0, i;
2910 #ifdef MAX_SKB_FRAGS
2911 unsigned int f;
2912 len -= skb->data_len;
2913 #endif
2914
2915 i = tx_ring->next_to_use;
2916
2917 while (len) {
2918 buffer_info = &tx_ring->buffer_info[i];
2919 size = min(len, max_per_txd);
2920 /* work-around for errata 10 and it applies
2921 * to all controllers in PCI-X mode
2922 * The fix is to make sure that the first descriptor of a
2923 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2924 */
2925 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
2926 (size > 2015) && count == 0))
2927 size = 2015;
2928
2929 /* Workaround for potential 82544 hang in PCI-X. Avoid
2930 * terminating buffers within evenly-aligned dwords. */
2931 if (unlikely(adapter->pcix_82544 &&
2932 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2933 size > 4))
2934 size -= 4;
2935
2936 buffer_info->length = size;
2937 buffer_info->dma =
2938 pci_map_single(adapter->pdev,
2939 skb->data + offset,
2940 size,
2941 PCI_DMA_TODEVICE);
2942 buffer_info->time_stamp = jiffies;
2943 buffer_info->next_to_watch = i;
2944
2945 len -= size;
2946 offset += size;
2947 count++;
2948 if (unlikely(++i == tx_ring->count)) i = 0;
2949 }
2950
2951 #ifdef MAX_SKB_FRAGS
2952 for (f = 0; f < nr_frags; f++) {
2953 struct skb_frag_struct *frag;
2954
2955 frag = &skb_shinfo(skb)->frags[f];
2956 len = frag->size;
2957 offset = frag->page_offset;
2958
2959 while (len) {
2960 buffer_info = &tx_ring->buffer_info[i];
2961 size = min(len, max_per_txd);
2962 /* Workaround for potential 82544 hang in PCI-X.
2963 * Avoid terminating buffers within evenly-aligned
2964 * dwords. */
2965 if (unlikely(adapter->pcix_82544 &&
2966 !((unsigned long)(frag->page+offset+size-1) & 4) &&
2967 size > 4))
2968 size -= 4;
2969
2970 buffer_info->length = size;
2971 buffer_info->dma =
2972 pci_map_page(adapter->pdev,
2973 frag->page,
2974 offset,
2975 size,
2976 PCI_DMA_TODEVICE);
2977 buffer_info->time_stamp = jiffies;
2978 buffer_info->next_to_watch = i;
2979
2980 len -= size;
2981 offset += size;
2982 count++;
2983 if (unlikely(++i == tx_ring->count)) i = 0;
2984 }
2985 }
2986 #endif
2987
2988 i = (i == 0) ? tx_ring->count - 1 : i - 1;
2989 tx_ring->buffer_info[i].skb = skb;
2990 tx_ring->buffer_info[first].next_to_watch = i;
2991
2992 return count;
2993 }
2994
2995 static void
2996 e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2997 int tx_flags, int count)
2998 {
2999 struct e1000_tx_desc *tx_desc = NULL;
3000 struct e1000_buffer *buffer_info;
3001 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
3002 unsigned int i;
3003
3004 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
3005 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
3006 E1000_TXD_CMD_TSE;
3007 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3008
3009 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
3010 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
3011 }
3012
3013 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
3014 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3015 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3016 }
3017
3018 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
3019 txd_lower |= E1000_TXD_CMD_VLE;
3020 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
3021 }
3022
3023 i = tx_ring->next_to_use;
3024
3025 while (count--) {
3026 buffer_info = &tx_ring->buffer_info[i];
3027 tx_desc = E1000_TX_DESC(*tx_ring, i);
3028 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3029 tx_desc->lower.data =
3030 cpu_to_le32(txd_lower | buffer_info->length);
3031 tx_desc->upper.data = cpu_to_le32(txd_upper);
3032 if (unlikely(++i == tx_ring->count)) i = 0;
3033 }
3034
3035 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3036
3037 /* Force memory writes to complete before letting h/w
3038 * know there are new descriptors to fetch. (Only
3039 * applicable for weak-ordered memory model archs,
3040 * such as IA-64). */
3041 wmb();
3042
3043 tx_ring->next_to_use = i;
3044 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
3045 /* we need this if more than one processor can write to our tail
3046 * at a time, it syncronizes IO on IA64/Altix systems */
3047 mmiowb();
3048 }
3049
3050 /**
3051 * 82547 workaround to avoid controller hang in half-duplex environment.
3052 * The workaround is to avoid queuing a large packet that would span
3053 * the internal Tx FIFO ring boundary by notifying the stack to resend
3054 * the packet at a later time. This gives the Tx FIFO an opportunity to
3055 * flush all packets. When that occurs, we reset the Tx FIFO pointers
3056 * to the beginning of the Tx FIFO.
3057 **/
3058
3059 #define E1000_FIFO_HDR 0x10
3060 #define E1000_82547_PAD_LEN 0x3E0
3061
3062 static int
3063 e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
3064 {
3065 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
3066 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
3067
3068 E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
3069
3070 if (adapter->link_duplex != HALF_DUPLEX)
3071 goto no_fifo_stall_required;
3072
3073 if (atomic_read(&adapter->tx_fifo_stall))
3074 return 1;
3075
3076 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
3077 atomic_set(&adapter->tx_fifo_stall, 1);
3078 return 1;
3079 }
3080
3081 no_fifo_stall_required:
3082 adapter->tx_fifo_head += skb_fifo_len;
3083 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
3084 adapter->tx_fifo_head -= adapter->tx_fifo_size;
3085 return 0;
3086 }
3087
3088 #define MINIMUM_DHCP_PACKET_SIZE 282
3089 static int
3090 e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
3091 {
3092 struct e1000_hw *hw = &adapter->hw;
3093 uint16_t length, offset;
3094 #ifdef NETIF_F_HW_VLAN_TX
3095 if (vlan_tx_tag_present(skb)) {
3096 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
3097 ( adapter->hw.mng_cookie.status &
3098 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
3099 return 0;
3100 }
3101 #endif
3102 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
3103 struct ethhdr *eth = (struct ethhdr *) skb->data;
3104 if ((htons(ETH_P_IP) == eth->h_proto)) {
3105 const struct iphdr *ip =
3106 (struct iphdr *)((uint8_t *)skb->data+14);
3107 if (IPPROTO_UDP == ip->protocol) {
3108 struct udphdr *udp =
3109 (struct udphdr *)((uint8_t *)ip +
3110 (ip->ihl << 2));
3111 if (ntohs(udp->dest) == 67) {
3112 offset = (uint8_t *)udp + 8 - skb->data;
3113 length = skb->len - offset;
3114
3115 return e1000_mng_write_dhcp_info(hw,
3116 (uint8_t *)udp + 8,
3117 length);
3118 }
3119 }
3120 }
3121 }
3122 return 0;
3123 }
3124
3125 static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3126 {
3127 struct e1000_adapter *adapter = netdev_priv(netdev);
3128 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3129
3130 netif_stop_queue(netdev);
3131 /* Herbert's original patch had:
3132 * smp_mb__after_netif_stop_queue();
3133 * but since that doesn't exist yet, just open code it. */
3134 smp_mb();
3135
3136 /* We need to check again in a case another CPU has just
3137 * made room available. */
3138 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
3139 return -EBUSY;
3140
3141 /* A reprieve! */
3142 netif_start_queue(netdev);
3143 ++adapter->restart_queue;
3144 return 0;
3145 }
3146
3147 static int e1000_maybe_stop_tx(struct net_device *netdev,
3148 struct e1000_tx_ring *tx_ring, int size)
3149 {
3150 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
3151 return 0;
3152 return __e1000_maybe_stop_tx(netdev, size);
3153 }
3154
3155 #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3156 static int
3157 e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3158 {
3159 struct e1000_adapter *adapter = netdev_priv(netdev);
3160 struct e1000_tx_ring *tx_ring;
3161 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
3162 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3163 unsigned int tx_flags = 0;
3164 unsigned int len = skb->len;
3165 unsigned long flags;
3166 unsigned int nr_frags = 0;
3167 unsigned int mss = 0;
3168 int count = 0;
3169 int tso;
3170 #ifdef MAX_SKB_FRAGS
3171 unsigned int f;
3172 len -= skb->data_len;
3173 #endif
3174
3175 /* This goes back to the question of how to logically map a tx queue
3176 * to a flow. Right now, performance is impacted slightly negatively
3177 * if using multiple tx queues. If the stack breaks away from a
3178 * single qdisc implementation, we can look at this again. */
3179 tx_ring = adapter->tx_ring;
3180
3181 if (unlikely(skb->len <= 0)) {
3182 dev_kfree_skb_any(skb);
3183 return NETDEV_TX_OK;
3184 }
3185
3186 /* 82571 and newer doesn't need the workaround that limited descriptor
3187 * length to 4kB */
3188 if (adapter->hw.mac_type >= e1000_82571)
3189 max_per_txd = 8192;
3190
3191 if (skb->ip_summed == CHECKSUM_PARTIAL)
3192 count++;
3193
3194 count += TXD_USE_COUNT(len, max_txd_pwr);
3195
3196 if (adapter->pcix_82544)
3197 count++;
3198
3199 /* work-around for errata 10 and it applies to all controllers
3200 * in PCI-X mode, so add one more descriptor to the count
3201 */
3202 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
3203 (len > 2015)))
3204 count++;
3205
3206 #ifdef MAX_SKB_FRAGS
3207 nr_frags = skb_shinfo(skb)->nr_frags;
3208 for (f = 0; f < nr_frags; f++)
3209 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3210 max_txd_pwr);
3211 if (adapter->pcix_82544)
3212 count += nr_frags;
3213
3214 #endif
3215
3216 if (adapter->hw.tx_pkt_filtering &&
3217 (adapter->hw.mac_type == e1000_82573))
3218 e1000_transfer_dhcp_info(adapter, skb);
3219
3220 #ifdef NETIF_F_LLTX
3221 local_irq_save(flags);
3222 if (!spin_trylock(&tx_ring->tx_lock)) {
3223 /* Collision - tell upper layer to requeue */
3224 local_irq_restore(flags);
3225 return NETDEV_TX_LOCKED;
3226 }
3227 #else
3228 spin_lock_irqsave(&tx_ring->tx_lock, flags);
3229 #endif
3230
3231 /* need: count + 2 desc gap to keep tail from touching
3232 * head, otherwise try next time */
3233 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2))) {
3234 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3235 return NETDEV_TX_BUSY;
3236 }
3237
3238 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
3239 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
3240 netif_stop_queue(netdev);
3241 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
3242 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3243 return NETDEV_TX_BUSY;
3244 }
3245 }
3246
3247 #ifndef NETIF_F_LLTX
3248 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3249
3250 #endif
3251 #ifdef NETIF_F_HW_VLAN_TX
3252 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
3253 tx_flags |= E1000_TX_FLAGS_VLAN;
3254 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3255 }
3256 #endif
3257
3258 first = tx_ring->next_to_use;
3259
3260 tso = e1000_tso(adapter, tx_ring, skb);
3261 if (tso < 0) {
3262 dev_kfree_skb_any(skb);
3263 #ifdef NETIF_F_LLTX
3264 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3265 #endif
3266 return NETDEV_TX_OK;
3267 }
3268
3269 if (likely(tso)) {
3270 tx_ring->last_tx_tso = 1;
3271 tx_flags |= E1000_TX_FLAGS_TSO;
3272 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
3273 tx_flags |= E1000_TX_FLAGS_CSUM;
3274
3275 /* Old method was to assume IPv4 packet by default if TSO was enabled.
3276 * 82571 hardware supports TSO capabilities for IPv6 as well...
3277 * no longer assume, we must. */
3278 if (likely(skb->protocol == htons(ETH_P_IP)))
3279 tx_flags |= E1000_TX_FLAGS_IPV4;
3280
3281 e1000_tx_queue(adapter, tx_ring, tx_flags,
3282 e1000_tx_map(adapter, tx_ring, skb, first,
3283 max_per_txd, nr_frags, mss));
3284
3285 netdev->trans_start = jiffies;
3286
3287 #ifdef NETIF_F_LLTX
3288 /* Make sure there is space in the ring for the next send. */
3289 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
3290
3291 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3292 #endif
3293 return NETDEV_TX_OK;
3294 }
3295
3296 /**
3297 * e1000_tx_timeout - Respond to a Tx Hang
3298 * @netdev: network interface device structure
3299 **/
3300
3301 static void
3302 e1000_tx_timeout(struct net_device *netdev)
3303 {
3304 struct e1000_adapter *adapter = netdev_priv(netdev);
3305
3306 /* Do the reset outside of interrupt context */
3307 adapter->tx_timeout_count++;
3308 schedule_work(&adapter->reset_task);
3309 }
3310
3311 static void
3312 e1000_reset_task(struct net_device *netdev)
3313 {
3314 struct e1000_adapter *adapter = netdev_priv(netdev);
3315
3316 e1000_reinit_locked(adapter);
3317 }
3318
3319 /**
3320 * e1000_get_stats - Get System Network Statistics
3321 * @netdev: network interface device structure
3322 *
3323 * Returns the address of the device statistics structure.
3324 * The statistics are actually updated from the timer callback.
3325 **/
3326
3327 static struct net_device_stats *
3328 e1000_get_stats(struct net_device *netdev)
3329 {
3330 struct e1000_adapter *adapter = netdev_priv(netdev);
3331
3332 /* only return the current stats */
3333 return &adapter->net_stats;
3334 }
3335
3336 /**
3337 * e1000_change_mtu - Change the Maximum Transfer Unit
3338 * @netdev: network interface device structure
3339 * @new_mtu: new value for maximum frame size
3340 *
3341 * Returns 0 on success, negative on failure
3342 **/
3343
3344 static int
3345 e1000_change_mtu(struct net_device *netdev, int new_mtu)
3346 {
3347 struct e1000_adapter *adapter = netdev_priv(netdev);
3348 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3349 uint16_t eeprom_data = 0;
3350
3351 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3352 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3353 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
3354 return -EINVAL;
3355 }
3356
3357 /* Adapter-specific max frame size limits. */
3358 switch (adapter->hw.mac_type) {
3359 case e1000_undefined ... e1000_82542_rev2_1:
3360 case e1000_ich8lan:
3361 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3362 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
3363 return -EINVAL;
3364 }
3365 break;
3366 case e1000_82573:
3367 /* Jumbo Frames not supported if:
3368 * - this is not an 82573L device
3369 * - ASPM is enabled in any way (0x1A bits 3:2) */
3370 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
3371 &eeprom_data);
3372 if ((adapter->hw.device_id != E1000_DEV_ID_82573L) ||
3373 (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) {
3374 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3375 DPRINTK(PROBE, ERR,
3376 "Jumbo Frames not supported.\n");
3377 return -EINVAL;
3378 }
3379 break;
3380 }
3381 /* ERT will be enabled later to enable wire speed receives */
3382
3383 /* fall through to get support */
3384 case e1000_82571:
3385 case e1000_82572:
3386 case e1000_80003es2lan:
3387 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3388 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3389 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3390 return -EINVAL;
3391 }
3392 break;
3393 default:
3394 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3395 break;
3396 }
3397
3398 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3399 * means we reserve 2 more, this pushes us to allocate from the next
3400 * larger slab size
3401 * i.e. RXBUFFER_2048 --> size-4096 slab */
3402
3403 if (max_frame <= E1000_RXBUFFER_256)
3404 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3405 else if (max_frame <= E1000_RXBUFFER_512)
3406 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3407 else if (max_frame <= E1000_RXBUFFER_1024)
3408 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3409 else if (max_frame <= E1000_RXBUFFER_2048)
3410 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3411 else if (max_frame <= E1000_RXBUFFER_4096)
3412 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3413 else if (max_frame <= E1000_RXBUFFER_8192)
3414 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3415 else if (max_frame <= E1000_RXBUFFER_16384)
3416 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3417
3418 /* adjust allocation if LPE protects us, and we aren't using SBP */
3419 if (!adapter->hw.tbi_compatibility_on &&
3420 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3421 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3422 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
3423
3424 netdev->mtu = new_mtu;
3425 adapter->hw.max_frame_size = max_frame;
3426
3427 if (netif_running(netdev))
3428 e1000_reinit_locked(adapter);
3429
3430 return 0;
3431 }
3432
3433 /**
3434 * e1000_update_stats - Update the board statistics counters
3435 * @adapter: board private structure
3436 **/
3437
3438 void
3439 e1000_update_stats(struct e1000_adapter *adapter)
3440 {
3441 struct e1000_hw *hw = &adapter->hw;
3442 unsigned long flags;
3443 uint16_t phy_tmp;
3444
3445 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3446
3447 /*
3448 * Prevent stats update while adapter is being reset, or if the pci
3449 * connection is down.
3450 */
3451 if (adapter->link_speed == 0)
3452 return;
3453
3454 spin_lock_irqsave(&adapter->stats_lock, flags);
3455
3456 /* these counters are modified from e1000_adjust_tbi_stats,
3457 * called from the interrupt context, so they must only
3458 * be written while holding adapter->stats_lock
3459 */
3460
3461 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3462 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3463 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3464 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3465 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3466 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3467 adapter->stats.roc += E1000_READ_REG(hw, ROC);
3468
3469 if (adapter->hw.mac_type != e1000_ich8lan) {
3470 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3471 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3472 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3473 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3474 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3475 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
3476 }
3477
3478 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3479 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3480 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3481 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3482 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3483 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3484 adapter->stats.dc += E1000_READ_REG(hw, DC);
3485 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3486 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3487 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3488 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3489 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3490 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3491 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3492 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3493 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3494 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3495 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3496 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3497 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3498 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3499 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3500 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3501 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3502 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3503 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
3504
3505 if (adapter->hw.mac_type != e1000_ich8lan) {
3506 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3507 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3508 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3509 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3510 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3511 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
3512 }
3513
3514 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3515 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3516
3517 /* used for adaptive IFS */
3518
3519 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3520 adapter->stats.tpt += hw->tx_packet_delta;
3521 hw->collision_delta = E1000_READ_REG(hw, COLC);
3522 adapter->stats.colc += hw->collision_delta;
3523
3524 if (hw->mac_type >= e1000_82543) {
3525 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3526 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3527 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3528 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3529 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3530 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3531 }
3532 if (hw->mac_type > e1000_82547_rev_2) {
3533 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3534 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
3535
3536 if (adapter->hw.mac_type != e1000_ich8lan) {
3537 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3538 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3539 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3540 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3541 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3542 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3543 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
3544 }
3545 }
3546
3547 /* Fill out the OS statistics structure */
3548 adapter->net_stats.rx_packets = adapter->stats.gprc;
3549 adapter->net_stats.tx_packets = adapter->stats.gptc;
3550 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3551 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3552 adapter->net_stats.multicast = adapter->stats.mprc;
3553 adapter->net_stats.collisions = adapter->stats.colc;
3554
3555 /* Rx Errors */
3556
3557 /* RLEC on some newer hardware can be incorrect so build
3558 * our own version based on RUC and ROC */
3559 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3560 adapter->stats.crcerrs + adapter->stats.algnerrc +
3561 adapter->stats.ruc + adapter->stats.roc +
3562 adapter->stats.cexterr;
3563 adapter->net_stats.rx_length_errors = adapter->stats.ruc +
3564 adapter->stats.roc;
3565 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3566 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3567 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3568
3569 /* Tx Errors */
3570 adapter->net_stats.tx_errors = adapter->stats.ecol +
3571 adapter->stats.latecol;
3572 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3573 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3574 if (adapter->hw.mac_type == e1000_82543 &&
3575 adapter->link_duplex == FULL_DUPLEX) {
3576 adapter->net_stats.tx_carrier_errors = 0;
3577 adapter->stats.tncrs = 0;
3578 } else
3579 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3580
3581 /* Tx Dropped needs to be maintained elsewhere */
3582
3583 /* Phy Stats */
3584 if (hw->media_type == e1000_media_type_copper) {
3585 if ((adapter->link_speed == SPEED_1000) &&
3586 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3587 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3588 adapter->phy_stats.idle_errors += phy_tmp;
3589 }
3590
3591 if ((hw->mac_type <= e1000_82546) &&
3592 (hw->phy_type == e1000_phy_m88) &&
3593 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3594 adapter->phy_stats.receive_errors += phy_tmp;
3595 }
3596
3597 /* Management Stats */
3598 if (adapter->hw.mac_type > e1000_82544) {
3599 adapter->stats.mgptc += E1000_READ_REG(hw, MGTPTC);
3600 adapter->stats.mgprc += E1000_READ_REG(hw, MGTPRC);
3601 adapter->stats.mgpdc += E1000_READ_REG(hw, MGTPDC);
3602 }
3603
3604
3605 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3606 }
3607
3608 /**
3609 * e1000_intr - Interrupt Handler
3610 * @irq: interrupt number
3611 * @data: pointer to a network interface device structure
3612 **/
3613
3614 static irqreturn_t
3615 e1000_intr(int irq, void *data)
3616 {
3617 struct net_device *netdev = data;
3618 struct e1000_adapter *adapter = netdev_priv(netdev);
3619 struct e1000_hw *hw = &adapter->hw;
3620 uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
3621 #ifndef CONFIG_E1000_NAPI
3622 int i;
3623 #endif
3624 if (unlikely((!icr) || test_bit(__E1000_RESETTING, &adapter->flags)))
3625 return IRQ_NONE; /* Not our interrupt */
3626
3627 #ifdef CONFIG_E1000_NAPI
3628 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3629 * not set, then the adapter didn't send an interrupt */
3630 if (unlikely(hw->mac_type >= e1000_82571 &&
3631 !(icr & E1000_ICR_INT_ASSERTED)))
3632 return IRQ_NONE;
3633
3634 /* Interrupt Auto-Mask...upon reading ICR,
3635 * interrupts are masked. No need for the
3636 * IMC write, but it does mean we should
3637 * account for it ASAP. */
3638 if (likely(hw->mac_type >= e1000_82571))
3639 atomic_inc(&adapter->irq_sem);
3640 #endif
3641
3642 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
3643 hw->get_link_status = 1;
3644 /* 80003ES2LAN workaround--
3645 * For packet buffer work-around on link down event;
3646 * disable receives here in the ISR and
3647 * reset adapter in watchdog
3648 */
3649 if (netif_carrier_ok(netdev) &&
3650 (adapter->hw.mac_type == e1000_80003es2lan)) {
3651 /* disable receives */
3652 rctl = E1000_READ_REG(hw, RCTL);
3653 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3654 }
3655 /* guard against interrupt when we're going down */
3656 if (!test_bit(__E1000_DOWN, &adapter->flags))
3657 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3658 }
3659
3660 #ifdef CONFIG_E1000_NAPI
3661 if (hw->mac_type < e1000_82571) {
3662 /* disable interrupts, without the synchronize_irq bit */
3663 atomic_inc(&adapter->irq_sem);
3664 E1000_WRITE_REG(hw, IMC, ~0);
3665 E1000_WRITE_FLUSH(hw);
3666 }
3667 if (likely(netif_rx_schedule_prep(netdev))) {
3668 adapter->total_tx_bytes = 0;
3669 adapter->total_tx_packets = 0;
3670 adapter->total_rx_bytes = 0;
3671 adapter->total_rx_packets = 0;
3672 __netif_rx_schedule(netdev);
3673 } else
3674 /* this really should not happen! if it does it is basically a
3675 * bug, but not a hard error, so enable ints and continue */
3676 e1000_irq_enable(adapter);
3677 #else
3678 /* Writing IMC and IMS is needed for 82547.
3679 * Due to Hub Link bus being occupied, an interrupt
3680 * de-assertion message is not able to be sent.
3681 * When an interrupt assertion message is generated later,
3682 * two messages are re-ordered and sent out.
3683 * That causes APIC to think 82547 is in de-assertion
3684 * state, while 82547 is in assertion state, resulting
3685 * in dead lock. Writing IMC forces 82547 into
3686 * de-assertion state.
3687 */
3688 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
3689 atomic_inc(&adapter->irq_sem);
3690 E1000_WRITE_REG(hw, IMC, ~0);
3691 }
3692
3693 adapter->total_tx_bytes = 0;
3694 adapter->total_rx_bytes = 0;
3695 adapter->total_tx_packets = 0;
3696 adapter->total_rx_packets = 0;
3697
3698 for (i = 0; i < E1000_MAX_INTR; i++)
3699 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3700 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3701 break;
3702
3703 if (likely(adapter->itr_setting & 3))
3704 e1000_set_itr(adapter);
3705
3706 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
3707 e1000_irq_enable(adapter);
3708
3709 #endif
3710 #ifdef E1000_COUNT_ICR
3711 adapter->icr_txdw += icr & 0x01;
3712 icr >>= 1;
3713 adapter->icr_txqe += icr & 0x01;
3714 icr >>= 1;
3715 adapter->icr_lsc += icr & 0x01;
3716 icr >>= 1;
3717 adapter->icr_rxseq += icr & 0x01;
3718 icr >>= 1;
3719 adapter->icr_rxdmt += icr & 0x01;
3720 icr >>= 2;
3721 adapter->icr_rxo += icr & 0x01;
3722 icr >>= 1;
3723 adapter->icr_rxt += icr & 0x01;
3724 icr >>= 2;
3725 adapter->icr_mdac += icr & 0x01;
3726 icr >>= 1;
3727 adapter->icr_rxcfg += icr & 0x01;
3728 icr >>= 1;
3729 adapter->icr_gpi += icr & 0x01;
3730
3731 #endif
3732 return IRQ_HANDLED;
3733 }
3734
3735 #ifdef CONFIG_E1000_NAPI
3736 /**
3737 * e1000_clean - NAPI Rx polling callback
3738 * @adapter: board private structure
3739 **/
3740
3741 static int
3742 e1000_clean(struct net_device *poll_dev, int *budget)
3743 {
3744 struct e1000_adapter *adapter;
3745 int work_to_do = min(*budget, poll_dev->quota);
3746 int tx_cleaned = 0, work_done = 0;
3747
3748 /* Must NOT use netdev_priv macro here. */
3749 adapter = poll_dev->priv;
3750
3751 /* Keep link state information with original netdev */
3752 if (!netif_carrier_ok(poll_dev))
3753 goto quit_polling;
3754
3755 /* e1000_clean is called per-cpu. This lock protects
3756 * tx_ring[0] from being cleaned by multiple cpus
3757 * simultaneously. A failure obtaining the lock means
3758 * tx_ring[0] is currently being cleaned anyway. */
3759 if (spin_trylock(&adapter->tx_queue_lock)) {
3760 tx_cleaned = e1000_clean_tx_irq(adapter,
3761 &adapter->tx_ring[0]);
3762 spin_unlock(&adapter->tx_queue_lock);
3763 }
3764
3765 adapter->clean_rx(adapter, &adapter->rx_ring[0],
3766 &work_done, work_to_do);
3767
3768 *budget -= work_done;
3769 poll_dev->quota -= work_done;
3770
3771 /* If no Tx and not enough Rx work done, exit the polling mode */
3772 if ((tx_cleaned && (work_done < work_to_do)) ||
3773 !netif_running(poll_dev)) {
3774 quit_polling:
3775 if (likely(adapter->itr_setting & 3))
3776 e1000_set_itr(adapter);
3777 netif_rx_complete(poll_dev);
3778 e1000_irq_enable(adapter);
3779 return 0;
3780 }
3781
3782 return 1;
3783 }
3784
3785 #endif
3786 /**
3787 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3788 * @adapter: board private structure
3789 **/
3790
3791 static boolean_t
3792 e1000_clean_tx_irq(struct e1000_adapter *adapter,
3793 struct e1000_tx_ring *tx_ring)
3794 {
3795 struct net_device *netdev = adapter->netdev;
3796 struct e1000_tx_desc *tx_desc, *eop_desc;
3797 struct e1000_buffer *buffer_info;
3798 unsigned int i, eop;
3799 #ifdef CONFIG_E1000_NAPI
3800 unsigned int count = 0;
3801 #endif
3802 boolean_t cleaned = TRUE;
3803 unsigned int total_tx_bytes=0, total_tx_packets=0;
3804
3805 i = tx_ring->next_to_clean;
3806 eop = tx_ring->buffer_info[i].next_to_watch;
3807 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3808
3809 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
3810 for (cleaned = FALSE; !cleaned; ) {
3811 tx_desc = E1000_TX_DESC(*tx_ring, i);
3812 buffer_info = &tx_ring->buffer_info[i];
3813 cleaned = (i == eop);
3814
3815 if (cleaned) {
3816 struct sk_buff *skb = buffer_info->skb;
3817 total_tx_packets++;
3818 total_tx_bytes += skb->len;
3819 }
3820 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
3821 tx_desc->upper.data = 0;
3822
3823 if (unlikely(++i == tx_ring->count)) i = 0;
3824 }
3825
3826 eop = tx_ring->buffer_info[i].next_to_watch;
3827 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3828 #ifdef CONFIG_E1000_NAPI
3829 #define E1000_TX_WEIGHT 64
3830 /* weight of a sort for tx, to avoid endless transmit cleanup */
3831 if (count++ == E1000_TX_WEIGHT) {
3832 cleaned = FALSE;
3833 break;
3834 }
3835 #endif
3836 }
3837
3838 tx_ring->next_to_clean = i;
3839
3840 #define TX_WAKE_THRESHOLD 32
3841 if (unlikely(cleaned && netif_carrier_ok(netdev) &&
3842 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
3843 /* Make sure that anybody stopping the queue after this
3844 * sees the new next_to_clean.
3845 */
3846 smp_mb();
3847 if (netif_queue_stopped(netdev)) {
3848 netif_wake_queue(netdev);
3849 ++adapter->restart_queue;
3850 }
3851 }
3852
3853 if (adapter->detect_tx_hung) {
3854 /* Detect a transmit hang in hardware, this serializes the
3855 * check with the clearing of time_stamp and movement of i */
3856 adapter->detect_tx_hung = FALSE;
3857 if (tx_ring->buffer_info[eop].dma &&
3858 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
3859 (adapter->tx_timeout_factor * HZ))
3860 && !(E1000_READ_REG(&adapter->hw, STATUS) &
3861 E1000_STATUS_TXOFF)) {
3862
3863 /* detected Tx unit hang */
3864 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
3865 " Tx Queue <%lu>\n"
3866 " TDH <%x>\n"
3867 " TDT <%x>\n"
3868 " next_to_use <%x>\n"
3869 " next_to_clean <%x>\n"
3870 "buffer_info[next_to_clean]\n"
3871 " time_stamp <%lx>\n"
3872 " next_to_watch <%x>\n"
3873 " jiffies <%lx>\n"
3874 " next_to_watch.status <%x>\n",
3875 (unsigned long)((tx_ring - adapter->tx_ring) /
3876 sizeof(struct e1000_tx_ring)),
3877 readl(adapter->hw.hw_addr + tx_ring->tdh),
3878 readl(adapter->hw.hw_addr + tx_ring->tdt),
3879 tx_ring->next_to_use,
3880 tx_ring->next_to_clean,
3881 tx_ring->buffer_info[eop].time_stamp,
3882 eop,
3883 jiffies,
3884 eop_desc->upper.fields.status);
3885 netif_stop_queue(netdev);
3886 }
3887 }
3888 adapter->total_tx_bytes += total_tx_bytes;
3889 adapter->total_tx_packets += total_tx_packets;
3890 return cleaned;
3891 }
3892
3893 /**
3894 * e1000_rx_checksum - Receive Checksum Offload for 82543
3895 * @adapter: board private structure
3896 * @status_err: receive descriptor status and error fields
3897 * @csum: receive descriptor csum field
3898 * @sk_buff: socket buffer with received data
3899 **/
3900
3901 static void
3902 e1000_rx_checksum(struct e1000_adapter *adapter,
3903 uint32_t status_err, uint32_t csum,
3904 struct sk_buff *skb)
3905 {
3906 uint16_t status = (uint16_t)status_err;
3907 uint8_t errors = (uint8_t)(status_err >> 24);
3908 skb->ip_summed = CHECKSUM_NONE;
3909
3910 /* 82543 or newer only */
3911 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
3912 /* Ignore Checksum bit is set */
3913 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
3914 /* TCP/UDP checksum error bit is set */
3915 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
3916 /* let the stack verify checksum errors */
3917 adapter->hw_csum_err++;
3918 return;
3919 }
3920 /* TCP/UDP Checksum has not been calculated */
3921 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
3922 if (!(status & E1000_RXD_STAT_TCPCS))
3923 return;
3924 } else {
3925 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
3926 return;
3927 }
3928 /* It must be a TCP or UDP packet with a valid checksum */
3929 if (likely(status & E1000_RXD_STAT_TCPCS)) {
3930 /* TCP checksum is good */
3931 skb->ip_summed = CHECKSUM_UNNECESSARY;
3932 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
3933 /* IP fragment with UDP payload */
3934 /* Hardware complements the payload checksum, so we undo it
3935 * and then put the value in host order for further stack use.
3936 */
3937 csum = ntohl(csum ^ 0xFFFF);
3938 skb->csum = csum;
3939 skb->ip_summed = CHECKSUM_COMPLETE;
3940 }
3941 adapter->hw_csum_good++;
3942 }
3943
3944 /**
3945 * e1000_clean_rx_irq - Send received data up the network stack; legacy
3946 * @adapter: board private structure
3947 **/
3948
3949 static boolean_t
3950 #ifdef CONFIG_E1000_NAPI
3951 e1000_clean_rx_irq(struct e1000_adapter *adapter,
3952 struct e1000_rx_ring *rx_ring,
3953 int *work_done, int work_to_do)
3954 #else
3955 e1000_clean_rx_irq(struct e1000_adapter *adapter,
3956 struct e1000_rx_ring *rx_ring)
3957 #endif
3958 {
3959 struct net_device *netdev = adapter->netdev;
3960 struct pci_dev *pdev = adapter->pdev;
3961 struct e1000_rx_desc *rx_desc, *next_rxd;
3962 struct e1000_buffer *buffer_info, *next_buffer;
3963 unsigned long flags;
3964 uint32_t length;
3965 uint8_t last_byte;
3966 unsigned int i;
3967 int cleaned_count = 0;
3968 boolean_t cleaned = FALSE;
3969 unsigned int total_rx_bytes=0, total_rx_packets=0;
3970
3971 i = rx_ring->next_to_clean;
3972 rx_desc = E1000_RX_DESC(*rx_ring, i);
3973 buffer_info = &rx_ring->buffer_info[i];
3974
3975 while (rx_desc->status & E1000_RXD_STAT_DD) {
3976 struct sk_buff *skb;
3977 u8 status;
3978
3979 #ifdef CONFIG_E1000_NAPI
3980 if (*work_done >= work_to_do)
3981 break;
3982 (*work_done)++;
3983 #endif
3984 status = rx_desc->status;
3985 skb = buffer_info->skb;
3986 buffer_info->skb = NULL;
3987
3988 prefetch(skb->data - NET_IP_ALIGN);
3989
3990 if (++i == rx_ring->count) i = 0;
3991 next_rxd = E1000_RX_DESC(*rx_ring, i);
3992 prefetch(next_rxd);
3993
3994 next_buffer = &rx_ring->buffer_info[i];
3995
3996 cleaned = TRUE;
3997 cleaned_count++;
3998 pci_unmap_single(pdev,
3999 buffer_info->dma,
4000 buffer_info->length,
4001 PCI_DMA_FROMDEVICE);
4002
4003 length = le16_to_cpu(rx_desc->length);
4004 /* !EOP means multiple descriptors were used to store a single
4005 * packet, if thats the case we need to toss it. In fact, we
4006 * to toss every packet with the EOP bit clear and the next
4007 * frame that _does_ have the EOP bit set, as it is by
4008 * definition only a frame fragment
4009 */
4010 if (unlikely(!(status & E1000_RXD_STAT_EOP)))
4011 adapter->discarding = 1;
4012
4013 if (adapter->discarding) {
4014 /* All receives must fit into a single buffer */
4015 E1000_DBG("%s: Receive packet consumed multiple"
4016 " buffers\n", netdev->name);
4017 /* recycle */
4018 buffer_info->skb = skb;
4019 if (status & E1000_RXD_STAT_EOP)
4020 adapter->discarding = 0;
4021 goto next_desc;
4022 }
4023
4024 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
4025 last_byte = *(skb->data + length - 1);
4026 if (TBI_ACCEPT(&adapter->hw, status,
4027 rx_desc->errors, length, last_byte)) {
4028 spin_lock_irqsave(&adapter->stats_lock, flags);
4029 e1000_tbi_adjust_stats(&adapter->hw,
4030 &adapter->stats,
4031 length, skb->data);
4032 spin_unlock_irqrestore(&adapter->stats_lock,
4033 flags);
4034 length--;
4035 } else {
4036 /* recycle */
4037 buffer_info->skb = skb;
4038 goto next_desc;
4039 }
4040 }
4041
4042 /* adjust length to remove Ethernet CRC, this must be
4043 * done after the TBI_ACCEPT workaround above */
4044 length -= 4;
4045
4046 /* probably a little skewed due to removing CRC */
4047 total_rx_bytes += length;
4048 total_rx_packets++;
4049
4050 /* code added for copybreak, this should improve
4051 * performance for small packets with large amounts
4052 * of reassembly being done in the stack */
4053 if (length < copybreak) {
4054 struct sk_buff *new_skb =
4055 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
4056 if (new_skb) {
4057 skb_reserve(new_skb, NET_IP_ALIGN);
4058 memcpy(new_skb->data - NET_IP_ALIGN,
4059 skb->data - NET_IP_ALIGN,
4060 length + NET_IP_ALIGN);
4061 /* save the skb in buffer_info as good */
4062 buffer_info->skb = skb;
4063 skb = new_skb;
4064 }
4065 /* else just continue with the old one */
4066 }
4067 /* end copybreak code */
4068 skb_put(skb, length);
4069
4070 /* Receive Checksum Offload */
4071 e1000_rx_checksum(adapter,
4072 (uint32_t)(status) |
4073 ((uint32_t)(rx_desc->errors) << 24),
4074 le16_to_cpu(rx_desc->csum), skb);
4075
4076 skb->protocol = eth_type_trans(skb, netdev);
4077 #ifdef CONFIG_E1000_NAPI
4078 #ifdef NETIF_F_HW_VLAN_TX
4079 if (unlikely(adapter->vlgrp &&
4080 (status & E1000_RXD_STAT_VP))) {
4081 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4082 le16_to_cpu(rx_desc->special) &
4083 E1000_RXD_SPC_VLAN_MASK);
4084 } else {
4085 netif_receive_skb(skb);
4086 }
4087 #else
4088 netif_receive_skb(skb);
4089 #endif
4090 #else /* CONFIG_E1000_NAPI */
4091 #ifdef NETIF_F_HW_VLAN_TX
4092 if (unlikely(adapter->vlgrp &&
4093 (status & E1000_RXD_STAT_VP))) {
4094 vlan_hwaccel_rx(skb, adapter->vlgrp,
4095 le16_to_cpu(rx_desc->special) &
4096 E1000_RXD_SPC_VLAN_MASK);
4097 } else {
4098 netif_rx(skb);
4099 }
4100 #else
4101 netif_rx(skb);
4102 #endif
4103 #endif /* CONFIG_E1000_NAPI */
4104 netdev->last_rx = jiffies;
4105
4106 next_desc:
4107 rx_desc->status = 0;
4108
4109 /* return some buffers to hardware, one at a time is too slow */
4110 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4111 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4112 cleaned_count = 0;
4113 }
4114
4115 /* use prefetched values */
4116 rx_desc = next_rxd;
4117 buffer_info = next_buffer;
4118 }
4119 rx_ring->next_to_clean = i;
4120
4121 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4122 if (cleaned_count)
4123 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4124
4125 adapter->total_rx_packets += total_rx_packets;
4126 adapter->total_rx_bytes += total_rx_bytes;
4127 return cleaned;
4128 }
4129
4130 /**
4131 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
4132 * @adapter: board private structure
4133 **/
4134
4135 static boolean_t
4136 #ifdef CONFIG_E1000_NAPI
4137 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4138 struct e1000_rx_ring *rx_ring,
4139 int *work_done, int work_to_do)
4140 #else
4141 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4142 struct e1000_rx_ring *rx_ring)
4143 #endif
4144 {
4145 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
4146 struct net_device *netdev = adapter->netdev;
4147 struct pci_dev *pdev = adapter->pdev;
4148 struct e1000_buffer *buffer_info, *next_buffer;
4149 struct e1000_ps_page *ps_page;
4150 struct e1000_ps_page_dma *ps_page_dma;
4151 struct sk_buff *skb;
4152 unsigned int i, j;
4153 uint32_t length, staterr;
4154 int cleaned_count = 0;
4155 boolean_t cleaned = FALSE;
4156 unsigned int total_rx_bytes=0, total_rx_packets=0;
4157
4158 i = rx_ring->next_to_clean;
4159 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4160 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
4161 buffer_info = &rx_ring->buffer_info[i];
4162
4163 while (staterr & E1000_RXD_STAT_DD) {
4164 ps_page = &rx_ring->ps_page[i];
4165 ps_page_dma = &rx_ring->ps_page_dma[i];
4166 #ifdef CONFIG_E1000_NAPI
4167 if (unlikely(*work_done >= work_to_do))
4168 break;
4169 (*work_done)++;
4170 #endif
4171 skb = buffer_info->skb;
4172
4173 /* in the packet split case this is header only */
4174 prefetch(skb->data - NET_IP_ALIGN);
4175
4176 if (++i == rx_ring->count) i = 0;
4177 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
4178 prefetch(next_rxd);
4179
4180 next_buffer = &rx_ring->buffer_info[i];
4181
4182 cleaned = TRUE;
4183 cleaned_count++;
4184 pci_unmap_single(pdev, buffer_info->dma,
4185 buffer_info->length,
4186 PCI_DMA_FROMDEVICE);
4187
4188 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
4189 E1000_DBG("%s: Packet Split buffers didn't pick up"
4190 " the full packet\n", netdev->name);
4191 dev_kfree_skb_irq(skb);
4192 goto next_desc;
4193 }
4194
4195 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
4196 dev_kfree_skb_irq(skb);
4197 goto next_desc;
4198 }
4199
4200 length = le16_to_cpu(rx_desc->wb.middle.length0);
4201
4202 if (unlikely(!length)) {
4203 E1000_DBG("%s: Last part of the packet spanning"
4204 " multiple descriptors\n", netdev->name);
4205 dev_kfree_skb_irq(skb);
4206 goto next_desc;
4207 }
4208
4209 /* Good Receive */
4210 skb_put(skb, length);
4211
4212 {
4213 /* this looks ugly, but it seems compiler issues make it
4214 more efficient than reusing j */
4215 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
4216
4217 /* page alloc/put takes too long and effects small packet
4218 * throughput, so unsplit small packets and save the alloc/put*/
4219 if (l1 && (l1 <= copybreak) && ((length + l1) <= adapter->rx_ps_bsize0)) {
4220 u8 *vaddr;
4221 /* there is no documentation about how to call
4222 * kmap_atomic, so we can't hold the mapping
4223 * very long */
4224 pci_dma_sync_single_for_cpu(pdev,
4225 ps_page_dma->ps_page_dma[0],
4226 PAGE_SIZE,
4227 PCI_DMA_FROMDEVICE);
4228 vaddr = kmap_atomic(ps_page->ps_page[0],
4229 KM_SKB_DATA_SOFTIRQ);
4230 memcpy(skb->tail, vaddr, l1);
4231 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
4232 pci_dma_sync_single_for_device(pdev,
4233 ps_page_dma->ps_page_dma[0],
4234 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4235 /* remove the CRC */
4236 l1 -= 4;
4237 skb_put(skb, l1);
4238 goto copydone;
4239 } /* if */
4240 }
4241
4242 for (j = 0; j < adapter->rx_ps_pages; j++) {
4243 if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
4244 break;
4245 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
4246 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4247 ps_page_dma->ps_page_dma[j] = 0;
4248 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
4249 length);
4250 ps_page->ps_page[j] = NULL;
4251 skb->len += length;
4252 skb->data_len += length;
4253 skb->truesize += length;
4254 }
4255
4256 /* strip the ethernet crc, problem is we're using pages now so
4257 * this whole operation can get a little cpu intensive */
4258 pskb_trim(skb, skb->len - 4);
4259
4260 copydone:
4261 total_rx_bytes += skb->len;
4262 total_rx_packets++;
4263
4264 e1000_rx_checksum(adapter, staterr,
4265 le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
4266 skb->protocol = eth_type_trans(skb, netdev);
4267
4268 if (likely(rx_desc->wb.upper.header_status &
4269 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
4270 adapter->rx_hdr_split++;
4271 #ifdef CONFIG_E1000_NAPI
4272 #ifdef NETIF_F_HW_VLAN_TX
4273 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
4274 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4275 le16_to_cpu(rx_desc->wb.middle.vlan) &
4276 E1000_RXD_SPC_VLAN_MASK);
4277 } else {
4278 netif_receive_skb(skb);
4279 }
4280 #else
4281 netif_receive_skb(skb);
4282 #endif
4283 #else /* CONFIG_E1000_NAPI */
4284 #ifdef NETIF_F_HW_VLAN_TX
4285 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
4286 vlan_hwaccel_rx(skb, adapter->vlgrp,
4287 le16_to_cpu(rx_desc->wb.middle.vlan) &
4288 E1000_RXD_SPC_VLAN_MASK);
4289 } else {
4290 netif_rx(skb);
4291 }
4292 #else
4293 netif_rx(skb);
4294 #endif
4295 #endif /* CONFIG_E1000_NAPI */
4296 netdev->last_rx = jiffies;
4297
4298 next_desc:
4299 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
4300 buffer_info->skb = NULL;
4301
4302 /* return some buffers to hardware, one at a time is too slow */
4303 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4304 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4305 cleaned_count = 0;
4306 }
4307
4308 /* use prefetched values */
4309 rx_desc = next_rxd;
4310 buffer_info = next_buffer;
4311
4312 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
4313 }
4314 rx_ring->next_to_clean = i;
4315
4316 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4317 if (cleaned_count)
4318 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4319
4320 adapter->total_rx_packets += total_rx_packets;
4321 adapter->total_rx_bytes += total_rx_bytes;
4322 return cleaned;
4323 }
4324
4325 /**
4326 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
4327 * @adapter: address of board private structure
4328 **/
4329
4330 static void
4331 e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4332 struct e1000_rx_ring *rx_ring,
4333 int cleaned_count)
4334 {
4335 struct net_device *netdev = adapter->netdev;
4336 struct pci_dev *pdev = adapter->pdev;
4337 struct e1000_rx_desc *rx_desc;
4338 struct e1000_buffer *buffer_info;
4339 struct sk_buff *skb;
4340 unsigned int i;
4341 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
4342
4343 i = rx_ring->next_to_use;
4344 buffer_info = &rx_ring->buffer_info[i];
4345
4346 while (cleaned_count--) {
4347 skb = buffer_info->skb;
4348 if (skb) {
4349 skb_trim(skb, 0);
4350 goto map_skb;
4351 }
4352
4353 skb = netdev_alloc_skb(netdev, bufsz);
4354 if (unlikely(!skb)) {
4355 /* Better luck next round */
4356 adapter->alloc_rx_buff_failed++;
4357 break;
4358 }
4359
4360 /* Fix for errata 23, can't cross 64kB boundary */
4361 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4362 struct sk_buff *oldskb = skb;
4363 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4364 "at %p\n", bufsz, skb->data);
4365 /* Try again, without freeing the previous */
4366 skb = netdev_alloc_skb(netdev, bufsz);
4367 /* Failed allocation, critical failure */
4368 if (!skb) {
4369 dev_kfree_skb(oldskb);
4370 break;
4371 }
4372
4373 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4374 /* give up */
4375 dev_kfree_skb(skb);
4376 dev_kfree_skb(oldskb);
4377 break; /* while !buffer_info->skb */
4378 }
4379
4380 /* Use new allocation */
4381 dev_kfree_skb(oldskb);
4382 }
4383 /* Make buffer alignment 2 beyond a 16 byte boundary
4384 * this will result in a 16 byte aligned IP header after
4385 * the 14 byte MAC header is removed
4386 */
4387 skb_reserve(skb, NET_IP_ALIGN);
4388
4389 buffer_info->skb = skb;
4390 buffer_info->length = adapter->rx_buffer_len;
4391 map_skb:
4392 buffer_info->dma = pci_map_single(pdev,
4393 skb->data,
4394 adapter->rx_buffer_len,
4395 PCI_DMA_FROMDEVICE);
4396
4397 /* Fix for errata 23, can't cross 64kB boundary */
4398 if (!e1000_check_64k_bound(adapter,
4399 (void *)(unsigned long)buffer_info->dma,
4400 adapter->rx_buffer_len)) {
4401 DPRINTK(RX_ERR, ERR,
4402 "dma align check failed: %u bytes at %p\n",
4403 adapter->rx_buffer_len,
4404 (void *)(unsigned long)buffer_info->dma);
4405 dev_kfree_skb(skb);
4406 buffer_info->skb = NULL;
4407
4408 pci_unmap_single(pdev, buffer_info->dma,
4409 adapter->rx_buffer_len,
4410 PCI_DMA_FROMDEVICE);
4411
4412 break; /* while !buffer_info->skb */
4413 }
4414 rx_desc = E1000_RX_DESC(*rx_ring, i);
4415 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4416
4417 if (unlikely(++i == rx_ring->count))
4418 i = 0;
4419 buffer_info = &rx_ring->buffer_info[i];
4420 }
4421
4422 if (likely(rx_ring->next_to_use != i)) {
4423 rx_ring->next_to_use = i;
4424 if (unlikely(i-- == 0))
4425 i = (rx_ring->count - 1);
4426
4427 /* Force memory writes to complete before letting h/w
4428 * know there are new descriptors to fetch. (Only
4429 * applicable for weak-ordered memory model archs,
4430 * such as IA-64). */
4431 wmb();
4432 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4433 }
4434 }
4435
4436 /**
4437 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
4438 * @adapter: address of board private structure
4439 **/
4440
4441 static void
4442 e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
4443 struct e1000_rx_ring *rx_ring,
4444 int cleaned_count)
4445 {
4446 struct net_device *netdev = adapter->netdev;
4447 struct pci_dev *pdev = adapter->pdev;
4448 union e1000_rx_desc_packet_split *rx_desc;
4449 struct e1000_buffer *buffer_info;
4450 struct e1000_ps_page *ps_page;
4451 struct e1000_ps_page_dma *ps_page_dma;
4452 struct sk_buff *skb;
4453 unsigned int i, j;
4454
4455 i = rx_ring->next_to_use;
4456 buffer_info = &rx_ring->buffer_info[i];
4457 ps_page = &rx_ring->ps_page[i];
4458 ps_page_dma = &rx_ring->ps_page_dma[i];
4459
4460 while (cleaned_count--) {
4461 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4462
4463 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
4464 if (j < adapter->rx_ps_pages) {
4465 if (likely(!ps_page->ps_page[j])) {
4466 ps_page->ps_page[j] =
4467 alloc_page(GFP_ATOMIC);
4468 if (unlikely(!ps_page->ps_page[j])) {
4469 adapter->alloc_rx_buff_failed++;
4470 goto no_buffers;
4471 }
4472 ps_page_dma->ps_page_dma[j] =
4473 pci_map_page(pdev,
4474 ps_page->ps_page[j],
4475 0, PAGE_SIZE,
4476 PCI_DMA_FROMDEVICE);
4477 }
4478 /* Refresh the desc even if buffer_addrs didn't
4479 * change because each write-back erases
4480 * this info.
4481 */
4482 rx_desc->read.buffer_addr[j+1] =
4483 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
4484 } else
4485 rx_desc->read.buffer_addr[j+1] = ~0;
4486 }
4487
4488 skb = netdev_alloc_skb(netdev,
4489 adapter->rx_ps_bsize0 + NET_IP_ALIGN);
4490
4491 if (unlikely(!skb)) {
4492 adapter->alloc_rx_buff_failed++;
4493 break;
4494 }
4495
4496 /* Make buffer alignment 2 beyond a 16 byte boundary
4497 * this will result in a 16 byte aligned IP header after
4498 * the 14 byte MAC header is removed
4499 */
4500 skb_reserve(skb, NET_IP_ALIGN);
4501
4502 buffer_info->skb = skb;
4503 buffer_info->length = adapter->rx_ps_bsize0;
4504 buffer_info->dma = pci_map_single(pdev, skb->data,
4505 adapter->rx_ps_bsize0,
4506 PCI_DMA_FROMDEVICE);
4507
4508 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4509
4510 if (unlikely(++i == rx_ring->count)) i = 0;
4511 buffer_info = &rx_ring->buffer_info[i];
4512 ps_page = &rx_ring->ps_page[i];
4513 ps_page_dma = &rx_ring->ps_page_dma[i];
4514 }
4515
4516 no_buffers:
4517 if (likely(rx_ring->next_to_use != i)) {
4518 rx_ring->next_to_use = i;
4519 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
4520
4521 /* Force memory writes to complete before letting h/w
4522 * know there are new descriptors to fetch. (Only
4523 * applicable for weak-ordered memory model archs,
4524 * such as IA-64). */
4525 wmb();
4526 /* Hardware increments by 16 bytes, but packet split
4527 * descriptors are 32 bytes...so we increment tail
4528 * twice as much.
4529 */
4530 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4531 }
4532 }
4533
4534 /**
4535 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4536 * @adapter:
4537 **/
4538
4539 static void
4540 e1000_smartspeed(struct e1000_adapter *adapter)
4541 {
4542 uint16_t phy_status;
4543 uint16_t phy_ctrl;
4544
4545 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
4546 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4547 return;
4548
4549 if (adapter->smartspeed == 0) {
4550 /* If Master/Slave config fault is asserted twice,
4551 * we assume back-to-back */
4552 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4553 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4554 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4555 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4556 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4557 if (phy_ctrl & CR_1000T_MS_ENABLE) {
4558 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4559 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4560 phy_ctrl);
4561 adapter->smartspeed++;
4562 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4563 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4564 &phy_ctrl)) {
4565 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4566 MII_CR_RESTART_AUTO_NEG);
4567 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4568 phy_ctrl);
4569 }
4570 }
4571 return;
4572 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
4573 /* If still no link, perhaps using 2/3 pair cable */
4574 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4575 phy_ctrl |= CR_1000T_MS_ENABLE;
4576 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
4577 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4578 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4579 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4580 MII_CR_RESTART_AUTO_NEG);
4581 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4582 }
4583 }
4584 /* Restart process after E1000_SMARTSPEED_MAX iterations */
4585 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
4586 adapter->smartspeed = 0;
4587 }
4588
4589 /**
4590 * e1000_ioctl -
4591 * @netdev:
4592 * @ifreq:
4593 * @cmd:
4594 **/
4595
4596 static int
4597 e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4598 {
4599 switch (cmd) {
4600 #ifdef SIOCGMIIPHY
4601 case SIOCGMIIPHY:
4602 case SIOCGMIIREG:
4603 case SIOCSMIIREG:
4604 return e1000_mii_ioctl(netdev, ifr, cmd);
4605 #endif
4606 #ifdef ETHTOOL_OPS_COMPAT
4607 case SIOCETHTOOL:
4608 return ethtool_ioctl(ifr);
4609 #endif
4610 default:
4611 return -EOPNOTSUPP;
4612 }
4613 }
4614
4615 #ifdef SIOCGMIIPHY
4616 /**
4617 * e1000_mii_ioctl -
4618 * @netdev:
4619 * @ifreq:
4620 * @cmd:
4621 **/
4622
4623 static int
4624 e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4625 {
4626 struct e1000_adapter *adapter = netdev_priv(netdev);
4627 struct mii_ioctl_data *data = if_mii(ifr);
4628 unsigned long flags;
4629
4630 if (adapter->hw.media_type != e1000_media_type_copper)
4631 return -EOPNOTSUPP;
4632
4633 switch (cmd) {
4634 case SIOCGMIIPHY:
4635 data->phy_id = adapter->hw.phy_addr;
4636 break;
4637 case SIOCGMIIREG:
4638 if (!capable(CAP_NET_ADMIN))
4639 return -EPERM;
4640 spin_lock_irqsave(&adapter->stats_lock, flags);
4641 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
4642 &data->val_out)) {
4643 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4644 return -EIO;
4645 }
4646 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4647 break;
4648 case SIOCSMIIREG:
4649 default:
4650 return -EOPNOTSUPP;
4651 }
4652 return E1000_SUCCESS;
4653 }
4654 #endif
4655
4656 void
4657 e1000_pci_set_mwi(struct e1000_hw *hw)
4658 {
4659 struct e1000_adapter *adapter = hw->back;
4660 int ret_val = pci_set_mwi(adapter->pdev);
4661
4662 if (ret_val)
4663 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
4664 }
4665
4666 void
4667 e1000_pci_clear_mwi(struct e1000_hw *hw)
4668 {
4669 struct e1000_adapter *adapter = hw->back;
4670
4671 pci_clear_mwi(adapter->pdev);
4672 }
4673
4674 void
4675 e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4676 {
4677 struct e1000_adapter *adapter = hw->back;
4678
4679 pci_read_config_word(adapter->pdev, reg, value);
4680 }
4681
4682 void
4683 e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4684 {
4685 struct e1000_adapter *adapter = hw->back;
4686
4687 pci_write_config_word(adapter->pdev, reg, *value);
4688 }
4689
4690 int32_t
4691 e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4692 {
4693 struct e1000_adapter *adapter = hw->back;
4694 uint16_t cap_offset;
4695
4696 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
4697 if (!cap_offset)
4698 return -E1000_ERR_CONFIG;
4699
4700 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
4701
4702 return E1000_SUCCESS;
4703 }
4704
4705 void
4706 e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4707 {
4708 outl(value, port);
4709 }
4710
4711 #ifdef NETIF_F_HW_VLAN_TX
4712 static void
4713 e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4714 {
4715 struct e1000_adapter *adapter = netdev_priv(netdev);
4716 uint32_t ctrl, rctl;
4717
4718 e1000_irq_disable(adapter);
4719 adapter->vlgrp = grp;
4720
4721 if (grp) {
4722 /* enable VLAN tag insert/strip */
4723 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4724 ctrl |= E1000_CTRL_VME;
4725 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4726
4727 if (adapter->hw.mac_type != e1000_ich8lan) {
4728 /* enable VLAN receive filtering */
4729 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4730 rctl |= E1000_RCTL_VFE;
4731 rctl &= ~E1000_RCTL_CFIEN;
4732 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4733 e1000_update_mng_vlan(adapter);
4734 }
4735 } else {
4736 /* disable VLAN tag insert/strip */
4737 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4738 ctrl &= ~E1000_CTRL_VME;
4739 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4740
4741 if (adapter->hw.mac_type != e1000_ich8lan) {
4742 /* disable VLAN filtering */
4743 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4744 rctl &= ~E1000_RCTL_VFE;
4745 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4746 if (adapter->mng_vlan_id !=
4747 (uint16_t)E1000_MNG_VLAN_NONE) {
4748 e1000_vlan_rx_kill_vid(netdev,
4749 adapter->mng_vlan_id);
4750 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4751 }
4752 }
4753 }
4754
4755 e1000_irq_enable(adapter);
4756 }
4757
4758 static void
4759 e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4760 {
4761 struct e1000_adapter *adapter = netdev_priv(netdev);
4762 uint32_t vfta, index;
4763
4764 if ((adapter->hw.mng_cookie.status &
4765 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4766 (vid == adapter->mng_vlan_id))
4767 return;
4768 /* add VID to filter table */
4769 index = (vid >> 5) & 0x7F;
4770 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4771 vfta |= (1 << (vid & 0x1F));
4772 e1000_write_vfta(&adapter->hw, index, vfta);
4773 }
4774
4775 static void
4776 e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
4777 {
4778 struct e1000_adapter *adapter = netdev_priv(netdev);
4779 uint32_t vfta, index;
4780
4781 e1000_irq_disable(adapter);
4782
4783 if (adapter->vlgrp)
4784 adapter->vlgrp->vlan_devices[vid] = NULL;
4785
4786 e1000_irq_enable(adapter);
4787
4788 if ((adapter->hw.mng_cookie.status &
4789 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4790 (vid == adapter->mng_vlan_id)) {
4791 /* release control to f/w */
4792 e1000_release_hw_control(adapter);
4793 return;
4794 }
4795
4796 /* remove VID from filter table */
4797 index = (vid >> 5) & 0x7F;
4798 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4799 vfta &= ~(1 << (vid & 0x1F));
4800 e1000_write_vfta(&adapter->hw, index, vfta);
4801 }
4802
4803 static void
4804 e1000_restore_vlan(struct e1000_adapter *adapter)
4805 {
4806 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4807
4808 if (adapter->vlgrp) {
4809 uint16_t vid;
4810 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4811 if (!adapter->vlgrp->vlan_devices[vid])
4812 continue;
4813 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4814 }
4815 }
4816 }
4817 #endif
4818
4819 int
4820 e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
4821 {
4822 adapter->hw.autoneg = 0;
4823
4824 /* Fiber NICs only allow 1000 gbps Full duplex */
4825 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
4826 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4827 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4828 return -EINVAL;
4829 }
4830
4831 switch (spddplx) {
4832 case SPEED_10 + DUPLEX_HALF:
4833 adapter->hw.forced_speed_duplex = e1000_10_half;
4834 break;
4835 case SPEED_10 + DUPLEX_FULL:
4836 adapter->hw.forced_speed_duplex = e1000_10_full;
4837 break;
4838 case SPEED_100 + DUPLEX_HALF:
4839 adapter->hw.forced_speed_duplex = e1000_100_half;
4840 break;
4841 case SPEED_100 + DUPLEX_FULL:
4842 adapter->hw.forced_speed_duplex = e1000_100_full;
4843 break;
4844 case SPEED_1000 + DUPLEX_FULL:
4845 adapter->hw.autoneg = 1;
4846 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
4847 break;
4848 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4849 default:
4850 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4851 return -EINVAL;
4852 }
4853 return 0;
4854 }
4855
4856 #ifdef CONFIG_PM
4857 /* Save/restore 16 or 64 dwords of PCI config space depending on which
4858 * bus we're on (PCI(X) vs. PCI-E)
4859 */
4860 #define PCIE_CONFIG_SPACE_LEN 256
4861 #define PCI_CONFIG_SPACE_LEN 64
4862 static int
4863 e1000_pci_save_state(struct e1000_adapter *adapter)
4864 {
4865 struct pci_dev *dev = adapter->pdev;
4866 int size;
4867 int i;
4868
4869 if (adapter->hw.mac_type >= e1000_82571)
4870 size = PCIE_CONFIG_SPACE_LEN;
4871 else
4872 size = PCI_CONFIG_SPACE_LEN;
4873
4874 WARN_ON(adapter->config_space != NULL);
4875
4876 adapter->config_space = kmalloc(size, GFP_KERNEL);
4877 if (!adapter->config_space) {
4878 DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
4879 return -ENOMEM;
4880 }
4881 for (i = 0; i < (size / 4); i++)
4882 pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
4883 return 0;
4884 }
4885
4886 static void
4887 e1000_pci_restore_state(struct e1000_adapter *adapter)
4888 {
4889 struct pci_dev *dev = adapter->pdev;
4890 int size;
4891 int i;
4892
4893 if (adapter->config_space == NULL)
4894 return;
4895
4896 if (adapter->hw.mac_type >= e1000_82571)
4897 size = PCIE_CONFIG_SPACE_LEN;
4898 else
4899 size = PCI_CONFIG_SPACE_LEN;
4900 for (i = 0; i < (size / 4); i++)
4901 pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
4902 kfree(adapter->config_space);
4903 adapter->config_space = NULL;
4904 return;
4905 }
4906 #endif /* CONFIG_PM */
4907
4908 /* only want to do this for 2.4 kernels? */
4909 static int
4910 e1000_notify_reboot(struct notifier_block *nb, unsigned long event, void *p)
4911 {
4912 struct pci_dev *pdev = NULL;
4913
4914 switch (event) {
4915 case SYS_DOWN:
4916 case SYS_HALT:
4917 case SYS_POWER_OFF:
4918 while ((pdev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pdev))) {
4919 if (pci_dev_driver(pdev) == &e1000_driver)
4920 e1000_suspend(pdev, PMSG_SUSPEND);
4921 }
4922 }
4923 return NOTIFY_DONE;
4924 }
4925
4926 static int
4927 e1000_suspend(struct pci_dev *pdev, pm_message_t state)
4928 {
4929 struct net_device *netdev = pci_get_drvdata(pdev);
4930 struct e1000_adapter *adapter = netdev_priv(netdev);
4931 uint32_t ctrl, ctrl_ext, rctl, status;
4932 uint32_t wufc = adapter->wol;
4933 #ifdef CONFIG_PM
4934 int retval = 0;
4935 #endif
4936
4937 netif_device_detach(netdev);
4938
4939 if (netif_running(netdev)) {
4940 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
4941 e1000_down(adapter);
4942 }
4943
4944 #ifdef CONFIG_PM
4945 /* Implement our own version of pci_save_state(pdev) because pci-
4946 * express adapters have 256-byte config spaces. */
4947 retval = e1000_pci_save_state(adapter);
4948 if (retval)
4949 return retval;
4950 #endif
4951
4952 status = E1000_READ_REG(&adapter->hw, STATUS);
4953 if (status & E1000_STATUS_LU)
4954 wufc &= ~E1000_WUFC_LNKC;
4955
4956 if (wufc) {
4957 e1000_setup_rctl(adapter);
4958 e1000_set_multi(netdev);
4959
4960 /* turn on all-multi mode if wake on multicast is enabled */
4961 if (wufc & E1000_WUFC_MC) {
4962 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4963 rctl |= E1000_RCTL_MPE;
4964 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4965 }
4966
4967 if (adapter->hw.mac_type >= e1000_82540) {
4968 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4969 /* advertise wake from D3Cold */
4970 #define E1000_CTRL_ADVD3WUC 0x00100000
4971 /* phy power management enable */
4972 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4973 ctrl |= E1000_CTRL_ADVD3WUC |
4974 E1000_CTRL_EN_PHY_PWR_MGMT;
4975 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4976 }
4977
4978 if (adapter->hw.media_type == e1000_media_type_fiber ||
4979 adapter->hw.media_type == e1000_media_type_internal_serdes) {
4980 /* keep the laser running in D3 */
4981 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
4982 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4983 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
4984 }
4985
4986 /* Allow time for pending master requests to run */
4987 e1000_disable_pciex_master(&adapter->hw);
4988
4989 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
4990 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
4991 pci_enable_wake(pdev, PCI_D3hot, 1);
4992 pci_enable_wake(pdev, PCI_D3cold, 1);
4993 } else {
4994 E1000_WRITE_REG(&adapter->hw, WUC, 0);
4995 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
4996 pci_enable_wake(pdev, PCI_D3hot, 0);
4997 pci_enable_wake(pdev, PCI_D3cold, 0);
4998 }
4999
5000 e1000_release_manageability(adapter);
5001
5002 /* make sure adapter isn't asleep if manageability is enabled */
5003 if (adapter->en_mng_pt) {
5004 pci_enable_wake(pdev, PCI_D3hot, 1);
5005 pci_enable_wake(pdev, PCI_D3cold, 1);
5006 }
5007
5008 if (adapter->hw.phy_type == e1000_phy_igp_3)
5009 e1000_phy_powerdown_workaround(&adapter->hw);
5010
5011 if (netif_running(netdev))
5012 e1000_free_irq(adapter);
5013
5014 /* Release control of h/w to f/w. If f/w is AMT enabled, this
5015 * would have already happened in close and is redundant. */
5016 e1000_release_hw_control(adapter);
5017
5018 pci_disable_device(pdev);
5019
5020 pci_set_power_state(pdev, pci_choose_state(pdev, state));
5021
5022 return 0;
5023 }
5024
5025 #ifdef CONFIG_PM
5026 static int
5027 e1000_resume(struct pci_dev *pdev)
5028 {
5029 struct net_device *netdev = pci_get_drvdata(pdev);
5030 struct e1000_adapter *adapter = netdev_priv(netdev);
5031 uint32_t err;
5032
5033 pci_set_power_state(pdev, PCI_D0);
5034 e1000_pci_restore_state(adapter);
5035 if ((err = pci_enable_device(pdev))) {
5036 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
5037 return err;
5038 }
5039 pci_set_master(pdev);
5040
5041 pci_enable_wake(pdev, PCI_D3hot, 0);
5042 pci_enable_wake(pdev, PCI_D3cold, 0);
5043
5044 if (netif_running(netdev) && (err = e1000_request_irq(adapter)))
5045 return err;
5046
5047 e1000_power_up_phy(adapter);
5048 e1000_reset(adapter);
5049 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5050
5051 e1000_init_manageability(adapter);
5052
5053 if (netif_running(netdev))
5054 e1000_up(adapter);
5055
5056 netif_device_attach(netdev);
5057
5058 /* If the controller is 82573 and f/w is AMT, do not set
5059 * DRV_LOAD until the interface is up. For all other cases,
5060 * let the f/w know that the h/w is now under the control
5061 * of the driver. */
5062 if (adapter->hw.mac_type != e1000_82573 ||
5063 !e1000_check_mng_mode(&adapter->hw))
5064 e1000_get_hw_control(adapter);
5065
5066 return 0;
5067 }
5068 #endif
5069
5070 #ifdef CONFIG_NET_POLL_CONTROLLER
5071 /*
5072 * Polling 'interrupt' - used by things like netconsole to send skbs
5073 * without having to re-enable interrupts. It's not called while
5074 * the interrupt routine is executing.
5075 */
5076 static void
5077 e1000_netpoll(struct net_device *netdev)
5078 {
5079 struct e1000_adapter *adapter = netdev_priv(netdev);
5080
5081 disable_irq(adapter->pdev->irq);
5082 e1000_intr(adapter->pdev->irq, netdev);
5083 e1000_clean_tx_irq(adapter, adapter->tx_ring);
5084 #ifndef CONFIG_E1000_NAPI
5085 adapter->clean_rx(adapter, adapter->rx_ring);
5086 #endif
5087 enable_irq(adapter->pdev->irq);
5088 }
5089 #endif
5090
5091 /* e1000_main.c */
5092