1 #ifndef __ASM_IO_APIC_H
2 #define __ASM_IO_APIC_H
3 
4 #include <linux/config.h>
5 #include <asm/types.h>
6 
7 /*
8  * Intel IO-APIC support for SMP and UP systems.
9  *
10  * Copyright (C) 1997, 1998, 1999, 2000 Ingo Molnar
11  */
12 
13 #ifdef CONFIG_X86_IO_APIC
14 
15 #define APIC_MISMATCH_DEBUG
16 
17 #define IO_APIC_BASE(idx) \
18 		((volatile int *)(__fix_to_virt(FIX_IO_APIC_BASE_0 + idx) \
19 		+ (mp_ioapics[idx].mpc_apicaddr & ~PAGE_MASK)))
20 
21 /*
22  * The structure of the IO-APIC:
23  */
24 struct IO_APIC_reg_00 {
25 	__u32	__reserved_2	: 14,
26 		LTS		:  1,
27 		delivery_type	:  1,
28 		__reserved_1	:  8,
29 		ID		:  4,
30 		__reserved_0	:  4;
31 } __attribute__ ((packed));
32 
33 struct IO_APIC_reg_01 {
34 	__u32	version		:  8,
35 		__reserved_2	:  7,
36 		PRQ		:  1,
37 		entries		:  8,
38 		__reserved_1	:  8;
39 } __attribute__ ((packed));
40 
41 struct IO_APIC_reg_02 {
42 	__u32	__reserved_2	: 24,
43 		arbitration	:  4,
44 		__reserved_1	:  4;
45 } __attribute__ ((packed));
46 
47 struct IO_APIC_reg_03 {
48 	__u32	boot_DT		: 1,
49 		__reserved_1	: 31;
50 } __attribute__ ((packed));
51 
52 /*
53  * # of IO-APICs and # of IRQ routing registers
54  */
55 extern int nr_ioapics;
56 extern int nr_ioapic_registers[MAX_IO_APICS];
57 
58 enum ioapic_irq_destination_types {
59 	dest_Fixed = 0,
60 	dest_LowestPrio = 1,
61 	dest_SMI = 2,
62 	dest__reserved_1 = 3,
63 	dest_NMI = 4,
64 	dest_INIT = 5,
65 	dest__reserved_2 = 6,
66 	dest_ExtINT = 7
67 };
68 
69 struct IO_APIC_route_entry {
70 	__u32	vector		:  8,
71 		delivery_mode	:  3,	/* 000: FIXED
72 					 * 001: lowest prio
73 					 * 111: ExtINT
74 					 */
75 		dest_mode	:  1,	/* 0: physical, 1: logical */
76 		delivery_status	:  1,
77 		polarity	:  1,
78 		irr		:  1,
79 		trigger		:  1,	/* 0: edge, 1: level */
80 		mask		:  1,	/* 0: enabled, 1: disabled */
81 		__reserved_2	: 15;
82 
83 	union {		struct { __u32
84 					__reserved_1	: 24,
85 					physical_dest	:  4,
86 					__reserved_2	:  4;
87 			} physical;
88 
89 			struct { __u32
90 					__reserved_1	: 24,
91 					logical_dest	:  8;
92 			} logical;
93 	} dest;
94 
95 } __attribute__ ((packed));
96 
97 /*
98  * MP-BIOS irq configuration table structures:
99  */
100 
101 /* I/O APIC entries */
102 extern struct mpc_config_ioapic mp_ioapics[MAX_IO_APICS];
103 
104 /* # of MP IRQ source entries */
105 extern int mp_irq_entries;
106 
107 /* MP IRQ source entries */
108 extern struct mpc_config_intsrc *mp_irqs;
109 
110 /* non-0 if default (table-less) MP configuration */
111 extern int mpc_default_type;
112 
io_apic_read(unsigned int apic,unsigned int reg)113 static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg)
114 {
115 	*IO_APIC_BASE(apic) = reg;
116 	return *(IO_APIC_BASE(apic)+4);
117 }
118 
io_apic_write(unsigned int apic,unsigned int reg,unsigned int value)119 static inline void io_apic_write(unsigned int apic, unsigned int reg, unsigned int value)
120 {
121 	*IO_APIC_BASE(apic) = reg;
122 	*(IO_APIC_BASE(apic)+4) = value;
123 }
124 
125 /*
126  * Synchronize the IO-APIC and the CPU by doing
127  * a dummy read from the IO-APIC
128  */
io_apic_sync(unsigned int apic)129 static inline void io_apic_sync(unsigned int apic)
130 {
131 	(void) *(IO_APIC_BASE(apic)+4);
132 }
133 
134 /*
135  * If we use the IO-APIC for IRQ routing, disable automatic
136  * assignment of PCI IRQ's.
137  */
138 #define io_apic_assign_pci_irqs (mp_irq_entries && !skip_ioapic_setup)
139 
140 #ifdef CONFIG_ACPI_BOOT
141 extern int io_apic_get_unique_id (int ioapic, int apic_id);
142 extern int io_apic_get_version (int ioapic);
143 extern int io_apic_get_redir_entries (int ioapic);
144 extern int io_apic_set_pci_routing (int ioapic, int pin, int irq, int edge_level, int active_high_low);
145 #endif
146 
147 extern int skip_ioapic_setup;	/* 1 for "noapic" */
148 
disable_ioapic_setup(void)149 static inline void disable_ioapic_setup(void)
150 {
151 	skip_ioapic_setup = 1;
152 }
153 
ioapic_setup_disabled(void)154 static inline int ioapic_setup_disabled(void)
155 {
156 	return skip_ioapic_setup;
157 }
158 
159 #else	/* !CONFIG_X86_IO_APIC */
160 #define io_apic_assign_pci_irqs 0
161 
disable_ioapic_setup(void)162 static inline void disable_ioapic_setup(void)
163 { }
164 
165 #endif	/* !CONFIG_X86_IO_APIC */
166 
167 #endif
168