1 /*
2  * Copyright (c) 2005-2010 Brocade Communications Systems, Inc.
3  * All rights reserved
4  * www.brocade.com
5  *
6  * Linux driver for Brocade Fibre Channel Host Bus Adapter.
7  *
8  * This program is free software; you can redistribute it and/or modify it
9  * under the terms of the GNU General Public License (GPL) Version 2 as
10  * published by the Free Software Foundation
11  *
12  * This program is distributed in the hope that it will be useful, but
13  * WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
15  * General Public License for more details.
16  */
17 
18 #ifndef __BFA_IOC_H__
19 #define __BFA_IOC_H__
20 
21 #include "bfad_drv.h"
22 #include "bfa_cs.h"
23 #include "bfi.h"
24 
25 #define BFA_DBG_FWTRC_ENTS	(BFI_IOC_TRC_ENTS)
26 #define BFA_DBG_FWTRC_LEN					\
27 	(BFA_DBG_FWTRC_ENTS * sizeof(struct bfa_trc_s) +	\
28 	(sizeof(struct bfa_trc_mod_s) -				\
29 	BFA_TRC_MAX * sizeof(struct bfa_trc_s)))
30 /*
31  * BFA timer declarations
32  */
33 typedef void (*bfa_timer_cbfn_t)(void *);
34 
35 /*
36  * BFA timer data structure
37  */
38 struct bfa_timer_s {
39 	struct list_head	qe;
40 	bfa_timer_cbfn_t timercb;
41 	void		*arg;
42 	int		timeout;	/* in millisecs */
43 };
44 
45 /*
46  * Timer module structure
47  */
48 struct bfa_timer_mod_s {
49 	struct list_head timer_q;
50 };
51 
52 #define BFA_TIMER_FREQ 200 /* specified in millisecs */
53 
54 void bfa_timer_beat(struct bfa_timer_mod_s *mod);
55 void bfa_timer_begin(struct bfa_timer_mod_s *mod, struct bfa_timer_s *timer,
56 			bfa_timer_cbfn_t timercb, void *arg,
57 			unsigned int timeout);
58 void bfa_timer_stop(struct bfa_timer_s *timer);
59 
60 /*
61  * Generic Scatter Gather Element used by driver
62  */
63 struct bfa_sge_s {
64 	u32	sg_len;
65 	void		*sg_addr;
66 };
67 
68 #define bfa_sge_word_swap(__sge) do {					     \
69 	((u32 *)(__sge))[0] = swab32(((u32 *)(__sge))[0]);      \
70 	((u32 *)(__sge))[1] = swab32(((u32 *)(__sge))[1]);      \
71 	((u32 *)(__sge))[2] = swab32(((u32 *)(__sge))[2]);      \
72 } while (0)
73 
74 #define bfa_swap_words(_x)  (	\
75 	((_x) << 32) | ((_x) >> 32))
76 
77 #ifdef __BIG_ENDIAN
78 #define bfa_sge_to_be(_x)
79 #define bfa_sge_to_le(_x)	bfa_sge_word_swap(_x)
80 #define bfa_sgaddr_le(_x)	bfa_swap_words(_x)
81 #else
82 #define	bfa_sge_to_be(_x)	bfa_sge_word_swap(_x)
83 #define bfa_sge_to_le(_x)
84 #define bfa_sgaddr_le(_x)	(_x)
85 #endif
86 
87 /*
88  * PCI device information required by IOC
89  */
90 struct bfa_pcidev_s {
91 	int		pci_slot;
92 	u8		pci_func;
93 	u16		device_id;
94 	void __iomem	*pci_bar_kva;
95 };
96 
97 /*
98  * Structure used to remember the DMA-able memory block's KVA and Physical
99  * Address
100  */
101 struct bfa_dma_s {
102 	void		*kva;	/* ! Kernel virtual address	*/
103 	u64	pa;	/* ! Physical address		*/
104 };
105 
106 #define BFA_DMA_ALIGN_SZ	256
107 #define BFA_ROUNDUP(_l, _s)	(((_l) + ((_s) - 1)) & ~((_s) - 1))
108 
109 /*
110  * smem size for Crossbow and Catapult
111  */
112 #define BFI_SMEM_CB_SIZE	0x200000U	/* ! 2MB for crossbow	*/
113 #define BFI_SMEM_CT_SIZE	0x280000U	/* ! 2.5MB for catapult	*/
114 
115 
116 #define bfa_dma_addr_set(dma_addr, pa)	\
117 		__bfa_dma_addr_set(&dma_addr, (u64)pa)
118 
119 static inline void
__bfa_dma_addr_set(union bfi_addr_u * dma_addr,u64 pa)120 __bfa_dma_addr_set(union bfi_addr_u *dma_addr, u64 pa)
121 {
122 	dma_addr->a32.addr_lo = (__be32) pa;
123 	dma_addr->a32.addr_hi = (__be32) (pa >> 32);
124 }
125 
126 
127 #define bfa_dma_be_addr_set(dma_addr, pa)	\
128 		__bfa_dma_be_addr_set(&dma_addr, (u64)pa)
129 static inline void
__bfa_dma_be_addr_set(union bfi_addr_u * dma_addr,u64 pa)130 __bfa_dma_be_addr_set(union bfi_addr_u *dma_addr, u64 pa)
131 {
132 	dma_addr->a32.addr_lo = cpu_to_be32(pa);
133 	dma_addr->a32.addr_hi = cpu_to_be32(pa >> 32);
134 }
135 
136 struct bfa_ioc_regs_s {
137 	void __iomem *hfn_mbox_cmd;
138 	void __iomem *hfn_mbox;
139 	void __iomem *lpu_mbox_cmd;
140 	void __iomem *lpu_mbox;
141 	void __iomem *pss_ctl_reg;
142 	void __iomem *pss_err_status_reg;
143 	void __iomem *app_pll_fast_ctl_reg;
144 	void __iomem *app_pll_slow_ctl_reg;
145 	void __iomem *ioc_sem_reg;
146 	void __iomem *ioc_usage_sem_reg;
147 	void __iomem *ioc_init_sem_reg;
148 	void __iomem *ioc_usage_reg;
149 	void __iomem *host_page_num_fn;
150 	void __iomem *heartbeat;
151 	void __iomem *ioc_fwstate;
152 	void __iomem *alt_ioc_fwstate;
153 	void __iomem *ll_halt;
154 	void __iomem *alt_ll_halt;
155 	void __iomem *err_set;
156 	void __iomem *ioc_fail_sync;
157 	void __iomem *shirq_isr_next;
158 	void __iomem *shirq_msk_next;
159 	void __iomem *smem_page_start;
160 	u32	smem_pg0;
161 };
162 
163 #define bfa_mem_read(_raddr, _off)	swab32(readl(((_raddr) + (_off))))
164 #define bfa_mem_write(_raddr, _off, _val)	\
165 			writel(swab32((_val)), ((_raddr) + (_off)))
166 /*
167  * IOC Mailbox structures
168  */
169 struct bfa_mbox_cmd_s {
170 	struct list_head	qe;
171 	u32	msg[BFI_IOC_MSGSZ];
172 };
173 
174 /*
175  * IOC mailbox module
176  */
177 typedef void (*bfa_ioc_mbox_mcfunc_t)(void *cbarg, struct bfi_mbmsg_s *m);
178 struct bfa_ioc_mbox_mod_s {
179 	struct list_head		cmd_q;	/*  pending mbox queue	*/
180 	int			nmclass;	/*  number of handlers */
181 	struct {
182 		bfa_ioc_mbox_mcfunc_t	cbfn;	/*  message handlers	*/
183 		void			*cbarg;
184 	} mbhdlr[BFI_MC_MAX];
185 };
186 
187 /*
188  * IOC callback function interfaces
189  */
190 typedef void (*bfa_ioc_enable_cbfn_t)(void *bfa, enum bfa_status status);
191 typedef void (*bfa_ioc_disable_cbfn_t)(void *bfa);
192 typedef void (*bfa_ioc_hbfail_cbfn_t)(void *bfa);
193 typedef void (*bfa_ioc_reset_cbfn_t)(void *bfa);
194 struct bfa_ioc_cbfn_s {
195 	bfa_ioc_enable_cbfn_t	enable_cbfn;
196 	bfa_ioc_disable_cbfn_t	disable_cbfn;
197 	bfa_ioc_hbfail_cbfn_t	hbfail_cbfn;
198 	bfa_ioc_reset_cbfn_t	reset_cbfn;
199 };
200 
201 /*
202  * Heartbeat failure notification queue element.
203  */
204 struct bfa_ioc_hbfail_notify_s {
205 	struct list_head		qe;
206 	bfa_ioc_hbfail_cbfn_t	cbfn;
207 	void			*cbarg;
208 };
209 
210 /*
211  * Initialize a heartbeat failure notification structure
212  */
213 #define bfa_ioc_hbfail_init(__notify, __cbfn, __cbarg) do {	\
214 	(__notify)->cbfn = (__cbfn);      \
215 	(__notify)->cbarg = (__cbarg);      \
216 } while (0)
217 
218 struct bfa_iocpf_s {
219 	bfa_fsm_t		fsm;
220 	struct bfa_ioc_s	*ioc;
221 	u32		retry_count;
222 	bfa_boolean_t		auto_recover;
223 };
224 
225 struct bfa_ioc_s {
226 	bfa_fsm_t		fsm;
227 	struct bfa_s		*bfa;
228 	struct bfa_pcidev_s	pcidev;
229 	struct bfa_timer_mod_s	*timer_mod;
230 	struct bfa_timer_s	ioc_timer;
231 	struct bfa_timer_s	sem_timer;
232 	struct bfa_timer_s	hb_timer;
233 	u32		hb_count;
234 	struct list_head		hb_notify_q;
235 	void			*dbg_fwsave;
236 	int			dbg_fwsave_len;
237 	bfa_boolean_t		dbg_fwsave_once;
238 	enum bfi_mclass		ioc_mc;
239 	struct bfa_ioc_regs_s	ioc_regs;
240 	struct bfa_trc_mod_s	*trcmod;
241 	struct bfa_ioc_drv_stats_s	stats;
242 	bfa_boolean_t		fcmode;
243 	bfa_boolean_t		ctdev;
244 	bfa_boolean_t		cna;
245 	bfa_boolean_t		pllinit;
246 	bfa_boolean_t		stats_busy;	/*  outstanding stats */
247 	u8			port_id;
248 	struct bfa_dma_s	attr_dma;
249 	struct bfi_ioc_attr_s	*attr;
250 	struct bfa_ioc_cbfn_s	*cbfn;
251 	struct bfa_ioc_mbox_mod_s mbox_mod;
252 	struct bfa_ioc_hwif_s	*ioc_hwif;
253 	struct bfa_iocpf_s	iocpf;
254 };
255 
256 struct bfa_ioc_hwif_s {
257 	bfa_status_t (*ioc_pll_init) (void __iomem *rb, bfa_boolean_t fcmode);
258 	bfa_boolean_t	(*ioc_firmware_lock)	(struct bfa_ioc_s *ioc);
259 	void		(*ioc_firmware_unlock)	(struct bfa_ioc_s *ioc);
260 	void		(*ioc_reg_init)	(struct bfa_ioc_s *ioc);
261 	void		(*ioc_map_port)	(struct bfa_ioc_s *ioc);
262 	void		(*ioc_isr_mode_set)	(struct bfa_ioc_s *ioc,
263 					bfa_boolean_t msix);
264 	void		(*ioc_notify_fail)	(struct bfa_ioc_s *ioc);
265 	void		(*ioc_ownership_reset)	(struct bfa_ioc_s *ioc);
266 	void		(*ioc_sync_join)	(struct bfa_ioc_s *ioc);
267 	void		(*ioc_sync_leave)	(struct bfa_ioc_s *ioc);
268 	void		(*ioc_sync_ack)		(struct bfa_ioc_s *ioc);
269 	bfa_boolean_t	(*ioc_sync_complete)	(struct bfa_ioc_s *ioc);
270 };
271 
272 #define bfa_ioc_pcifn(__ioc)		((__ioc)->pcidev.pci_func)
273 #define bfa_ioc_devid(__ioc)		((__ioc)->pcidev.device_id)
274 #define bfa_ioc_bar0(__ioc)		((__ioc)->pcidev.pci_bar_kva)
275 #define bfa_ioc_portid(__ioc)		((__ioc)->port_id)
276 #define bfa_ioc_fetch_stats(__ioc, __stats) \
277 		(((__stats)->drv_stats) = (__ioc)->stats)
278 #define bfa_ioc_clr_stats(__ioc)	\
279 		memset(&(__ioc)->stats, 0, sizeof((__ioc)->stats))
280 #define bfa_ioc_maxfrsize(__ioc)	((__ioc)->attr->maxfrsize)
281 #define bfa_ioc_rx_bbcredit(__ioc)	((__ioc)->attr->rx_bbcredit)
282 #define bfa_ioc_speed_sup(__ioc)	\
283 	BFI_ADAPTER_GETP(SPEED, (__ioc)->attr->adapter_prop)
284 #define bfa_ioc_get_nports(__ioc)	\
285 	BFI_ADAPTER_GETP(NPORTS, (__ioc)->attr->adapter_prop)
286 
287 #define bfa_ioc_stats(_ioc, _stats)	((_ioc)->stats._stats++)
288 #define BFA_IOC_FWIMG_MINSZ	(16 * 1024)
289 #define BFA_IOC_FWIMG_TYPE(__ioc)					\
290 	(((__ioc)->ctdev) ?						\
291 	 (((__ioc)->fcmode) ? BFI_IMAGE_CT_FC : BFI_IMAGE_CT_CNA) :	\
292 	 BFI_IMAGE_CB_FC)
293 #define BFA_IOC_FW_SMEM_SIZE(__ioc)					\
294 	(((__ioc)->ctdev) ? BFI_SMEM_CT_SIZE : BFI_SMEM_CB_SIZE)
295 #define BFA_IOC_FLASH_CHUNK_NO(off)		(off / BFI_FLASH_CHUNK_SZ_WORDS)
296 #define BFA_IOC_FLASH_OFFSET_IN_CHUNK(off)	(off % BFI_FLASH_CHUNK_SZ_WORDS)
297 #define BFA_IOC_FLASH_CHUNK_ADDR(chunkno)  (chunkno * BFI_FLASH_CHUNK_SZ_WORDS)
298 
299 /*
300  * IOC mailbox interface
301  */
302 void bfa_ioc_mbox_queue(struct bfa_ioc_s *ioc, struct bfa_mbox_cmd_s *cmd);
303 void bfa_ioc_mbox_register(struct bfa_ioc_s *ioc,
304 		bfa_ioc_mbox_mcfunc_t *mcfuncs);
305 void bfa_ioc_mbox_isr(struct bfa_ioc_s *ioc);
306 void bfa_ioc_mbox_send(struct bfa_ioc_s *ioc, void *ioc_msg, int len);
307 void bfa_ioc_msgget(struct bfa_ioc_s *ioc, void *mbmsg);
308 void bfa_ioc_mbox_regisr(struct bfa_ioc_s *ioc, enum bfi_mclass mc,
309 		bfa_ioc_mbox_mcfunc_t cbfn, void *cbarg);
310 
311 /*
312  * IOC interfaces
313  */
314 
315 #define bfa_ioc_pll_init_asic(__ioc) \
316 	((__ioc)->ioc_hwif->ioc_pll_init((__ioc)->pcidev.pci_bar_kva, \
317 			   (__ioc)->fcmode))
318 
319 bfa_status_t bfa_ioc_pll_init(struct bfa_ioc_s *ioc);
320 bfa_status_t bfa_ioc_cb_pll_init(void __iomem *rb, bfa_boolean_t fcmode);
321 bfa_boolean_t bfa_ioc_ct_pll_init_complete(void __iomem *rb);
322 bfa_status_t bfa_ioc_ct_pll_init(void __iomem *rb, bfa_boolean_t fcmode);
323 
324 #define	bfa_ioc_isr_mode_set(__ioc, __msix)			\
325 			((__ioc)->ioc_hwif->ioc_isr_mode_set(__ioc, __msix))
326 #define	bfa_ioc_ownership_reset(__ioc)				\
327 			((__ioc)->ioc_hwif->ioc_ownership_reset(__ioc))
328 
329 
330 void bfa_ioc_set_ct_hwif(struct bfa_ioc_s *ioc);
331 void bfa_ioc_set_cb_hwif(struct bfa_ioc_s *ioc);
332 
333 void bfa_ioc_attach(struct bfa_ioc_s *ioc, void *bfa,
334 		struct bfa_ioc_cbfn_s *cbfn, struct bfa_timer_mod_s *timer_mod);
335 void bfa_ioc_auto_recover(bfa_boolean_t auto_recover);
336 void bfa_ioc_detach(struct bfa_ioc_s *ioc);
337 void bfa_ioc_pci_init(struct bfa_ioc_s *ioc, struct bfa_pcidev_s *pcidev,
338 		enum bfi_mclass mc);
339 void bfa_ioc_mem_claim(struct bfa_ioc_s *ioc,  u8 *dm_kva, u64 dm_pa);
340 void bfa_ioc_enable(struct bfa_ioc_s *ioc);
341 void bfa_ioc_disable(struct bfa_ioc_s *ioc);
342 bfa_boolean_t bfa_ioc_intx_claim(struct bfa_ioc_s *ioc);
343 
344 void bfa_ioc_boot(struct bfa_ioc_s *ioc, u32 boot_type,
345 		u32 boot_param);
346 void bfa_ioc_isr(struct bfa_ioc_s *ioc, struct bfi_mbmsg_s *msg);
347 void bfa_ioc_error_isr(struct bfa_ioc_s *ioc);
348 bfa_boolean_t bfa_ioc_is_operational(struct bfa_ioc_s *ioc);
349 bfa_boolean_t bfa_ioc_is_initialized(struct bfa_ioc_s *ioc);
350 bfa_boolean_t bfa_ioc_is_disabled(struct bfa_ioc_s *ioc);
351 bfa_boolean_t bfa_ioc_fw_mismatch(struct bfa_ioc_s *ioc);
352 bfa_boolean_t bfa_ioc_adapter_is_disabled(struct bfa_ioc_s *ioc);
353 void bfa_ioc_reset_fwstate(struct bfa_ioc_s *ioc);
354 enum bfa_ioc_type_e bfa_ioc_get_type(struct bfa_ioc_s *ioc);
355 void bfa_ioc_get_adapter_serial_num(struct bfa_ioc_s *ioc, char *serial_num);
356 void bfa_ioc_get_adapter_fw_ver(struct bfa_ioc_s *ioc, char *fw_ver);
357 void bfa_ioc_get_adapter_optrom_ver(struct bfa_ioc_s *ioc, char *optrom_ver);
358 void bfa_ioc_get_adapter_model(struct bfa_ioc_s *ioc, char *model);
359 void bfa_ioc_get_adapter_manufacturer(struct bfa_ioc_s *ioc,
360 		char *manufacturer);
361 void bfa_ioc_get_pci_chip_rev(struct bfa_ioc_s *ioc, char *chip_rev);
362 enum bfa_ioc_state bfa_ioc_get_state(struct bfa_ioc_s *ioc);
363 
364 void bfa_ioc_get_attr(struct bfa_ioc_s *ioc, struct bfa_ioc_attr_s *ioc_attr);
365 void bfa_ioc_get_adapter_attr(struct bfa_ioc_s *ioc,
366 		struct bfa_adapter_attr_s *ad_attr);
367 void bfa_ioc_debug_memclaim(struct bfa_ioc_s *ioc, void *dbg_fwsave);
368 bfa_status_t bfa_ioc_debug_fwsave(struct bfa_ioc_s *ioc, void *trcdata,
369 		int *trclen);
370 bfa_status_t bfa_ioc_debug_fwtrc(struct bfa_ioc_s *ioc, void *trcdata,
371 				 int *trclen);
372 bfa_status_t bfa_ioc_debug_fwcore(struct bfa_ioc_s *ioc, void *buf,
373 	u32 *offset, int *buflen);
374 void bfa_ioc_set_fcmode(struct bfa_ioc_s *ioc);
375 bfa_boolean_t bfa_ioc_get_fcmode(struct bfa_ioc_s *ioc);
376 bfa_boolean_t bfa_ioc_sem_get(void __iomem *sem_reg);
377 void bfa_ioc_fwver_get(struct bfa_ioc_s *ioc,
378 			struct bfi_ioc_image_hdr_s *fwhdr);
379 bfa_boolean_t bfa_ioc_fwver_cmp(struct bfa_ioc_s *ioc,
380 			struct bfi_ioc_image_hdr_s *fwhdr);
381 bfa_status_t bfa_ioc_fw_stats_get(struct bfa_ioc_s *ioc, void *stats);
382 bfa_status_t bfa_ioc_fw_stats_clear(struct bfa_ioc_s *ioc);
383 
384 /*
385  * bfa mfg wwn API functions
386  */
387 mac_t bfa_ioc_get_mac(struct bfa_ioc_s *ioc);
388 mac_t bfa_ioc_get_mfg_mac(struct bfa_ioc_s *ioc);
389 
390 /*
391  * F/W Image Size & Chunk
392  */
393 extern u32 bfi_image_ct_fc_size;
394 extern u32 bfi_image_ct_cna_size;
395 extern u32 bfi_image_cb_fc_size;
396 extern u32 *bfi_image_ct_fc;
397 extern u32 *bfi_image_ct_cna;
398 extern u32 *bfi_image_cb_fc;
399 
400 static inline u32 *
bfi_image_ct_fc_get_chunk(u32 off)401 bfi_image_ct_fc_get_chunk(u32 off)
402 {	return (u32 *)(bfi_image_ct_fc + off); }
403 
404 static inline u32 *
bfi_image_ct_cna_get_chunk(u32 off)405 bfi_image_ct_cna_get_chunk(u32 off)
406 {	return (u32 *)(bfi_image_ct_cna + off); }
407 
408 static inline u32 *
bfi_image_cb_fc_get_chunk(u32 off)409 bfi_image_cb_fc_get_chunk(u32 off)
410 {	return (u32 *)(bfi_image_cb_fc + off); }
411 
412 static inline u32*
bfa_cb_image_get_chunk(int type,u32 off)413 bfa_cb_image_get_chunk(int type, u32 off)
414 {
415 	switch (type) {
416 	case BFI_IMAGE_CT_FC:
417 		return bfi_image_ct_fc_get_chunk(off);	break;
418 	case BFI_IMAGE_CT_CNA:
419 		return bfi_image_ct_cna_get_chunk(off);	break;
420 	case BFI_IMAGE_CB_FC:
421 		return bfi_image_cb_fc_get_chunk(off);	break;
422 	default: return NULL;
423 	}
424 }
425 
426 static inline u32
bfa_cb_image_get_size(int type)427 bfa_cb_image_get_size(int type)
428 {
429 	switch (type) {
430 	case BFI_IMAGE_CT_FC:
431 		return bfi_image_ct_fc_size;	break;
432 	case BFI_IMAGE_CT_CNA:
433 		return bfi_image_ct_cna_size;	break;
434 	case BFI_IMAGE_CB_FC:
435 		return bfi_image_cb_fc_size;	break;
436 	default: return 0;
437 	}
438 }
439 
440 /*
441  * CNA TRCMOD declaration
442  */
443 /*
444  * !!! Only append to the enums defined here to avoid any versioning
445  * !!! needed between trace utility and driver version
446  */
447 enum {
448 	BFA_TRC_CNA_PORT	= 1,
449 	BFA_TRC_CNA_IOC		= 2,
450 	BFA_TRC_CNA_IOC_CB	= 3,
451 	BFA_TRC_CNA_IOC_CT	= 4,
452 };
453 
454 #endif /* __BFA_IOC_H__ */
455