1 /*
2
3 Broadcom B43 wireless driver
4
5 Transmission (TX/RX) related functions.
6
7 Copyright (C) 2005 Martin Langer <martin-langer@gmx.de>
8 Copyright (C) 2005 Stefano Brivio <stefano.brivio@polimi.it>
9 Copyright (C) 2005, 2006 Michael Buesch <mb@bu3sch.de>
10 Copyright (C) 2005 Danny van Dyk <kugelfang@gentoo.org>
11 Copyright (C) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
12
13 This program is free software; you can redistribute it and/or modify
14 it under the terms of the GNU General Public License as published by
15 the Free Software Foundation; either version 2 of the License, or
16 (at your option) any later version.
17
18 This program is distributed in the hope that it will be useful,
19 but WITHOUT ANY WARRANTY; without even the implied warranty of
20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 GNU General Public License for more details.
22
23 You should have received a copy of the GNU General Public License
24 along with this program; see the file COPYING. If not, write to
25 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
26 Boston, MA 02110-1301, USA.
27
28 */
29
30 #include "xmit.h"
31 #include "phy_common.h"
32 #include "dma.h"
33 #include "pio.h"
34
35 static const struct b43_tx_legacy_rate_phy_ctl_entry b43_tx_legacy_rate_phy_ctl[] = {
36 { B43_CCK_RATE_1MB, 0x0, 0x0 },
37 { B43_CCK_RATE_2MB, 0x0, 0x1 },
38 { B43_CCK_RATE_5MB, 0x0, 0x2 },
39 { B43_CCK_RATE_11MB, 0x0, 0x3 },
40 { B43_OFDM_RATE_6MB, B43_TXH_PHY1_CRATE_1_2, B43_TXH_PHY1_MODUL_BPSK },
41 { B43_OFDM_RATE_9MB, B43_TXH_PHY1_CRATE_3_4, B43_TXH_PHY1_MODUL_BPSK },
42 { B43_OFDM_RATE_12MB, B43_TXH_PHY1_CRATE_1_2, B43_TXH_PHY1_MODUL_QPSK },
43 { B43_OFDM_RATE_18MB, B43_TXH_PHY1_CRATE_3_4, B43_TXH_PHY1_MODUL_QPSK },
44 { B43_OFDM_RATE_24MB, B43_TXH_PHY1_CRATE_1_2, B43_TXH_PHY1_MODUL_QAM16 },
45 { B43_OFDM_RATE_36MB, B43_TXH_PHY1_CRATE_3_4, B43_TXH_PHY1_MODUL_QAM16 },
46 { B43_OFDM_RATE_48MB, B43_TXH_PHY1_CRATE_2_3, B43_TXH_PHY1_MODUL_QAM64 },
47 { B43_OFDM_RATE_54MB, B43_TXH_PHY1_CRATE_3_4, B43_TXH_PHY1_MODUL_QAM64 },
48 };
49
50 static const struct b43_tx_legacy_rate_phy_ctl_entry *
b43_tx_legacy_rate_phy_ctl_ent(u8 bitrate)51 b43_tx_legacy_rate_phy_ctl_ent(u8 bitrate)
52 {
53 const struct b43_tx_legacy_rate_phy_ctl_entry *e;
54 unsigned int i;
55
56 for (i = 0; i < ARRAY_SIZE(b43_tx_legacy_rate_phy_ctl); i++) {
57 e = &(b43_tx_legacy_rate_phy_ctl[i]);
58 if (e->bitrate == bitrate)
59 return e;
60 }
61
62 B43_WARN_ON(1);
63 return NULL;
64 }
65
66 /* Extract the bitrate index out of a CCK PLCP header. */
b43_plcp_get_bitrate_idx_cck(struct b43_plcp_hdr6 * plcp)67 static int b43_plcp_get_bitrate_idx_cck(struct b43_plcp_hdr6 *plcp)
68 {
69 switch (plcp->raw[0]) {
70 case 0x0A:
71 return 0;
72 case 0x14:
73 return 1;
74 case 0x37:
75 return 2;
76 case 0x6E:
77 return 3;
78 }
79 return -1;
80 }
81
82 /* Extract the bitrate index out of an OFDM PLCP header. */
b43_plcp_get_bitrate_idx_ofdm(struct b43_plcp_hdr6 * plcp,bool aphy)83 static int b43_plcp_get_bitrate_idx_ofdm(struct b43_plcp_hdr6 *plcp, bool aphy)
84 {
85 int base = aphy ? 0 : 4;
86
87 switch (plcp->raw[0] & 0xF) {
88 case 0xB:
89 return base + 0;
90 case 0xF:
91 return base + 1;
92 case 0xA:
93 return base + 2;
94 case 0xE:
95 return base + 3;
96 case 0x9:
97 return base + 4;
98 case 0xD:
99 return base + 5;
100 case 0x8:
101 return base + 6;
102 case 0xC:
103 return base + 7;
104 }
105 return -1;
106 }
107
b43_plcp_get_ratecode_cck(const u8 bitrate)108 u8 b43_plcp_get_ratecode_cck(const u8 bitrate)
109 {
110 switch (bitrate) {
111 case B43_CCK_RATE_1MB:
112 return 0x0A;
113 case B43_CCK_RATE_2MB:
114 return 0x14;
115 case B43_CCK_RATE_5MB:
116 return 0x37;
117 case B43_CCK_RATE_11MB:
118 return 0x6E;
119 }
120 B43_WARN_ON(1);
121 return 0;
122 }
123
b43_plcp_get_ratecode_ofdm(const u8 bitrate)124 u8 b43_plcp_get_ratecode_ofdm(const u8 bitrate)
125 {
126 switch (bitrate) {
127 case B43_OFDM_RATE_6MB:
128 return 0xB;
129 case B43_OFDM_RATE_9MB:
130 return 0xF;
131 case B43_OFDM_RATE_12MB:
132 return 0xA;
133 case B43_OFDM_RATE_18MB:
134 return 0xE;
135 case B43_OFDM_RATE_24MB:
136 return 0x9;
137 case B43_OFDM_RATE_36MB:
138 return 0xD;
139 case B43_OFDM_RATE_48MB:
140 return 0x8;
141 case B43_OFDM_RATE_54MB:
142 return 0xC;
143 }
144 B43_WARN_ON(1);
145 return 0;
146 }
147
b43_generate_plcp_hdr(struct b43_plcp_hdr4 * plcp,const u16 octets,const u8 bitrate)148 void b43_generate_plcp_hdr(struct b43_plcp_hdr4 *plcp,
149 const u16 octets, const u8 bitrate)
150 {
151 __u8 *raw = plcp->raw;
152
153 if (b43_is_ofdm_rate(bitrate)) {
154 u32 d;
155
156 d = b43_plcp_get_ratecode_ofdm(bitrate);
157 B43_WARN_ON(octets & 0xF000);
158 d |= (octets << 5);
159 plcp->data = cpu_to_le32(d);
160 } else {
161 u32 plen;
162
163 plen = octets * 16 / bitrate;
164 if ((octets * 16 % bitrate) > 0) {
165 plen++;
166 if ((bitrate == B43_CCK_RATE_11MB)
167 && ((octets * 8 % 11) < 4)) {
168 raw[1] = 0x84;
169 } else
170 raw[1] = 0x04;
171 } else
172 raw[1] = 0x04;
173 plcp->data |= cpu_to_le32(plen << 16);
174 raw[0] = b43_plcp_get_ratecode_cck(bitrate);
175 }
176 }
177
b43_generate_tx_phy_ctl1(struct b43_wldev * dev,u8 bitrate)178 static u16 b43_generate_tx_phy_ctl1(struct b43_wldev *dev, u8 bitrate)
179 {
180 const struct b43_phy *phy = &dev->phy;
181 const struct b43_tx_legacy_rate_phy_ctl_entry *e;
182 u16 control = 0;
183 u16 bw;
184
185 if (phy->type == B43_PHYTYPE_LP)
186 bw = B43_TXH_PHY1_BW_20;
187 else /* FIXME */
188 bw = B43_TXH_PHY1_BW_20;
189
190 if (0) { /* FIXME: MIMO */
191 } else if (b43_is_cck_rate(bitrate) && phy->type != B43_PHYTYPE_LP) {
192 control = bw;
193 } else {
194 control = bw;
195 e = b43_tx_legacy_rate_phy_ctl_ent(bitrate);
196 if (e) {
197 control |= e->coding_rate;
198 control |= e->modulation;
199 }
200 control |= B43_TXH_PHY1_MODE_SISO;
201 }
202
203 return control;
204 }
205
b43_calc_fallback_rate(u8 bitrate)206 static u8 b43_calc_fallback_rate(u8 bitrate)
207 {
208 switch (bitrate) {
209 case B43_CCK_RATE_1MB:
210 return B43_CCK_RATE_1MB;
211 case B43_CCK_RATE_2MB:
212 return B43_CCK_RATE_1MB;
213 case B43_CCK_RATE_5MB:
214 return B43_CCK_RATE_2MB;
215 case B43_CCK_RATE_11MB:
216 return B43_CCK_RATE_5MB;
217 case B43_OFDM_RATE_6MB:
218 return B43_CCK_RATE_5MB;
219 case B43_OFDM_RATE_9MB:
220 return B43_OFDM_RATE_6MB;
221 case B43_OFDM_RATE_12MB:
222 return B43_OFDM_RATE_9MB;
223 case B43_OFDM_RATE_18MB:
224 return B43_OFDM_RATE_12MB;
225 case B43_OFDM_RATE_24MB:
226 return B43_OFDM_RATE_18MB;
227 case B43_OFDM_RATE_36MB:
228 return B43_OFDM_RATE_24MB;
229 case B43_OFDM_RATE_48MB:
230 return B43_OFDM_RATE_36MB;
231 case B43_OFDM_RATE_54MB:
232 return B43_OFDM_RATE_48MB;
233 }
234 B43_WARN_ON(1);
235 return 0;
236 }
237
238 /* Generate a TX data header. */
b43_generate_txhdr(struct b43_wldev * dev,u8 * _txhdr,struct sk_buff * skb_frag,struct ieee80211_tx_info * info,u16 cookie)239 int b43_generate_txhdr(struct b43_wldev *dev,
240 u8 *_txhdr,
241 struct sk_buff *skb_frag,
242 struct ieee80211_tx_info *info,
243 u16 cookie)
244 {
245 const unsigned char *fragment_data = skb_frag->data;
246 unsigned int fragment_len = skb_frag->len;
247 struct b43_txhdr *txhdr = (struct b43_txhdr *)_txhdr;
248 const struct b43_phy *phy = &dev->phy;
249 const struct ieee80211_hdr *wlhdr =
250 (const struct ieee80211_hdr *)fragment_data;
251 int use_encryption = !!info->control.hw_key;
252 __le16 fctl = wlhdr->frame_control;
253 struct ieee80211_rate *fbrate;
254 u8 rate, rate_fb;
255 int rate_ofdm, rate_fb_ofdm;
256 unsigned int plcp_fragment_len;
257 u32 mac_ctl = 0;
258 u16 phy_ctl = 0;
259 u8 extra_ft = 0;
260 struct ieee80211_rate *txrate;
261 struct ieee80211_tx_rate *rates;
262
263 memset(txhdr, 0, sizeof(*txhdr));
264
265 txrate = ieee80211_get_tx_rate(dev->wl->hw, info);
266 rate = txrate ? txrate->hw_value : B43_CCK_RATE_1MB;
267 rate_ofdm = b43_is_ofdm_rate(rate);
268 fbrate = ieee80211_get_alt_retry_rate(dev->wl->hw, info, 0) ? : txrate;
269 rate_fb = fbrate->hw_value;
270 rate_fb_ofdm = b43_is_ofdm_rate(rate_fb);
271
272 if (rate_ofdm)
273 txhdr->phy_rate = b43_plcp_get_ratecode_ofdm(rate);
274 else
275 txhdr->phy_rate = b43_plcp_get_ratecode_cck(rate);
276 txhdr->mac_frame_ctl = wlhdr->frame_control;
277 memcpy(txhdr->tx_receiver, wlhdr->addr1, 6);
278
279 /* Calculate duration for fallback rate */
280 if ((rate_fb == rate) ||
281 (wlhdr->duration_id & cpu_to_le16(0x8000)) ||
282 (wlhdr->duration_id == cpu_to_le16(0))) {
283 /* If the fallback rate equals the normal rate or the
284 * dur_id field contains an AID, CFP magic or 0,
285 * use the original dur_id field. */
286 txhdr->dur_fb = wlhdr->duration_id;
287 } else {
288 txhdr->dur_fb = ieee80211_generic_frame_duration(
289 dev->wl->hw, info->control.vif, fragment_len, fbrate);
290 }
291
292 plcp_fragment_len = fragment_len + FCS_LEN;
293 if (use_encryption) {
294 u8 key_idx = info->control.hw_key->hw_key_idx;
295 struct b43_key *key;
296 int wlhdr_len;
297 size_t iv_len;
298
299 B43_WARN_ON(key_idx >= ARRAY_SIZE(dev->key));
300 key = &(dev->key[key_idx]);
301
302 if (unlikely(!key->keyconf)) {
303 /* This key is invalid. This might only happen
304 * in a short timeframe after machine resume before
305 * we were able to reconfigure keys.
306 * Drop this packet completely. Do not transmit it
307 * unencrypted to avoid leaking information. */
308 return -ENOKEY;
309 }
310
311 /* Hardware appends ICV. */
312 plcp_fragment_len += info->control.hw_key->icv_len;
313
314 key_idx = b43_kidx_to_fw(dev, key_idx);
315 mac_ctl |= (key_idx << B43_TXH_MAC_KEYIDX_SHIFT) &
316 B43_TXH_MAC_KEYIDX;
317 mac_ctl |= (key->algorithm << B43_TXH_MAC_KEYALG_SHIFT) &
318 B43_TXH_MAC_KEYALG;
319 wlhdr_len = ieee80211_hdrlen(fctl);
320 if (key->algorithm == B43_SEC_ALGO_TKIP) {
321 u16 phase1key[5];
322 int i;
323 /* we give the phase1key and iv16 here, the key is stored in
324 * shm. With that the hardware can do phase 2 and encryption.
325 */
326 ieee80211_get_tkip_key(info->control.hw_key, skb_frag,
327 IEEE80211_TKIP_P1_KEY, (u8*)phase1key);
328 /* phase1key is in host endian. Copy to little-endian txhdr->iv. */
329 for (i = 0; i < 5; i++) {
330 txhdr->iv[i * 2 + 0] = phase1key[i];
331 txhdr->iv[i * 2 + 1] = phase1key[i] >> 8;
332 }
333 /* iv16 */
334 memcpy(txhdr->iv + 10, ((u8 *) wlhdr) + wlhdr_len, 3);
335 } else {
336 iv_len = min((size_t) info->control.hw_key->iv_len,
337 ARRAY_SIZE(txhdr->iv));
338 memcpy(txhdr->iv, ((u8 *) wlhdr) + wlhdr_len, iv_len);
339 }
340 }
341 if (b43_is_old_txhdr_format(dev)) {
342 b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)(&txhdr->old_format.plcp),
343 plcp_fragment_len, rate);
344 } else {
345 b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)(&txhdr->new_format.plcp),
346 plcp_fragment_len, rate);
347 }
348 b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)(&txhdr->plcp_fb),
349 plcp_fragment_len, rate_fb);
350
351 /* Extra Frame Types */
352 if (rate_fb_ofdm)
353 extra_ft |= B43_TXH_EFT_FB_OFDM;
354 else
355 extra_ft |= B43_TXH_EFT_FB_CCK;
356
357 /* Set channel radio code. Note that the micrcode ORs 0x100 to
358 * this value before comparing it to the value in SHM, if this
359 * is a 5Ghz packet.
360 */
361 txhdr->chan_radio_code = phy->channel;
362
363 /* PHY TX Control word */
364 if (rate_ofdm)
365 phy_ctl |= B43_TXH_PHY_ENC_OFDM;
366 else
367 phy_ctl |= B43_TXH_PHY_ENC_CCK;
368 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
369 phy_ctl |= B43_TXH_PHY_SHORTPRMBL;
370
371 switch (b43_ieee80211_antenna_sanitize(dev, info->antenna_sel_tx)) {
372 case 0: /* Default */
373 phy_ctl |= B43_TXH_PHY_ANT01AUTO;
374 break;
375 case 1: /* Antenna 0 */
376 phy_ctl |= B43_TXH_PHY_ANT0;
377 break;
378 case 2: /* Antenna 1 */
379 phy_ctl |= B43_TXH_PHY_ANT1;
380 break;
381 case 3: /* Antenna 2 */
382 phy_ctl |= B43_TXH_PHY_ANT2;
383 break;
384 case 4: /* Antenna 3 */
385 phy_ctl |= B43_TXH_PHY_ANT3;
386 break;
387 default:
388 B43_WARN_ON(1);
389 }
390
391 rates = info->control.rates;
392 /* MAC control */
393 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK))
394 mac_ctl |= B43_TXH_MAC_ACK;
395 /* use hardware sequence counter as the non-TID counter */
396 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ)
397 mac_ctl |= B43_TXH_MAC_HWSEQ;
398 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
399 mac_ctl |= B43_TXH_MAC_STMSDU;
400 if (phy->type == B43_PHYTYPE_A)
401 mac_ctl |= B43_TXH_MAC_5GHZ;
402
403 /* Overwrite rates[0].count to make the retry calculation
404 * in the tx status easier. need the actual retry limit to
405 * detect whether the fallback rate was used.
406 */
407 if ((rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) ||
408 (rates[0].count <= dev->wl->hw->conf.long_frame_max_tx_count)) {
409 rates[0].count = dev->wl->hw->conf.long_frame_max_tx_count;
410 mac_ctl |= B43_TXH_MAC_LONGFRAME;
411 } else {
412 rates[0].count = dev->wl->hw->conf.short_frame_max_tx_count;
413 }
414
415 /* Generate the RTS or CTS-to-self frame */
416 if ((rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) ||
417 (rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT)) {
418 unsigned int len;
419 struct ieee80211_hdr *hdr;
420 int rts_rate, rts_rate_fb;
421 int rts_rate_ofdm, rts_rate_fb_ofdm;
422 struct b43_plcp_hdr6 *plcp;
423 struct ieee80211_rate *rts_cts_rate;
424
425 rts_cts_rate = ieee80211_get_rts_cts_rate(dev->wl->hw, info);
426
427 rts_rate = rts_cts_rate ? rts_cts_rate->hw_value : B43_CCK_RATE_1MB;
428 rts_rate_ofdm = b43_is_ofdm_rate(rts_rate);
429 rts_rate_fb = b43_calc_fallback_rate(rts_rate);
430 rts_rate_fb_ofdm = b43_is_ofdm_rate(rts_rate_fb);
431
432 if (rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
433 struct ieee80211_cts *cts;
434
435 if (b43_is_old_txhdr_format(dev)) {
436 cts = (struct ieee80211_cts *)
437 (txhdr->old_format.rts_frame);
438 } else {
439 cts = (struct ieee80211_cts *)
440 (txhdr->new_format.rts_frame);
441 }
442 ieee80211_ctstoself_get(dev->wl->hw, info->control.vif,
443 fragment_data, fragment_len,
444 info, cts);
445 mac_ctl |= B43_TXH_MAC_SENDCTS;
446 len = sizeof(struct ieee80211_cts);
447 } else {
448 struct ieee80211_rts *rts;
449
450 if (b43_is_old_txhdr_format(dev)) {
451 rts = (struct ieee80211_rts *)
452 (txhdr->old_format.rts_frame);
453 } else {
454 rts = (struct ieee80211_rts *)
455 (txhdr->new_format.rts_frame);
456 }
457 ieee80211_rts_get(dev->wl->hw, info->control.vif,
458 fragment_data, fragment_len,
459 info, rts);
460 mac_ctl |= B43_TXH_MAC_SENDRTS;
461 len = sizeof(struct ieee80211_rts);
462 }
463 len += FCS_LEN;
464
465 /* Generate the PLCP headers for the RTS/CTS frame */
466 if (b43_is_old_txhdr_format(dev))
467 plcp = &txhdr->old_format.rts_plcp;
468 else
469 plcp = &txhdr->new_format.rts_plcp;
470 b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)plcp,
471 len, rts_rate);
472 plcp = &txhdr->rts_plcp_fb;
473 b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)plcp,
474 len, rts_rate_fb);
475
476 if (b43_is_old_txhdr_format(dev)) {
477 hdr = (struct ieee80211_hdr *)
478 (&txhdr->old_format.rts_frame);
479 } else {
480 hdr = (struct ieee80211_hdr *)
481 (&txhdr->new_format.rts_frame);
482 }
483 txhdr->rts_dur_fb = hdr->duration_id;
484
485 if (rts_rate_ofdm) {
486 extra_ft |= B43_TXH_EFT_RTS_OFDM;
487 txhdr->phy_rate_rts =
488 b43_plcp_get_ratecode_ofdm(rts_rate);
489 } else {
490 extra_ft |= B43_TXH_EFT_RTS_CCK;
491 txhdr->phy_rate_rts =
492 b43_plcp_get_ratecode_cck(rts_rate);
493 }
494 if (rts_rate_fb_ofdm)
495 extra_ft |= B43_TXH_EFT_RTSFB_OFDM;
496 else
497 extra_ft |= B43_TXH_EFT_RTSFB_CCK;
498
499 if (rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS &&
500 phy->type == B43_PHYTYPE_N) {
501 txhdr->phy_ctl1_rts = cpu_to_le16(
502 b43_generate_tx_phy_ctl1(dev, rts_rate));
503 txhdr->phy_ctl1_rts_fb = cpu_to_le16(
504 b43_generate_tx_phy_ctl1(dev, rts_rate_fb));
505 }
506 }
507
508 /* Magic cookie */
509 if (b43_is_old_txhdr_format(dev))
510 txhdr->old_format.cookie = cpu_to_le16(cookie);
511 else
512 txhdr->new_format.cookie = cpu_to_le16(cookie);
513
514 if (phy->type == B43_PHYTYPE_N) {
515 txhdr->phy_ctl1 =
516 cpu_to_le16(b43_generate_tx_phy_ctl1(dev, rate));
517 txhdr->phy_ctl1_fb =
518 cpu_to_le16(b43_generate_tx_phy_ctl1(dev, rate_fb));
519 }
520
521 /* Apply the bitfields */
522 txhdr->mac_ctl = cpu_to_le32(mac_ctl);
523 txhdr->phy_ctl = cpu_to_le16(phy_ctl);
524 txhdr->extra_ft = extra_ft;
525
526 return 0;
527 }
528
b43_rssi_postprocess(struct b43_wldev * dev,u8 in_rssi,int ofdm,int adjust_2053,int adjust_2050)529 static s8 b43_rssi_postprocess(struct b43_wldev *dev,
530 u8 in_rssi, int ofdm,
531 int adjust_2053, int adjust_2050)
532 {
533 struct b43_phy *phy = &dev->phy;
534 struct b43_phy_g *gphy = phy->g;
535 s32 tmp;
536
537 switch (phy->radio_ver) {
538 case 0x2050:
539 if (ofdm) {
540 tmp = in_rssi;
541 if (tmp > 127)
542 tmp -= 256;
543 tmp *= 73;
544 tmp /= 64;
545 if (adjust_2050)
546 tmp += 25;
547 else
548 tmp -= 3;
549 } else {
550 if (dev->dev->bus->sprom.
551 boardflags_lo & B43_BFL_RSSI) {
552 if (in_rssi > 63)
553 in_rssi = 63;
554 B43_WARN_ON(phy->type != B43_PHYTYPE_G);
555 tmp = gphy->nrssi_lt[in_rssi];
556 tmp = 31 - tmp;
557 tmp *= -131;
558 tmp /= 128;
559 tmp -= 57;
560 } else {
561 tmp = in_rssi;
562 tmp = 31 - tmp;
563 tmp *= -149;
564 tmp /= 128;
565 tmp -= 68;
566 }
567 if (phy->type == B43_PHYTYPE_G && adjust_2050)
568 tmp += 25;
569 }
570 break;
571 case 0x2060:
572 if (in_rssi > 127)
573 tmp = in_rssi - 256;
574 else
575 tmp = in_rssi;
576 break;
577 default:
578 tmp = in_rssi;
579 tmp -= 11;
580 tmp *= 103;
581 tmp /= 64;
582 if (adjust_2053)
583 tmp -= 109;
584 else
585 tmp -= 83;
586 }
587
588 return (s8) tmp;
589 }
590
591 //TODO
592 #if 0
593 static s8 b43_rssinoise_postprocess(struct b43_wldev *dev, u8 in_rssi)
594 {
595 struct b43_phy *phy = &dev->phy;
596 s8 ret;
597
598 if (phy->type == B43_PHYTYPE_A) {
599 //TODO: Incomplete specs.
600 ret = 0;
601 } else
602 ret = b43_rssi_postprocess(dev, in_rssi, 0, 1, 1);
603
604 return ret;
605 }
606 #endif
607
b43_rx(struct b43_wldev * dev,struct sk_buff * skb,const void * _rxhdr)608 void b43_rx(struct b43_wldev *dev, struct sk_buff *skb, const void *_rxhdr)
609 {
610 struct ieee80211_rx_status status;
611 struct b43_plcp_hdr6 *plcp;
612 struct ieee80211_hdr *wlhdr;
613 const struct b43_rxhdr_fw4 *rxhdr = _rxhdr;
614 __le16 fctl;
615 u16 phystat0, phystat3, chanstat, mactime;
616 u32 macstat;
617 u16 chanid;
618 u16 phytype;
619 int padding;
620
621 memset(&status, 0, sizeof(status));
622
623 /* Get metadata about the frame from the header. */
624 phystat0 = le16_to_cpu(rxhdr->phy_status0);
625 phystat3 = le16_to_cpu(rxhdr->phy_status3);
626 macstat = le32_to_cpu(rxhdr->mac_status);
627 mactime = le16_to_cpu(rxhdr->mac_time);
628 chanstat = le16_to_cpu(rxhdr->channel);
629 phytype = chanstat & B43_RX_CHAN_PHYTYPE;
630
631 if (unlikely(macstat & B43_RX_MAC_FCSERR)) {
632 dev->wl->ieee_stats.dot11FCSErrorCount++;
633 status.flag |= RX_FLAG_FAILED_FCS_CRC;
634 }
635 if (unlikely(phystat0 & (B43_RX_PHYST0_PLCPHCF | B43_RX_PHYST0_PLCPFV)))
636 status.flag |= RX_FLAG_FAILED_PLCP_CRC;
637 if (phystat0 & B43_RX_PHYST0_SHORTPRMBL)
638 status.flag |= RX_FLAG_SHORTPRE;
639 if (macstat & B43_RX_MAC_DECERR) {
640 /* Decryption with the given key failed.
641 * Drop the packet. We also won't be able to decrypt it with
642 * the key in software. */
643 goto drop;
644 }
645
646 /* Skip PLCP and padding */
647 padding = (macstat & B43_RX_MAC_PADDING) ? 2 : 0;
648 if (unlikely(skb->len < (sizeof(struct b43_plcp_hdr6) + padding))) {
649 b43dbg(dev->wl, "RX: Packet size underrun (1)\n");
650 goto drop;
651 }
652 plcp = (struct b43_plcp_hdr6 *)(skb->data + padding);
653 skb_pull(skb, sizeof(struct b43_plcp_hdr6) + padding);
654 /* The skb contains the Wireless Header + payload data now */
655 if (unlikely(skb->len < (2 + 2 + 6 /*minimum hdr */ + FCS_LEN))) {
656 b43dbg(dev->wl, "RX: Packet size underrun (2)\n");
657 goto drop;
658 }
659 wlhdr = (struct ieee80211_hdr *)(skb->data);
660 fctl = wlhdr->frame_control;
661
662 if (macstat & B43_RX_MAC_DEC) {
663 unsigned int keyidx;
664 int wlhdr_len;
665
666 keyidx = ((macstat & B43_RX_MAC_KEYIDX)
667 >> B43_RX_MAC_KEYIDX_SHIFT);
668 /* We must adjust the key index here. We want the "physical"
669 * key index, but the ucode passed it slightly different.
670 */
671 keyidx = b43_kidx_to_raw(dev, keyidx);
672 B43_WARN_ON(keyidx >= ARRAY_SIZE(dev->key));
673
674 if (dev->key[keyidx].algorithm != B43_SEC_ALGO_NONE) {
675 wlhdr_len = ieee80211_hdrlen(fctl);
676 if (unlikely(skb->len < (wlhdr_len + 3))) {
677 b43dbg(dev->wl,
678 "RX: Packet size underrun (3)\n");
679 goto drop;
680 }
681 status.flag |= RX_FLAG_DECRYPTED;
682 }
683 }
684
685 /* Link quality statistics */
686 if ((chanstat & B43_RX_CHAN_PHYTYPE) == B43_PHYTYPE_N) {
687 // s8 rssi = max(rxhdr->power0, rxhdr->power1);
688 //TODO: Find out what the rssi value is (dBm or percentage?)
689 // and also find out what the maximum possible value is.
690 // Fill status.ssi and status.signal fields.
691 } else {
692 status.signal = b43_rssi_postprocess(dev, rxhdr->jssi,
693 (phystat0 & B43_RX_PHYST0_OFDM),
694 (phystat0 & B43_RX_PHYST0_GAINCTL),
695 (phystat3 & B43_RX_PHYST3_TRSTATE));
696 }
697
698 if (phystat0 & B43_RX_PHYST0_OFDM)
699 status.rate_idx = b43_plcp_get_bitrate_idx_ofdm(plcp,
700 phytype == B43_PHYTYPE_A);
701 else
702 status.rate_idx = b43_plcp_get_bitrate_idx_cck(plcp);
703 if (unlikely(status.rate_idx == -1)) {
704 /* PLCP seems to be corrupted.
705 * Drop the frame, if we are not interested in corrupted frames. */
706 if (!(dev->wl->filter_flags & FIF_PLCPFAIL))
707 goto drop;
708 }
709 status.antenna = !!(phystat0 & B43_RX_PHYST0_ANT);
710
711 /*
712 * All frames on monitor interfaces and beacons always need a full
713 * 64-bit timestamp. Monitor interfaces need it for diagnostic
714 * purposes and beacons for IBSS merging.
715 * This code assumes we get to process the packet within 16 bits
716 * of timestamp, i.e. about 65 milliseconds after the PHY received
717 * the first symbol.
718 */
719 if (ieee80211_is_beacon(fctl) || dev->wl->radiotap_enabled) {
720 u16 low_mactime_now;
721
722 b43_tsf_read(dev, &status.mactime);
723 low_mactime_now = status.mactime;
724 status.mactime = status.mactime & ~0xFFFFULL;
725 status.mactime += mactime;
726 if (low_mactime_now <= mactime)
727 status.mactime -= 0x10000;
728 status.flag |= RX_FLAG_MACTIME_MPDU;
729 }
730
731 chanid = (chanstat & B43_RX_CHAN_ID) >> B43_RX_CHAN_ID_SHIFT;
732 switch (chanstat & B43_RX_CHAN_PHYTYPE) {
733 case B43_PHYTYPE_A:
734 status.band = IEEE80211_BAND_5GHZ;
735 B43_WARN_ON(1);
736 /* FIXME: We don't really know which value the "chanid" contains.
737 * So the following assignment might be wrong. */
738 status.freq = b43_channel_to_freq_5ghz(chanid);
739 break;
740 case B43_PHYTYPE_G:
741 status.band = IEEE80211_BAND_2GHZ;
742 /* chanid is the radio channel cookie value as used
743 * to tune the radio. */
744 status.freq = chanid + 2400;
745 break;
746 case B43_PHYTYPE_N:
747 case B43_PHYTYPE_LP:
748 /* chanid is the SHM channel cookie. Which is the plain
749 * channel number in b43. */
750 if (chanstat & B43_RX_CHAN_5GHZ) {
751 status.band = IEEE80211_BAND_5GHZ;
752 status.freq = b43_freq_to_channel_5ghz(chanid);
753 } else {
754 status.band = IEEE80211_BAND_2GHZ;
755 status.freq = b43_freq_to_channel_2ghz(chanid);
756 }
757 break;
758 default:
759 B43_WARN_ON(1);
760 goto drop;
761 }
762
763 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
764 ieee80211_rx_ni(dev->wl->hw, skb);
765
766 #if B43_DEBUG
767 dev->rx_count++;
768 #endif
769 return;
770 drop:
771 b43dbg(dev->wl, "RX: Packet dropped\n");
772 dev_kfree_skb_any(skb);
773 }
774
b43_handle_txstatus(struct b43_wldev * dev,const struct b43_txstatus * status)775 void b43_handle_txstatus(struct b43_wldev *dev,
776 const struct b43_txstatus *status)
777 {
778 b43_debugfs_log_txstat(dev, status);
779
780 if (status->intermediate)
781 return;
782 if (status->for_ampdu)
783 return;
784 if (!status->acked)
785 dev->wl->ieee_stats.dot11ACKFailureCount++;
786 if (status->rts_count) {
787 if (status->rts_count == 0xF) //FIXME
788 dev->wl->ieee_stats.dot11RTSFailureCount++;
789 else
790 dev->wl->ieee_stats.dot11RTSSuccessCount++;
791 }
792
793 if (b43_using_pio_transfers(dev))
794 b43_pio_handle_txstatus(dev, status);
795 else
796 b43_dma_handle_txstatus(dev, status);
797
798 b43_phy_txpower_check(dev, 0);
799 }
800
801 /* Fill out the mac80211 TXstatus report based on the b43-specific
802 * txstatus report data. This returns a boolean whether the frame was
803 * successfully transmitted. */
b43_fill_txstatus_report(struct b43_wldev * dev,struct ieee80211_tx_info * report,const struct b43_txstatus * status)804 bool b43_fill_txstatus_report(struct b43_wldev *dev,
805 struct ieee80211_tx_info *report,
806 const struct b43_txstatus *status)
807 {
808 bool frame_success = 1;
809 int retry_limit;
810
811 /* preserve the confiured retry limit before clearing the status
812 * The xmit function has overwritten the rc's value with the actual
813 * retry limit done by the hardware */
814 retry_limit = report->status.rates[0].count;
815 ieee80211_tx_info_clear_status(report);
816
817 if (status->acked) {
818 /* The frame was ACKed. */
819 report->flags |= IEEE80211_TX_STAT_ACK;
820 } else {
821 /* The frame was not ACKed... */
822 if (!(report->flags & IEEE80211_TX_CTL_NO_ACK)) {
823 /* ...but we expected an ACK. */
824 frame_success = 0;
825 }
826 }
827 if (status->frame_count == 0) {
828 /* The frame was not transmitted at all. */
829 report->status.rates[0].count = 0;
830 } else if (status->rts_count > dev->wl->hw->conf.short_frame_max_tx_count) {
831 /*
832 * If the short retries (RTS, not data frame) have exceeded
833 * the limit, the hw will not have tried the selected rate,
834 * but will have used the fallback rate instead.
835 * Don't let the rate control count attempts for the selected
836 * rate in this case, otherwise the statistics will be off.
837 */
838 report->status.rates[0].count = 0;
839 report->status.rates[1].count = status->frame_count;
840 } else {
841 if (status->frame_count > retry_limit) {
842 report->status.rates[0].count = retry_limit;
843 report->status.rates[1].count = status->frame_count -
844 retry_limit;
845
846 } else {
847 report->status.rates[0].count = status->frame_count;
848 report->status.rates[1].idx = -1;
849 }
850 }
851
852 return frame_success;
853 }
854
855 /* Stop any TX operation on the device (suspend the hardware queues) */
b43_tx_suspend(struct b43_wldev * dev)856 void b43_tx_suspend(struct b43_wldev *dev)
857 {
858 if (b43_using_pio_transfers(dev))
859 b43_pio_tx_suspend(dev);
860 else
861 b43_dma_tx_suspend(dev);
862 }
863
864 /* Resume any TX operation on the device (resume the hardware queues) */
b43_tx_resume(struct b43_wldev * dev)865 void b43_tx_resume(struct b43_wldev *dev)
866 {
867 if (b43_using_pio_transfers(dev))
868 b43_pio_tx_resume(dev);
869 else
870 b43_dma_tx_resume(dev);
871 }
872