1 /*
2 * Copyright (c) 2008-2011 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17 #include <linux/nl80211.h>
18 #include <linux/delay.h>
19 #include "ath9k.h"
20 #include "btcoex.h"
21
parse_mpdudensity(u8 mpdudensity)22 static u8 parse_mpdudensity(u8 mpdudensity)
23 {
24 /*
25 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
26 * 0 for no restriction
27 * 1 for 1/4 us
28 * 2 for 1/2 us
29 * 3 for 1 us
30 * 4 for 2 us
31 * 5 for 4 us
32 * 6 for 8 us
33 * 7 for 16 us
34 */
35 switch (mpdudensity) {
36 case 0:
37 return 0;
38 case 1:
39 case 2:
40 case 3:
41 /* Our lower layer calculations limit our precision to
42 1 microsecond */
43 return 1;
44 case 4:
45 return 2;
46 case 5:
47 return 4;
48 case 6:
49 return 8;
50 case 7:
51 return 16;
52 default:
53 return 0;
54 }
55 }
56
ath9k_has_pending_frames(struct ath_softc * sc,struct ath_txq * txq)57 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
58 {
59 bool pending = false;
60
61 spin_lock_bh(&txq->axq_lock);
62
63 if (txq->axq_depth || !list_empty(&txq->axq_acq))
64 pending = true;
65
66 spin_unlock_bh(&txq->axq_lock);
67 return pending;
68 }
69
ath9k_setpower(struct ath_softc * sc,enum ath9k_power_mode mode)70 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
71 {
72 unsigned long flags;
73 bool ret;
74
75 spin_lock_irqsave(&sc->sc_pm_lock, flags);
76 ret = ath9k_hw_setpower(sc->sc_ah, mode);
77 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
78
79 return ret;
80 }
81
ath9k_ps_wakeup(struct ath_softc * sc)82 void ath9k_ps_wakeup(struct ath_softc *sc)
83 {
84 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
85 unsigned long flags;
86 enum ath9k_power_mode power_mode;
87
88 spin_lock_irqsave(&sc->sc_pm_lock, flags);
89 if (++sc->ps_usecount != 1)
90 goto unlock;
91
92 power_mode = sc->sc_ah->power_mode;
93 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
94
95 /*
96 * While the hardware is asleep, the cycle counters contain no
97 * useful data. Better clear them now so that they don't mess up
98 * survey data results.
99 */
100 if (power_mode != ATH9K_PM_AWAKE) {
101 spin_lock(&common->cc_lock);
102 ath_hw_cycle_counters_update(common);
103 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
104 spin_unlock(&common->cc_lock);
105 }
106
107 unlock:
108 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
109 }
110
ath9k_ps_restore(struct ath_softc * sc)111 void ath9k_ps_restore(struct ath_softc *sc)
112 {
113 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
114 enum ath9k_power_mode mode;
115 unsigned long flags;
116
117 spin_lock_irqsave(&sc->sc_pm_lock, flags);
118 if (--sc->ps_usecount != 0)
119 goto unlock;
120
121 if (sc->ps_idle && (sc->ps_flags & PS_WAIT_FOR_TX_ACK))
122 mode = ATH9K_PM_FULL_SLEEP;
123 else if (sc->ps_enabled &&
124 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
125 PS_WAIT_FOR_CAB |
126 PS_WAIT_FOR_PSPOLL_DATA |
127 PS_WAIT_FOR_TX_ACK)))
128 mode = ATH9K_PM_NETWORK_SLEEP;
129 else
130 goto unlock;
131
132 spin_lock(&common->cc_lock);
133 ath_hw_cycle_counters_update(common);
134 spin_unlock(&common->cc_lock);
135
136 ath9k_hw_setpower(sc->sc_ah, mode);
137
138 unlock:
139 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
140 }
141
ath_start_ani(struct ath_common * common)142 void ath_start_ani(struct ath_common *common)
143 {
144 struct ath_hw *ah = common->ah;
145 unsigned long timestamp = jiffies_to_msecs(jiffies);
146 struct ath_softc *sc = (struct ath_softc *) common->priv;
147
148 if (!(sc->sc_flags & SC_OP_ANI_RUN))
149 return;
150
151 if (sc->sc_flags & SC_OP_OFFCHANNEL)
152 return;
153
154 common->ani.longcal_timer = timestamp;
155 common->ani.shortcal_timer = timestamp;
156 common->ani.checkani_timer = timestamp;
157
158 mod_timer(&common->ani.timer,
159 jiffies +
160 msecs_to_jiffies((u32)ah->config.ani_poll_interval));
161 }
162
ath_update_survey_nf(struct ath_softc * sc,int channel)163 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
164 {
165 struct ath_hw *ah = sc->sc_ah;
166 struct ath9k_channel *chan = &ah->channels[channel];
167 struct survey_info *survey = &sc->survey[channel];
168
169 if (chan->noisefloor) {
170 survey->filled |= SURVEY_INFO_NOISE_DBM;
171 survey->noise = ath9k_hw_getchan_noise(ah, chan);
172 }
173 }
174
175 /*
176 * Updates the survey statistics and returns the busy time since last
177 * update in %, if the measurement duration was long enough for the
178 * result to be useful, -1 otherwise.
179 */
ath_update_survey_stats(struct ath_softc * sc)180 static int ath_update_survey_stats(struct ath_softc *sc)
181 {
182 struct ath_hw *ah = sc->sc_ah;
183 struct ath_common *common = ath9k_hw_common(ah);
184 int pos = ah->curchan - &ah->channels[0];
185 struct survey_info *survey = &sc->survey[pos];
186 struct ath_cycle_counters *cc = &common->cc_survey;
187 unsigned int div = common->clockrate * 1000;
188 int ret = 0;
189
190 if (!ah->curchan)
191 return -1;
192
193 if (ah->power_mode == ATH9K_PM_AWAKE)
194 ath_hw_cycle_counters_update(common);
195
196 if (cc->cycles > 0) {
197 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
198 SURVEY_INFO_CHANNEL_TIME_BUSY |
199 SURVEY_INFO_CHANNEL_TIME_RX |
200 SURVEY_INFO_CHANNEL_TIME_TX;
201 survey->channel_time += cc->cycles / div;
202 survey->channel_time_busy += cc->rx_busy / div;
203 survey->channel_time_rx += cc->rx_frame / div;
204 survey->channel_time_tx += cc->tx_frame / div;
205 }
206
207 if (cc->cycles < div)
208 return -1;
209
210 if (cc->cycles > 0)
211 ret = cc->rx_busy * 100 / cc->cycles;
212
213 memset(cc, 0, sizeof(*cc));
214
215 ath_update_survey_nf(sc, pos);
216
217 return ret;
218 }
219
__ath_cancel_work(struct ath_softc * sc)220 static void __ath_cancel_work(struct ath_softc *sc)
221 {
222 cancel_work_sync(&sc->paprd_work);
223 cancel_work_sync(&sc->hw_check_work);
224 cancel_delayed_work_sync(&sc->tx_complete_work);
225 cancel_delayed_work_sync(&sc->hw_pll_work);
226 }
227
ath_cancel_work(struct ath_softc * sc)228 static void ath_cancel_work(struct ath_softc *sc)
229 {
230 __ath_cancel_work(sc);
231 cancel_work_sync(&sc->hw_reset_work);
232 }
233
ath_prepare_reset(struct ath_softc * sc,bool retry_tx,bool flush)234 static bool ath_prepare_reset(struct ath_softc *sc, bool retry_tx, bool flush)
235 {
236 struct ath_hw *ah = sc->sc_ah;
237 struct ath_common *common = ath9k_hw_common(ah);
238 bool ret;
239
240 ieee80211_stop_queues(sc->hw);
241
242 sc->hw_busy_count = 0;
243 del_timer_sync(&common->ani.timer);
244
245 ath9k_debug_samp_bb_mac(sc);
246 ath9k_hw_disable_interrupts(ah);
247
248 ret = ath_drain_all_txq(sc, retry_tx);
249
250 if (!ath_stoprecv(sc))
251 ret = false;
252
253 if (!flush) {
254 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
255 ath_rx_tasklet(sc, 1, true);
256 ath_rx_tasklet(sc, 1, false);
257 } else {
258 ath_flushrecv(sc);
259 }
260
261 return ret;
262 }
263
ath_complete_reset(struct ath_softc * sc,bool start)264 static bool ath_complete_reset(struct ath_softc *sc, bool start)
265 {
266 struct ath_hw *ah = sc->sc_ah;
267 struct ath_common *common = ath9k_hw_common(ah);
268
269 if (ath_startrecv(sc) != 0) {
270 ath_err(common, "Unable to restart recv logic\n");
271 return false;
272 }
273
274 ath9k_cmn_update_txpow(ah, sc->curtxpow,
275 sc->config.txpowlimit, &sc->curtxpow);
276 ath9k_hw_set_interrupts(ah);
277 ath9k_hw_enable_interrupts(ah);
278
279 if (!(sc->sc_flags & (SC_OP_OFFCHANNEL)) && start) {
280 if (sc->sc_flags & SC_OP_BEACONS)
281 ath_set_beacon(sc);
282
283 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
284 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
285 if (!common->disable_ani)
286 ath_start_ani(common);
287 }
288
289 if ((ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) && sc->ant_rx != 3) {
290 struct ath_hw_antcomb_conf div_ant_conf;
291 u8 lna_conf;
292
293 ath9k_hw_antdiv_comb_conf_get(ah, &div_ant_conf);
294
295 if (sc->ant_rx == 1)
296 lna_conf = ATH_ANT_DIV_COMB_LNA1;
297 else
298 lna_conf = ATH_ANT_DIV_COMB_LNA2;
299 div_ant_conf.main_lna_conf = lna_conf;
300 div_ant_conf.alt_lna_conf = lna_conf;
301
302 ath9k_hw_antdiv_comb_conf_set(ah, &div_ant_conf);
303 }
304
305 ieee80211_wake_queues(sc->hw);
306
307 return true;
308 }
309
ath_reset_internal(struct ath_softc * sc,struct ath9k_channel * hchan,bool retry_tx)310 static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan,
311 bool retry_tx)
312 {
313 struct ath_hw *ah = sc->sc_ah;
314 struct ath_common *common = ath9k_hw_common(ah);
315 struct ath9k_hw_cal_data *caldata = NULL;
316 bool fastcc = true;
317 bool flush = false;
318 int r;
319
320 __ath_cancel_work(sc);
321
322 spin_lock_bh(&sc->sc_pcu_lock);
323
324 if (!(sc->sc_flags & SC_OP_OFFCHANNEL)) {
325 fastcc = false;
326 caldata = &sc->caldata;
327 }
328
329 if (!hchan) {
330 fastcc = false;
331 flush = true;
332 hchan = ah->curchan;
333 }
334
335 if (!ath_prepare_reset(sc, retry_tx, flush))
336 fastcc = false;
337
338 ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
339 hchan->channel, IS_CHAN_HT40(hchan), fastcc);
340
341 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
342 if (r) {
343 ath_err(common,
344 "Unable to reset channel, reset status %d\n", r);
345 goto out;
346 }
347
348 if (!ath_complete_reset(sc, true))
349 r = -EIO;
350
351 out:
352 spin_unlock_bh(&sc->sc_pcu_lock);
353 return r;
354 }
355
356
357 /*
358 * Set/change channels. If the channel is really being changed, it's done
359 * by reseting the chip. To accomplish this we must first cleanup any pending
360 * DMA, then restart stuff.
361 */
ath_set_channel(struct ath_softc * sc,struct ieee80211_hw * hw,struct ath9k_channel * hchan)362 static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
363 struct ath9k_channel *hchan)
364 {
365 int r;
366
367 if (sc->sc_flags & SC_OP_INVALID)
368 return -EIO;
369
370 r = ath_reset_internal(sc, hchan, false);
371
372 return r;
373 }
374
ath_paprd_activate(struct ath_softc * sc)375 static void ath_paprd_activate(struct ath_softc *sc)
376 {
377 struct ath_hw *ah = sc->sc_ah;
378 struct ath9k_hw_cal_data *caldata = ah->caldata;
379 int chain;
380
381 if (!caldata || !caldata->paprd_done)
382 return;
383
384 ath9k_ps_wakeup(sc);
385 ar9003_paprd_enable(ah, false);
386 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
387 if (!(ah->txchainmask & BIT(chain)))
388 continue;
389
390 ar9003_paprd_populate_single_table(ah, caldata, chain);
391 }
392
393 ar9003_paprd_enable(ah, true);
394 ath9k_ps_restore(sc);
395 }
396
ath_paprd_send_frame(struct ath_softc * sc,struct sk_buff * skb,int chain)397 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
398 {
399 struct ieee80211_hw *hw = sc->hw;
400 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
401 struct ath_hw *ah = sc->sc_ah;
402 struct ath_common *common = ath9k_hw_common(ah);
403 struct ath_tx_control txctl;
404 int time_left;
405
406 memset(&txctl, 0, sizeof(txctl));
407 txctl.txq = sc->tx.txq_map[WME_AC_BE];
408
409 memset(tx_info, 0, sizeof(*tx_info));
410 tx_info->band = hw->conf.channel->band;
411 tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
412 tx_info->control.rates[0].idx = 0;
413 tx_info->control.rates[0].count = 1;
414 tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
415 tx_info->control.rates[1].idx = -1;
416
417 init_completion(&sc->paprd_complete);
418 txctl.paprd = BIT(chain);
419
420 if (ath_tx_start(hw, skb, &txctl) != 0) {
421 ath_dbg(common, CALIBRATE, "PAPRD TX failed\n");
422 dev_kfree_skb_any(skb);
423 return false;
424 }
425
426 time_left = wait_for_completion_timeout(&sc->paprd_complete,
427 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
428
429 if (!time_left)
430 ath_dbg(common, CALIBRATE,
431 "Timeout waiting for paprd training on TX chain %d\n",
432 chain);
433
434 return !!time_left;
435 }
436
ath_paprd_calibrate(struct work_struct * work)437 void ath_paprd_calibrate(struct work_struct *work)
438 {
439 struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
440 struct ieee80211_hw *hw = sc->hw;
441 struct ath_hw *ah = sc->sc_ah;
442 struct ieee80211_hdr *hdr;
443 struct sk_buff *skb = NULL;
444 struct ath9k_hw_cal_data *caldata = ah->caldata;
445 struct ath_common *common = ath9k_hw_common(ah);
446 int ftype;
447 int chain_ok = 0;
448 int chain;
449 int len = 1800;
450
451 if (!caldata)
452 return;
453
454 ath9k_ps_wakeup(sc);
455
456 if (ar9003_paprd_init_table(ah) < 0)
457 goto fail_paprd;
458
459 skb = alloc_skb(len, GFP_KERNEL);
460 if (!skb)
461 goto fail_paprd;
462
463 skb_put(skb, len);
464 memset(skb->data, 0, len);
465 hdr = (struct ieee80211_hdr *)skb->data;
466 ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
467 hdr->frame_control = cpu_to_le16(ftype);
468 hdr->duration_id = cpu_to_le16(10);
469 memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
470 memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
471 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
472
473 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
474 if (!(ah->txchainmask & BIT(chain)))
475 continue;
476
477 chain_ok = 0;
478
479 ath_dbg(common, CALIBRATE,
480 "Sending PAPRD frame for thermal measurement on chain %d\n",
481 chain);
482 if (!ath_paprd_send_frame(sc, skb, chain))
483 goto fail_paprd;
484
485 ar9003_paprd_setup_gain_table(ah, chain);
486
487 ath_dbg(common, CALIBRATE,
488 "Sending PAPRD training frame on chain %d\n", chain);
489 if (!ath_paprd_send_frame(sc, skb, chain))
490 goto fail_paprd;
491
492 if (!ar9003_paprd_is_done(ah)) {
493 ath_dbg(common, CALIBRATE,
494 "PAPRD not yet done on chain %d\n", chain);
495 break;
496 }
497
498 if (ar9003_paprd_create_curve(ah, caldata, chain)) {
499 ath_dbg(common, CALIBRATE,
500 "PAPRD create curve failed on chain %d\n",
501 chain);
502 break;
503 }
504
505 chain_ok = 1;
506 }
507 kfree_skb(skb);
508
509 if (chain_ok) {
510 caldata->paprd_done = true;
511 ath_paprd_activate(sc);
512 }
513
514 fail_paprd:
515 ath9k_ps_restore(sc);
516 }
517
518 /*
519 * This routine performs the periodic noise floor calibration function
520 * that is used to adjust and optimize the chip performance. This
521 * takes environmental changes (location, temperature) into account.
522 * When the task is complete, it reschedules itself depending on the
523 * appropriate interval that was calculated.
524 */
ath_ani_calibrate(unsigned long data)525 void ath_ani_calibrate(unsigned long data)
526 {
527 struct ath_softc *sc = (struct ath_softc *)data;
528 struct ath_hw *ah = sc->sc_ah;
529 struct ath_common *common = ath9k_hw_common(ah);
530 bool longcal = false;
531 bool shortcal = false;
532 bool aniflag = false;
533 unsigned int timestamp = jiffies_to_msecs(jiffies);
534 u32 cal_interval, short_cal_interval, long_cal_interval;
535 unsigned long flags;
536
537 if (ah->caldata && ah->caldata->nfcal_interference)
538 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
539 else
540 long_cal_interval = ATH_LONG_CALINTERVAL;
541
542 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
543 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
544
545 /* Only calibrate if awake */
546 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
547 goto set_timer;
548
549 ath9k_ps_wakeup(sc);
550
551 /* Long calibration runs independently of short calibration. */
552 if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
553 longcal = true;
554 common->ani.longcal_timer = timestamp;
555 }
556
557 /* Short calibration applies only while caldone is false */
558 if (!common->ani.caldone) {
559 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
560 shortcal = true;
561 common->ani.shortcal_timer = timestamp;
562 common->ani.resetcal_timer = timestamp;
563 }
564 } else {
565 if ((timestamp - common->ani.resetcal_timer) >=
566 ATH_RESTART_CALINTERVAL) {
567 common->ani.caldone = ath9k_hw_reset_calvalid(ah);
568 if (common->ani.caldone)
569 common->ani.resetcal_timer = timestamp;
570 }
571 }
572
573 /* Verify whether we must check ANI */
574 if (sc->sc_ah->config.enable_ani
575 && (timestamp - common->ani.checkani_timer) >=
576 ah->config.ani_poll_interval) {
577 aniflag = true;
578 common->ani.checkani_timer = timestamp;
579 }
580
581 /* Call ANI routine if necessary */
582 if (aniflag) {
583 spin_lock_irqsave(&common->cc_lock, flags);
584 ath9k_hw_ani_monitor(ah, ah->curchan);
585 ath_update_survey_stats(sc);
586 spin_unlock_irqrestore(&common->cc_lock, flags);
587 }
588
589 /* Perform calibration if necessary */
590 if (longcal || shortcal) {
591 common->ani.caldone =
592 ath9k_hw_calibrate(ah, ah->curchan,
593 ah->rxchainmask, longcal);
594 }
595
596 ath_dbg(common, ANI,
597 "Calibration @%lu finished: %s %s %s, caldone: %s\n",
598 jiffies,
599 longcal ? "long" : "", shortcal ? "short" : "",
600 aniflag ? "ani" : "", common->ani.caldone ? "true" : "false");
601
602 ath9k_ps_restore(sc);
603
604 set_timer:
605 /*
606 * Set timer interval based on previous results.
607 * The interval must be the shortest necessary to satisfy ANI,
608 * short calibration and long calibration.
609 */
610 ath9k_debug_samp_bb_mac(sc);
611 cal_interval = ATH_LONG_CALINTERVAL;
612 if (sc->sc_ah->config.enable_ani)
613 cal_interval = min(cal_interval,
614 (u32)ah->config.ani_poll_interval);
615 if (!common->ani.caldone)
616 cal_interval = min(cal_interval, (u32)short_cal_interval);
617
618 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
619 if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
620 if (!ah->caldata->paprd_done)
621 ieee80211_queue_work(sc->hw, &sc->paprd_work);
622 else if (!ah->paprd_table_write_done)
623 ath_paprd_activate(sc);
624 }
625 }
626
ath_node_attach(struct ath_softc * sc,struct ieee80211_sta * sta,struct ieee80211_vif * vif)627 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
628 struct ieee80211_vif *vif)
629 {
630 struct ath_node *an;
631 an = (struct ath_node *)sta->drv_priv;
632
633 #ifdef CONFIG_ATH9K_DEBUGFS
634 spin_lock(&sc->nodes_lock);
635 list_add(&an->list, &sc->nodes);
636 spin_unlock(&sc->nodes_lock);
637 #endif
638 an->sta = sta;
639 an->vif = vif;
640
641 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT) {
642 ath_tx_node_init(sc, an);
643 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
644 sta->ht_cap.ampdu_factor);
645 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
646 }
647 }
648
ath_node_detach(struct ath_softc * sc,struct ieee80211_sta * sta)649 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
650 {
651 struct ath_node *an = (struct ath_node *)sta->drv_priv;
652
653 #ifdef CONFIG_ATH9K_DEBUGFS
654 spin_lock(&sc->nodes_lock);
655 list_del(&an->list);
656 spin_unlock(&sc->nodes_lock);
657 an->sta = NULL;
658 #endif
659
660 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT)
661 ath_tx_node_cleanup(sc, an);
662 }
663
664
ath9k_tasklet(unsigned long data)665 void ath9k_tasklet(unsigned long data)
666 {
667 struct ath_softc *sc = (struct ath_softc *)data;
668 struct ath_hw *ah = sc->sc_ah;
669 struct ath_common *common = ath9k_hw_common(ah);
670
671 u32 status = sc->intrstatus;
672 u32 rxmask;
673
674 ath9k_ps_wakeup(sc);
675 spin_lock(&sc->sc_pcu_lock);
676
677 if ((status & ATH9K_INT_FATAL) ||
678 (status & ATH9K_INT_BB_WATCHDOG)) {
679 #ifdef CONFIG_ATH9K_DEBUGFS
680 enum ath_reset_type type;
681
682 if (status & ATH9K_INT_FATAL)
683 type = RESET_TYPE_FATAL_INT;
684 else
685 type = RESET_TYPE_BB_WATCHDOG;
686
687 RESET_STAT_INC(sc, type);
688 #endif
689 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
690 goto out;
691 }
692
693 /*
694 * Only run the baseband hang check if beacons stop working in AP or
695 * IBSS mode, because it has a high false positive rate. For station
696 * mode it should not be necessary, since the upper layers will detect
697 * this through a beacon miss automatically and the following channel
698 * change will trigger a hardware reset anyway
699 */
700 if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 &&
701 !ath9k_hw_check_alive(ah))
702 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
703
704 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
705 /*
706 * TSF sync does not look correct; remain awake to sync with
707 * the next Beacon.
708 */
709 ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n");
710 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
711 }
712
713 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
714 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
715 ATH9K_INT_RXORN);
716 else
717 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
718
719 if (status & rxmask) {
720 /* Check for high priority Rx first */
721 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
722 (status & ATH9K_INT_RXHP))
723 ath_rx_tasklet(sc, 0, true);
724
725 ath_rx_tasklet(sc, 0, false);
726 }
727
728 if (status & ATH9K_INT_TX) {
729 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
730 ath_tx_edma_tasklet(sc);
731 else
732 ath_tx_tasklet(sc);
733 }
734
735 ath9k_btcoex_handle_interrupt(sc, status);
736
737 out:
738 /* re-enable hardware interrupt */
739 ath9k_hw_enable_interrupts(ah);
740
741 spin_unlock(&sc->sc_pcu_lock);
742 ath9k_ps_restore(sc);
743 }
744
ath_isr(int irq,void * dev)745 irqreturn_t ath_isr(int irq, void *dev)
746 {
747 #define SCHED_INTR ( \
748 ATH9K_INT_FATAL | \
749 ATH9K_INT_BB_WATCHDOG | \
750 ATH9K_INT_RXORN | \
751 ATH9K_INT_RXEOL | \
752 ATH9K_INT_RX | \
753 ATH9K_INT_RXLP | \
754 ATH9K_INT_RXHP | \
755 ATH9K_INT_TX | \
756 ATH9K_INT_BMISS | \
757 ATH9K_INT_CST | \
758 ATH9K_INT_TSFOOR | \
759 ATH9K_INT_GENTIMER | \
760 ATH9K_INT_MCI)
761
762 struct ath_softc *sc = dev;
763 struct ath_hw *ah = sc->sc_ah;
764 struct ath_common *common = ath9k_hw_common(ah);
765 enum ath9k_int status;
766 bool sched = false;
767
768 /*
769 * The hardware is not ready/present, don't
770 * touch anything. Note this can happen early
771 * on if the IRQ is shared.
772 */
773 if (sc->sc_flags & SC_OP_INVALID)
774 return IRQ_NONE;
775
776
777 /* shared irq, not for us */
778
779 if (!ath9k_hw_intrpend(ah))
780 return IRQ_NONE;
781
782 /*
783 * Figure out the reason(s) for the interrupt. Note
784 * that the hal returns a pseudo-ISR that may include
785 * bits we haven't explicitly enabled so we mask the
786 * value to insure we only process bits we requested.
787 */
788 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
789 status &= ah->imask; /* discard unasked-for bits */
790
791 /*
792 * If there are no status bits set, then this interrupt was not
793 * for me (should have been caught above).
794 */
795 if (!status)
796 return IRQ_NONE;
797
798 /* Cache the status */
799 sc->intrstatus = status;
800
801 if (status & SCHED_INTR)
802 sched = true;
803
804 /*
805 * If a FATAL or RXORN interrupt is received, we have to reset the
806 * chip immediately.
807 */
808 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
809 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
810 goto chip_reset;
811
812 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
813 (status & ATH9K_INT_BB_WATCHDOG)) {
814
815 spin_lock(&common->cc_lock);
816 ath_hw_cycle_counters_update(common);
817 ar9003_hw_bb_watchdog_dbg_info(ah);
818 spin_unlock(&common->cc_lock);
819
820 goto chip_reset;
821 }
822
823 if (status & ATH9K_INT_SWBA)
824 tasklet_schedule(&sc->bcon_tasklet);
825
826 if (status & ATH9K_INT_TXURN)
827 ath9k_hw_updatetxtriglevel(ah, true);
828
829 if (status & ATH9K_INT_RXEOL) {
830 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
831 ath9k_hw_set_interrupts(ah);
832 }
833
834 if (status & ATH9K_INT_MIB) {
835 /*
836 * Disable interrupts until we service the MIB
837 * interrupt; otherwise it will continue to
838 * fire.
839 */
840 ath9k_hw_disable_interrupts(ah);
841 /*
842 * Let the hal handle the event. We assume
843 * it will clear whatever condition caused
844 * the interrupt.
845 */
846 spin_lock(&common->cc_lock);
847 ath9k_hw_proc_mib_event(ah);
848 spin_unlock(&common->cc_lock);
849 ath9k_hw_enable_interrupts(ah);
850 }
851
852 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
853 if (status & ATH9K_INT_TIM_TIMER) {
854 if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
855 goto chip_reset;
856 /* Clear RxAbort bit so that we can
857 * receive frames */
858 ath9k_setpower(sc, ATH9K_PM_AWAKE);
859 ath9k_hw_setrxabort(sc->sc_ah, 0);
860 sc->ps_flags |= PS_WAIT_FOR_BEACON;
861 }
862
863 chip_reset:
864
865 ath_debug_stat_interrupt(sc, status);
866
867 if (sched) {
868 /* turn off every interrupt */
869 ath9k_hw_disable_interrupts(ah);
870 tasklet_schedule(&sc->intr_tq);
871 }
872
873 return IRQ_HANDLED;
874
875 #undef SCHED_INTR
876 }
877
ath_reset(struct ath_softc * sc,bool retry_tx)878 static int ath_reset(struct ath_softc *sc, bool retry_tx)
879 {
880 int r;
881
882 ath9k_ps_wakeup(sc);
883
884 r = ath_reset_internal(sc, NULL, retry_tx);
885
886 if (retry_tx) {
887 int i;
888 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
889 if (ATH_TXQ_SETUP(sc, i)) {
890 spin_lock_bh(&sc->tx.txq[i].axq_lock);
891 ath_txq_schedule(sc, &sc->tx.txq[i]);
892 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
893 }
894 }
895 }
896
897 ath9k_ps_restore(sc);
898
899 return r;
900 }
901
ath_reset_work(struct work_struct * work)902 void ath_reset_work(struct work_struct *work)
903 {
904 struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
905
906 ath_reset(sc, true);
907 }
908
ath_hw_check(struct work_struct * work)909 void ath_hw_check(struct work_struct *work)
910 {
911 struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
912 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
913 unsigned long flags;
914 int busy;
915
916 ath9k_ps_wakeup(sc);
917 if (ath9k_hw_check_alive(sc->sc_ah))
918 goto out;
919
920 spin_lock_irqsave(&common->cc_lock, flags);
921 busy = ath_update_survey_stats(sc);
922 spin_unlock_irqrestore(&common->cc_lock, flags);
923
924 ath_dbg(common, RESET, "Possible baseband hang, busy=%d (try %d)\n",
925 busy, sc->hw_busy_count + 1);
926 if (busy >= 99) {
927 if (++sc->hw_busy_count >= 3) {
928 RESET_STAT_INC(sc, RESET_TYPE_BB_HANG);
929 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
930 }
931
932 } else if (busy >= 0)
933 sc->hw_busy_count = 0;
934
935 out:
936 ath9k_ps_restore(sc);
937 }
938
ath_hw_pll_rx_hang_check(struct ath_softc * sc,u32 pll_sqsum)939 static void ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
940 {
941 static int count;
942 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
943
944 if (pll_sqsum >= 0x40000) {
945 count++;
946 if (count == 3) {
947 /* Rx is hung for more than 500ms. Reset it */
948 ath_dbg(common, RESET, "Possible RX hang, resetting\n");
949 RESET_STAT_INC(sc, RESET_TYPE_PLL_HANG);
950 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
951 count = 0;
952 }
953 } else
954 count = 0;
955 }
956
ath_hw_pll_work(struct work_struct * work)957 void ath_hw_pll_work(struct work_struct *work)
958 {
959 struct ath_softc *sc = container_of(work, struct ath_softc,
960 hw_pll_work.work);
961 u32 pll_sqsum;
962
963 /*
964 * ensure that the PLL WAR is executed only
965 * after the STA is associated (or) if the
966 * beaconing had started in interfaces that
967 * uses beacons.
968 */
969 if (!(sc->sc_flags & SC_OP_BEACONS))
970 return;
971
972 if (AR_SREV_9485(sc->sc_ah)) {
973
974 ath9k_ps_wakeup(sc);
975 pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah);
976 ath9k_ps_restore(sc);
977
978 ath_hw_pll_rx_hang_check(sc, pll_sqsum);
979
980 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/5);
981 }
982 }
983
984 /**********************/
985 /* mac80211 callbacks */
986 /**********************/
987
ath9k_start(struct ieee80211_hw * hw)988 static int ath9k_start(struct ieee80211_hw *hw)
989 {
990 struct ath_softc *sc = hw->priv;
991 struct ath_hw *ah = sc->sc_ah;
992 struct ath_common *common = ath9k_hw_common(ah);
993 struct ieee80211_channel *curchan = hw->conf.channel;
994 struct ath9k_channel *init_channel;
995 int r;
996
997 ath_dbg(common, CONFIG,
998 "Starting driver with initial channel: %d MHz\n",
999 curchan->center_freq);
1000
1001 ath9k_ps_wakeup(sc);
1002 mutex_lock(&sc->mutex);
1003
1004 init_channel = ath9k_cmn_get_curchannel(hw, ah);
1005
1006 /* Reset SERDES registers */
1007 ath9k_hw_configpcipowersave(ah, false);
1008
1009 /*
1010 * The basic interface to setting the hardware in a good
1011 * state is ``reset''. On return the hardware is known to
1012 * be powered up and with interrupts disabled. This must
1013 * be followed by initialization of the appropriate bits
1014 * and then setup of the interrupt mask.
1015 */
1016 spin_lock_bh(&sc->sc_pcu_lock);
1017
1018 atomic_set(&ah->intr_ref_cnt, -1);
1019
1020 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1021 if (r) {
1022 ath_err(common,
1023 "Unable to reset hardware; reset status %d (freq %u MHz)\n",
1024 r, curchan->center_freq);
1025 spin_unlock_bh(&sc->sc_pcu_lock);
1026 goto mutex_unlock;
1027 }
1028
1029 /* Setup our intr mask. */
1030 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1031 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1032 ATH9K_INT_GLOBAL;
1033
1034 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1035 ah->imask |= ATH9K_INT_RXHP |
1036 ATH9K_INT_RXLP |
1037 ATH9K_INT_BB_WATCHDOG;
1038 else
1039 ah->imask |= ATH9K_INT_RX;
1040
1041 ah->imask |= ATH9K_INT_GTT;
1042
1043 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1044 ah->imask |= ATH9K_INT_CST;
1045
1046 if (ah->caps.hw_caps & ATH9K_HW_CAP_MCI)
1047 ah->imask |= ATH9K_INT_MCI;
1048
1049 sc->sc_flags &= ~SC_OP_INVALID;
1050 sc->sc_ah->is_monitoring = false;
1051
1052 if (!ath_complete_reset(sc, false)) {
1053 r = -EIO;
1054 spin_unlock_bh(&sc->sc_pcu_lock);
1055 goto mutex_unlock;
1056 }
1057
1058 if (ah->led_pin >= 0) {
1059 ath9k_hw_cfg_output(ah, ah->led_pin,
1060 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
1061 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
1062 }
1063
1064 /*
1065 * Reset key cache to sane defaults (all entries cleared) instead of
1066 * semi-random values after suspend/resume.
1067 */
1068 ath9k_cmn_init_crypto(sc->sc_ah);
1069
1070 spin_unlock_bh(&sc->sc_pcu_lock);
1071
1072 ath9k_start_btcoex(sc);
1073
1074 if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
1075 common->bus_ops->extn_synch_en(common);
1076
1077 mutex_unlock:
1078 mutex_unlock(&sc->mutex);
1079
1080 ath9k_ps_restore(sc);
1081
1082 return r;
1083 }
1084
ath9k_tx(struct ieee80211_hw * hw,struct sk_buff * skb)1085 static void ath9k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
1086 {
1087 struct ath_softc *sc = hw->priv;
1088 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1089 struct ath_tx_control txctl;
1090 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1091
1092 if (sc->ps_enabled) {
1093 /*
1094 * mac80211 does not set PM field for normal data frames, so we
1095 * need to update that based on the current PS mode.
1096 */
1097 if (ieee80211_is_data(hdr->frame_control) &&
1098 !ieee80211_is_nullfunc(hdr->frame_control) &&
1099 !ieee80211_has_pm(hdr->frame_control)) {
1100 ath_dbg(common, PS,
1101 "Add PM=1 for a TX frame while in PS mode\n");
1102 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1103 }
1104 }
1105
1106 /*
1107 * Cannot tx while the hardware is in full sleep, it first needs a full
1108 * chip reset to recover from that
1109 */
1110 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP))
1111 goto exit;
1112
1113 if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1114 /*
1115 * We are using PS-Poll and mac80211 can request TX while in
1116 * power save mode. Need to wake up hardware for the TX to be
1117 * completed and if needed, also for RX of buffered frames.
1118 */
1119 ath9k_ps_wakeup(sc);
1120 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1121 ath9k_hw_setrxabort(sc->sc_ah, 0);
1122 if (ieee80211_is_pspoll(hdr->frame_control)) {
1123 ath_dbg(common, PS,
1124 "Sending PS-Poll to pick a buffered frame\n");
1125 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1126 } else {
1127 ath_dbg(common, PS, "Wake up to complete TX\n");
1128 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1129 }
1130 /*
1131 * The actual restore operation will happen only after
1132 * the sc_flags bit is cleared. We are just dropping
1133 * the ps_usecount here.
1134 */
1135 ath9k_ps_restore(sc);
1136 }
1137
1138 memset(&txctl, 0, sizeof(struct ath_tx_control));
1139 txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1140
1141 ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb);
1142
1143 if (ath_tx_start(hw, skb, &txctl) != 0) {
1144 ath_dbg(common, XMIT, "TX failed\n");
1145 goto exit;
1146 }
1147
1148 return;
1149 exit:
1150 ieee80211_free_txskb(hw, skb);
1151 }
1152
ath9k_stop(struct ieee80211_hw * hw)1153 static void ath9k_stop(struct ieee80211_hw *hw)
1154 {
1155 struct ath_softc *sc = hw->priv;
1156 struct ath_hw *ah = sc->sc_ah;
1157 struct ath_common *common = ath9k_hw_common(ah);
1158 bool prev_idle;
1159
1160 mutex_lock(&sc->mutex);
1161
1162 ath_cancel_work(sc);
1163
1164 if (sc->sc_flags & SC_OP_INVALID) {
1165 ath_dbg(common, ANY, "Device not present\n");
1166 mutex_unlock(&sc->mutex);
1167 return;
1168 }
1169
1170 /* Ensure HW is awake when we try to shut it down. */
1171 ath9k_ps_wakeup(sc);
1172
1173 ath9k_stop_btcoex(sc);
1174
1175 spin_lock_bh(&sc->sc_pcu_lock);
1176
1177 /* prevent tasklets to enable interrupts once we disable them */
1178 ah->imask &= ~ATH9K_INT_GLOBAL;
1179
1180 /* make sure h/w will not generate any interrupt
1181 * before setting the invalid flag. */
1182 ath9k_hw_disable_interrupts(ah);
1183
1184 spin_unlock_bh(&sc->sc_pcu_lock);
1185
1186 /* we can now sync irq and kill any running tasklets, since we already
1187 * disabled interrupts and not holding a spin lock */
1188 synchronize_irq(sc->irq);
1189 tasklet_kill(&sc->intr_tq);
1190 tasklet_kill(&sc->bcon_tasklet);
1191
1192 prev_idle = sc->ps_idle;
1193 sc->ps_idle = true;
1194
1195 spin_lock_bh(&sc->sc_pcu_lock);
1196
1197 if (ah->led_pin >= 0) {
1198 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
1199 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
1200 }
1201
1202 ath_prepare_reset(sc, false, true);
1203
1204 if (sc->rx.frag) {
1205 dev_kfree_skb_any(sc->rx.frag);
1206 sc->rx.frag = NULL;
1207 }
1208
1209 if (!ah->curchan)
1210 ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
1211
1212 ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
1213 ath9k_hw_phy_disable(ah);
1214
1215 ath9k_hw_configpcipowersave(ah, true);
1216
1217 spin_unlock_bh(&sc->sc_pcu_lock);
1218
1219 ath9k_ps_restore(sc);
1220
1221 sc->sc_flags |= SC_OP_INVALID;
1222 sc->ps_idle = prev_idle;
1223
1224 mutex_unlock(&sc->mutex);
1225
1226 ath_dbg(common, CONFIG, "Driver halt\n");
1227 }
1228
ath9k_uses_beacons(int type)1229 bool ath9k_uses_beacons(int type)
1230 {
1231 switch (type) {
1232 case NL80211_IFTYPE_AP:
1233 case NL80211_IFTYPE_ADHOC:
1234 case NL80211_IFTYPE_MESH_POINT:
1235 return true;
1236 default:
1237 return false;
1238 }
1239 }
1240
ath9k_reclaim_beacon(struct ath_softc * sc,struct ieee80211_vif * vif)1241 static void ath9k_reclaim_beacon(struct ath_softc *sc,
1242 struct ieee80211_vif *vif)
1243 {
1244 struct ath_vif *avp = (void *)vif->drv_priv;
1245
1246 ath9k_set_beaconing_status(sc, false);
1247 ath_beacon_return(sc, avp);
1248 ath9k_set_beaconing_status(sc, true);
1249 sc->sc_flags &= ~SC_OP_BEACONS;
1250 }
1251
ath9k_vif_iter(void * data,u8 * mac,struct ieee80211_vif * vif)1252 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1253 {
1254 struct ath9k_vif_iter_data *iter_data = data;
1255 int i;
1256
1257 if (iter_data->hw_macaddr)
1258 for (i = 0; i < ETH_ALEN; i++)
1259 iter_data->mask[i] &=
1260 ~(iter_data->hw_macaddr[i] ^ mac[i]);
1261
1262 switch (vif->type) {
1263 case NL80211_IFTYPE_AP:
1264 iter_data->naps++;
1265 break;
1266 case NL80211_IFTYPE_STATION:
1267 iter_data->nstations++;
1268 break;
1269 case NL80211_IFTYPE_ADHOC:
1270 iter_data->nadhocs++;
1271 break;
1272 case NL80211_IFTYPE_MESH_POINT:
1273 iter_data->nmeshes++;
1274 break;
1275 case NL80211_IFTYPE_WDS:
1276 iter_data->nwds++;
1277 break;
1278 default:
1279 break;
1280 }
1281 }
1282
1283 /* Called with sc->mutex held. */
ath9k_calculate_iter_data(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ath9k_vif_iter_data * iter_data)1284 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
1285 struct ieee80211_vif *vif,
1286 struct ath9k_vif_iter_data *iter_data)
1287 {
1288 struct ath_softc *sc = hw->priv;
1289 struct ath_hw *ah = sc->sc_ah;
1290 struct ath_common *common = ath9k_hw_common(ah);
1291
1292 /*
1293 * Pick the MAC address of the first interface as the new hardware
1294 * MAC address. The hardware will use it together with the BSSID mask
1295 * when matching addresses.
1296 */
1297 memset(iter_data, 0, sizeof(*iter_data));
1298 iter_data->hw_macaddr = common->macaddr;
1299 memset(&iter_data->mask, 0xff, ETH_ALEN);
1300
1301 if (vif)
1302 ath9k_vif_iter(iter_data, vif->addr, vif);
1303
1304 /* Get list of all active MAC addresses */
1305 ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
1306 iter_data);
1307 }
1308
1309 /* Called with sc->mutex held. */
ath9k_calculate_summary_state(struct ieee80211_hw * hw,struct ieee80211_vif * vif)1310 static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
1311 struct ieee80211_vif *vif)
1312 {
1313 struct ath_softc *sc = hw->priv;
1314 struct ath_hw *ah = sc->sc_ah;
1315 struct ath_common *common = ath9k_hw_common(ah);
1316 struct ath9k_vif_iter_data iter_data;
1317
1318 ath9k_calculate_iter_data(hw, vif, &iter_data);
1319
1320 /* Set BSSID mask. */
1321 memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1322 ath_hw_setbssidmask(common);
1323
1324 /* Set op-mode & TSF */
1325 if (iter_data.naps > 0) {
1326 ath9k_hw_set_tsfadjust(ah, 1);
1327 sc->sc_flags |= SC_OP_TSF_RESET;
1328 ah->opmode = NL80211_IFTYPE_AP;
1329 } else {
1330 ath9k_hw_set_tsfadjust(ah, 0);
1331 sc->sc_flags &= ~SC_OP_TSF_RESET;
1332
1333 if (iter_data.nmeshes)
1334 ah->opmode = NL80211_IFTYPE_MESH_POINT;
1335 else if (iter_data.nwds)
1336 ah->opmode = NL80211_IFTYPE_AP;
1337 else if (iter_data.nadhocs)
1338 ah->opmode = NL80211_IFTYPE_ADHOC;
1339 else
1340 ah->opmode = NL80211_IFTYPE_STATION;
1341 }
1342
1343 /*
1344 * Enable MIB interrupts when there are hardware phy counters.
1345 */
1346 if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
1347 if (ah->config.enable_ani)
1348 ah->imask |= ATH9K_INT_MIB;
1349 ah->imask |= ATH9K_INT_TSFOOR;
1350 } else {
1351 ah->imask &= ~ATH9K_INT_MIB;
1352 ah->imask &= ~ATH9K_INT_TSFOOR;
1353 }
1354
1355 ath9k_hw_set_interrupts(ah);
1356
1357 /* Set up ANI */
1358 if (iter_data.naps > 0) {
1359 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1360
1361 if (!common->disable_ani) {
1362 sc->sc_flags |= SC_OP_ANI_RUN;
1363 ath_start_ani(common);
1364 }
1365
1366 } else {
1367 sc->sc_flags &= ~SC_OP_ANI_RUN;
1368 del_timer_sync(&common->ani.timer);
1369 }
1370 }
1371
1372 /* Called with sc->mutex held, vif counts set up properly. */
ath9k_do_vif_add_setup(struct ieee80211_hw * hw,struct ieee80211_vif * vif)1373 static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
1374 struct ieee80211_vif *vif)
1375 {
1376 struct ath_softc *sc = hw->priv;
1377
1378 ath9k_calculate_summary_state(hw, vif);
1379
1380 if (ath9k_uses_beacons(vif->type)) {
1381 int error;
1382 /* This may fail because upper levels do not have beacons
1383 * properly configured yet. That's OK, we assume it
1384 * will be properly configured and then we will be notified
1385 * in the info_changed method and set up beacons properly
1386 * there.
1387 */
1388 ath9k_set_beaconing_status(sc, false);
1389 error = ath_beacon_alloc(sc, vif);
1390 if (!error)
1391 ath_beacon_config(sc, vif);
1392 ath9k_set_beaconing_status(sc, true);
1393 }
1394 }
1395
1396
ath9k_add_interface(struct ieee80211_hw * hw,struct ieee80211_vif * vif)1397 static int ath9k_add_interface(struct ieee80211_hw *hw,
1398 struct ieee80211_vif *vif)
1399 {
1400 struct ath_softc *sc = hw->priv;
1401 struct ath_hw *ah = sc->sc_ah;
1402 struct ath_common *common = ath9k_hw_common(ah);
1403 int ret = 0;
1404
1405 ath9k_ps_wakeup(sc);
1406 mutex_lock(&sc->mutex);
1407
1408 switch (vif->type) {
1409 case NL80211_IFTYPE_STATION:
1410 case NL80211_IFTYPE_WDS:
1411 case NL80211_IFTYPE_ADHOC:
1412 case NL80211_IFTYPE_AP:
1413 case NL80211_IFTYPE_MESH_POINT:
1414 break;
1415 default:
1416 ath_err(common, "Interface type %d not yet supported\n",
1417 vif->type);
1418 ret = -EOPNOTSUPP;
1419 goto out;
1420 }
1421
1422 if (ath9k_uses_beacons(vif->type)) {
1423 if (sc->nbcnvifs >= ATH_BCBUF) {
1424 ath_err(common, "Not enough beacon buffers when adding"
1425 " new interface of type: %i\n",
1426 vif->type);
1427 ret = -ENOBUFS;
1428 goto out;
1429 }
1430 }
1431
1432 ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type);
1433
1434 sc->nvifs++;
1435
1436 ath9k_do_vif_add_setup(hw, vif);
1437 out:
1438 mutex_unlock(&sc->mutex);
1439 ath9k_ps_restore(sc);
1440 return ret;
1441 }
1442
ath9k_change_interface(struct ieee80211_hw * hw,struct ieee80211_vif * vif,enum nl80211_iftype new_type,bool p2p)1443 static int ath9k_change_interface(struct ieee80211_hw *hw,
1444 struct ieee80211_vif *vif,
1445 enum nl80211_iftype new_type,
1446 bool p2p)
1447 {
1448 struct ath_softc *sc = hw->priv;
1449 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1450 int ret = 0;
1451
1452 ath_dbg(common, CONFIG, "Change Interface\n");
1453 mutex_lock(&sc->mutex);
1454 ath9k_ps_wakeup(sc);
1455
1456 /* See if new interface type is valid. */
1457 if ((new_type == NL80211_IFTYPE_ADHOC) &&
1458 (sc->nvifs > 1)) {
1459 ath_err(common, "When using ADHOC, it must be the only"
1460 " interface.\n");
1461 ret = -EINVAL;
1462 goto out;
1463 }
1464
1465 if (ath9k_uses_beacons(new_type) &&
1466 !ath9k_uses_beacons(vif->type)) {
1467 if (sc->nbcnvifs >= ATH_BCBUF) {
1468 ath_err(common, "No beacon slot available\n");
1469 ret = -ENOBUFS;
1470 goto out;
1471 }
1472 }
1473
1474 /* Clean up old vif stuff */
1475 if (ath9k_uses_beacons(vif->type))
1476 ath9k_reclaim_beacon(sc, vif);
1477
1478 /* Add new settings */
1479 vif->type = new_type;
1480 vif->p2p = p2p;
1481
1482 ath9k_do_vif_add_setup(hw, vif);
1483 out:
1484 ath9k_ps_restore(sc);
1485 mutex_unlock(&sc->mutex);
1486 return ret;
1487 }
1488
ath9k_remove_interface(struct ieee80211_hw * hw,struct ieee80211_vif * vif)1489 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1490 struct ieee80211_vif *vif)
1491 {
1492 struct ath_softc *sc = hw->priv;
1493 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1494
1495 ath_dbg(common, CONFIG, "Detach Interface\n");
1496
1497 ath9k_ps_wakeup(sc);
1498 mutex_lock(&sc->mutex);
1499
1500 sc->nvifs--;
1501
1502 /* Reclaim beacon resources */
1503 if (ath9k_uses_beacons(vif->type))
1504 ath9k_reclaim_beacon(sc, vif);
1505
1506 ath9k_calculate_summary_state(hw, NULL);
1507
1508 mutex_unlock(&sc->mutex);
1509 ath9k_ps_restore(sc);
1510 }
1511
ath9k_enable_ps(struct ath_softc * sc)1512 static void ath9k_enable_ps(struct ath_softc *sc)
1513 {
1514 struct ath_hw *ah = sc->sc_ah;
1515
1516 sc->ps_enabled = true;
1517 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1518 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1519 ah->imask |= ATH9K_INT_TIM_TIMER;
1520 ath9k_hw_set_interrupts(ah);
1521 }
1522 ath9k_hw_setrxabort(ah, 1);
1523 }
1524 }
1525
ath9k_disable_ps(struct ath_softc * sc)1526 static void ath9k_disable_ps(struct ath_softc *sc)
1527 {
1528 struct ath_hw *ah = sc->sc_ah;
1529
1530 sc->ps_enabled = false;
1531 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1532 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1533 ath9k_hw_setrxabort(ah, 0);
1534 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1535 PS_WAIT_FOR_CAB |
1536 PS_WAIT_FOR_PSPOLL_DATA |
1537 PS_WAIT_FOR_TX_ACK);
1538 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1539 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1540 ath9k_hw_set_interrupts(ah);
1541 }
1542 }
1543
1544 }
1545
ath9k_config(struct ieee80211_hw * hw,u32 changed)1546 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1547 {
1548 struct ath_softc *sc = hw->priv;
1549 struct ath_hw *ah = sc->sc_ah;
1550 struct ath_common *common = ath9k_hw_common(ah);
1551 struct ieee80211_conf *conf = &hw->conf;
1552 bool reset_channel = false;
1553
1554 ath9k_ps_wakeup(sc);
1555 mutex_lock(&sc->mutex);
1556
1557 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1558 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1559 if (sc->ps_idle)
1560 ath_cancel_work(sc);
1561 else
1562 /*
1563 * The chip needs a reset to properly wake up from
1564 * full sleep
1565 */
1566 reset_channel = ah->chip_fullsleep;
1567 }
1568
1569 /*
1570 * We just prepare to enable PS. We have to wait until our AP has
1571 * ACK'd our null data frame to disable RX otherwise we'll ignore
1572 * those ACKs and end up retransmitting the same null data frames.
1573 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1574 */
1575 if (changed & IEEE80211_CONF_CHANGE_PS) {
1576 unsigned long flags;
1577 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1578 if (conf->flags & IEEE80211_CONF_PS)
1579 ath9k_enable_ps(sc);
1580 else
1581 ath9k_disable_ps(sc);
1582 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1583 }
1584
1585 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1586 if (conf->flags & IEEE80211_CONF_MONITOR) {
1587 ath_dbg(common, CONFIG, "Monitor mode is enabled\n");
1588 sc->sc_ah->is_monitoring = true;
1589 } else {
1590 ath_dbg(common, CONFIG, "Monitor mode is disabled\n");
1591 sc->sc_ah->is_monitoring = false;
1592 }
1593 }
1594
1595 if ((changed & IEEE80211_CONF_CHANGE_CHANNEL) || reset_channel) {
1596 struct ieee80211_channel *curchan = hw->conf.channel;
1597 int pos = curchan->hw_value;
1598 int old_pos = -1;
1599 unsigned long flags;
1600
1601 if (ah->curchan)
1602 old_pos = ah->curchan - &ah->channels[0];
1603
1604 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1605 sc->sc_flags |= SC_OP_OFFCHANNEL;
1606 else
1607 sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1608
1609 ath_dbg(common, CONFIG, "Set channel: %d MHz type: %d\n",
1610 curchan->center_freq, conf->channel_type);
1611
1612 /* update survey stats for the old channel before switching */
1613 spin_lock_irqsave(&common->cc_lock, flags);
1614 ath_update_survey_stats(sc);
1615 spin_unlock_irqrestore(&common->cc_lock, flags);
1616
1617 ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
1618 curchan, conf->channel_type);
1619
1620 /*
1621 * If the operating channel changes, change the survey in-use flags
1622 * along with it.
1623 * Reset the survey data for the new channel, unless we're switching
1624 * back to the operating channel from an off-channel operation.
1625 */
1626 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1627 sc->cur_survey != &sc->survey[pos]) {
1628
1629 if (sc->cur_survey)
1630 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1631
1632 sc->cur_survey = &sc->survey[pos];
1633
1634 memset(sc->cur_survey, 0, sizeof(struct survey_info));
1635 sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1636 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1637 memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1638 }
1639
1640 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1641 ath_err(common, "Unable to set channel\n");
1642 mutex_unlock(&sc->mutex);
1643 return -EINVAL;
1644 }
1645
1646 /*
1647 * The most recent snapshot of channel->noisefloor for the old
1648 * channel is only available after the hardware reset. Copy it to
1649 * the survey stats now.
1650 */
1651 if (old_pos >= 0)
1652 ath_update_survey_nf(sc, old_pos);
1653 }
1654
1655 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1656 ath_dbg(common, CONFIG, "Set power: %d\n", conf->power_level);
1657 sc->config.txpowlimit = 2 * conf->power_level;
1658 ath9k_cmn_update_txpow(ah, sc->curtxpow,
1659 sc->config.txpowlimit, &sc->curtxpow);
1660 }
1661
1662 mutex_unlock(&sc->mutex);
1663 ath9k_ps_restore(sc);
1664
1665 return 0;
1666 }
1667
1668 #define SUPPORTED_FILTERS \
1669 (FIF_PROMISC_IN_BSS | \
1670 FIF_ALLMULTI | \
1671 FIF_CONTROL | \
1672 FIF_PSPOLL | \
1673 FIF_OTHER_BSS | \
1674 FIF_BCN_PRBRESP_PROMISC | \
1675 FIF_PROBE_REQ | \
1676 FIF_FCSFAIL)
1677
1678 /* FIXME: sc->sc_full_reset ? */
ath9k_configure_filter(struct ieee80211_hw * hw,unsigned int changed_flags,unsigned int * total_flags,u64 multicast)1679 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1680 unsigned int changed_flags,
1681 unsigned int *total_flags,
1682 u64 multicast)
1683 {
1684 struct ath_softc *sc = hw->priv;
1685 u32 rfilt;
1686
1687 changed_flags &= SUPPORTED_FILTERS;
1688 *total_flags &= SUPPORTED_FILTERS;
1689
1690 sc->rx.rxfilter = *total_flags;
1691 ath9k_ps_wakeup(sc);
1692 rfilt = ath_calcrxfilter(sc);
1693 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1694 ath9k_ps_restore(sc);
1695
1696 ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n",
1697 rfilt);
1698 }
1699
ath9k_sta_add(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1700 static int ath9k_sta_add(struct ieee80211_hw *hw,
1701 struct ieee80211_vif *vif,
1702 struct ieee80211_sta *sta)
1703 {
1704 struct ath_softc *sc = hw->priv;
1705 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1706 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1707 struct ieee80211_key_conf ps_key = { };
1708 int key;
1709
1710 ath_node_attach(sc, sta, vif);
1711
1712 if (vif->type != NL80211_IFTYPE_AP &&
1713 vif->type != NL80211_IFTYPE_AP_VLAN)
1714 return 0;
1715
1716 key = ath_key_config(common, vif, sta, &ps_key);
1717 if (key > 0)
1718 an->ps_key = key;
1719
1720 return 0;
1721 }
1722
ath9k_del_ps_key(struct ath_softc * sc,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1723 static void ath9k_del_ps_key(struct ath_softc *sc,
1724 struct ieee80211_vif *vif,
1725 struct ieee80211_sta *sta)
1726 {
1727 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1728 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1729 struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
1730
1731 if (!an->ps_key)
1732 return;
1733
1734 ath_key_delete(common, &ps_key);
1735 an->ps_key = 0;
1736 }
1737
ath9k_sta_remove(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_sta * sta)1738 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1739 struct ieee80211_vif *vif,
1740 struct ieee80211_sta *sta)
1741 {
1742 struct ath_softc *sc = hw->priv;
1743
1744 ath9k_del_ps_key(sc, vif, sta);
1745 ath_node_detach(sc, sta);
1746
1747 return 0;
1748 }
1749
ath9k_sta_notify(struct ieee80211_hw * hw,struct ieee80211_vif * vif,enum sta_notify_cmd cmd,struct ieee80211_sta * sta)1750 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1751 struct ieee80211_vif *vif,
1752 enum sta_notify_cmd cmd,
1753 struct ieee80211_sta *sta)
1754 {
1755 struct ath_softc *sc = hw->priv;
1756 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1757
1758 if (!sta->ht_cap.ht_supported)
1759 return;
1760
1761 switch (cmd) {
1762 case STA_NOTIFY_SLEEP:
1763 an->sleeping = true;
1764 ath_tx_aggr_sleep(sta, sc, an);
1765 break;
1766 case STA_NOTIFY_AWAKE:
1767 an->sleeping = false;
1768 ath_tx_aggr_wakeup(sc, an);
1769 break;
1770 }
1771 }
1772
ath9k_conf_tx(struct ieee80211_hw * hw,struct ieee80211_vif * vif,u16 queue,const struct ieee80211_tx_queue_params * params)1773 static int ath9k_conf_tx(struct ieee80211_hw *hw,
1774 struct ieee80211_vif *vif, u16 queue,
1775 const struct ieee80211_tx_queue_params *params)
1776 {
1777 struct ath_softc *sc = hw->priv;
1778 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1779 struct ath_txq *txq;
1780 struct ath9k_tx_queue_info qi;
1781 int ret = 0;
1782
1783 if (queue >= WME_NUM_AC)
1784 return 0;
1785
1786 txq = sc->tx.txq_map[queue];
1787
1788 ath9k_ps_wakeup(sc);
1789 mutex_lock(&sc->mutex);
1790
1791 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1792
1793 qi.tqi_aifs = params->aifs;
1794 qi.tqi_cwmin = params->cw_min;
1795 qi.tqi_cwmax = params->cw_max;
1796 qi.tqi_burstTime = params->txop;
1797
1798 ath_dbg(common, CONFIG,
1799 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1800 queue, txq->axq_qnum, params->aifs, params->cw_min,
1801 params->cw_max, params->txop);
1802
1803 ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1804 if (ret)
1805 ath_err(common, "TXQ Update failed\n");
1806
1807 if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1808 if (queue == WME_AC_BE && !ret)
1809 ath_beaconq_config(sc);
1810
1811 mutex_unlock(&sc->mutex);
1812 ath9k_ps_restore(sc);
1813
1814 return ret;
1815 }
1816
ath9k_set_key(struct ieee80211_hw * hw,enum set_key_cmd cmd,struct ieee80211_vif * vif,struct ieee80211_sta * sta,struct ieee80211_key_conf * key)1817 static int ath9k_set_key(struct ieee80211_hw *hw,
1818 enum set_key_cmd cmd,
1819 struct ieee80211_vif *vif,
1820 struct ieee80211_sta *sta,
1821 struct ieee80211_key_conf *key)
1822 {
1823 struct ath_softc *sc = hw->priv;
1824 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1825 int ret = 0;
1826
1827 if (ath9k_modparam_nohwcrypt)
1828 return -ENOSPC;
1829
1830 if ((vif->type == NL80211_IFTYPE_ADHOC ||
1831 vif->type == NL80211_IFTYPE_MESH_POINT) &&
1832 (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1833 key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1834 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1835 /*
1836 * For now, disable hw crypto for the RSN IBSS group keys. This
1837 * could be optimized in the future to use a modified key cache
1838 * design to support per-STA RX GTK, but until that gets
1839 * implemented, use of software crypto for group addressed
1840 * frames is a acceptable to allow RSN IBSS to be used.
1841 */
1842 return -EOPNOTSUPP;
1843 }
1844
1845 mutex_lock(&sc->mutex);
1846 ath9k_ps_wakeup(sc);
1847 ath_dbg(common, CONFIG, "Set HW Key\n");
1848
1849 switch (cmd) {
1850 case SET_KEY:
1851 if (sta)
1852 ath9k_del_ps_key(sc, vif, sta);
1853
1854 ret = ath_key_config(common, vif, sta, key);
1855 if (ret >= 0) {
1856 key->hw_key_idx = ret;
1857 /* push IV and Michael MIC generation to stack */
1858 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1859 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1860 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1861 if (sc->sc_ah->sw_mgmt_crypto &&
1862 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1863 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1864 ret = 0;
1865 }
1866 break;
1867 case DISABLE_KEY:
1868 ath_key_delete(common, key);
1869 break;
1870 default:
1871 ret = -EINVAL;
1872 }
1873
1874 ath9k_ps_restore(sc);
1875 mutex_unlock(&sc->mutex);
1876
1877 return ret;
1878 }
ath9k_bss_iter(void * data,u8 * mac,struct ieee80211_vif * vif)1879 static void ath9k_bss_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1880 {
1881 struct ath_softc *sc = data;
1882 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1883 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1884 struct ath_vif *avp = (void *)vif->drv_priv;
1885
1886 /*
1887 * Skip iteration if primary station vif's bss info
1888 * was not changed
1889 */
1890 if (sc->sc_flags & SC_OP_PRIM_STA_VIF)
1891 return;
1892
1893 if (bss_conf->assoc) {
1894 sc->sc_flags |= SC_OP_PRIM_STA_VIF;
1895 avp->primary_sta_vif = true;
1896 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1897 common->curaid = bss_conf->aid;
1898 ath9k_hw_write_associd(sc->sc_ah);
1899 ath_dbg(common, CONFIG, "Bss Info ASSOC %d, bssid: %pM\n",
1900 bss_conf->aid, common->curbssid);
1901 ath_beacon_config(sc, vif);
1902 /*
1903 * Request a re-configuration of Beacon related timers
1904 * on the receipt of the first Beacon frame (i.e.,
1905 * after time sync with the AP).
1906 */
1907 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
1908 /* Reset rssi stats */
1909 sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
1910 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1911
1912 if (!common->disable_ani) {
1913 sc->sc_flags |= SC_OP_ANI_RUN;
1914 ath_start_ani(common);
1915 }
1916
1917 }
1918 }
1919
ath9k_config_bss(struct ath_softc * sc,struct ieee80211_vif * vif)1920 static void ath9k_config_bss(struct ath_softc *sc, struct ieee80211_vif *vif)
1921 {
1922 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1923 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1924 struct ath_vif *avp = (void *)vif->drv_priv;
1925
1926 if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
1927 return;
1928
1929 /* Reconfigure bss info */
1930 if (avp->primary_sta_vif && !bss_conf->assoc) {
1931 ath_dbg(common, CONFIG, "Bss Info DISASSOC %d, bssid %pM\n",
1932 common->curaid, common->curbssid);
1933 sc->sc_flags &= ~(SC_OP_PRIM_STA_VIF | SC_OP_BEACONS);
1934 avp->primary_sta_vif = false;
1935 memset(common->curbssid, 0, ETH_ALEN);
1936 common->curaid = 0;
1937 }
1938
1939 ieee80211_iterate_active_interfaces_atomic(
1940 sc->hw, ath9k_bss_iter, sc);
1941
1942 /*
1943 * None of station vifs are associated.
1944 * Clear bssid & aid
1945 */
1946 if (!(sc->sc_flags & SC_OP_PRIM_STA_VIF)) {
1947 ath9k_hw_write_associd(sc->sc_ah);
1948 /* Stop ANI */
1949 sc->sc_flags &= ~SC_OP_ANI_RUN;
1950 del_timer_sync(&common->ani.timer);
1951 memset(&sc->caldata, 0, sizeof(sc->caldata));
1952 }
1953 }
1954
ath9k_bss_info_changed(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_bss_conf * bss_conf,u32 changed)1955 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1956 struct ieee80211_vif *vif,
1957 struct ieee80211_bss_conf *bss_conf,
1958 u32 changed)
1959 {
1960 struct ath_softc *sc = hw->priv;
1961 struct ath_hw *ah = sc->sc_ah;
1962 struct ath_common *common = ath9k_hw_common(ah);
1963 struct ath_vif *avp = (void *)vif->drv_priv;
1964 int slottime;
1965 int error;
1966
1967 ath9k_ps_wakeup(sc);
1968 mutex_lock(&sc->mutex);
1969
1970 if (changed & BSS_CHANGED_ASSOC) {
1971 ath9k_config_bss(sc, vif);
1972
1973 ath_dbg(common, CONFIG, "BSSID: %pM aid: 0x%x\n",
1974 common->curbssid, common->curaid);
1975 }
1976
1977 if (changed & BSS_CHANGED_IBSS) {
1978 /* There can be only one vif available */
1979 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1980 common->curaid = bss_conf->aid;
1981 ath9k_hw_write_associd(sc->sc_ah);
1982
1983 if (bss_conf->ibss_joined) {
1984 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1985
1986 if (!common->disable_ani) {
1987 sc->sc_flags |= SC_OP_ANI_RUN;
1988 ath_start_ani(common);
1989 }
1990
1991 } else {
1992 sc->sc_flags &= ~SC_OP_ANI_RUN;
1993 del_timer_sync(&common->ani.timer);
1994 }
1995 }
1996
1997 /* Enable transmission of beacons (AP, IBSS, MESH) */
1998 if ((changed & BSS_CHANGED_BEACON) ||
1999 ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
2000 ath9k_set_beaconing_status(sc, false);
2001 error = ath_beacon_alloc(sc, vif);
2002 if (!error)
2003 ath_beacon_config(sc, vif);
2004 ath9k_set_beaconing_status(sc, true);
2005 }
2006
2007 if (changed & BSS_CHANGED_ERP_SLOT) {
2008 if (bss_conf->use_short_slot)
2009 slottime = 9;
2010 else
2011 slottime = 20;
2012 if (vif->type == NL80211_IFTYPE_AP) {
2013 /*
2014 * Defer update, so that connected stations can adjust
2015 * their settings at the same time.
2016 * See beacon.c for more details
2017 */
2018 sc->beacon.slottime = slottime;
2019 sc->beacon.updateslot = UPDATE;
2020 } else {
2021 ah->slottime = slottime;
2022 ath9k_hw_init_global_settings(ah);
2023 }
2024 }
2025
2026 /* Disable transmission of beacons */
2027 if ((changed & BSS_CHANGED_BEACON_ENABLED) &&
2028 !bss_conf->enable_beacon) {
2029 ath9k_set_beaconing_status(sc, false);
2030 avp->is_bslot_active = false;
2031 ath9k_set_beaconing_status(sc, true);
2032 }
2033
2034 if (changed & BSS_CHANGED_BEACON_INT) {
2035 /*
2036 * In case of AP mode, the HW TSF has to be reset
2037 * when the beacon interval changes.
2038 */
2039 if (vif->type == NL80211_IFTYPE_AP) {
2040 sc->sc_flags |= SC_OP_TSF_RESET;
2041 ath9k_set_beaconing_status(sc, false);
2042 error = ath_beacon_alloc(sc, vif);
2043 if (!error)
2044 ath_beacon_config(sc, vif);
2045 ath9k_set_beaconing_status(sc, true);
2046 } else
2047 ath_beacon_config(sc, vif);
2048 }
2049
2050 mutex_unlock(&sc->mutex);
2051 ath9k_ps_restore(sc);
2052 }
2053
ath9k_get_tsf(struct ieee80211_hw * hw,struct ieee80211_vif * vif)2054 static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
2055 {
2056 struct ath_softc *sc = hw->priv;
2057 u64 tsf;
2058
2059 mutex_lock(&sc->mutex);
2060 ath9k_ps_wakeup(sc);
2061 tsf = ath9k_hw_gettsf64(sc->sc_ah);
2062 ath9k_ps_restore(sc);
2063 mutex_unlock(&sc->mutex);
2064
2065 return tsf;
2066 }
2067
ath9k_set_tsf(struct ieee80211_hw * hw,struct ieee80211_vif * vif,u64 tsf)2068 static void ath9k_set_tsf(struct ieee80211_hw *hw,
2069 struct ieee80211_vif *vif,
2070 u64 tsf)
2071 {
2072 struct ath_softc *sc = hw->priv;
2073
2074 mutex_lock(&sc->mutex);
2075 ath9k_ps_wakeup(sc);
2076 ath9k_hw_settsf64(sc->sc_ah, tsf);
2077 ath9k_ps_restore(sc);
2078 mutex_unlock(&sc->mutex);
2079 }
2080
ath9k_reset_tsf(struct ieee80211_hw * hw,struct ieee80211_vif * vif)2081 static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
2082 {
2083 struct ath_softc *sc = hw->priv;
2084
2085 mutex_lock(&sc->mutex);
2086
2087 ath9k_ps_wakeup(sc);
2088 ath9k_hw_reset_tsf(sc->sc_ah);
2089 ath9k_ps_restore(sc);
2090
2091 mutex_unlock(&sc->mutex);
2092 }
2093
ath9k_ampdu_action(struct ieee80211_hw * hw,struct ieee80211_vif * vif,enum ieee80211_ampdu_mlme_action action,struct ieee80211_sta * sta,u16 tid,u16 * ssn,u8 buf_size)2094 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2095 struct ieee80211_vif *vif,
2096 enum ieee80211_ampdu_mlme_action action,
2097 struct ieee80211_sta *sta,
2098 u16 tid, u16 *ssn, u8 buf_size)
2099 {
2100 struct ath_softc *sc = hw->priv;
2101 int ret = 0;
2102
2103 local_bh_disable();
2104
2105 switch (action) {
2106 case IEEE80211_AMPDU_RX_START:
2107 break;
2108 case IEEE80211_AMPDU_RX_STOP:
2109 break;
2110 case IEEE80211_AMPDU_TX_START:
2111 ath9k_ps_wakeup(sc);
2112 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2113 if (!ret)
2114 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2115 ath9k_ps_restore(sc);
2116 break;
2117 case IEEE80211_AMPDU_TX_STOP:
2118 ath9k_ps_wakeup(sc);
2119 ath_tx_aggr_stop(sc, sta, tid);
2120 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2121 ath9k_ps_restore(sc);
2122 break;
2123 case IEEE80211_AMPDU_TX_OPERATIONAL:
2124 ath9k_ps_wakeup(sc);
2125 ath_tx_aggr_resume(sc, sta, tid);
2126 ath9k_ps_restore(sc);
2127 break;
2128 default:
2129 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2130 }
2131
2132 local_bh_enable();
2133
2134 return ret;
2135 }
2136
ath9k_get_survey(struct ieee80211_hw * hw,int idx,struct survey_info * survey)2137 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2138 struct survey_info *survey)
2139 {
2140 struct ath_softc *sc = hw->priv;
2141 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2142 struct ieee80211_supported_band *sband;
2143 struct ieee80211_channel *chan;
2144 unsigned long flags;
2145 int pos;
2146
2147 spin_lock_irqsave(&common->cc_lock, flags);
2148 if (idx == 0)
2149 ath_update_survey_stats(sc);
2150
2151 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2152 if (sband && idx >= sband->n_channels) {
2153 idx -= sband->n_channels;
2154 sband = NULL;
2155 }
2156
2157 if (!sband)
2158 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2159
2160 if (!sband || idx >= sband->n_channels) {
2161 spin_unlock_irqrestore(&common->cc_lock, flags);
2162 return -ENOENT;
2163 }
2164
2165 chan = &sband->channels[idx];
2166 pos = chan->hw_value;
2167 memcpy(survey, &sc->survey[pos], sizeof(*survey));
2168 survey->channel = chan;
2169 spin_unlock_irqrestore(&common->cc_lock, flags);
2170
2171 return 0;
2172 }
2173
ath9k_set_coverage_class(struct ieee80211_hw * hw,u8 coverage_class)2174 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2175 {
2176 struct ath_softc *sc = hw->priv;
2177 struct ath_hw *ah = sc->sc_ah;
2178
2179 mutex_lock(&sc->mutex);
2180 ah->coverage_class = coverage_class;
2181
2182 ath9k_ps_wakeup(sc);
2183 ath9k_hw_init_global_settings(ah);
2184 ath9k_ps_restore(sc);
2185
2186 mutex_unlock(&sc->mutex);
2187 }
2188
ath9k_flush(struct ieee80211_hw * hw,bool drop)2189 static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
2190 {
2191 struct ath_softc *sc = hw->priv;
2192 struct ath_hw *ah = sc->sc_ah;
2193 struct ath_common *common = ath9k_hw_common(ah);
2194 int timeout = 200; /* ms */
2195 int i, j;
2196 bool drain_txq;
2197
2198 mutex_lock(&sc->mutex);
2199 cancel_delayed_work_sync(&sc->tx_complete_work);
2200
2201 if (ah->ah_flags & AH_UNPLUGGED) {
2202 ath_dbg(common, ANY, "Device has been unplugged!\n");
2203 mutex_unlock(&sc->mutex);
2204 return;
2205 }
2206
2207 if (sc->sc_flags & SC_OP_INVALID) {
2208 ath_dbg(common, ANY, "Device not present\n");
2209 mutex_unlock(&sc->mutex);
2210 return;
2211 }
2212
2213 for (j = 0; j < timeout; j++) {
2214 bool npend = false;
2215
2216 if (j)
2217 usleep_range(1000, 2000);
2218
2219 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2220 if (!ATH_TXQ_SETUP(sc, i))
2221 continue;
2222
2223 npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
2224
2225 if (npend)
2226 break;
2227 }
2228
2229 if (!npend)
2230 break;
2231 }
2232
2233 if (drop) {
2234 ath9k_ps_wakeup(sc);
2235 spin_lock_bh(&sc->sc_pcu_lock);
2236 drain_txq = ath_drain_all_txq(sc, false);
2237 spin_unlock_bh(&sc->sc_pcu_lock);
2238
2239 if (!drain_txq)
2240 ath_reset(sc, false);
2241
2242 ath9k_ps_restore(sc);
2243 ieee80211_wake_queues(hw);
2244 }
2245
2246 ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
2247 mutex_unlock(&sc->mutex);
2248 }
2249
ath9k_tx_frames_pending(struct ieee80211_hw * hw)2250 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
2251 {
2252 struct ath_softc *sc = hw->priv;
2253 int i;
2254
2255 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2256 if (!ATH_TXQ_SETUP(sc, i))
2257 continue;
2258
2259 if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
2260 return true;
2261 }
2262 return false;
2263 }
2264
ath9k_tx_last_beacon(struct ieee80211_hw * hw)2265 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
2266 {
2267 struct ath_softc *sc = hw->priv;
2268 struct ath_hw *ah = sc->sc_ah;
2269 struct ieee80211_vif *vif;
2270 struct ath_vif *avp;
2271 struct ath_buf *bf;
2272 struct ath_tx_status ts;
2273 bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
2274 int status;
2275
2276 vif = sc->beacon.bslot[0];
2277 if (!vif)
2278 return 0;
2279
2280 avp = (void *)vif->drv_priv;
2281 if (!avp->is_bslot_active)
2282 return 0;
2283
2284 if (!sc->beacon.tx_processed && !edma) {
2285 tasklet_disable(&sc->bcon_tasklet);
2286
2287 bf = avp->av_bcbuf;
2288 if (!bf || !bf->bf_mpdu)
2289 goto skip;
2290
2291 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
2292 if (status == -EINPROGRESS)
2293 goto skip;
2294
2295 sc->beacon.tx_processed = true;
2296 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
2297
2298 skip:
2299 tasklet_enable(&sc->bcon_tasklet);
2300 }
2301
2302 return sc->beacon.tx_last;
2303 }
2304
ath9k_get_stats(struct ieee80211_hw * hw,struct ieee80211_low_level_stats * stats)2305 static int ath9k_get_stats(struct ieee80211_hw *hw,
2306 struct ieee80211_low_level_stats *stats)
2307 {
2308 struct ath_softc *sc = hw->priv;
2309 struct ath_hw *ah = sc->sc_ah;
2310 struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
2311
2312 stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
2313 stats->dot11RTSFailureCount = mib_stats->rts_bad;
2314 stats->dot11FCSErrorCount = mib_stats->fcs_bad;
2315 stats->dot11RTSSuccessCount = mib_stats->rts_good;
2316 return 0;
2317 }
2318
fill_chainmask(u32 cap,u32 new)2319 static u32 fill_chainmask(u32 cap, u32 new)
2320 {
2321 u32 filled = 0;
2322 int i;
2323
2324 for (i = 0; cap && new; i++, cap >>= 1) {
2325 if (!(cap & BIT(0)))
2326 continue;
2327
2328 if (new & BIT(0))
2329 filled |= BIT(i);
2330
2331 new >>= 1;
2332 }
2333
2334 return filled;
2335 }
2336
ath9k_set_antenna(struct ieee80211_hw * hw,u32 tx_ant,u32 rx_ant)2337 static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
2338 {
2339 struct ath_softc *sc = hw->priv;
2340 struct ath_hw *ah = sc->sc_ah;
2341
2342 if (!rx_ant || !tx_ant)
2343 return -EINVAL;
2344
2345 sc->ant_rx = rx_ant;
2346 sc->ant_tx = tx_ant;
2347
2348 if (ah->caps.rx_chainmask == 1)
2349 return 0;
2350
2351 /* AR9100 runs into calibration issues if not all rx chains are enabled */
2352 if (AR_SREV_9100(ah))
2353 ah->rxchainmask = 0x7;
2354 else
2355 ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
2356
2357 ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
2358 ath9k_reload_chainmask_settings(sc);
2359
2360 return 0;
2361 }
2362
ath9k_get_antenna(struct ieee80211_hw * hw,u32 * tx_ant,u32 * rx_ant)2363 static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
2364 {
2365 struct ath_softc *sc = hw->priv;
2366
2367 *tx_ant = sc->ant_tx;
2368 *rx_ant = sc->ant_rx;
2369 return 0;
2370 }
2371
2372 struct ieee80211_ops ath9k_ops = {
2373 .tx = ath9k_tx,
2374 .start = ath9k_start,
2375 .stop = ath9k_stop,
2376 .add_interface = ath9k_add_interface,
2377 .change_interface = ath9k_change_interface,
2378 .remove_interface = ath9k_remove_interface,
2379 .config = ath9k_config,
2380 .configure_filter = ath9k_configure_filter,
2381 .sta_add = ath9k_sta_add,
2382 .sta_remove = ath9k_sta_remove,
2383 .sta_notify = ath9k_sta_notify,
2384 .conf_tx = ath9k_conf_tx,
2385 .bss_info_changed = ath9k_bss_info_changed,
2386 .set_key = ath9k_set_key,
2387 .get_tsf = ath9k_get_tsf,
2388 .set_tsf = ath9k_set_tsf,
2389 .reset_tsf = ath9k_reset_tsf,
2390 .ampdu_action = ath9k_ampdu_action,
2391 .get_survey = ath9k_get_survey,
2392 .rfkill_poll = ath9k_rfkill_poll_state,
2393 .set_coverage_class = ath9k_set_coverage_class,
2394 .flush = ath9k_flush,
2395 .tx_frames_pending = ath9k_tx_frames_pending,
2396 .tx_last_beacon = ath9k_tx_last_beacon,
2397 .get_stats = ath9k_get_stats,
2398 .set_antenna = ath9k_set_antenna,
2399 .get_antenna = ath9k_get_antenna,
2400 };
2401