1 /*
2  * Copyright (c) 2010 Atheros Communications Inc.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 #ifndef ATH9K_HW_OPS_H
18 #define ATH9K_HW_OPS_H
19 
20 #include "hw.h"
21 
22 /* Hardware core and driver accessible callbacks */
23 
ath9k_hw_configpcipowersave(struct ath_hw * ah,int restore,int power_off)24 static inline void ath9k_hw_configpcipowersave(struct ath_hw *ah,
25 					       int restore,
26 					       int power_off)
27 {
28 	ath9k_hw_ops(ah)->config_pci_powersave(ah, restore, power_off);
29 }
30 
ath9k_hw_rxena(struct ath_hw * ah)31 static inline void ath9k_hw_rxena(struct ath_hw *ah)
32 {
33 	ath9k_hw_ops(ah)->rx_enable(ah);
34 }
35 
ath9k_hw_set_desc_link(struct ath_hw * ah,void * ds,u32 link)36 static inline void ath9k_hw_set_desc_link(struct ath_hw *ah, void *ds,
37 					  u32 link)
38 {
39 	ath9k_hw_ops(ah)->set_desc_link(ds, link);
40 }
41 
ath9k_hw_get_desc_link(struct ath_hw * ah,void * ds,u32 ** link)42 static inline void ath9k_hw_get_desc_link(struct ath_hw *ah, void *ds,
43 					  u32 **link)
44 {
45 	ath9k_hw_ops(ah)->get_desc_link(ds, link);
46 }
ath9k_hw_calibrate(struct ath_hw * ah,struct ath9k_channel * chan,u8 rxchainmask,bool longcal)47 static inline bool ath9k_hw_calibrate(struct ath_hw *ah,
48 				      struct ath9k_channel *chan,
49 				      u8 rxchainmask,
50 				      bool longcal)
51 {
52 	return ath9k_hw_ops(ah)->calibrate(ah, chan, rxchainmask, longcal);
53 }
54 
ath9k_hw_getisr(struct ath_hw * ah,enum ath9k_int * masked)55 static inline bool ath9k_hw_getisr(struct ath_hw *ah, enum ath9k_int *masked)
56 {
57 	return ath9k_hw_ops(ah)->get_isr(ah, masked);
58 }
59 
ath9k_hw_filltxdesc(struct ath_hw * ah,void * ds,u32 seglen,bool is_firstseg,bool is_lastseg,const void * ds0,dma_addr_t buf_addr,unsigned int qcu)60 static inline void ath9k_hw_filltxdesc(struct ath_hw *ah, void *ds, u32 seglen,
61 				  bool is_firstseg, bool is_lastseg,
62 				  const void *ds0, dma_addr_t buf_addr,
63 				  unsigned int qcu)
64 {
65 	ath9k_hw_ops(ah)->fill_txdesc(ah, ds, seglen, is_firstseg, is_lastseg,
66 				      ds0, buf_addr, qcu);
67 }
68 
ath9k_hw_txprocdesc(struct ath_hw * ah,void * ds,struct ath_tx_status * ts)69 static inline int ath9k_hw_txprocdesc(struct ath_hw *ah, void *ds,
70 				      struct ath_tx_status *ts)
71 {
72 	return ath9k_hw_ops(ah)->proc_txdesc(ah, ds, ts);
73 }
74 
ath9k_hw_set11n_txdesc(struct ath_hw * ah,void * ds,u32 pktLen,enum ath9k_pkt_type type,u32 txPower,u32 keyIx,enum ath9k_key_type keyType,u32 flags)75 static inline void ath9k_hw_set11n_txdesc(struct ath_hw *ah, void *ds,
76 					  u32 pktLen, enum ath9k_pkt_type type,
77 					  u32 txPower, u32 keyIx,
78 					  enum ath9k_key_type keyType,
79 					  u32 flags)
80 {
81 	ath9k_hw_ops(ah)->set11n_txdesc(ah, ds, pktLen, type, txPower, keyIx,
82 				      keyType, flags);
83 }
84 
ath9k_hw_set11n_ratescenario(struct ath_hw * ah,void * ds,void * lastds,u32 durUpdateEn,u32 rtsctsRate,u32 rtsctsDuration,struct ath9k_11n_rate_series series[],u32 nseries,u32 flags)85 static inline void ath9k_hw_set11n_ratescenario(struct ath_hw *ah, void *ds,
86 					void *lastds,
87 					u32 durUpdateEn, u32 rtsctsRate,
88 					u32 rtsctsDuration,
89 					struct ath9k_11n_rate_series series[],
90 					u32 nseries, u32 flags)
91 {
92 	ath9k_hw_ops(ah)->set11n_ratescenario(ah, ds, lastds, durUpdateEn,
93 					    rtsctsRate, rtsctsDuration, series,
94 					    nseries, flags);
95 }
96 
ath9k_hw_set11n_aggr_first(struct ath_hw * ah,void * ds,u32 aggrLen)97 static inline void ath9k_hw_set11n_aggr_first(struct ath_hw *ah, void *ds,
98 					u32 aggrLen)
99 {
100 	ath9k_hw_ops(ah)->set11n_aggr_first(ah, ds, aggrLen);
101 }
102 
ath9k_hw_set11n_aggr_middle(struct ath_hw * ah,void * ds,u32 numDelims)103 static inline void ath9k_hw_set11n_aggr_middle(struct ath_hw *ah, void *ds,
104 					       u32 numDelims)
105 {
106 	ath9k_hw_ops(ah)->set11n_aggr_middle(ah, ds, numDelims);
107 }
108 
ath9k_hw_set11n_aggr_last(struct ath_hw * ah,void * ds)109 static inline void ath9k_hw_set11n_aggr_last(struct ath_hw *ah, void *ds)
110 {
111 	ath9k_hw_ops(ah)->set11n_aggr_last(ah, ds);
112 }
113 
ath9k_hw_clr11n_aggr(struct ath_hw * ah,void * ds)114 static inline void ath9k_hw_clr11n_aggr(struct ath_hw *ah, void *ds)
115 {
116 	ath9k_hw_ops(ah)->clr11n_aggr(ah, ds);
117 }
118 
ath9k_hw_set11n_burstduration(struct ath_hw * ah,void * ds,u32 burstDuration)119 static inline void ath9k_hw_set11n_burstduration(struct ath_hw *ah, void *ds,
120 						 u32 burstDuration)
121 {
122 	ath9k_hw_ops(ah)->set11n_burstduration(ah, ds, burstDuration);
123 }
124 
ath9k_hw_set11n_virtualmorefrag(struct ath_hw * ah,void * ds,u32 vmf)125 static inline void ath9k_hw_set11n_virtualmorefrag(struct ath_hw *ah, void *ds,
126 						   u32 vmf)
127 {
128 	ath9k_hw_ops(ah)->set11n_virtualmorefrag(ah, ds, vmf);
129 }
130 
131 /* Private hardware call ops */
132 
133 /* PHY ops */
134 
ath9k_hw_rf_set_freq(struct ath_hw * ah,struct ath9k_channel * chan)135 static inline int ath9k_hw_rf_set_freq(struct ath_hw *ah,
136 				       struct ath9k_channel *chan)
137 {
138 	return ath9k_hw_private_ops(ah)->rf_set_freq(ah, chan);
139 }
140 
ath9k_hw_spur_mitigate_freq(struct ath_hw * ah,struct ath9k_channel * chan)141 static inline void ath9k_hw_spur_mitigate_freq(struct ath_hw *ah,
142 					       struct ath9k_channel *chan)
143 {
144 	ath9k_hw_private_ops(ah)->spur_mitigate_freq(ah, chan);
145 }
146 
ath9k_hw_rf_alloc_ext_banks(struct ath_hw * ah)147 static inline int ath9k_hw_rf_alloc_ext_banks(struct ath_hw *ah)
148 {
149 	if (!ath9k_hw_private_ops(ah)->rf_alloc_ext_banks)
150 		return 0;
151 
152 	return ath9k_hw_private_ops(ah)->rf_alloc_ext_banks(ah);
153 }
154 
ath9k_hw_rf_free_ext_banks(struct ath_hw * ah)155 static inline void ath9k_hw_rf_free_ext_banks(struct ath_hw *ah)
156 {
157 	if (!ath9k_hw_private_ops(ah)->rf_free_ext_banks)
158 		return;
159 
160 	ath9k_hw_private_ops(ah)->rf_free_ext_banks(ah);
161 }
162 
ath9k_hw_set_rf_regs(struct ath_hw * ah,struct ath9k_channel * chan,u16 modesIndex)163 static inline bool ath9k_hw_set_rf_regs(struct ath_hw *ah,
164 					struct ath9k_channel *chan,
165 					u16 modesIndex)
166 {
167 	if (!ath9k_hw_private_ops(ah)->set_rf_regs)
168 		return true;
169 
170 	return ath9k_hw_private_ops(ah)->set_rf_regs(ah, chan, modesIndex);
171 }
172 
ath9k_hw_init_bb(struct ath_hw * ah,struct ath9k_channel * chan)173 static inline void ath9k_hw_init_bb(struct ath_hw *ah,
174 				    struct ath9k_channel *chan)
175 {
176 	return ath9k_hw_private_ops(ah)->init_bb(ah, chan);
177 }
178 
ath9k_hw_set_channel_regs(struct ath_hw * ah,struct ath9k_channel * chan)179 static inline void ath9k_hw_set_channel_regs(struct ath_hw *ah,
180 					     struct ath9k_channel *chan)
181 {
182 	return ath9k_hw_private_ops(ah)->set_channel_regs(ah, chan);
183 }
184 
ath9k_hw_process_ini(struct ath_hw * ah,struct ath9k_channel * chan)185 static inline int ath9k_hw_process_ini(struct ath_hw *ah,
186 					struct ath9k_channel *chan)
187 {
188 	return ath9k_hw_private_ops(ah)->process_ini(ah, chan);
189 }
190 
ath9k_olc_init(struct ath_hw * ah)191 static inline void ath9k_olc_init(struct ath_hw *ah)
192 {
193 	if (!ath9k_hw_private_ops(ah)->olc_init)
194 		return;
195 
196 	return ath9k_hw_private_ops(ah)->olc_init(ah);
197 }
198 
ath9k_hw_set_rfmode(struct ath_hw * ah,struct ath9k_channel * chan)199 static inline void ath9k_hw_set_rfmode(struct ath_hw *ah,
200 				       struct ath9k_channel *chan)
201 {
202 	return ath9k_hw_private_ops(ah)->set_rfmode(ah, chan);
203 }
204 
ath9k_hw_mark_phy_inactive(struct ath_hw * ah)205 static inline void ath9k_hw_mark_phy_inactive(struct ath_hw *ah)
206 {
207 	return ath9k_hw_private_ops(ah)->mark_phy_inactive(ah);
208 }
209 
ath9k_hw_set_delta_slope(struct ath_hw * ah,struct ath9k_channel * chan)210 static inline void ath9k_hw_set_delta_slope(struct ath_hw *ah,
211 					    struct ath9k_channel *chan)
212 {
213 	return ath9k_hw_private_ops(ah)->set_delta_slope(ah, chan);
214 }
215 
ath9k_hw_rfbus_req(struct ath_hw * ah)216 static inline bool ath9k_hw_rfbus_req(struct ath_hw *ah)
217 {
218 	return ath9k_hw_private_ops(ah)->rfbus_req(ah);
219 }
220 
ath9k_hw_rfbus_done(struct ath_hw * ah)221 static inline void ath9k_hw_rfbus_done(struct ath_hw *ah)
222 {
223 	return ath9k_hw_private_ops(ah)->rfbus_done(ah);
224 }
225 
ath9k_hw_restore_chainmask(struct ath_hw * ah)226 static inline void ath9k_hw_restore_chainmask(struct ath_hw *ah)
227 {
228 	if (!ath9k_hw_private_ops(ah)->restore_chainmask)
229 		return;
230 
231 	return ath9k_hw_private_ops(ah)->restore_chainmask(ah);
232 }
233 
ath9k_hw_set_diversity(struct ath_hw * ah,bool value)234 static inline void ath9k_hw_set_diversity(struct ath_hw *ah, bool value)
235 {
236 	return ath9k_hw_private_ops(ah)->set_diversity(ah, value);
237 }
238 
ath9k_hw_ani_control(struct ath_hw * ah,enum ath9k_ani_cmd cmd,int param)239 static inline bool ath9k_hw_ani_control(struct ath_hw *ah,
240 					enum ath9k_ani_cmd cmd, int param)
241 {
242 	return ath9k_hw_private_ops(ah)->ani_control(ah, cmd, param);
243 }
244 
ath9k_hw_do_getnf(struct ath_hw * ah,int16_t nfarray[NUM_NF_READINGS])245 static inline void ath9k_hw_do_getnf(struct ath_hw *ah,
246 				     int16_t nfarray[NUM_NF_READINGS])
247 {
248 	ath9k_hw_private_ops(ah)->do_getnf(ah, nfarray);
249 }
250 
ath9k_hw_init_cal(struct ath_hw * ah,struct ath9k_channel * chan)251 static inline bool ath9k_hw_init_cal(struct ath_hw *ah,
252 				     struct ath9k_channel *chan)
253 {
254 	return ath9k_hw_private_ops(ah)->init_cal(ah, chan);
255 }
256 
ath9k_hw_setup_calibration(struct ath_hw * ah,struct ath9k_cal_list * currCal)257 static inline void ath9k_hw_setup_calibration(struct ath_hw *ah,
258 					      struct ath9k_cal_list *currCal)
259 {
260 	ath9k_hw_private_ops(ah)->setup_calibration(ah, currCal);
261 }
262 
263 #endif /* ATH9K_HW_OPS_H */
264