1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
2 /*
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
5 */
6
7 #ifndef ATH11K_CORE_H
8 #define ATH11K_CORE_H
9
10 #include <linux/types.h>
11 #include <linux/interrupt.h>
12 #include <linux/irq.h>
13 #include <linux/bitfield.h>
14 #include <linux/dmi.h>
15 #include <linux/ctype.h>
16 #include <linux/rhashtable.h>
17 #include "qmi.h"
18 #include "htc.h"
19 #include "wmi.h"
20 #include "hal.h"
21 #include "dp.h"
22 #include "ce.h"
23 #include "mac.h"
24 #include "hw.h"
25 #include "hal_rx.h"
26 #include "reg.h"
27 #include "thermal.h"
28 #include "dbring.h"
29 #include "spectral.h"
30 #include "wow.h"
31
32 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
33
34 #define ATH11K_TX_MGMT_NUM_PENDING_MAX 512
35
36 #define ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI 64
37
38 /* Pending management packets threshold for dropping probe responses */
39 #define ATH11K_PRB_RSP_DROP_THRESHOLD ((ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI * 3) / 4)
40
41 #define ATH11K_INVALID_HW_MAC_ID 0xFF
42 #define ATH11K_CONNECTION_LOSS_HZ (3 * HZ)
43
44 /* SMBIOS type containing Board Data File Name Extension */
45 #define ATH11K_SMBIOS_BDF_EXT_TYPE 0xF8
46
47 /* SMBIOS type structure length (excluding strings-set) */
48 #define ATH11K_SMBIOS_BDF_EXT_LENGTH 0x9
49
50 /* The magic used by QCA spec */
51 #define ATH11K_SMBIOS_BDF_EXT_MAGIC "BDF_"
52
53 extern unsigned int ath11k_frame_mode;
54
55 #define ATH11K_SCAN_TIMEOUT_HZ (20 * HZ)
56
57 #define ATH11K_MON_TIMER_INTERVAL 10
58 #define ATH11K_RESET_TIMEOUT_HZ (20 * HZ)
59 #define ATH11K_RESET_MAX_FAIL_COUNT_FIRST 3
60 #define ATH11K_RESET_MAX_FAIL_COUNT_FINAL 5
61 #define ATH11K_RESET_FAIL_TIMEOUT_HZ (20 * HZ)
62 #define ATH11K_RECONFIGURE_TIMEOUT_HZ (10 * HZ)
63 #define ATH11K_RECOVER_START_TIMEOUT_HZ (20 * HZ)
64
65 enum ath11k_supported_bw {
66 ATH11K_BW_20 = 0,
67 ATH11K_BW_40 = 1,
68 ATH11K_BW_80 = 2,
69 ATH11K_BW_160 = 3,
70 };
71
72 enum ath11k_bdf_search {
73 ATH11K_BDF_SEARCH_DEFAULT,
74 ATH11K_BDF_SEARCH_BUS_AND_BOARD,
75 };
76
77 enum wme_ac {
78 WME_AC_BE,
79 WME_AC_BK,
80 WME_AC_VI,
81 WME_AC_VO,
82 WME_NUM_AC
83 };
84
85 #define ATH11K_HT_MCS_MAX 7
86 #define ATH11K_VHT_MCS_MAX 9
87 #define ATH11K_HE_MCS_MAX 11
88
89 enum ath11k_crypt_mode {
90 /* Only use hardware crypto engine */
91 ATH11K_CRYPT_MODE_HW,
92 /* Only use software crypto */
93 ATH11K_CRYPT_MODE_SW,
94 };
95
ath11k_tid_to_ac(u32 tid)96 static inline enum wme_ac ath11k_tid_to_ac(u32 tid)
97 {
98 return (((tid == 0) || (tid == 3)) ? WME_AC_BE :
99 ((tid == 1) || (tid == 2)) ? WME_AC_BK :
100 ((tid == 4) || (tid == 5)) ? WME_AC_VI :
101 WME_AC_VO);
102 }
103
104 enum ath11k_skb_flags {
105 ATH11K_SKB_HW_80211_ENCAP = BIT(0),
106 ATH11K_SKB_CIPHER_SET = BIT(1),
107 };
108
109 struct ath11k_skb_cb {
110 dma_addr_t paddr;
111 u8 eid;
112 u8 flags;
113 u32 cipher;
114 struct ath11k *ar;
115 struct ieee80211_vif *vif;
116 } __packed;
117
118 struct ath11k_skb_rxcb {
119 dma_addr_t paddr;
120 bool is_first_msdu;
121 bool is_last_msdu;
122 bool is_continuation;
123 bool is_mcbc;
124 bool is_eapol;
125 struct hal_rx_desc *rx_desc;
126 u8 err_rel_src;
127 u8 err_code;
128 u8 mac_id;
129 u8 unmapped;
130 u8 is_frag;
131 u8 tid;
132 u16 peer_id;
133 u16 seq_no;
134 };
135
136 enum ath11k_hw_rev {
137 ATH11K_HW_IPQ8074,
138 ATH11K_HW_QCA6390_HW20,
139 ATH11K_HW_IPQ6018_HW10,
140 ATH11K_HW_QCN9074_HW10,
141 ATH11K_HW_WCN6855_HW20,
142 ATH11K_HW_WCN6855_HW21,
143 ATH11K_HW_WCN6750_HW10,
144 };
145
146 enum ath11k_firmware_mode {
147 /* the default mode, standard 802.11 functionality */
148 ATH11K_FIRMWARE_MODE_NORMAL,
149
150 /* factory tests etc */
151 ATH11K_FIRMWARE_MODE_FTM,
152
153 /* Cold boot calibration */
154 ATH11K_FIRMWARE_MODE_COLD_BOOT = 7,
155 };
156
157 extern bool ath11k_cold_boot_cal;
158
159 #define ATH11K_IRQ_NUM_MAX 52
160 #define ATH11K_EXT_IRQ_NUM_MAX 16
161
162 struct ath11k_ext_irq_grp {
163 struct ath11k_base *ab;
164 u32 irqs[ATH11K_EXT_IRQ_NUM_MAX];
165 u32 num_irq;
166 u32 grp_id;
167 u64 timestamp;
168 bool napi_enabled;
169 struct napi_struct napi;
170 struct net_device napi_ndev;
171 };
172
173 enum ath11k_smbios_cc_type {
174 /* disable country code setting from SMBIOS */
175 ATH11K_SMBIOS_CC_DISABLE = 0,
176
177 /* set country code by ANSI country name, based on ISO3166-1 alpha2 */
178 ATH11K_SMBIOS_CC_ISO = 1,
179
180 /* worldwide regdomain */
181 ATH11K_SMBIOS_CC_WW = 2,
182 };
183
184 struct ath11k_smbios_bdf {
185 struct dmi_header hdr;
186
187 u8 features_disabled;
188
189 /* enum ath11k_smbios_cc_type */
190 u8 country_code_flag;
191
192 /* To set specific country, you need to set country code
193 * flag=ATH11K_SMBIOS_CC_ISO first, then if country is United
194 * States, then country code value = 0x5553 ("US",'U' = 0x55, 'S'=
195 * 0x53). To set country to INDONESIA, then country code value =
196 * 0x4944 ("IN", 'I'=0x49, 'D'=0x44). If country code flag =
197 * ATH11K_SMBIOS_CC_WW, then you can use worldwide regulatory
198 * setting.
199 */
200 u16 cc_code;
201
202 u8 bdf_enabled;
203 u8 bdf_ext[];
204 } __packed;
205
206 #define HEHANDLE_CAP_PHYINFO_SIZE 3
207 #define HECAP_PHYINFO_SIZE 9
208 #define HECAP_MACINFO_SIZE 5
209 #define HECAP_TXRX_MCS_NSS_SIZE 2
210 #define HECAP_PPET16_PPET8_MAX_SIZE 25
211
212 #define HE_PPET16_PPET8_SIZE 8
213
214 /* 802.11ax PPE (PPDU packet Extension) threshold */
215 struct he_ppe_threshold {
216 u32 numss_m1;
217 u32 ru_mask;
218 u32 ppet16_ppet8_ru3_ru0[HE_PPET16_PPET8_SIZE];
219 };
220
221 struct ath11k_he {
222 u8 hecap_macinfo[HECAP_MACINFO_SIZE];
223 u32 hecap_rxmcsnssmap;
224 u32 hecap_txmcsnssmap;
225 u32 hecap_phyinfo[HEHANDLE_CAP_PHYINFO_SIZE];
226 struct he_ppe_threshold hecap_ppet;
227 u32 heop_param;
228 };
229
230 #define MAX_RADIOS 3
231
232 enum {
233 WMI_HOST_TP_SCALE_MAX = 0,
234 WMI_HOST_TP_SCALE_50 = 1,
235 WMI_HOST_TP_SCALE_25 = 2,
236 WMI_HOST_TP_SCALE_12 = 3,
237 WMI_HOST_TP_SCALE_MIN = 4,
238 WMI_HOST_TP_SCALE_SIZE = 5,
239 };
240
241 enum ath11k_scan_state {
242 ATH11K_SCAN_IDLE,
243 ATH11K_SCAN_STARTING,
244 ATH11K_SCAN_RUNNING,
245 ATH11K_SCAN_ABORTING,
246 };
247
248 enum ath11k_11d_state {
249 ATH11K_11D_IDLE,
250 ATH11K_11D_PREPARING,
251 ATH11K_11D_RUNNING,
252 };
253
254 enum ath11k_dev_flags {
255 ATH11K_CAC_RUNNING,
256 ATH11K_FLAG_CORE_REGISTERED,
257 ATH11K_FLAG_CRASH_FLUSH,
258 ATH11K_FLAG_RAW_MODE,
259 ATH11K_FLAG_HW_CRYPTO_DISABLED,
260 ATH11K_FLAG_BTCOEX,
261 ATH11K_FLAG_RECOVERY,
262 ATH11K_FLAG_UNREGISTERING,
263 ATH11K_FLAG_REGISTERED,
264 ATH11K_FLAG_QMI_FAIL,
265 ATH11K_FLAG_HTC_SUSPEND_COMPLETE,
266 ATH11K_FLAG_CE_IRQ_ENABLED,
267 ATH11K_FLAG_EXT_IRQ_ENABLED,
268 ATH11K_FLAG_FIXED_MEM_RGN,
269 ATH11K_FLAG_DEVICE_INIT_DONE,
270 ATH11K_FLAG_MULTI_MSI_VECTORS,
271 };
272
273 enum ath11k_monitor_flags {
274 ATH11K_FLAG_MONITOR_CONF_ENABLED,
275 ATH11K_FLAG_MONITOR_STARTED,
276 ATH11K_FLAG_MONITOR_VDEV_CREATED,
277 };
278
279 #define ATH11K_IPV6_UC_TYPE 0
280 #define ATH11K_IPV6_AC_TYPE 1
281
282 #define ATH11K_IPV6_MAX_COUNT 16
283 #define ATH11K_IPV4_MAX_COUNT 2
284
285 struct ath11k_arp_ns_offload {
286 u8 ipv4_addr[ATH11K_IPV4_MAX_COUNT][4];
287 u32 ipv4_count;
288 u32 ipv6_count;
289 u8 ipv6_addr[ATH11K_IPV6_MAX_COUNT][16];
290 u8 self_ipv6_addr[ATH11K_IPV6_MAX_COUNT][16];
291 u8 ipv6_type[ATH11K_IPV6_MAX_COUNT];
292 bool ipv6_valid[ATH11K_IPV6_MAX_COUNT];
293 u8 mac_addr[ETH_ALEN];
294 };
295
296 struct ath11k_rekey_data {
297 u8 kck[NL80211_KCK_LEN];
298 u8 kek[NL80211_KCK_LEN];
299 u64 replay_ctr;
300 bool enable_offload;
301 };
302
303 struct ath11k_vif {
304 u32 vdev_id;
305 enum wmi_vdev_type vdev_type;
306 enum wmi_vdev_subtype vdev_subtype;
307 u32 beacon_interval;
308 u32 dtim_period;
309 u16 ast_hash;
310 u16 ast_idx;
311 u16 tcl_metadata;
312 u8 hal_addr_search_flags;
313 u8 search_type;
314
315 struct ath11k *ar;
316 struct ieee80211_vif *vif;
317
318 u16 tx_seq_no;
319 struct wmi_wmm_params_all_arg wmm_params;
320 struct list_head list;
321 union {
322 struct {
323 u32 uapsd;
324 } sta;
325 struct {
326 /* 127 stations; wmi limit */
327 u8 tim_bitmap[16];
328 u8 tim_len;
329 u32 ssid_len;
330 u8 ssid[IEEE80211_MAX_SSID_LEN];
331 bool hidden_ssid;
332 /* P2P_IE with NoA attribute for P2P_GO case */
333 u32 noa_len;
334 u8 *noa_data;
335 } ap;
336 } u;
337
338 bool is_started;
339 bool is_up;
340 bool spectral_enabled;
341 bool ps;
342 u32 aid;
343 u8 bssid[ETH_ALEN];
344 struct cfg80211_bitrate_mask bitrate_mask;
345 struct delayed_work connection_loss_work;
346 int num_legacy_stations;
347 int rtscts_prot_mode;
348 int txpower;
349 bool rsnie_present;
350 bool wpaie_present;
351 bool bcca_zero_sent;
352 bool do_not_send_tmpl;
353 struct ieee80211_chanctx_conf chanctx;
354 struct ath11k_arp_ns_offload arp_ns_offload;
355 struct ath11k_rekey_data rekey_data;
356
357 #ifdef CONFIG_ATH11K_DEBUGFS
358 struct dentry *debugfs_twt;
359 #endif /* CONFIG_ATH11K_DEBUGFS */
360 };
361
362 struct ath11k_vif_iter {
363 u32 vdev_id;
364 struct ath11k_vif *arvif;
365 };
366
367 struct ath11k_rx_peer_stats {
368 u64 num_msdu;
369 u64 num_mpdu_fcs_ok;
370 u64 num_mpdu_fcs_err;
371 u64 tcp_msdu_count;
372 u64 udp_msdu_count;
373 u64 other_msdu_count;
374 u64 ampdu_msdu_count;
375 u64 non_ampdu_msdu_count;
376 u64 stbc_count;
377 u64 beamformed_count;
378 u64 mcs_count[HAL_RX_MAX_MCS + 1];
379 u64 nss_count[HAL_RX_MAX_NSS];
380 u64 bw_count[HAL_RX_BW_MAX];
381 u64 gi_count[HAL_RX_GI_MAX];
382 u64 coding_count[HAL_RX_SU_MU_CODING_MAX];
383 u64 tid_count[IEEE80211_NUM_TIDS + 1];
384 u64 pream_cnt[HAL_RX_PREAMBLE_MAX];
385 u64 reception_type[HAL_RX_RECEPTION_TYPE_MAX];
386 u64 rx_duration;
387 u64 dcm_count;
388 u64 ru_alloc_cnt[HAL_RX_RU_ALLOC_TYPE_MAX];
389 };
390
391 #define ATH11K_HE_MCS_NUM 12
392 #define ATH11K_VHT_MCS_NUM 10
393 #define ATH11K_BW_NUM 4
394 #define ATH11K_NSS_NUM 4
395 #define ATH11K_LEGACY_NUM 12
396 #define ATH11K_GI_NUM 4
397 #define ATH11K_HT_MCS_NUM 32
398
399 enum ath11k_pkt_rx_err {
400 ATH11K_PKT_RX_ERR_FCS,
401 ATH11K_PKT_RX_ERR_TKIP,
402 ATH11K_PKT_RX_ERR_CRYPT,
403 ATH11K_PKT_RX_ERR_PEER_IDX_INVAL,
404 ATH11K_PKT_RX_ERR_MAX,
405 };
406
407 enum ath11k_ampdu_subfrm_num {
408 ATH11K_AMPDU_SUBFRM_NUM_10,
409 ATH11K_AMPDU_SUBFRM_NUM_20,
410 ATH11K_AMPDU_SUBFRM_NUM_30,
411 ATH11K_AMPDU_SUBFRM_NUM_40,
412 ATH11K_AMPDU_SUBFRM_NUM_50,
413 ATH11K_AMPDU_SUBFRM_NUM_60,
414 ATH11K_AMPDU_SUBFRM_NUM_MORE,
415 ATH11K_AMPDU_SUBFRM_NUM_MAX,
416 };
417
418 enum ath11k_amsdu_subfrm_num {
419 ATH11K_AMSDU_SUBFRM_NUM_1,
420 ATH11K_AMSDU_SUBFRM_NUM_2,
421 ATH11K_AMSDU_SUBFRM_NUM_3,
422 ATH11K_AMSDU_SUBFRM_NUM_4,
423 ATH11K_AMSDU_SUBFRM_NUM_MORE,
424 ATH11K_AMSDU_SUBFRM_NUM_MAX,
425 };
426
427 enum ath11k_counter_type {
428 ATH11K_COUNTER_TYPE_BYTES,
429 ATH11K_COUNTER_TYPE_PKTS,
430 ATH11K_COUNTER_TYPE_MAX,
431 };
432
433 enum ath11k_stats_type {
434 ATH11K_STATS_TYPE_SUCC,
435 ATH11K_STATS_TYPE_FAIL,
436 ATH11K_STATS_TYPE_RETRY,
437 ATH11K_STATS_TYPE_AMPDU,
438 ATH11K_STATS_TYPE_MAX,
439 };
440
441 struct ath11k_htt_data_stats {
442 u64 legacy[ATH11K_COUNTER_TYPE_MAX][ATH11K_LEGACY_NUM];
443 u64 ht[ATH11K_COUNTER_TYPE_MAX][ATH11K_HT_MCS_NUM];
444 u64 vht[ATH11K_COUNTER_TYPE_MAX][ATH11K_VHT_MCS_NUM];
445 u64 he[ATH11K_COUNTER_TYPE_MAX][ATH11K_HE_MCS_NUM];
446 u64 bw[ATH11K_COUNTER_TYPE_MAX][ATH11K_BW_NUM];
447 u64 nss[ATH11K_COUNTER_TYPE_MAX][ATH11K_NSS_NUM];
448 u64 gi[ATH11K_COUNTER_TYPE_MAX][ATH11K_GI_NUM];
449 };
450
451 struct ath11k_htt_tx_stats {
452 struct ath11k_htt_data_stats stats[ATH11K_STATS_TYPE_MAX];
453 u64 tx_duration;
454 u64 ba_fails;
455 u64 ack_fails;
456 };
457
458 struct ath11k_per_ppdu_tx_stats {
459 u16 succ_pkts;
460 u16 failed_pkts;
461 u16 retry_pkts;
462 u32 succ_bytes;
463 u32 failed_bytes;
464 u32 retry_bytes;
465 };
466
467 struct ath11k_sta {
468 struct ath11k_vif *arvif;
469
470 /* the following are protected by ar->data_lock */
471 u32 changed; /* IEEE80211_RC_* */
472 u32 bw;
473 u32 nss;
474 u32 smps;
475 enum hal_pn_type pn_type;
476
477 struct work_struct update_wk;
478 struct work_struct set_4addr_wk;
479 struct rate_info txrate;
480 u32 peer_nss;
481 struct rate_info last_txrate;
482 u64 rx_duration;
483 u64 tx_duration;
484 u8 rssi_comb;
485 s8 rssi_beacon;
486 s8 chain_signal[IEEE80211_MAX_CHAINS];
487 struct ath11k_htt_tx_stats *tx_stats;
488 struct ath11k_rx_peer_stats *rx_stats;
489
490 #ifdef CONFIG_MAC80211_DEBUGFS
491 /* protected by conf_mutex */
492 bool aggr_mode;
493 #endif
494
495 bool use_4addr_set;
496 u16 tcl_metadata;
497 };
498
499 #define ATH11K_MIN_5G_FREQ 4150
500 #define ATH11K_MIN_6G_FREQ 5925
501 #define ATH11K_MAX_6G_FREQ 7115
502 #define ATH11K_NUM_CHANS 101
503 #define ATH11K_MAX_5G_CHAN 173
504
505 enum ath11k_state {
506 ATH11K_STATE_OFF,
507 ATH11K_STATE_ON,
508 ATH11K_STATE_RESTARTING,
509 ATH11K_STATE_RESTARTED,
510 ATH11K_STATE_WEDGED,
511 /* Add other states as required */
512 };
513
514 /* Antenna noise floor */
515 #define ATH11K_DEFAULT_NOISE_FLOOR -95
516
517 #define ATH11K_INVALID_RSSI_FULL -1
518
519 #define ATH11K_INVALID_RSSI_EMPTY -128
520
521 struct ath11k_fw_stats {
522 struct dentry *debugfs_fwstats;
523 u32 pdev_id;
524 u32 stats_id;
525 struct list_head pdevs;
526 struct list_head vdevs;
527 struct list_head bcn;
528 };
529
530 struct ath11k_dbg_htt_stats {
531 u8 type;
532 u8 reset;
533 struct debug_htt_stats_req *stats_req;
534 /* protects shared stats req buffer */
535 spinlock_t lock;
536 };
537
538 #define MAX_MODULE_ID_BITMAP_WORDS 16
539
540 struct ath11k_debug {
541 struct dentry *debugfs_pdev;
542 struct ath11k_dbg_htt_stats htt_stats;
543 u32 extd_tx_stats;
544 struct ath11k_fw_stats fw_stats;
545 struct completion fw_stats_complete;
546 bool fw_stats_done;
547 u32 extd_rx_stats;
548 u32 pktlog_filter;
549 u32 pktlog_mode;
550 u32 pktlog_peer_valid;
551 u8 pktlog_peer_addr[ETH_ALEN];
552 u32 rx_filter;
553 u32 mem_offset;
554 u32 module_id_bitmap[MAX_MODULE_ID_BITMAP_WORDS];
555 struct ath11k_debug_dbr *dbr_debug[WMI_DIRECT_BUF_MAX];
556 };
557
558 struct ath11k_per_peer_tx_stats {
559 u32 succ_bytes;
560 u32 retry_bytes;
561 u32 failed_bytes;
562 u16 succ_pkts;
563 u16 retry_pkts;
564 u16 failed_pkts;
565 u32 duration;
566 u8 ba_fails;
567 bool is_ampdu;
568 };
569
570 #define ATH11K_FLUSH_TIMEOUT (5 * HZ)
571 #define ATH11K_VDEV_DELETE_TIMEOUT_HZ (5 * HZ)
572
573 struct ath11k {
574 struct ath11k_base *ab;
575 struct ath11k_pdev *pdev;
576 struct ieee80211_hw *hw;
577 struct ieee80211_ops *ops;
578 struct ath11k_pdev_wmi *wmi;
579 struct ath11k_pdev_dp dp;
580 u8 mac_addr[ETH_ALEN];
581 u32 ht_cap_info;
582 u32 vht_cap_info;
583 struct ath11k_he ar_he;
584 enum ath11k_state state;
585 bool supports_6ghz;
586 struct {
587 struct completion started;
588 struct completion completed;
589 struct completion on_channel;
590 struct delayed_work timeout;
591 enum ath11k_scan_state state;
592 bool is_roc;
593 int vdev_id;
594 int roc_freq;
595 bool roc_notify;
596 } scan;
597
598 struct {
599 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS];
600 struct ieee80211_sband_iftype_data
601 iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES];
602 } mac;
603
604 unsigned long dev_flags;
605 unsigned int filter_flags;
606 unsigned long monitor_flags;
607 u32 min_tx_power;
608 u32 max_tx_power;
609 u32 txpower_limit_2g;
610 u32 txpower_limit_5g;
611 u32 txpower_scale;
612 u32 power_scale;
613 u32 chan_tx_pwr;
614 u32 num_stations;
615 u32 max_num_stations;
616 /* To synchronize concurrent synchronous mac80211 callback operations,
617 * concurrent debugfs configuration and concurrent FW statistics events.
618 */
619 struct mutex conf_mutex;
620 /* protects the radio specific data like debug stats, ppdu_stats_info stats,
621 * vdev_stop_status info, scan data, ath11k_sta info, ath11k_vif info,
622 * channel context data, survey info, test mode data.
623 */
624 spinlock_t data_lock;
625
626 struct list_head arvifs;
627 /* should never be NULL; needed for regular htt rx */
628 struct ieee80211_channel *rx_channel;
629
630 /* valid during scan; needed for mgmt rx during scan */
631 struct ieee80211_channel *scan_channel;
632
633 u8 cfg_tx_chainmask;
634 u8 cfg_rx_chainmask;
635 u8 num_rx_chains;
636 u8 num_tx_chains;
637 /* pdev_idx starts from 0 whereas pdev->pdev_id starts with 1 */
638 u8 pdev_idx;
639 u8 lmac_id;
640
641 struct completion peer_assoc_done;
642 struct completion peer_delete_done;
643
644 int install_key_status;
645 struct completion install_key_done;
646
647 int last_wmi_vdev_start_status;
648 struct completion vdev_setup_done;
649 struct completion vdev_delete_done;
650
651 int num_peers;
652 int max_num_peers;
653 u32 num_started_vdevs;
654 u32 num_created_vdevs;
655 unsigned long long allocated_vdev_map;
656
657 struct idr txmgmt_idr;
658 /* protects txmgmt_idr data */
659 spinlock_t txmgmt_idr_lock;
660 atomic_t num_pending_mgmt_tx;
661 wait_queue_head_t txmgmt_empty_waitq;
662
663 /* cycle count is reported twice for each visited channel during scan.
664 * access protected by data_lock
665 */
666 u32 survey_last_rx_clear_count;
667 u32 survey_last_cycle_count;
668
669 /* Channel info events are expected to come in pairs without and with
670 * COMPLETE flag set respectively for each channel visit during scan.
671 *
672 * However there are deviations from this rule. This flag is used to
673 * avoid reporting garbage data.
674 */
675 bool ch_info_can_report_survey;
676 struct survey_info survey[ATH11K_NUM_CHANS];
677 struct completion bss_survey_done;
678
679 struct work_struct regd_update_work;
680
681 struct work_struct wmi_mgmt_tx_work;
682 struct sk_buff_head wmi_mgmt_tx_queue;
683
684 struct ath11k_wow wow;
685 struct completion target_suspend;
686 bool target_suspend_ack;
687 struct ath11k_per_peer_tx_stats peer_tx_stats;
688 struct list_head ppdu_stats_info;
689 u32 ppdu_stat_list_depth;
690
691 struct ath11k_per_peer_tx_stats cached_stats;
692 u32 last_ppdu_id;
693 u32 cached_ppdu_id;
694 int monitor_vdev_id;
695 #ifdef CONFIG_ATH11K_DEBUGFS
696 struct ath11k_debug debug;
697 #endif
698 #ifdef CONFIG_ATH11K_SPECTRAL
699 struct ath11k_spectral spectral;
700 #endif
701 bool dfs_block_radar_events;
702 struct ath11k_thermal thermal;
703 u32 vdev_id_11d_scan;
704 struct completion completed_11d_scan;
705 enum ath11k_11d_state state_11d;
706 bool regdom_set_by_user;
707 int hw_rate_code;
708 u8 twt_enabled;
709 bool nlo_enabled;
710 u8 alpha2[REG_ALPHA2_LEN + 1];
711 };
712
713 struct ath11k_band_cap {
714 u32 phy_id;
715 u32 max_bw_supported;
716 u32 ht_cap_info;
717 u32 he_cap_info[2];
718 u32 he_mcs;
719 u32 he_cap_phy_info[PSOC_HOST_MAX_PHY_SIZE];
720 struct ath11k_ppe_threshold he_ppet;
721 u16 he_6ghz_capa;
722 };
723
724 struct ath11k_pdev_cap {
725 u32 supported_bands;
726 u32 ampdu_density;
727 u32 vht_cap;
728 u32 vht_mcs;
729 u32 he_mcs;
730 u32 tx_chain_mask;
731 u32 rx_chain_mask;
732 u32 tx_chain_mask_shift;
733 u32 rx_chain_mask_shift;
734 struct ath11k_band_cap band[NUM_NL80211_BANDS];
735 bool nss_ratio_enabled;
736 u8 nss_ratio_info;
737 };
738
739 struct ath11k_pdev {
740 struct ath11k *ar;
741 u32 pdev_id;
742 struct ath11k_pdev_cap cap;
743 u8 mac_addr[ETH_ALEN];
744 };
745
746 struct ath11k_board_data {
747 const struct firmware *fw;
748 const void *data;
749 size_t len;
750 };
751
752 struct ath11k_pci_ops {
753 int (*wakeup)(struct ath11k_base *ab);
754 void (*release)(struct ath11k_base *ab);
755 int (*get_msi_irq)(struct ath11k_base *ab, unsigned int vector);
756 void (*window_write32)(struct ath11k_base *ab, u32 offset, u32 value);
757 u32 (*window_read32)(struct ath11k_base *ab, u32 offset);
758 };
759
760 /* IPQ8074 HW channel counters frequency value in hertz */
761 #define IPQ8074_CC_FREQ_HERTZ 320000
762
763 struct ath11k_bp_stats {
764 /* Head Pointer reported by the last HTT Backpressure event for the ring */
765 u16 hp;
766
767 /* Tail Pointer reported by the last HTT Backpressure event for the ring */
768 u16 tp;
769
770 /* Number of Backpressure events received for the ring */
771 u32 count;
772
773 /* Last recorded event timestamp */
774 unsigned long jiffies;
775 };
776
777 struct ath11k_dp_ring_bp_stats {
778 struct ath11k_bp_stats umac_ring_bp_stats[HTT_SW_UMAC_RING_IDX_MAX];
779 struct ath11k_bp_stats lmac_ring_bp_stats[HTT_SW_LMAC_RING_IDX_MAX][MAX_RADIOS];
780 };
781
782 struct ath11k_soc_dp_tx_err_stats {
783 /* TCL Ring Descriptor unavailable */
784 u32 desc_na[DP_TCL_NUM_RING_MAX];
785 /* Other failures during dp_tx due to mem allocation failure
786 * idr unavailable etc.
787 */
788 atomic_t misc_fail;
789 };
790
791 struct ath11k_soc_dp_stats {
792 u32 err_ring_pkts;
793 u32 invalid_rbm;
794 u32 rxdma_error[HAL_REO_ENTR_RING_RXDMA_ECODE_MAX];
795 u32 reo_error[HAL_REO_DEST_RING_ERROR_CODE_MAX];
796 u32 hal_reo_error[DP_REO_DST_RING_MAX];
797 struct ath11k_soc_dp_tx_err_stats tx_err;
798 struct ath11k_dp_ring_bp_stats bp_stats;
799 };
800
801 struct ath11k_msi_user {
802 char *name;
803 int num_vectors;
804 u32 base_vector;
805 };
806
807 struct ath11k_msi_config {
808 int total_vectors;
809 int total_users;
810 struct ath11k_msi_user *users;
811 u16 hw_rev;
812 };
813
814 /* Master structure to hold the hw data which may be used in core module */
815 struct ath11k_base {
816 enum ath11k_hw_rev hw_rev;
817 struct platform_device *pdev;
818 struct device *dev;
819 struct ath11k_qmi qmi;
820 struct ath11k_wmi_base wmi_ab;
821 struct completion fw_ready;
822 int num_radios;
823 /* HW channel counters frequency value in hertz common to all MACs */
824 u32 cc_freq_hz;
825
826 struct ath11k_htc htc;
827
828 struct ath11k_dp dp;
829
830 void __iomem *mem;
831 unsigned long mem_len;
832
833 struct {
834 enum ath11k_bus bus;
835 const struct ath11k_hif_ops *ops;
836 } hif;
837
838 struct {
839 struct completion wakeup_completed;
840 } wow;
841
842 struct ath11k_ce ce;
843 struct timer_list rx_replenish_retry;
844 struct ath11k_hal hal;
845 /* To synchronize core_start/core_stop */
846 struct mutex core_lock;
847 /* Protects data like peers */
848 spinlock_t base_lock;
849 struct ath11k_pdev pdevs[MAX_RADIOS];
850 struct {
851 enum WMI_HOST_WLAN_BAND supported_bands;
852 u32 pdev_id;
853 } target_pdev_ids[MAX_RADIOS];
854 u8 target_pdev_count;
855 struct ath11k_pdev __rcu *pdevs_active[MAX_RADIOS];
856 struct ath11k_hal_reg_capabilities_ext hal_reg_cap[MAX_RADIOS];
857 unsigned long long free_vdev_map;
858
859 /* To synchronize rhash tbl write operation */
860 struct mutex tbl_mtx_lock;
861
862 /* The rhashtable containing struct ath11k_peer keyed by mac addr */
863 struct rhashtable *rhead_peer_addr;
864 struct rhashtable_params rhash_peer_addr_param;
865
866 /* The rhashtable containing struct ath11k_peer keyed by id */
867 struct rhashtable *rhead_peer_id;
868 struct rhashtable_params rhash_peer_id_param;
869
870 struct list_head peers;
871 wait_queue_head_t peer_mapping_wq;
872 u8 mac_addr[ETH_ALEN];
873 bool wmi_ready;
874 u32 wlan_init_status;
875 int irq_num[ATH11K_IRQ_NUM_MAX];
876 struct ath11k_ext_irq_grp ext_irq_grp[ATH11K_EXT_IRQ_GRP_NUM_MAX];
877 struct ath11k_targ_cap target_caps;
878 u32 ext_service_bitmap[WMI_SERVICE_EXT_BM_SIZE];
879 bool pdevs_macaddr_valid;
880 int bd_api;
881
882 struct ath11k_hw_params hw_params;
883
884 const struct firmware *cal_file;
885
886 /* Below regd's are protected by ab->data_lock */
887 /* This is the regd set for every radio
888 * by the firmware during initializatin
889 */
890 struct ieee80211_regdomain *default_regd[MAX_RADIOS];
891 /* This regd is set during dynamic country setting
892 * This may or may not be used during the runtime
893 */
894 struct ieee80211_regdomain *new_regd[MAX_RADIOS];
895
896 /* Current DFS Regulatory */
897 enum ath11k_dfs_region dfs_region;
898 #ifdef CONFIG_ATH11K_DEBUGFS
899 struct dentry *debugfs_soc;
900 struct dentry *debugfs_ath11k;
901 #endif
902 struct ath11k_soc_dp_stats soc_stats;
903
904 unsigned long dev_flags;
905 struct completion driver_recovery;
906 struct workqueue_struct *workqueue;
907 struct work_struct restart_work;
908 struct work_struct update_11d_work;
909 u8 new_alpha2[3];
910 struct workqueue_struct *workqueue_aux;
911 struct work_struct reset_work;
912 atomic_t reset_count;
913 atomic_t recovery_count;
914 atomic_t recovery_start_count;
915 bool is_reset;
916 struct completion reset_complete;
917 struct completion reconfigure_complete;
918 struct completion recovery_start;
919 /* continuous recovery fail count */
920 atomic_t fail_cont_count;
921 unsigned long reset_fail_timeout;
922 struct {
923 /* protected by data_lock */
924 u32 fw_crash_counter;
925 } stats;
926 u32 pktlog_defs_checksum;
927
928 struct ath11k_dbring_cap *db_caps;
929 u32 num_db_cap;
930 struct work_struct rfkill_work;
931
932 /* true means radio is on */
933 bool rfkill_radio_on;
934
935 /* To synchronize 11d scan vdev id */
936 struct mutex vdev_id_11d_lock;
937 struct timer_list mon_reap_timer;
938
939 struct completion htc_suspend;
940
941 struct {
942 enum ath11k_bdf_search bdf_search;
943 u32 vendor;
944 u32 device;
945 u32 subsystem_vendor;
946 u32 subsystem_device;
947 } id;
948
949 struct {
950 struct {
951 const struct ath11k_msi_config *config;
952 u32 ep_base_data;
953 u32 irqs[32];
954 u32 addr_lo;
955 u32 addr_hi;
956 } msi;
957
958 const struct ath11k_pci_ops *ops;
959 } pci;
960
961 /* must be last */
962 u8 drv_priv[] __aligned(sizeof(void *));
963 };
964
965 struct ath11k_fw_stats_pdev {
966 struct list_head list;
967
968 /* PDEV stats */
969 s32 ch_noise_floor;
970 /* Cycles spent transmitting frames */
971 u32 tx_frame_count;
972 /* Cycles spent receiving frames */
973 u32 rx_frame_count;
974 /* Total channel busy time, evidently */
975 u32 rx_clear_count;
976 /* Total on-channel time */
977 u32 cycle_count;
978 u32 phy_err_count;
979 u32 chan_tx_power;
980 u32 ack_rx_bad;
981 u32 rts_bad;
982 u32 rts_good;
983 u32 fcs_bad;
984 u32 no_beacons;
985 u32 mib_int_count;
986
987 /* PDEV TX stats */
988 /* Num HTT cookies queued to dispatch list */
989 s32 comp_queued;
990 /* Num HTT cookies dispatched */
991 s32 comp_delivered;
992 /* Num MSDU queued to WAL */
993 s32 msdu_enqued;
994 /* Num MPDU queue to WAL */
995 s32 mpdu_enqued;
996 /* Num MSDUs dropped by WMM limit */
997 s32 wmm_drop;
998 /* Num Local frames queued */
999 s32 local_enqued;
1000 /* Num Local frames done */
1001 s32 local_freed;
1002 /* Num queued to HW */
1003 s32 hw_queued;
1004 /* Num PPDU reaped from HW */
1005 s32 hw_reaped;
1006 /* Num underruns */
1007 s32 underrun;
1008 /* Num hw paused */
1009 u32 hw_paused;
1010 /* Num PPDUs cleaned up in TX abort */
1011 s32 tx_abort;
1012 /* Num MPDUs requeued by SW */
1013 s32 mpdus_requeued;
1014 /* excessive retries */
1015 u32 tx_ko;
1016 u32 tx_xretry;
1017 /* data hw rate code */
1018 u32 data_rc;
1019 /* Scheduler self triggers */
1020 u32 self_triggers;
1021 /* frames dropped due to excessive sw retries */
1022 u32 sw_retry_failure;
1023 /* illegal rate phy errors */
1024 u32 illgl_rate_phy_err;
1025 /* wal pdev continuous xretry */
1026 u32 pdev_cont_xretry;
1027 /* wal pdev tx timeouts */
1028 u32 pdev_tx_timeout;
1029 /* wal pdev resets */
1030 u32 pdev_resets;
1031 /* frames dropped due to non-availability of stateless TIDs */
1032 u32 stateless_tid_alloc_failure;
1033 /* PhY/BB underrun */
1034 u32 phy_underrun;
1035 /* MPDU is more than txop limit */
1036 u32 txop_ovf;
1037 /* Num sequences posted */
1038 u32 seq_posted;
1039 /* Num sequences failed in queueing */
1040 u32 seq_failed_queueing;
1041 /* Num sequences completed */
1042 u32 seq_completed;
1043 /* Num sequences restarted */
1044 u32 seq_restarted;
1045 /* Num of MU sequences posted */
1046 u32 mu_seq_posted;
1047 /* Num MPDUs flushed by SW, HWPAUSED, SW TXABORT
1048 * (Reset,channel change)
1049 */
1050 s32 mpdus_sw_flush;
1051 /* Num MPDUs filtered by HW, all filter condition (TTL expired) */
1052 s32 mpdus_hw_filter;
1053 /* Num MPDUs truncated by PDG (TXOP, TBTT,
1054 * PPDU_duration based on rate, dyn_bw)
1055 */
1056 s32 mpdus_truncated;
1057 /* Num MPDUs that was tried but didn't receive ACK or BA */
1058 s32 mpdus_ack_failed;
1059 /* Num MPDUs that was dropped du to expiry. */
1060 s32 mpdus_expired;
1061
1062 /* PDEV RX stats */
1063 /* Cnts any change in ring routing mid-ppdu */
1064 s32 mid_ppdu_route_change;
1065 /* Total number of statuses processed */
1066 s32 status_rcvd;
1067 /* Extra frags on rings 0-3 */
1068 s32 r0_frags;
1069 s32 r1_frags;
1070 s32 r2_frags;
1071 s32 r3_frags;
1072 /* MSDUs / MPDUs delivered to HTT */
1073 s32 htt_msdus;
1074 s32 htt_mpdus;
1075 /* MSDUs / MPDUs delivered to local stack */
1076 s32 loc_msdus;
1077 s32 loc_mpdus;
1078 /* AMSDUs that have more MSDUs than the status ring size */
1079 s32 oversize_amsdu;
1080 /* Number of PHY errors */
1081 s32 phy_errs;
1082 /* Number of PHY errors drops */
1083 s32 phy_err_drop;
1084 /* Number of mpdu errors - FCS, MIC, ENC etc. */
1085 s32 mpdu_errs;
1086 /* Num overflow errors */
1087 s32 rx_ovfl_errs;
1088 };
1089
1090 struct ath11k_fw_stats_vdev {
1091 struct list_head list;
1092
1093 u32 vdev_id;
1094 u32 beacon_snr;
1095 u32 data_snr;
1096 u32 num_tx_frames[WLAN_MAX_AC];
1097 u32 num_rx_frames;
1098 u32 num_tx_frames_retries[WLAN_MAX_AC];
1099 u32 num_tx_frames_failures[WLAN_MAX_AC];
1100 u32 num_rts_fail;
1101 u32 num_rts_success;
1102 u32 num_rx_err;
1103 u32 num_rx_discard;
1104 u32 num_tx_not_acked;
1105 u32 tx_rate_history[MAX_TX_RATE_VALUES];
1106 u32 beacon_rssi_history[MAX_TX_RATE_VALUES];
1107 };
1108
1109 struct ath11k_fw_stats_bcn {
1110 struct list_head list;
1111
1112 u32 vdev_id;
1113 u32 tx_bcn_succ_cnt;
1114 u32 tx_bcn_outage_cnt;
1115 };
1116
1117 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_ipq8074[];
1118 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq8074[];
1119 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq6018[];
1120
1121 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qca6390[];
1122 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qca6390[];
1123
1124 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qcn9074[];
1125 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qcn9074[];
1126 int ath11k_core_qmi_firmware_ready(struct ath11k_base *ab);
1127 int ath11k_core_pre_init(struct ath11k_base *ab);
1128 int ath11k_core_init(struct ath11k_base *ath11k);
1129 void ath11k_core_deinit(struct ath11k_base *ath11k);
1130 struct ath11k_base *ath11k_core_alloc(struct device *dev, size_t priv_size,
1131 enum ath11k_bus bus);
1132 void ath11k_core_free(struct ath11k_base *ath11k);
1133 int ath11k_core_fetch_bdf(struct ath11k_base *ath11k,
1134 struct ath11k_board_data *bd);
1135 int ath11k_core_fetch_regdb(struct ath11k_base *ab, struct ath11k_board_data *bd);
1136 int ath11k_core_fetch_board_data_api_1(struct ath11k_base *ab,
1137 struct ath11k_board_data *bd,
1138 const char *name);
1139 void ath11k_core_free_bdf(struct ath11k_base *ab, struct ath11k_board_data *bd);
1140 int ath11k_core_check_dt(struct ath11k_base *ath11k);
1141 int ath11k_core_check_smbios(struct ath11k_base *ab);
1142 void ath11k_core_halt(struct ath11k *ar);
1143 int ath11k_core_resume(struct ath11k_base *ab);
1144 int ath11k_core_suspend(struct ath11k_base *ab);
1145
1146 const struct firmware *ath11k_core_firmware_request(struct ath11k_base *ab,
1147 const char *filename);
1148
ath11k_scan_state_str(enum ath11k_scan_state state)1149 static inline const char *ath11k_scan_state_str(enum ath11k_scan_state state)
1150 {
1151 switch (state) {
1152 case ATH11K_SCAN_IDLE:
1153 return "idle";
1154 case ATH11K_SCAN_STARTING:
1155 return "starting";
1156 case ATH11K_SCAN_RUNNING:
1157 return "running";
1158 case ATH11K_SCAN_ABORTING:
1159 return "aborting";
1160 }
1161
1162 return "unknown";
1163 }
1164
ATH11K_SKB_CB(struct sk_buff * skb)1165 static inline struct ath11k_skb_cb *ATH11K_SKB_CB(struct sk_buff *skb)
1166 {
1167 BUILD_BUG_ON(sizeof(struct ath11k_skb_cb) >
1168 IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
1169 return (struct ath11k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;
1170 }
1171
ATH11K_SKB_RXCB(struct sk_buff * skb)1172 static inline struct ath11k_skb_rxcb *ATH11K_SKB_RXCB(struct sk_buff *skb)
1173 {
1174 BUILD_BUG_ON(sizeof(struct ath11k_skb_rxcb) > sizeof(skb->cb));
1175 return (struct ath11k_skb_rxcb *)skb->cb;
1176 }
1177
ath11k_vif_to_arvif(struct ieee80211_vif * vif)1178 static inline struct ath11k_vif *ath11k_vif_to_arvif(struct ieee80211_vif *vif)
1179 {
1180 return (struct ath11k_vif *)vif->drv_priv;
1181 }
1182
ath11k_ab_to_ar(struct ath11k_base * ab,int mac_id)1183 static inline struct ath11k *ath11k_ab_to_ar(struct ath11k_base *ab,
1184 int mac_id)
1185 {
1186 return ab->pdevs[ath11k_hw_mac_id_to_pdev_id(&ab->hw_params, mac_id)].ar;
1187 }
1188
ath11k_core_create_firmware_path(struct ath11k_base * ab,const char * filename,void * buf,size_t buf_len)1189 static inline void ath11k_core_create_firmware_path(struct ath11k_base *ab,
1190 const char *filename,
1191 void *buf, size_t buf_len)
1192 {
1193 snprintf(buf, buf_len, "%s/%s/%s", ATH11K_FW_DIR,
1194 ab->hw_params.fw.dir, filename);
1195 }
1196
ath11k_bus_str(enum ath11k_bus bus)1197 static inline const char *ath11k_bus_str(enum ath11k_bus bus)
1198 {
1199 switch (bus) {
1200 case ATH11K_BUS_PCI:
1201 return "pci";
1202 case ATH11K_BUS_AHB:
1203 return "ahb";
1204 }
1205
1206 return "unknown";
1207 }
1208
1209 #endif /* _CORE_H_ */
1210