1 // SPDX-License-Identifier: ISC
2 /*
3 * Copyright (c) 2005-2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
5 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
6 */
7
8 #include <linux/skbuff.h>
9 #include <linux/ctype.h>
10
11 #include "core.h"
12 #include "htc.h"
13 #include "debug.h"
14 #include "wmi.h"
15 #include "wmi-tlv.h"
16 #include "mac.h"
17 #include "testmode.h"
18 #include "wmi-ops.h"
19 #include "p2p.h"
20 #include "hw.h"
21 #include "hif.h"
22 #include "txrx.h"
23
24 #define ATH10K_WMI_BARRIER_ECHO_ID 0xBA991E9
25 #define ATH10K_WMI_BARRIER_TIMEOUT_HZ (3 * HZ)
26 #define ATH10K_WMI_DFS_CONF_TIMEOUT_HZ (HZ / 6)
27
28 /* MAIN WMI cmd track */
29 static struct wmi_cmd_map wmi_cmd_map = {
30 .init_cmdid = WMI_INIT_CMDID,
31 .start_scan_cmdid = WMI_START_SCAN_CMDID,
32 .stop_scan_cmdid = WMI_STOP_SCAN_CMDID,
33 .scan_chan_list_cmdid = WMI_SCAN_CHAN_LIST_CMDID,
34 .scan_sch_prio_tbl_cmdid = WMI_SCAN_SCH_PRIO_TBL_CMDID,
35 .scan_prob_req_oui_cmdid = WMI_CMD_UNSUPPORTED,
36 .pdev_set_regdomain_cmdid = WMI_PDEV_SET_REGDOMAIN_CMDID,
37 .pdev_set_channel_cmdid = WMI_PDEV_SET_CHANNEL_CMDID,
38 .pdev_set_param_cmdid = WMI_PDEV_SET_PARAM_CMDID,
39 .pdev_pktlog_enable_cmdid = WMI_PDEV_PKTLOG_ENABLE_CMDID,
40 .pdev_pktlog_disable_cmdid = WMI_PDEV_PKTLOG_DISABLE_CMDID,
41 .pdev_set_wmm_params_cmdid = WMI_PDEV_SET_WMM_PARAMS_CMDID,
42 .pdev_set_ht_cap_ie_cmdid = WMI_PDEV_SET_HT_CAP_IE_CMDID,
43 .pdev_set_vht_cap_ie_cmdid = WMI_PDEV_SET_VHT_CAP_IE_CMDID,
44 .pdev_set_dscp_tid_map_cmdid = WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
45 .pdev_set_quiet_mode_cmdid = WMI_PDEV_SET_QUIET_MODE_CMDID,
46 .pdev_green_ap_ps_enable_cmdid = WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
47 .pdev_get_tpc_config_cmdid = WMI_PDEV_GET_TPC_CONFIG_CMDID,
48 .pdev_set_base_macaddr_cmdid = WMI_PDEV_SET_BASE_MACADDR_CMDID,
49 .vdev_create_cmdid = WMI_VDEV_CREATE_CMDID,
50 .vdev_delete_cmdid = WMI_VDEV_DELETE_CMDID,
51 .vdev_start_request_cmdid = WMI_VDEV_START_REQUEST_CMDID,
52 .vdev_restart_request_cmdid = WMI_VDEV_RESTART_REQUEST_CMDID,
53 .vdev_up_cmdid = WMI_VDEV_UP_CMDID,
54 .vdev_stop_cmdid = WMI_VDEV_STOP_CMDID,
55 .vdev_down_cmdid = WMI_VDEV_DOWN_CMDID,
56 .vdev_set_param_cmdid = WMI_VDEV_SET_PARAM_CMDID,
57 .vdev_install_key_cmdid = WMI_VDEV_INSTALL_KEY_CMDID,
58 .peer_create_cmdid = WMI_PEER_CREATE_CMDID,
59 .peer_delete_cmdid = WMI_PEER_DELETE_CMDID,
60 .peer_flush_tids_cmdid = WMI_PEER_FLUSH_TIDS_CMDID,
61 .peer_set_param_cmdid = WMI_PEER_SET_PARAM_CMDID,
62 .peer_assoc_cmdid = WMI_PEER_ASSOC_CMDID,
63 .peer_add_wds_entry_cmdid = WMI_PEER_ADD_WDS_ENTRY_CMDID,
64 .peer_remove_wds_entry_cmdid = WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
65 .peer_mcast_group_cmdid = WMI_PEER_MCAST_GROUP_CMDID,
66 .bcn_tx_cmdid = WMI_BCN_TX_CMDID,
67 .pdev_send_bcn_cmdid = WMI_PDEV_SEND_BCN_CMDID,
68 .bcn_tmpl_cmdid = WMI_BCN_TMPL_CMDID,
69 .bcn_filter_rx_cmdid = WMI_BCN_FILTER_RX_CMDID,
70 .prb_req_filter_rx_cmdid = WMI_PRB_REQ_FILTER_RX_CMDID,
71 .mgmt_tx_cmdid = WMI_MGMT_TX_CMDID,
72 .prb_tmpl_cmdid = WMI_PRB_TMPL_CMDID,
73 .addba_clear_resp_cmdid = WMI_ADDBA_CLEAR_RESP_CMDID,
74 .addba_send_cmdid = WMI_ADDBA_SEND_CMDID,
75 .addba_status_cmdid = WMI_ADDBA_STATUS_CMDID,
76 .delba_send_cmdid = WMI_DELBA_SEND_CMDID,
77 .addba_set_resp_cmdid = WMI_ADDBA_SET_RESP_CMDID,
78 .send_singleamsdu_cmdid = WMI_SEND_SINGLEAMSDU_CMDID,
79 .sta_powersave_mode_cmdid = WMI_STA_POWERSAVE_MODE_CMDID,
80 .sta_powersave_param_cmdid = WMI_STA_POWERSAVE_PARAM_CMDID,
81 .sta_mimo_ps_mode_cmdid = WMI_STA_MIMO_PS_MODE_CMDID,
82 .pdev_dfs_enable_cmdid = WMI_PDEV_DFS_ENABLE_CMDID,
83 .pdev_dfs_disable_cmdid = WMI_PDEV_DFS_DISABLE_CMDID,
84 .roam_scan_mode = WMI_ROAM_SCAN_MODE,
85 .roam_scan_rssi_threshold = WMI_ROAM_SCAN_RSSI_THRESHOLD,
86 .roam_scan_period = WMI_ROAM_SCAN_PERIOD,
87 .roam_scan_rssi_change_threshold = WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
88 .roam_ap_profile = WMI_ROAM_AP_PROFILE,
89 .ofl_scan_add_ap_profile = WMI_ROAM_AP_PROFILE,
90 .ofl_scan_remove_ap_profile = WMI_OFL_SCAN_REMOVE_AP_PROFILE,
91 .ofl_scan_period = WMI_OFL_SCAN_PERIOD,
92 .p2p_dev_set_device_info = WMI_P2P_DEV_SET_DEVICE_INFO,
93 .p2p_dev_set_discoverability = WMI_P2P_DEV_SET_DISCOVERABILITY,
94 .p2p_go_set_beacon_ie = WMI_P2P_GO_SET_BEACON_IE,
95 .p2p_go_set_probe_resp_ie = WMI_P2P_GO_SET_PROBE_RESP_IE,
96 .p2p_set_vendor_ie_data_cmdid = WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
97 .ap_ps_peer_param_cmdid = WMI_AP_PS_PEER_PARAM_CMDID,
98 .ap_ps_peer_uapsd_coex_cmdid = WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
99 .peer_rate_retry_sched_cmdid = WMI_PEER_RATE_RETRY_SCHED_CMDID,
100 .wlan_profile_trigger_cmdid = WMI_WLAN_PROFILE_TRIGGER_CMDID,
101 .wlan_profile_set_hist_intvl_cmdid =
102 WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
103 .wlan_profile_get_profile_data_cmdid =
104 WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
105 .wlan_profile_enable_profile_id_cmdid =
106 WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
107 .wlan_profile_list_profile_id_cmdid =
108 WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
109 .pdev_suspend_cmdid = WMI_PDEV_SUSPEND_CMDID,
110 .pdev_resume_cmdid = WMI_PDEV_RESUME_CMDID,
111 .add_bcn_filter_cmdid = WMI_ADD_BCN_FILTER_CMDID,
112 .rmv_bcn_filter_cmdid = WMI_RMV_BCN_FILTER_CMDID,
113 .wow_add_wake_pattern_cmdid = WMI_WOW_ADD_WAKE_PATTERN_CMDID,
114 .wow_del_wake_pattern_cmdid = WMI_WOW_DEL_WAKE_PATTERN_CMDID,
115 .wow_enable_disable_wake_event_cmdid =
116 WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
117 .wow_enable_cmdid = WMI_WOW_ENABLE_CMDID,
118 .wow_hostwakeup_from_sleep_cmdid = WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
119 .rtt_measreq_cmdid = WMI_RTT_MEASREQ_CMDID,
120 .rtt_tsf_cmdid = WMI_RTT_TSF_CMDID,
121 .vdev_spectral_scan_configure_cmdid =
122 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
123 .vdev_spectral_scan_enable_cmdid = WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
124 .request_stats_cmdid = WMI_REQUEST_STATS_CMDID,
125 .set_arp_ns_offload_cmdid = WMI_SET_ARP_NS_OFFLOAD_CMDID,
126 .network_list_offload_config_cmdid =
127 WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID,
128 .gtk_offload_cmdid = WMI_GTK_OFFLOAD_CMDID,
129 .csa_offload_enable_cmdid = WMI_CSA_OFFLOAD_ENABLE_CMDID,
130 .csa_offload_chanswitch_cmdid = WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
131 .chatter_set_mode_cmdid = WMI_CHATTER_SET_MODE_CMDID,
132 .peer_tid_addba_cmdid = WMI_PEER_TID_ADDBA_CMDID,
133 .peer_tid_delba_cmdid = WMI_PEER_TID_DELBA_CMDID,
134 .sta_dtim_ps_method_cmdid = WMI_STA_DTIM_PS_METHOD_CMDID,
135 .sta_uapsd_auto_trig_cmdid = WMI_STA_UAPSD_AUTO_TRIG_CMDID,
136 .sta_keepalive_cmd = WMI_STA_KEEPALIVE_CMD,
137 .echo_cmdid = WMI_ECHO_CMDID,
138 .pdev_utf_cmdid = WMI_PDEV_UTF_CMDID,
139 .dbglog_cfg_cmdid = WMI_DBGLOG_CFG_CMDID,
140 .pdev_qvit_cmdid = WMI_PDEV_QVIT_CMDID,
141 .pdev_ftm_intg_cmdid = WMI_PDEV_FTM_INTG_CMDID,
142 .vdev_set_keepalive_cmdid = WMI_VDEV_SET_KEEPALIVE_CMDID,
143 .vdev_get_keepalive_cmdid = WMI_VDEV_GET_KEEPALIVE_CMDID,
144 .force_fw_hang_cmdid = WMI_FORCE_FW_HANG_CMDID,
145 .gpio_config_cmdid = WMI_GPIO_CONFIG_CMDID,
146 .gpio_output_cmdid = WMI_GPIO_OUTPUT_CMDID,
147 .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
148 .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
149 .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
150 .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
151 .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
152 .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
153 .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
154 .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
155 .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
156 .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
157 .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
158 .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
159 .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
160 .nan_cmdid = WMI_CMD_UNSUPPORTED,
161 .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
162 .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
163 .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
164 .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
165 .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
166 .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
167 .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
168 .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
169 .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
170 .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
171 .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
172 .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
173 .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
174 .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
175 .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
176 .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
177 .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
178 .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
179 .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
180 .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
181 .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
182 .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
183 .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
184 .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
185 .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
186 .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
187 .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
188 .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
189 .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
190 .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED,
191 .pdev_get_tpc_table_cmdid = WMI_CMD_UNSUPPORTED,
192 .radar_found_cmdid = WMI_CMD_UNSUPPORTED,
193 };
194
195 /* 10.X WMI cmd track */
196 static struct wmi_cmd_map wmi_10x_cmd_map = {
197 .init_cmdid = WMI_10X_INIT_CMDID,
198 .start_scan_cmdid = WMI_10X_START_SCAN_CMDID,
199 .stop_scan_cmdid = WMI_10X_STOP_SCAN_CMDID,
200 .scan_chan_list_cmdid = WMI_10X_SCAN_CHAN_LIST_CMDID,
201 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
202 .scan_prob_req_oui_cmdid = WMI_CMD_UNSUPPORTED,
203 .pdev_set_regdomain_cmdid = WMI_10X_PDEV_SET_REGDOMAIN_CMDID,
204 .pdev_set_channel_cmdid = WMI_10X_PDEV_SET_CHANNEL_CMDID,
205 .pdev_set_param_cmdid = WMI_10X_PDEV_SET_PARAM_CMDID,
206 .pdev_pktlog_enable_cmdid = WMI_10X_PDEV_PKTLOG_ENABLE_CMDID,
207 .pdev_pktlog_disable_cmdid = WMI_10X_PDEV_PKTLOG_DISABLE_CMDID,
208 .pdev_set_wmm_params_cmdid = WMI_10X_PDEV_SET_WMM_PARAMS_CMDID,
209 .pdev_set_ht_cap_ie_cmdid = WMI_10X_PDEV_SET_HT_CAP_IE_CMDID,
210 .pdev_set_vht_cap_ie_cmdid = WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID,
211 .pdev_set_dscp_tid_map_cmdid = WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID,
212 .pdev_set_quiet_mode_cmdid = WMI_10X_PDEV_SET_QUIET_MODE_CMDID,
213 .pdev_green_ap_ps_enable_cmdid = WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID,
214 .pdev_get_tpc_config_cmdid = WMI_10X_PDEV_GET_TPC_CONFIG_CMDID,
215 .pdev_set_base_macaddr_cmdid = WMI_10X_PDEV_SET_BASE_MACADDR_CMDID,
216 .vdev_create_cmdid = WMI_10X_VDEV_CREATE_CMDID,
217 .vdev_delete_cmdid = WMI_10X_VDEV_DELETE_CMDID,
218 .vdev_start_request_cmdid = WMI_10X_VDEV_START_REQUEST_CMDID,
219 .vdev_restart_request_cmdid = WMI_10X_VDEV_RESTART_REQUEST_CMDID,
220 .vdev_up_cmdid = WMI_10X_VDEV_UP_CMDID,
221 .vdev_stop_cmdid = WMI_10X_VDEV_STOP_CMDID,
222 .vdev_down_cmdid = WMI_10X_VDEV_DOWN_CMDID,
223 .vdev_set_param_cmdid = WMI_10X_VDEV_SET_PARAM_CMDID,
224 .vdev_install_key_cmdid = WMI_10X_VDEV_INSTALL_KEY_CMDID,
225 .peer_create_cmdid = WMI_10X_PEER_CREATE_CMDID,
226 .peer_delete_cmdid = WMI_10X_PEER_DELETE_CMDID,
227 .peer_flush_tids_cmdid = WMI_10X_PEER_FLUSH_TIDS_CMDID,
228 .peer_set_param_cmdid = WMI_10X_PEER_SET_PARAM_CMDID,
229 .peer_assoc_cmdid = WMI_10X_PEER_ASSOC_CMDID,
230 .peer_add_wds_entry_cmdid = WMI_10X_PEER_ADD_WDS_ENTRY_CMDID,
231 .peer_remove_wds_entry_cmdid = WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID,
232 .peer_mcast_group_cmdid = WMI_10X_PEER_MCAST_GROUP_CMDID,
233 .bcn_tx_cmdid = WMI_10X_BCN_TX_CMDID,
234 .pdev_send_bcn_cmdid = WMI_10X_PDEV_SEND_BCN_CMDID,
235 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
236 .bcn_filter_rx_cmdid = WMI_10X_BCN_FILTER_RX_CMDID,
237 .prb_req_filter_rx_cmdid = WMI_10X_PRB_REQ_FILTER_RX_CMDID,
238 .mgmt_tx_cmdid = WMI_10X_MGMT_TX_CMDID,
239 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
240 .addba_clear_resp_cmdid = WMI_10X_ADDBA_CLEAR_RESP_CMDID,
241 .addba_send_cmdid = WMI_10X_ADDBA_SEND_CMDID,
242 .addba_status_cmdid = WMI_10X_ADDBA_STATUS_CMDID,
243 .delba_send_cmdid = WMI_10X_DELBA_SEND_CMDID,
244 .addba_set_resp_cmdid = WMI_10X_ADDBA_SET_RESP_CMDID,
245 .send_singleamsdu_cmdid = WMI_10X_SEND_SINGLEAMSDU_CMDID,
246 .sta_powersave_mode_cmdid = WMI_10X_STA_POWERSAVE_MODE_CMDID,
247 .sta_powersave_param_cmdid = WMI_10X_STA_POWERSAVE_PARAM_CMDID,
248 .sta_mimo_ps_mode_cmdid = WMI_10X_STA_MIMO_PS_MODE_CMDID,
249 .pdev_dfs_enable_cmdid = WMI_10X_PDEV_DFS_ENABLE_CMDID,
250 .pdev_dfs_disable_cmdid = WMI_10X_PDEV_DFS_DISABLE_CMDID,
251 .roam_scan_mode = WMI_10X_ROAM_SCAN_MODE,
252 .roam_scan_rssi_threshold = WMI_10X_ROAM_SCAN_RSSI_THRESHOLD,
253 .roam_scan_period = WMI_10X_ROAM_SCAN_PERIOD,
254 .roam_scan_rssi_change_threshold =
255 WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
256 .roam_ap_profile = WMI_10X_ROAM_AP_PROFILE,
257 .ofl_scan_add_ap_profile = WMI_10X_OFL_SCAN_ADD_AP_PROFILE,
258 .ofl_scan_remove_ap_profile = WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE,
259 .ofl_scan_period = WMI_10X_OFL_SCAN_PERIOD,
260 .p2p_dev_set_device_info = WMI_10X_P2P_DEV_SET_DEVICE_INFO,
261 .p2p_dev_set_discoverability = WMI_10X_P2P_DEV_SET_DISCOVERABILITY,
262 .p2p_go_set_beacon_ie = WMI_10X_P2P_GO_SET_BEACON_IE,
263 .p2p_go_set_probe_resp_ie = WMI_10X_P2P_GO_SET_PROBE_RESP_IE,
264 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
265 .ap_ps_peer_param_cmdid = WMI_10X_AP_PS_PEER_PARAM_CMDID,
266 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
267 .peer_rate_retry_sched_cmdid = WMI_10X_PEER_RATE_RETRY_SCHED_CMDID,
268 .wlan_profile_trigger_cmdid = WMI_10X_WLAN_PROFILE_TRIGGER_CMDID,
269 .wlan_profile_set_hist_intvl_cmdid =
270 WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
271 .wlan_profile_get_profile_data_cmdid =
272 WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
273 .wlan_profile_enable_profile_id_cmdid =
274 WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
275 .wlan_profile_list_profile_id_cmdid =
276 WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
277 .pdev_suspend_cmdid = WMI_10X_PDEV_SUSPEND_CMDID,
278 .pdev_resume_cmdid = WMI_10X_PDEV_RESUME_CMDID,
279 .add_bcn_filter_cmdid = WMI_10X_ADD_BCN_FILTER_CMDID,
280 .rmv_bcn_filter_cmdid = WMI_10X_RMV_BCN_FILTER_CMDID,
281 .wow_add_wake_pattern_cmdid = WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID,
282 .wow_del_wake_pattern_cmdid = WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID,
283 .wow_enable_disable_wake_event_cmdid =
284 WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
285 .wow_enable_cmdid = WMI_10X_WOW_ENABLE_CMDID,
286 .wow_hostwakeup_from_sleep_cmdid =
287 WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
288 .rtt_measreq_cmdid = WMI_10X_RTT_MEASREQ_CMDID,
289 .rtt_tsf_cmdid = WMI_10X_RTT_TSF_CMDID,
290 .vdev_spectral_scan_configure_cmdid =
291 WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
292 .vdev_spectral_scan_enable_cmdid =
293 WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
294 .request_stats_cmdid = WMI_10X_REQUEST_STATS_CMDID,
295 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
296 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
297 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
298 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
299 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
300 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
301 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
302 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
303 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
304 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
305 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
306 .echo_cmdid = WMI_10X_ECHO_CMDID,
307 .pdev_utf_cmdid = WMI_10X_PDEV_UTF_CMDID,
308 .dbglog_cfg_cmdid = WMI_10X_DBGLOG_CFG_CMDID,
309 .pdev_qvit_cmdid = WMI_10X_PDEV_QVIT_CMDID,
310 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
311 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
312 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
313 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
314 .gpio_config_cmdid = WMI_10X_GPIO_CONFIG_CMDID,
315 .gpio_output_cmdid = WMI_10X_GPIO_OUTPUT_CMDID,
316 .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
317 .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
318 .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
319 .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
320 .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
321 .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
322 .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
323 .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
324 .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
325 .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
326 .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
327 .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
328 .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
329 .nan_cmdid = WMI_CMD_UNSUPPORTED,
330 .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
331 .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
332 .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
333 .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
334 .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
335 .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
336 .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
337 .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
338 .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
339 .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
340 .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
341 .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
342 .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
343 .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
344 .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
345 .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
346 .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
347 .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
348 .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
349 .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
350 .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
351 .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
352 .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
353 .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
354 .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
355 .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
356 .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
357 .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
358 .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
359 .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED,
360 .pdev_get_tpc_table_cmdid = WMI_CMD_UNSUPPORTED,
361 .radar_found_cmdid = WMI_CMD_UNSUPPORTED,
362 };
363
364 /* 10.2.4 WMI cmd track */
365 static struct wmi_cmd_map wmi_10_2_4_cmd_map = {
366 .init_cmdid = WMI_10_2_INIT_CMDID,
367 .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID,
368 .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID,
369 .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID,
370 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
371 .scan_prob_req_oui_cmdid = WMI_CMD_UNSUPPORTED,
372 .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
373 .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID,
374 .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID,
375 .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
376 .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
377 .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
378 .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
379 .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
380 .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
381 .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
382 .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
383 .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
384 .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID,
385 .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID,
386 .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID,
387 .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
388 .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID,
389 .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID,
390 .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID,
391 .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID,
392 .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID,
393 .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID,
394 .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID,
395 .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID,
396 .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID,
397 .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID,
398 .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
399 .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
400 .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID,
401 .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID,
402 .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID,
403 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
404 .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID,
405 .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
406 .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID,
407 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
408 .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
409 .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID,
410 .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID,
411 .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID,
412 .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID,
413 .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID,
414 .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID,
415 .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
416 .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID,
417 .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID,
418 .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID,
419 .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE,
420 .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
421 .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD,
422 .roam_scan_rssi_change_threshold =
423 WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
424 .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE,
425 .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
426 .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
427 .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD,
428 .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
429 .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
430 .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE,
431 .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
432 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
433 .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID,
434 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
435 .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
436 .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
437 .wlan_profile_set_hist_intvl_cmdid =
438 WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
439 .wlan_profile_get_profile_data_cmdid =
440 WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
441 .wlan_profile_enable_profile_id_cmdid =
442 WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
443 .wlan_profile_list_profile_id_cmdid =
444 WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
445 .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID,
446 .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID,
447 .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID,
448 .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID,
449 .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
450 .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
451 .wow_enable_disable_wake_event_cmdid =
452 WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
453 .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID,
454 .wow_hostwakeup_from_sleep_cmdid =
455 WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
456 .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID,
457 .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID,
458 .vdev_spectral_scan_configure_cmdid =
459 WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
460 .vdev_spectral_scan_enable_cmdid =
461 WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
462 .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID,
463 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
464 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
465 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
466 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
467 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
468 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
469 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
470 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
471 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
472 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
473 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
474 .echo_cmdid = WMI_10_2_ECHO_CMDID,
475 .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID,
476 .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID,
477 .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID,
478 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
479 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
480 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
481 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
482 .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID,
483 .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID,
484 .pdev_get_temperature_cmdid = WMI_10_2_PDEV_GET_TEMPERATURE_CMDID,
485 .pdev_enable_adaptive_cca_cmdid = WMI_10_2_SET_CCA_PARAMS,
486 .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
487 .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
488 .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
489 .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
490 .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
491 .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
492 .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
493 .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
494 .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
495 .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
496 .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
497 .nan_cmdid = WMI_CMD_UNSUPPORTED,
498 .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
499 .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
500 .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
501 .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
502 .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
503 .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
504 .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
505 .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
506 .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
507 .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
508 .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
509 .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
510 .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
511 .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
512 .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
513 .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
514 .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
515 .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
516 .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
517 .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
518 .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
519 .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
520 .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
521 .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
522 .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
523 .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
524 .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
525 .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
526 .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
527 .pdev_bss_chan_info_request_cmdid =
528 WMI_10_2_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
529 .pdev_get_tpc_table_cmdid = WMI_CMD_UNSUPPORTED,
530 .radar_found_cmdid = WMI_CMD_UNSUPPORTED,
531 .set_bb_timing_cmdid = WMI_10_2_PDEV_SET_BB_TIMING_CONFIG_CMDID,
532 };
533
534 /* 10.4 WMI cmd track */
535 static struct wmi_cmd_map wmi_10_4_cmd_map = {
536 .init_cmdid = WMI_10_4_INIT_CMDID,
537 .start_scan_cmdid = WMI_10_4_START_SCAN_CMDID,
538 .stop_scan_cmdid = WMI_10_4_STOP_SCAN_CMDID,
539 .scan_chan_list_cmdid = WMI_10_4_SCAN_CHAN_LIST_CMDID,
540 .scan_sch_prio_tbl_cmdid = WMI_10_4_SCAN_SCH_PRIO_TBL_CMDID,
541 .scan_prob_req_oui_cmdid = WMI_CMD_UNSUPPORTED,
542 .pdev_set_regdomain_cmdid = WMI_10_4_PDEV_SET_REGDOMAIN_CMDID,
543 .pdev_set_channel_cmdid = WMI_10_4_PDEV_SET_CHANNEL_CMDID,
544 .pdev_set_param_cmdid = WMI_10_4_PDEV_SET_PARAM_CMDID,
545 .pdev_pktlog_enable_cmdid = WMI_10_4_PDEV_PKTLOG_ENABLE_CMDID,
546 .pdev_pktlog_disable_cmdid = WMI_10_4_PDEV_PKTLOG_DISABLE_CMDID,
547 .pdev_set_wmm_params_cmdid = WMI_10_4_PDEV_SET_WMM_PARAMS_CMDID,
548 .pdev_set_ht_cap_ie_cmdid = WMI_10_4_PDEV_SET_HT_CAP_IE_CMDID,
549 .pdev_set_vht_cap_ie_cmdid = WMI_10_4_PDEV_SET_VHT_CAP_IE_CMDID,
550 .pdev_set_dscp_tid_map_cmdid = WMI_10_4_PDEV_SET_DSCP_TID_MAP_CMDID,
551 .pdev_set_quiet_mode_cmdid = WMI_10_4_PDEV_SET_QUIET_MODE_CMDID,
552 .pdev_green_ap_ps_enable_cmdid = WMI_10_4_PDEV_GREEN_AP_PS_ENABLE_CMDID,
553 .pdev_get_tpc_config_cmdid = WMI_10_4_PDEV_GET_TPC_CONFIG_CMDID,
554 .pdev_set_base_macaddr_cmdid = WMI_10_4_PDEV_SET_BASE_MACADDR_CMDID,
555 .vdev_create_cmdid = WMI_10_4_VDEV_CREATE_CMDID,
556 .vdev_delete_cmdid = WMI_10_4_VDEV_DELETE_CMDID,
557 .vdev_start_request_cmdid = WMI_10_4_VDEV_START_REQUEST_CMDID,
558 .vdev_restart_request_cmdid = WMI_10_4_VDEV_RESTART_REQUEST_CMDID,
559 .vdev_up_cmdid = WMI_10_4_VDEV_UP_CMDID,
560 .vdev_stop_cmdid = WMI_10_4_VDEV_STOP_CMDID,
561 .vdev_down_cmdid = WMI_10_4_VDEV_DOWN_CMDID,
562 .vdev_set_param_cmdid = WMI_10_4_VDEV_SET_PARAM_CMDID,
563 .vdev_install_key_cmdid = WMI_10_4_VDEV_INSTALL_KEY_CMDID,
564 .peer_create_cmdid = WMI_10_4_PEER_CREATE_CMDID,
565 .peer_delete_cmdid = WMI_10_4_PEER_DELETE_CMDID,
566 .peer_flush_tids_cmdid = WMI_10_4_PEER_FLUSH_TIDS_CMDID,
567 .peer_set_param_cmdid = WMI_10_4_PEER_SET_PARAM_CMDID,
568 .peer_assoc_cmdid = WMI_10_4_PEER_ASSOC_CMDID,
569 .peer_add_wds_entry_cmdid = WMI_10_4_PEER_ADD_WDS_ENTRY_CMDID,
570 .peer_remove_wds_entry_cmdid = WMI_10_4_PEER_REMOVE_WDS_ENTRY_CMDID,
571 .peer_mcast_group_cmdid = WMI_10_4_PEER_MCAST_GROUP_CMDID,
572 .bcn_tx_cmdid = WMI_10_4_BCN_TX_CMDID,
573 .pdev_send_bcn_cmdid = WMI_10_4_PDEV_SEND_BCN_CMDID,
574 .bcn_tmpl_cmdid = WMI_10_4_BCN_PRB_TMPL_CMDID,
575 .bcn_filter_rx_cmdid = WMI_10_4_BCN_FILTER_RX_CMDID,
576 .prb_req_filter_rx_cmdid = WMI_10_4_PRB_REQ_FILTER_RX_CMDID,
577 .mgmt_tx_cmdid = WMI_10_4_MGMT_TX_CMDID,
578 .prb_tmpl_cmdid = WMI_10_4_PRB_TMPL_CMDID,
579 .addba_clear_resp_cmdid = WMI_10_4_ADDBA_CLEAR_RESP_CMDID,
580 .addba_send_cmdid = WMI_10_4_ADDBA_SEND_CMDID,
581 .addba_status_cmdid = WMI_10_4_ADDBA_STATUS_CMDID,
582 .delba_send_cmdid = WMI_10_4_DELBA_SEND_CMDID,
583 .addba_set_resp_cmdid = WMI_10_4_ADDBA_SET_RESP_CMDID,
584 .send_singleamsdu_cmdid = WMI_10_4_SEND_SINGLEAMSDU_CMDID,
585 .sta_powersave_mode_cmdid = WMI_10_4_STA_POWERSAVE_MODE_CMDID,
586 .sta_powersave_param_cmdid = WMI_10_4_STA_POWERSAVE_PARAM_CMDID,
587 .sta_mimo_ps_mode_cmdid = WMI_10_4_STA_MIMO_PS_MODE_CMDID,
588 .pdev_dfs_enable_cmdid = WMI_10_4_PDEV_DFS_ENABLE_CMDID,
589 .pdev_dfs_disable_cmdid = WMI_10_4_PDEV_DFS_DISABLE_CMDID,
590 .roam_scan_mode = WMI_10_4_ROAM_SCAN_MODE,
591 .roam_scan_rssi_threshold = WMI_10_4_ROAM_SCAN_RSSI_THRESHOLD,
592 .roam_scan_period = WMI_10_4_ROAM_SCAN_PERIOD,
593 .roam_scan_rssi_change_threshold =
594 WMI_10_4_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
595 .roam_ap_profile = WMI_10_4_ROAM_AP_PROFILE,
596 .ofl_scan_add_ap_profile = WMI_10_4_OFL_SCAN_ADD_AP_PROFILE,
597 .ofl_scan_remove_ap_profile = WMI_10_4_OFL_SCAN_REMOVE_AP_PROFILE,
598 .ofl_scan_period = WMI_10_4_OFL_SCAN_PERIOD,
599 .p2p_dev_set_device_info = WMI_10_4_P2P_DEV_SET_DEVICE_INFO,
600 .p2p_dev_set_discoverability = WMI_10_4_P2P_DEV_SET_DISCOVERABILITY,
601 .p2p_go_set_beacon_ie = WMI_10_4_P2P_GO_SET_BEACON_IE,
602 .p2p_go_set_probe_resp_ie = WMI_10_4_P2P_GO_SET_PROBE_RESP_IE,
603 .p2p_set_vendor_ie_data_cmdid = WMI_10_4_P2P_SET_VENDOR_IE_DATA_CMDID,
604 .ap_ps_peer_param_cmdid = WMI_10_4_AP_PS_PEER_PARAM_CMDID,
605 .ap_ps_peer_uapsd_coex_cmdid = WMI_10_4_AP_PS_PEER_UAPSD_COEX_CMDID,
606 .peer_rate_retry_sched_cmdid = WMI_10_4_PEER_RATE_RETRY_SCHED_CMDID,
607 .wlan_profile_trigger_cmdid = WMI_10_4_WLAN_PROFILE_TRIGGER_CMDID,
608 .wlan_profile_set_hist_intvl_cmdid =
609 WMI_10_4_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
610 .wlan_profile_get_profile_data_cmdid =
611 WMI_10_4_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
612 .wlan_profile_enable_profile_id_cmdid =
613 WMI_10_4_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
614 .wlan_profile_list_profile_id_cmdid =
615 WMI_10_4_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
616 .pdev_suspend_cmdid = WMI_10_4_PDEV_SUSPEND_CMDID,
617 .pdev_resume_cmdid = WMI_10_4_PDEV_RESUME_CMDID,
618 .add_bcn_filter_cmdid = WMI_10_4_ADD_BCN_FILTER_CMDID,
619 .rmv_bcn_filter_cmdid = WMI_10_4_RMV_BCN_FILTER_CMDID,
620 .wow_add_wake_pattern_cmdid = WMI_10_4_WOW_ADD_WAKE_PATTERN_CMDID,
621 .wow_del_wake_pattern_cmdid = WMI_10_4_WOW_DEL_WAKE_PATTERN_CMDID,
622 .wow_enable_disable_wake_event_cmdid =
623 WMI_10_4_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
624 .wow_enable_cmdid = WMI_10_4_WOW_ENABLE_CMDID,
625 .wow_hostwakeup_from_sleep_cmdid =
626 WMI_10_4_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
627 .rtt_measreq_cmdid = WMI_10_4_RTT_MEASREQ_CMDID,
628 .rtt_tsf_cmdid = WMI_10_4_RTT_TSF_CMDID,
629 .vdev_spectral_scan_configure_cmdid =
630 WMI_10_4_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
631 .vdev_spectral_scan_enable_cmdid =
632 WMI_10_4_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
633 .request_stats_cmdid = WMI_10_4_REQUEST_STATS_CMDID,
634 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
635 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
636 .gtk_offload_cmdid = WMI_10_4_GTK_OFFLOAD_CMDID,
637 .csa_offload_enable_cmdid = WMI_10_4_CSA_OFFLOAD_ENABLE_CMDID,
638 .csa_offload_chanswitch_cmdid = WMI_10_4_CSA_OFFLOAD_CHANSWITCH_CMDID,
639 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
640 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
641 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
642 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
643 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
644 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
645 .echo_cmdid = WMI_10_4_ECHO_CMDID,
646 .pdev_utf_cmdid = WMI_10_4_PDEV_UTF_CMDID,
647 .dbglog_cfg_cmdid = WMI_10_4_DBGLOG_CFG_CMDID,
648 .pdev_qvit_cmdid = WMI_10_4_PDEV_QVIT_CMDID,
649 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
650 .vdev_set_keepalive_cmdid = WMI_10_4_VDEV_SET_KEEPALIVE_CMDID,
651 .vdev_get_keepalive_cmdid = WMI_10_4_VDEV_GET_KEEPALIVE_CMDID,
652 .force_fw_hang_cmdid = WMI_10_4_FORCE_FW_HANG_CMDID,
653 .gpio_config_cmdid = WMI_10_4_GPIO_CONFIG_CMDID,
654 .gpio_output_cmdid = WMI_10_4_GPIO_OUTPUT_CMDID,
655 .pdev_get_temperature_cmdid = WMI_10_4_PDEV_GET_TEMPERATURE_CMDID,
656 .vdev_set_wmm_params_cmdid = WMI_CMD_UNSUPPORTED,
657 .adaptive_qcs_cmdid = WMI_CMD_UNSUPPORTED,
658 .scan_update_request_cmdid = WMI_10_4_SCAN_UPDATE_REQUEST_CMDID,
659 .vdev_standby_response_cmdid = WMI_10_4_VDEV_STANDBY_RESPONSE_CMDID,
660 .vdev_resume_response_cmdid = WMI_10_4_VDEV_RESUME_RESPONSE_CMDID,
661 .wlan_peer_caching_add_peer_cmdid =
662 WMI_10_4_WLAN_PEER_CACHING_ADD_PEER_CMDID,
663 .wlan_peer_caching_evict_peer_cmdid =
664 WMI_10_4_WLAN_PEER_CACHING_EVICT_PEER_CMDID,
665 .wlan_peer_caching_restore_peer_cmdid =
666 WMI_10_4_WLAN_PEER_CACHING_RESTORE_PEER_CMDID,
667 .wlan_peer_caching_print_all_peers_info_cmdid =
668 WMI_10_4_WLAN_PEER_CACHING_PRINT_ALL_PEERS_INFO_CMDID,
669 .peer_update_wds_entry_cmdid = WMI_10_4_PEER_UPDATE_WDS_ENTRY_CMDID,
670 .peer_add_proxy_sta_entry_cmdid =
671 WMI_10_4_PEER_ADD_PROXY_STA_ENTRY_CMDID,
672 .rtt_keepalive_cmdid = WMI_10_4_RTT_KEEPALIVE_CMDID,
673 .oem_req_cmdid = WMI_10_4_OEM_REQ_CMDID,
674 .nan_cmdid = WMI_10_4_NAN_CMDID,
675 .vdev_ratemask_cmdid = WMI_10_4_VDEV_RATEMASK_CMDID,
676 .qboost_cfg_cmdid = WMI_10_4_QBOOST_CFG_CMDID,
677 .pdev_smart_ant_enable_cmdid = WMI_10_4_PDEV_SMART_ANT_ENABLE_CMDID,
678 .pdev_smart_ant_set_rx_antenna_cmdid =
679 WMI_10_4_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
680 .peer_smart_ant_set_tx_antenna_cmdid =
681 WMI_10_4_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
682 .peer_smart_ant_set_train_info_cmdid =
683 WMI_10_4_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
684 .peer_smart_ant_set_node_config_ops_cmdid =
685 WMI_10_4_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
686 .pdev_set_antenna_switch_table_cmdid =
687 WMI_10_4_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
688 .pdev_set_ctl_table_cmdid = WMI_10_4_PDEV_SET_CTL_TABLE_CMDID,
689 .pdev_set_mimogain_table_cmdid = WMI_10_4_PDEV_SET_MIMOGAIN_TABLE_CMDID,
690 .pdev_ratepwr_table_cmdid = WMI_10_4_PDEV_RATEPWR_TABLE_CMDID,
691 .pdev_ratepwr_chainmsk_table_cmdid =
692 WMI_10_4_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID,
693 .pdev_fips_cmdid = WMI_10_4_PDEV_FIPS_CMDID,
694 .tt_set_conf_cmdid = WMI_10_4_TT_SET_CONF_CMDID,
695 .fwtest_cmdid = WMI_10_4_FWTEST_CMDID,
696 .vdev_atf_request_cmdid = WMI_10_4_VDEV_ATF_REQUEST_CMDID,
697 .peer_atf_request_cmdid = WMI_10_4_PEER_ATF_REQUEST_CMDID,
698 .pdev_get_ani_cck_config_cmdid = WMI_10_4_PDEV_GET_ANI_CCK_CONFIG_CMDID,
699 .pdev_get_ani_ofdm_config_cmdid =
700 WMI_10_4_PDEV_GET_ANI_OFDM_CONFIG_CMDID,
701 .pdev_reserve_ast_entry_cmdid = WMI_10_4_PDEV_RESERVE_AST_ENTRY_CMDID,
702 .pdev_get_nfcal_power_cmdid = WMI_10_4_PDEV_GET_NFCAL_POWER_CMDID,
703 .pdev_get_tpc_cmdid = WMI_10_4_PDEV_GET_TPC_CMDID,
704 .pdev_get_ast_info_cmdid = WMI_10_4_PDEV_GET_AST_INFO_CMDID,
705 .vdev_set_dscp_tid_map_cmdid = WMI_10_4_VDEV_SET_DSCP_TID_MAP_CMDID,
706 .pdev_get_info_cmdid = WMI_10_4_PDEV_GET_INFO_CMDID,
707 .vdev_get_info_cmdid = WMI_10_4_VDEV_GET_INFO_CMDID,
708 .vdev_filter_neighbor_rx_packets_cmdid =
709 WMI_10_4_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID,
710 .mu_cal_start_cmdid = WMI_10_4_MU_CAL_START_CMDID,
711 .set_cca_params_cmdid = WMI_10_4_SET_CCA_PARAMS_CMDID,
712 .pdev_bss_chan_info_request_cmdid =
713 WMI_10_4_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
714 .ext_resource_cfg_cmdid = WMI_10_4_EXT_RESOURCE_CFG_CMDID,
715 .vdev_set_ie_cmdid = WMI_10_4_VDEV_SET_IE_CMDID,
716 .set_lteu_config_cmdid = WMI_10_4_SET_LTEU_CONFIG_CMDID,
717 .atf_ssid_grouping_request_cmdid =
718 WMI_10_4_ATF_SSID_GROUPING_REQUEST_CMDID,
719 .peer_atf_ext_request_cmdid = WMI_10_4_PEER_ATF_EXT_REQUEST_CMDID,
720 .set_periodic_channel_stats_cfg_cmdid =
721 WMI_10_4_SET_PERIODIC_CHANNEL_STATS_CONFIG,
722 .peer_bwf_request_cmdid = WMI_10_4_PEER_BWF_REQUEST_CMDID,
723 .btcoex_cfg_cmdid = WMI_10_4_BTCOEX_CFG_CMDID,
724 .peer_tx_mu_txmit_count_cmdid = WMI_10_4_PEER_TX_MU_TXMIT_COUNT_CMDID,
725 .peer_tx_mu_txmit_rstcnt_cmdid = WMI_10_4_PEER_TX_MU_TXMIT_RSTCNT_CMDID,
726 .peer_gid_userpos_list_cmdid = WMI_10_4_PEER_GID_USERPOS_LIST_CMDID,
727 .pdev_check_cal_version_cmdid = WMI_10_4_PDEV_CHECK_CAL_VERSION_CMDID,
728 .coex_version_cfg_cmid = WMI_10_4_COEX_VERSION_CFG_CMID,
729 .pdev_get_rx_filter_cmdid = WMI_10_4_PDEV_GET_RX_FILTER_CMDID,
730 .pdev_extended_nss_cfg_cmdid = WMI_10_4_PDEV_EXTENDED_NSS_CFG_CMDID,
731 .vdev_set_scan_nac_rssi_cmdid = WMI_10_4_VDEV_SET_SCAN_NAC_RSSI_CMDID,
732 .prog_gpio_band_select_cmdid = WMI_10_4_PROG_GPIO_BAND_SELECT_CMDID,
733 .config_smart_logging_cmdid = WMI_10_4_CONFIG_SMART_LOGGING_CMDID,
734 .debug_fatal_condition_cmdid = WMI_10_4_DEBUG_FATAL_CONDITION_CMDID,
735 .get_tsf_timer_cmdid = WMI_10_4_GET_TSF_TIMER_CMDID,
736 .pdev_get_tpc_table_cmdid = WMI_10_4_PDEV_GET_TPC_TABLE_CMDID,
737 .vdev_sifs_trigger_time_cmdid = WMI_10_4_VDEV_SIFS_TRIGGER_TIME_CMDID,
738 .pdev_wds_entry_list_cmdid = WMI_10_4_PDEV_WDS_ENTRY_LIST_CMDID,
739 .tdls_set_state_cmdid = WMI_10_4_TDLS_SET_STATE_CMDID,
740 .tdls_peer_update_cmdid = WMI_10_4_TDLS_PEER_UPDATE_CMDID,
741 .tdls_set_offchan_mode_cmdid = WMI_10_4_TDLS_SET_OFFCHAN_MODE_CMDID,
742 .radar_found_cmdid = WMI_10_4_RADAR_FOUND_CMDID,
743 .per_peer_per_tid_config_cmdid = WMI_10_4_PER_PEER_PER_TID_CONFIG_CMDID,
744 };
745
746 static struct wmi_peer_param_map wmi_peer_param_map = {
747 .smps_state = WMI_PEER_SMPS_STATE,
748 .ampdu = WMI_PEER_AMPDU,
749 .authorize = WMI_PEER_AUTHORIZE,
750 .chan_width = WMI_PEER_CHAN_WIDTH,
751 .nss = WMI_PEER_NSS,
752 .use_4addr = WMI_PEER_USE_4ADDR,
753 .use_fixed_power = WMI_PEER_USE_FIXED_PWR,
754 .debug = WMI_PEER_DEBUG,
755 .phymode = WMI_PEER_PHYMODE,
756 .dummy_var = WMI_PEER_DUMMY_VAR,
757 };
758
759 /* MAIN WMI VDEV param map */
760 static struct wmi_vdev_param_map wmi_vdev_param_map = {
761 .rts_threshold = WMI_VDEV_PARAM_RTS_THRESHOLD,
762 .fragmentation_threshold = WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
763 .beacon_interval = WMI_VDEV_PARAM_BEACON_INTERVAL,
764 .listen_interval = WMI_VDEV_PARAM_LISTEN_INTERVAL,
765 .multicast_rate = WMI_VDEV_PARAM_MULTICAST_RATE,
766 .mgmt_tx_rate = WMI_VDEV_PARAM_MGMT_TX_RATE,
767 .slot_time = WMI_VDEV_PARAM_SLOT_TIME,
768 .preamble = WMI_VDEV_PARAM_PREAMBLE,
769 .swba_time = WMI_VDEV_PARAM_SWBA_TIME,
770 .wmi_vdev_stats_update_period = WMI_VDEV_STATS_UPDATE_PERIOD,
771 .wmi_vdev_pwrsave_ageout_time = WMI_VDEV_PWRSAVE_AGEOUT_TIME,
772 .wmi_vdev_host_swba_interval = WMI_VDEV_HOST_SWBA_INTERVAL,
773 .dtim_period = WMI_VDEV_PARAM_DTIM_PERIOD,
774 .wmi_vdev_oc_scheduler_air_time_limit =
775 WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
776 .wds = WMI_VDEV_PARAM_WDS,
777 .atim_window = WMI_VDEV_PARAM_ATIM_WINDOW,
778 .bmiss_count_max = WMI_VDEV_PARAM_BMISS_COUNT_MAX,
779 .bmiss_first_bcnt = WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
780 .bmiss_final_bcnt = WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
781 .feature_wmm = WMI_VDEV_PARAM_FEATURE_WMM,
782 .chwidth = WMI_VDEV_PARAM_CHWIDTH,
783 .chextoffset = WMI_VDEV_PARAM_CHEXTOFFSET,
784 .disable_htprotection = WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
785 .sta_quickkickout = WMI_VDEV_PARAM_STA_QUICKKICKOUT,
786 .mgmt_rate = WMI_VDEV_PARAM_MGMT_RATE,
787 .protection_mode = WMI_VDEV_PARAM_PROTECTION_MODE,
788 .fixed_rate = WMI_VDEV_PARAM_FIXED_RATE,
789 .sgi = WMI_VDEV_PARAM_SGI,
790 .ldpc = WMI_VDEV_PARAM_LDPC,
791 .tx_stbc = WMI_VDEV_PARAM_TX_STBC,
792 .rx_stbc = WMI_VDEV_PARAM_RX_STBC,
793 .intra_bss_fwd = WMI_VDEV_PARAM_INTRA_BSS_FWD,
794 .def_keyid = WMI_VDEV_PARAM_DEF_KEYID,
795 .nss = WMI_VDEV_PARAM_NSS,
796 .bcast_data_rate = WMI_VDEV_PARAM_BCAST_DATA_RATE,
797 .mcast_data_rate = WMI_VDEV_PARAM_MCAST_DATA_RATE,
798 .mcast_indicate = WMI_VDEV_PARAM_MCAST_INDICATE,
799 .dhcp_indicate = WMI_VDEV_PARAM_DHCP_INDICATE,
800 .unknown_dest_indicate = WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
801 .ap_keepalive_min_idle_inactive_time_secs =
802 WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
803 .ap_keepalive_max_idle_inactive_time_secs =
804 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
805 .ap_keepalive_max_unresponsive_time_secs =
806 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
807 .ap_enable_nawds = WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
808 .mcast2ucast_set = WMI_VDEV_PARAM_UNSUPPORTED,
809 .enable_rtscts = WMI_VDEV_PARAM_ENABLE_RTSCTS,
810 .txbf = WMI_VDEV_PARAM_TXBF,
811 .packet_powersave = WMI_VDEV_PARAM_PACKET_POWERSAVE,
812 .drop_unencry = WMI_VDEV_PARAM_DROP_UNENCRY,
813 .tx_encap_type = WMI_VDEV_PARAM_TX_ENCAP_TYPE,
814 .ap_detect_out_of_sync_sleeping_sta_time_secs =
815 WMI_VDEV_PARAM_UNSUPPORTED,
816 .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
817 .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
818 .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
819 .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
820 .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
821 .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
822 .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
823 .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
824 .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
825 .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
826 .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
827 .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
828 .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
829 .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
830 .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
831 .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
832 .disable_4addr_src_lrn = WMI_VDEV_PARAM_UNSUPPORTED,
833 .rtt_responder_role = WMI_VDEV_PARAM_UNSUPPORTED,
834 };
835
836 /* 10.X WMI VDEV param map */
837 static struct wmi_vdev_param_map wmi_10x_vdev_param_map = {
838 .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
839 .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
840 .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
841 .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
842 .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
843 .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
844 .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
845 .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
846 .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
847 .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
848 .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
849 .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
850 .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
851 .wmi_vdev_oc_scheduler_air_time_limit =
852 WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
853 .wds = WMI_10X_VDEV_PARAM_WDS,
854 .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
855 .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
856 .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
857 .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
858 .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
859 .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
860 .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
861 .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
862 .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
863 .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
864 .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
865 .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
866 .sgi = WMI_10X_VDEV_PARAM_SGI,
867 .ldpc = WMI_10X_VDEV_PARAM_LDPC,
868 .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
869 .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
870 .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
871 .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
872 .nss = WMI_10X_VDEV_PARAM_NSS,
873 .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
874 .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
875 .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
876 .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
877 .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
878 .ap_keepalive_min_idle_inactive_time_secs =
879 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
880 .ap_keepalive_max_idle_inactive_time_secs =
881 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
882 .ap_keepalive_max_unresponsive_time_secs =
883 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
884 .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
885 .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
886 .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
887 .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
888 .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
889 .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
890 .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
891 .ap_detect_out_of_sync_sleeping_sta_time_secs =
892 WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
893 .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
894 .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
895 .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
896 .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
897 .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
898 .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
899 .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
900 .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
901 .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
902 .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
903 .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
904 .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
905 .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
906 .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
907 .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
908 .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
909 .disable_4addr_src_lrn = WMI_VDEV_PARAM_UNSUPPORTED,
910 .rtt_responder_role = WMI_VDEV_PARAM_UNSUPPORTED,
911 };
912
913 static struct wmi_vdev_param_map wmi_10_2_4_vdev_param_map = {
914 .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
915 .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
916 .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
917 .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
918 .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
919 .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
920 .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
921 .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
922 .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
923 .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
924 .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
925 .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
926 .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
927 .wmi_vdev_oc_scheduler_air_time_limit =
928 WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
929 .wds = WMI_10X_VDEV_PARAM_WDS,
930 .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
931 .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
932 .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
933 .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
934 .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
935 .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
936 .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
937 .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
938 .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
939 .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
940 .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
941 .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
942 .sgi = WMI_10X_VDEV_PARAM_SGI,
943 .ldpc = WMI_10X_VDEV_PARAM_LDPC,
944 .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
945 .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
946 .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
947 .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
948 .nss = WMI_10X_VDEV_PARAM_NSS,
949 .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
950 .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
951 .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
952 .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
953 .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
954 .ap_keepalive_min_idle_inactive_time_secs =
955 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
956 .ap_keepalive_max_idle_inactive_time_secs =
957 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
958 .ap_keepalive_max_unresponsive_time_secs =
959 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
960 .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
961 .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
962 .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
963 .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
964 .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
965 .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
966 .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
967 .ap_detect_out_of_sync_sleeping_sta_time_secs =
968 WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
969 .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
970 .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
971 .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
972 .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
973 .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
974 .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
975 .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
976 .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
977 .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
978 .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
979 .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
980 .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
981 .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
982 .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
983 .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
984 .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
985 .disable_4addr_src_lrn = WMI_VDEV_PARAM_UNSUPPORTED,
986 .rtt_responder_role = WMI_VDEV_PARAM_UNSUPPORTED,
987 };
988
989 static struct wmi_vdev_param_map wmi_10_4_vdev_param_map = {
990 .rts_threshold = WMI_10_4_VDEV_PARAM_RTS_THRESHOLD,
991 .fragmentation_threshold = WMI_10_4_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
992 .beacon_interval = WMI_10_4_VDEV_PARAM_BEACON_INTERVAL,
993 .listen_interval = WMI_10_4_VDEV_PARAM_LISTEN_INTERVAL,
994 .multicast_rate = WMI_10_4_VDEV_PARAM_MULTICAST_RATE,
995 .mgmt_tx_rate = WMI_10_4_VDEV_PARAM_MGMT_TX_RATE,
996 .slot_time = WMI_10_4_VDEV_PARAM_SLOT_TIME,
997 .preamble = WMI_10_4_VDEV_PARAM_PREAMBLE,
998 .swba_time = WMI_10_4_VDEV_PARAM_SWBA_TIME,
999 .wmi_vdev_stats_update_period = WMI_10_4_VDEV_STATS_UPDATE_PERIOD,
1000 .wmi_vdev_pwrsave_ageout_time = WMI_10_4_VDEV_PWRSAVE_AGEOUT_TIME,
1001 .wmi_vdev_host_swba_interval = WMI_10_4_VDEV_HOST_SWBA_INTERVAL,
1002 .dtim_period = WMI_10_4_VDEV_PARAM_DTIM_PERIOD,
1003 .wmi_vdev_oc_scheduler_air_time_limit =
1004 WMI_10_4_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
1005 .wds = WMI_10_4_VDEV_PARAM_WDS,
1006 .atim_window = WMI_10_4_VDEV_PARAM_ATIM_WINDOW,
1007 .bmiss_count_max = WMI_10_4_VDEV_PARAM_BMISS_COUNT_MAX,
1008 .bmiss_first_bcnt = WMI_10_4_VDEV_PARAM_BMISS_FIRST_BCNT,
1009 .bmiss_final_bcnt = WMI_10_4_VDEV_PARAM_BMISS_FINAL_BCNT,
1010 .feature_wmm = WMI_10_4_VDEV_PARAM_FEATURE_WMM,
1011 .chwidth = WMI_10_4_VDEV_PARAM_CHWIDTH,
1012 .chextoffset = WMI_10_4_VDEV_PARAM_CHEXTOFFSET,
1013 .disable_htprotection = WMI_10_4_VDEV_PARAM_DISABLE_HTPROTECTION,
1014 .sta_quickkickout = WMI_10_4_VDEV_PARAM_STA_QUICKKICKOUT,
1015 .mgmt_rate = WMI_10_4_VDEV_PARAM_MGMT_RATE,
1016 .protection_mode = WMI_10_4_VDEV_PARAM_PROTECTION_MODE,
1017 .fixed_rate = WMI_10_4_VDEV_PARAM_FIXED_RATE,
1018 .sgi = WMI_10_4_VDEV_PARAM_SGI,
1019 .ldpc = WMI_10_4_VDEV_PARAM_LDPC,
1020 .tx_stbc = WMI_10_4_VDEV_PARAM_TX_STBC,
1021 .rx_stbc = WMI_10_4_VDEV_PARAM_RX_STBC,
1022 .intra_bss_fwd = WMI_10_4_VDEV_PARAM_INTRA_BSS_FWD,
1023 .def_keyid = WMI_10_4_VDEV_PARAM_DEF_KEYID,
1024 .nss = WMI_10_4_VDEV_PARAM_NSS,
1025 .bcast_data_rate = WMI_10_4_VDEV_PARAM_BCAST_DATA_RATE,
1026 .mcast_data_rate = WMI_10_4_VDEV_PARAM_MCAST_DATA_RATE,
1027 .mcast_indicate = WMI_10_4_VDEV_PARAM_MCAST_INDICATE,
1028 .dhcp_indicate = WMI_10_4_VDEV_PARAM_DHCP_INDICATE,
1029 .unknown_dest_indicate = WMI_10_4_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
1030 .ap_keepalive_min_idle_inactive_time_secs =
1031 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
1032 .ap_keepalive_max_idle_inactive_time_secs =
1033 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
1034 .ap_keepalive_max_unresponsive_time_secs =
1035 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
1036 .ap_enable_nawds = WMI_10_4_VDEV_PARAM_AP_ENABLE_NAWDS,
1037 .mcast2ucast_set = WMI_10_4_VDEV_PARAM_MCAST2UCAST_SET,
1038 .enable_rtscts = WMI_10_4_VDEV_PARAM_ENABLE_RTSCTS,
1039 .txbf = WMI_10_4_VDEV_PARAM_TXBF,
1040 .packet_powersave = WMI_10_4_VDEV_PARAM_PACKET_POWERSAVE,
1041 .drop_unencry = WMI_10_4_VDEV_PARAM_DROP_UNENCRY,
1042 .tx_encap_type = WMI_10_4_VDEV_PARAM_TX_ENCAP_TYPE,
1043 .ap_detect_out_of_sync_sleeping_sta_time_secs =
1044 WMI_10_4_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
1045 .rc_num_retries = WMI_10_4_VDEV_PARAM_RC_NUM_RETRIES,
1046 .cabq_maxdur = WMI_10_4_VDEV_PARAM_CABQ_MAXDUR,
1047 .mfptest_set = WMI_10_4_VDEV_PARAM_MFPTEST_SET,
1048 .rts_fixed_rate = WMI_10_4_VDEV_PARAM_RTS_FIXED_RATE,
1049 .vht_sgimask = WMI_10_4_VDEV_PARAM_VHT_SGIMASK,
1050 .vht80_ratemask = WMI_10_4_VDEV_PARAM_VHT80_RATEMASK,
1051 .early_rx_adjust_enable = WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE,
1052 .early_rx_tgt_bmiss_num = WMI_10_4_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM,
1053 .early_rx_bmiss_sample_cycle =
1054 WMI_10_4_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE,
1055 .early_rx_slop_step = WMI_10_4_VDEV_PARAM_EARLY_RX_SLOP_STEP,
1056 .early_rx_init_slop = WMI_10_4_VDEV_PARAM_EARLY_RX_INIT_SLOP,
1057 .early_rx_adjust_pause = WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE,
1058 .proxy_sta = WMI_10_4_VDEV_PARAM_PROXY_STA,
1059 .meru_vc = WMI_10_4_VDEV_PARAM_MERU_VC,
1060 .rx_decap_type = WMI_10_4_VDEV_PARAM_RX_DECAP_TYPE,
1061 .bw_nss_ratemask = WMI_10_4_VDEV_PARAM_BW_NSS_RATEMASK,
1062 .inc_tsf = WMI_10_4_VDEV_PARAM_TSF_INCREMENT,
1063 .dec_tsf = WMI_10_4_VDEV_PARAM_TSF_DECREMENT,
1064 .disable_4addr_src_lrn = WMI_10_4_VDEV_PARAM_DISABLE_4_ADDR_SRC_LRN,
1065 .rtt_responder_role = WMI_10_4_VDEV_PARAM_ENABLE_DISABLE_RTT_RESPONDER_ROLE,
1066 };
1067
1068 static struct wmi_pdev_param_map wmi_pdev_param_map = {
1069 .tx_chain_mask = WMI_PDEV_PARAM_TX_CHAIN_MASK,
1070 .rx_chain_mask = WMI_PDEV_PARAM_RX_CHAIN_MASK,
1071 .txpower_limit2g = WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
1072 .txpower_limit5g = WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
1073 .txpower_scale = WMI_PDEV_PARAM_TXPOWER_SCALE,
1074 .beacon_gen_mode = WMI_PDEV_PARAM_BEACON_GEN_MODE,
1075 .beacon_tx_mode = WMI_PDEV_PARAM_BEACON_TX_MODE,
1076 .resmgr_offchan_mode = WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
1077 .protection_mode = WMI_PDEV_PARAM_PROTECTION_MODE,
1078 .dynamic_bw = WMI_PDEV_PARAM_DYNAMIC_BW,
1079 .non_agg_sw_retry_th = WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
1080 .agg_sw_retry_th = WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
1081 .sta_kickout_th = WMI_PDEV_PARAM_STA_KICKOUT_TH,
1082 .ac_aggrsize_scaling = WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
1083 .ltr_enable = WMI_PDEV_PARAM_LTR_ENABLE,
1084 .ltr_ac_latency_be = WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
1085 .ltr_ac_latency_bk = WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
1086 .ltr_ac_latency_vi = WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
1087 .ltr_ac_latency_vo = WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
1088 .ltr_ac_latency_timeout = WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
1089 .ltr_sleep_override = WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
1090 .ltr_rx_override = WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
1091 .ltr_tx_activity_timeout = WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
1092 .l1ss_enable = WMI_PDEV_PARAM_L1SS_ENABLE,
1093 .dsleep_enable = WMI_PDEV_PARAM_DSLEEP_ENABLE,
1094 .pcielp_txbuf_flush = WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
1095 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
1096 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
1097 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
1098 .pdev_stats_update_period = WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
1099 .vdev_stats_update_period = WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
1100 .peer_stats_update_period = WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
1101 .bcnflt_stats_update_period = WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
1102 .pmf_qos = WMI_PDEV_PARAM_PMF_QOS,
1103 .arp_ac_override = WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
1104 .dcs = WMI_PDEV_PARAM_DCS,
1105 .ani_enable = WMI_PDEV_PARAM_ANI_ENABLE,
1106 .ani_poll_period = WMI_PDEV_PARAM_ANI_POLL_PERIOD,
1107 .ani_listen_period = WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
1108 .ani_ofdm_level = WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
1109 .ani_cck_level = WMI_PDEV_PARAM_ANI_CCK_LEVEL,
1110 .dyntxchain = WMI_PDEV_PARAM_DYNTXCHAIN,
1111 .proxy_sta = WMI_PDEV_PARAM_PROXY_STA,
1112 .idle_ps_config = WMI_PDEV_PARAM_IDLE_PS_CONFIG,
1113 .power_gating_sleep = WMI_PDEV_PARAM_POWER_GATING_SLEEP,
1114 .fast_channel_reset = WMI_PDEV_PARAM_UNSUPPORTED,
1115 .burst_dur = WMI_PDEV_PARAM_UNSUPPORTED,
1116 .burst_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1117 .cal_period = WMI_PDEV_PARAM_UNSUPPORTED,
1118 .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
1119 .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1120 .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
1121 .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
1122 .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1123 .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
1124 .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
1125 .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1126 .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1127 .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1128 .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1129 .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1130 .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1131 .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
1132 .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
1133 .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1134 .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1135 .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1136 .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1137 .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1138 .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1139 .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
1140 .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
1141 .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
1142 .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1143 .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1144 .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
1145 .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
1146 .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
1147 .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
1148 .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
1149 .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
1150 .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
1151 .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
1152 .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
1153 .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
1154 .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1155 .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
1156 .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED,
1157 .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
1158 .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
1159 .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
1160 .enable_btcoex = WMI_PDEV_PARAM_UNSUPPORTED,
1161 };
1162
1163 static struct wmi_pdev_param_map wmi_10x_pdev_param_map = {
1164 .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
1165 .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
1166 .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
1167 .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
1168 .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
1169 .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
1170 .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
1171 .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
1172 .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
1173 .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
1174 .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
1175 .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
1176 .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
1177 .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
1178 .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
1179 .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
1180 .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
1181 .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
1182 .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
1183 .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
1184 .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
1185 .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
1186 .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
1187 .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
1188 .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
1189 .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
1190 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
1191 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
1192 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
1193 .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
1194 .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
1195 .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
1196 .bcnflt_stats_update_period =
1197 WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
1198 .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
1199 .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
1200 .dcs = WMI_10X_PDEV_PARAM_DCS,
1201 .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
1202 .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
1203 .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
1204 .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
1205 .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
1206 .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
1207 .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
1208 .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
1209 .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
1210 .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
1211 .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
1212 .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
1213 .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD,
1214 .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
1215 .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1216 .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
1217 .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
1218 .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1219 .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
1220 .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
1221 .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1222 .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1223 .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1224 .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1225 .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1226 .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1227 .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
1228 .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
1229 .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1230 .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1231 .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1232 .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1233 .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1234 .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1235 .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
1236 .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
1237 .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
1238 .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1239 .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1240 .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
1241 .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
1242 .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
1243 .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
1244 .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
1245 .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
1246 .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
1247 .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
1248 .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
1249 .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
1250 .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1251 .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
1252 .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED,
1253 .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
1254 .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
1255 .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
1256 .enable_btcoex = WMI_PDEV_PARAM_UNSUPPORTED,
1257 };
1258
1259 static struct wmi_pdev_param_map wmi_10_2_4_pdev_param_map = {
1260 .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
1261 .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
1262 .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
1263 .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
1264 .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
1265 .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
1266 .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
1267 .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
1268 .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
1269 .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
1270 .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
1271 .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
1272 .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
1273 .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
1274 .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
1275 .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
1276 .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
1277 .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
1278 .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
1279 .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
1280 .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
1281 .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
1282 .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
1283 .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
1284 .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
1285 .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
1286 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
1287 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
1288 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
1289 .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
1290 .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
1291 .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
1292 .bcnflt_stats_update_period =
1293 WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
1294 .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
1295 .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
1296 .dcs = WMI_10X_PDEV_PARAM_DCS,
1297 .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
1298 .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
1299 .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
1300 .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
1301 .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
1302 .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
1303 .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
1304 .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
1305 .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
1306 .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
1307 .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
1308 .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
1309 .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD,
1310 .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
1311 .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1312 .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
1313 .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
1314 .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1315 .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
1316 .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
1317 .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1318 .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1319 .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1320 .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1321 .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1322 .peer_sta_ps_statechg_enable =
1323 WMI_10X_PDEV_PARAM_PEER_STA_PS_STATECHG_ENABLE,
1324 .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
1325 .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
1326 .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1327 .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1328 .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1329 .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1330 .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1331 .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1332 .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
1333 .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
1334 .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
1335 .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1336 .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1337 .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
1338 .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
1339 .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
1340 .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
1341 .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
1342 .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
1343 .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
1344 .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
1345 .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
1346 .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
1347 .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1348 .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
1349 .pdev_reset = WMI_10X_PDEV_PARAM_PDEV_RESET,
1350 .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
1351 .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
1352 .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
1353 .enable_btcoex = WMI_PDEV_PARAM_UNSUPPORTED,
1354 };
1355
1356 /* firmware 10.2 specific mappings */
1357 static struct wmi_cmd_map wmi_10_2_cmd_map = {
1358 .init_cmdid = WMI_10_2_INIT_CMDID,
1359 .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID,
1360 .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID,
1361 .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID,
1362 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
1363 .scan_prob_req_oui_cmdid = WMI_CMD_UNSUPPORTED,
1364 .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
1365 .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID,
1366 .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID,
1367 .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
1368 .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
1369 .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
1370 .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
1371 .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
1372 .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
1373 .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
1374 .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
1375 .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
1376 .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID,
1377 .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID,
1378 .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID,
1379 .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
1380 .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID,
1381 .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID,
1382 .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID,
1383 .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID,
1384 .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID,
1385 .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID,
1386 .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID,
1387 .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID,
1388 .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID,
1389 .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID,
1390 .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
1391 .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
1392 .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID,
1393 .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID,
1394 .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID,
1395 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
1396 .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID,
1397 .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
1398 .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID,
1399 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
1400 .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
1401 .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID,
1402 .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID,
1403 .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID,
1404 .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID,
1405 .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID,
1406 .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID,
1407 .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
1408 .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID,
1409 .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID,
1410 .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID,
1411 .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE,
1412 .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
1413 .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD,
1414 .roam_scan_rssi_change_threshold =
1415 WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1416 .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE,
1417 .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
1418 .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
1419 .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD,
1420 .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
1421 .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
1422 .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE,
1423 .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
1424 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
1425 .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID,
1426 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
1427 .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
1428 .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
1429 .wlan_profile_set_hist_intvl_cmdid =
1430 WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
1431 .wlan_profile_get_profile_data_cmdid =
1432 WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
1433 .wlan_profile_enable_profile_id_cmdid =
1434 WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
1435 .wlan_profile_list_profile_id_cmdid =
1436 WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
1437 .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID,
1438 .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID,
1439 .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID,
1440 .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID,
1441 .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
1442 .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
1443 .wow_enable_disable_wake_event_cmdid =
1444 WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
1445 .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID,
1446 .wow_hostwakeup_from_sleep_cmdid =
1447 WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
1448 .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID,
1449 .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID,
1450 .vdev_spectral_scan_configure_cmdid =
1451 WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
1452 .vdev_spectral_scan_enable_cmdid =
1453 WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
1454 .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID,
1455 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
1456 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
1457 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
1458 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
1459 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
1460 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
1461 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
1462 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
1463 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
1464 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
1465 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
1466 .echo_cmdid = WMI_10_2_ECHO_CMDID,
1467 .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID,
1468 .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID,
1469 .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID,
1470 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
1471 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
1472 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
1473 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
1474 .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID,
1475 .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID,
1476 .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
1477 .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
1478 .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
1479 .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
1480 .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
1481 .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
1482 .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
1483 .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
1484 .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
1485 .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
1486 .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
1487 .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
1488 .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
1489 .nan_cmdid = WMI_CMD_UNSUPPORTED,
1490 .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
1491 .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
1492 .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
1493 .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
1494 .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
1495 .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
1496 .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
1497 .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
1498 .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
1499 .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
1500 .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
1501 .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
1502 .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
1503 .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
1504 .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
1505 .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
1506 .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
1507 .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
1508 .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
1509 .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
1510 .pdev_get_tpc_table_cmdid = WMI_CMD_UNSUPPORTED,
1511 .radar_found_cmdid = WMI_CMD_UNSUPPORTED,
1512 };
1513
1514 static struct wmi_pdev_param_map wmi_10_4_pdev_param_map = {
1515 .tx_chain_mask = WMI_10_4_PDEV_PARAM_TX_CHAIN_MASK,
1516 .rx_chain_mask = WMI_10_4_PDEV_PARAM_RX_CHAIN_MASK,
1517 .txpower_limit2g = WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT2G,
1518 .txpower_limit5g = WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT5G,
1519 .txpower_scale = WMI_10_4_PDEV_PARAM_TXPOWER_SCALE,
1520 .beacon_gen_mode = WMI_10_4_PDEV_PARAM_BEACON_GEN_MODE,
1521 .beacon_tx_mode = WMI_10_4_PDEV_PARAM_BEACON_TX_MODE,
1522 .resmgr_offchan_mode = WMI_10_4_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
1523 .protection_mode = WMI_10_4_PDEV_PARAM_PROTECTION_MODE,
1524 .dynamic_bw = WMI_10_4_PDEV_PARAM_DYNAMIC_BW,
1525 .non_agg_sw_retry_th = WMI_10_4_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
1526 .agg_sw_retry_th = WMI_10_4_PDEV_PARAM_AGG_SW_RETRY_TH,
1527 .sta_kickout_th = WMI_10_4_PDEV_PARAM_STA_KICKOUT_TH,
1528 .ac_aggrsize_scaling = WMI_10_4_PDEV_PARAM_AC_AGGRSIZE_SCALING,
1529 .ltr_enable = WMI_10_4_PDEV_PARAM_LTR_ENABLE,
1530 .ltr_ac_latency_be = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BE,
1531 .ltr_ac_latency_bk = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BK,
1532 .ltr_ac_latency_vi = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VI,
1533 .ltr_ac_latency_vo = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VO,
1534 .ltr_ac_latency_timeout = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
1535 .ltr_sleep_override = WMI_10_4_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
1536 .ltr_rx_override = WMI_10_4_PDEV_PARAM_LTR_RX_OVERRIDE,
1537 .ltr_tx_activity_timeout = WMI_10_4_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
1538 .l1ss_enable = WMI_10_4_PDEV_PARAM_L1SS_ENABLE,
1539 .dsleep_enable = WMI_10_4_PDEV_PARAM_DSLEEP_ENABLE,
1540 .pcielp_txbuf_flush = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
1541 .pcielp_txbuf_watermark = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
1542 .pcielp_txbuf_tmo_en = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
1543 .pcielp_txbuf_tmo_value = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
1544 .pdev_stats_update_period =
1545 WMI_10_4_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
1546 .vdev_stats_update_period =
1547 WMI_10_4_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
1548 .peer_stats_update_period =
1549 WMI_10_4_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
1550 .bcnflt_stats_update_period =
1551 WMI_10_4_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
1552 .pmf_qos = WMI_10_4_PDEV_PARAM_PMF_QOS,
1553 .arp_ac_override = WMI_10_4_PDEV_PARAM_ARP_AC_OVERRIDE,
1554 .dcs = WMI_10_4_PDEV_PARAM_DCS,
1555 .ani_enable = WMI_10_4_PDEV_PARAM_ANI_ENABLE,
1556 .ani_poll_period = WMI_10_4_PDEV_PARAM_ANI_POLL_PERIOD,
1557 .ani_listen_period = WMI_10_4_PDEV_PARAM_ANI_LISTEN_PERIOD,
1558 .ani_ofdm_level = WMI_10_4_PDEV_PARAM_ANI_OFDM_LEVEL,
1559 .ani_cck_level = WMI_10_4_PDEV_PARAM_ANI_CCK_LEVEL,
1560 .dyntxchain = WMI_10_4_PDEV_PARAM_DYNTXCHAIN,
1561 .proxy_sta = WMI_10_4_PDEV_PARAM_PROXY_STA,
1562 .idle_ps_config = WMI_10_4_PDEV_PARAM_IDLE_PS_CONFIG,
1563 .power_gating_sleep = WMI_10_4_PDEV_PARAM_POWER_GATING_SLEEP,
1564 .fast_channel_reset = WMI_10_4_PDEV_PARAM_FAST_CHANNEL_RESET,
1565 .burst_dur = WMI_10_4_PDEV_PARAM_BURST_DUR,
1566 .burst_enable = WMI_10_4_PDEV_PARAM_BURST_ENABLE,
1567 .cal_period = WMI_10_4_PDEV_PARAM_CAL_PERIOD,
1568 .aggr_burst = WMI_10_4_PDEV_PARAM_AGGR_BURST,
1569 .rx_decap_mode = WMI_10_4_PDEV_PARAM_RX_DECAP_MODE,
1570 .smart_antenna_default_antenna =
1571 WMI_10_4_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
1572 .igmpmld_override = WMI_10_4_PDEV_PARAM_IGMPMLD_OVERRIDE,
1573 .igmpmld_tid = WMI_10_4_PDEV_PARAM_IGMPMLD_TID,
1574 .antenna_gain = WMI_10_4_PDEV_PARAM_ANTENNA_GAIN,
1575 .rx_filter = WMI_10_4_PDEV_PARAM_RX_FILTER,
1576 .set_mcast_to_ucast_tid = WMI_10_4_PDEV_SET_MCAST_TO_UCAST_TID,
1577 .proxy_sta_mode = WMI_10_4_PDEV_PARAM_PROXY_STA_MODE,
1578 .set_mcast2ucast_mode = WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_MODE,
1579 .set_mcast2ucast_buffer = WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
1580 .remove_mcast2ucast_buffer =
1581 WMI_10_4_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
1582 .peer_sta_ps_statechg_enable =
1583 WMI_10_4_PDEV_PEER_STA_PS_STATECHG_ENABLE,
1584 .igmpmld_ac_override = WMI_10_4_PDEV_PARAM_IGMPMLD_AC_OVERRIDE,
1585 .block_interbss = WMI_10_4_PDEV_PARAM_BLOCK_INTERBSS,
1586 .set_disable_reset_cmdid = WMI_10_4_PDEV_PARAM_SET_DISABLE_RESET_CMDID,
1587 .set_msdu_ttl_cmdid = WMI_10_4_PDEV_PARAM_SET_MSDU_TTL_CMDID,
1588 .set_ppdu_duration_cmdid = WMI_10_4_PDEV_PARAM_SET_PPDU_DURATION_CMDID,
1589 .txbf_sound_period_cmdid = WMI_10_4_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID,
1590 .set_promisc_mode_cmdid = WMI_10_4_PDEV_PARAM_SET_PROMISC_MODE_CMDID,
1591 .set_burst_mode_cmdid = WMI_10_4_PDEV_PARAM_SET_BURST_MODE_CMDID,
1592 .en_stats = WMI_10_4_PDEV_PARAM_EN_STATS,
1593 .mu_group_policy = WMI_10_4_PDEV_PARAM_MU_GROUP_POLICY,
1594 .noise_detection = WMI_10_4_PDEV_PARAM_NOISE_DETECTION,
1595 .noise_threshold = WMI_10_4_PDEV_PARAM_NOISE_THRESHOLD,
1596 .dpd_enable = WMI_10_4_PDEV_PARAM_DPD_ENABLE,
1597 .set_mcast_bcast_echo = WMI_10_4_PDEV_PARAM_SET_MCAST_BCAST_ECHO,
1598 .atf_strict_sch = WMI_10_4_PDEV_PARAM_ATF_STRICT_SCH,
1599 .atf_sched_duration = WMI_10_4_PDEV_PARAM_ATF_SCHED_DURATION,
1600 .ant_plzn = WMI_10_4_PDEV_PARAM_ANT_PLZN,
1601 .mgmt_retry_limit = WMI_10_4_PDEV_PARAM_MGMT_RETRY_LIMIT,
1602 .sensitivity_level = WMI_10_4_PDEV_PARAM_SENSITIVITY_LEVEL,
1603 .signed_txpower_2g = WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_2G,
1604 .signed_txpower_5g = WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_5G,
1605 .enable_per_tid_amsdu = WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMSDU,
1606 .enable_per_tid_ampdu = WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMPDU,
1607 .cca_threshold = WMI_10_4_PDEV_PARAM_CCA_THRESHOLD,
1608 .rts_fixed_rate = WMI_10_4_PDEV_PARAM_RTS_FIXED_RATE,
1609 .pdev_reset = WMI_10_4_PDEV_PARAM_PDEV_RESET,
1610 .wapi_mbssid_offset = WMI_10_4_PDEV_PARAM_WAPI_MBSSID_OFFSET,
1611 .arp_srcaddr = WMI_10_4_PDEV_PARAM_ARP_SRCADDR,
1612 .arp_dstaddr = WMI_10_4_PDEV_PARAM_ARP_DSTADDR,
1613 .enable_btcoex = WMI_10_4_PDEV_PARAM_ENABLE_BTCOEX,
1614 };
1615
1616 static const u8 wmi_key_cipher_suites[] = {
1617 [WMI_CIPHER_NONE] = WMI_CIPHER_NONE,
1618 [WMI_CIPHER_WEP] = WMI_CIPHER_WEP,
1619 [WMI_CIPHER_TKIP] = WMI_CIPHER_TKIP,
1620 [WMI_CIPHER_AES_OCB] = WMI_CIPHER_AES_OCB,
1621 [WMI_CIPHER_AES_CCM] = WMI_CIPHER_AES_CCM,
1622 [WMI_CIPHER_WAPI] = WMI_CIPHER_WAPI,
1623 [WMI_CIPHER_CKIP] = WMI_CIPHER_CKIP,
1624 [WMI_CIPHER_AES_CMAC] = WMI_CIPHER_AES_CMAC,
1625 [WMI_CIPHER_AES_GCM] = WMI_CIPHER_AES_GCM,
1626 };
1627
1628 static const u8 wmi_tlv_key_cipher_suites[] = {
1629 [WMI_CIPHER_NONE] = WMI_TLV_CIPHER_NONE,
1630 [WMI_CIPHER_WEP] = WMI_TLV_CIPHER_WEP,
1631 [WMI_CIPHER_TKIP] = WMI_TLV_CIPHER_TKIP,
1632 [WMI_CIPHER_AES_OCB] = WMI_TLV_CIPHER_AES_OCB,
1633 [WMI_CIPHER_AES_CCM] = WMI_TLV_CIPHER_AES_CCM,
1634 [WMI_CIPHER_WAPI] = WMI_TLV_CIPHER_WAPI,
1635 [WMI_CIPHER_CKIP] = WMI_TLV_CIPHER_CKIP,
1636 [WMI_CIPHER_AES_CMAC] = WMI_TLV_CIPHER_AES_CMAC,
1637 [WMI_CIPHER_AES_GCM] = WMI_TLV_CIPHER_AES_GCM,
1638 };
1639
1640 static const struct wmi_peer_flags_map wmi_peer_flags_map = {
1641 .auth = WMI_PEER_AUTH,
1642 .qos = WMI_PEER_QOS,
1643 .need_ptk_4_way = WMI_PEER_NEED_PTK_4_WAY,
1644 .need_gtk_2_way = WMI_PEER_NEED_GTK_2_WAY,
1645 .apsd = WMI_PEER_APSD,
1646 .ht = WMI_PEER_HT,
1647 .bw40 = WMI_PEER_40MHZ,
1648 .stbc = WMI_PEER_STBC,
1649 .ldbc = WMI_PEER_LDPC,
1650 .dyn_mimops = WMI_PEER_DYN_MIMOPS,
1651 .static_mimops = WMI_PEER_STATIC_MIMOPS,
1652 .spatial_mux = WMI_PEER_SPATIAL_MUX,
1653 .vht = WMI_PEER_VHT,
1654 .bw80 = WMI_PEER_80MHZ,
1655 .vht_2g = WMI_PEER_VHT_2G,
1656 .pmf = WMI_PEER_PMF,
1657 .bw160 = WMI_PEER_160MHZ,
1658 };
1659
1660 static const struct wmi_peer_flags_map wmi_10x_peer_flags_map = {
1661 .auth = WMI_10X_PEER_AUTH,
1662 .qos = WMI_10X_PEER_QOS,
1663 .need_ptk_4_way = WMI_10X_PEER_NEED_PTK_4_WAY,
1664 .need_gtk_2_way = WMI_10X_PEER_NEED_GTK_2_WAY,
1665 .apsd = WMI_10X_PEER_APSD,
1666 .ht = WMI_10X_PEER_HT,
1667 .bw40 = WMI_10X_PEER_40MHZ,
1668 .stbc = WMI_10X_PEER_STBC,
1669 .ldbc = WMI_10X_PEER_LDPC,
1670 .dyn_mimops = WMI_10X_PEER_DYN_MIMOPS,
1671 .static_mimops = WMI_10X_PEER_STATIC_MIMOPS,
1672 .spatial_mux = WMI_10X_PEER_SPATIAL_MUX,
1673 .vht = WMI_10X_PEER_VHT,
1674 .bw80 = WMI_10X_PEER_80MHZ,
1675 .bw160 = WMI_10X_PEER_160MHZ,
1676 };
1677
1678 static const struct wmi_peer_flags_map wmi_10_2_peer_flags_map = {
1679 .auth = WMI_10_2_PEER_AUTH,
1680 .qos = WMI_10_2_PEER_QOS,
1681 .need_ptk_4_way = WMI_10_2_PEER_NEED_PTK_4_WAY,
1682 .need_gtk_2_way = WMI_10_2_PEER_NEED_GTK_2_WAY,
1683 .apsd = WMI_10_2_PEER_APSD,
1684 .ht = WMI_10_2_PEER_HT,
1685 .bw40 = WMI_10_2_PEER_40MHZ,
1686 .stbc = WMI_10_2_PEER_STBC,
1687 .ldbc = WMI_10_2_PEER_LDPC,
1688 .dyn_mimops = WMI_10_2_PEER_DYN_MIMOPS,
1689 .static_mimops = WMI_10_2_PEER_STATIC_MIMOPS,
1690 .spatial_mux = WMI_10_2_PEER_SPATIAL_MUX,
1691 .vht = WMI_10_2_PEER_VHT,
1692 .bw80 = WMI_10_2_PEER_80MHZ,
1693 .vht_2g = WMI_10_2_PEER_VHT_2G,
1694 .pmf = WMI_10_2_PEER_PMF,
1695 .bw160 = WMI_10_2_PEER_160MHZ,
1696 };
1697
ath10k_wmi_put_wmi_channel(struct ath10k * ar,struct wmi_channel * ch,const struct wmi_channel_arg * arg)1698 void ath10k_wmi_put_wmi_channel(struct ath10k *ar, struct wmi_channel *ch,
1699 const struct wmi_channel_arg *arg)
1700 {
1701 u32 flags = 0;
1702 struct ieee80211_channel *chan = NULL;
1703
1704 memset(ch, 0, sizeof(*ch));
1705
1706 if (arg->passive)
1707 flags |= WMI_CHAN_FLAG_PASSIVE;
1708 if (arg->allow_ibss)
1709 flags |= WMI_CHAN_FLAG_ADHOC_ALLOWED;
1710 if (arg->allow_ht)
1711 flags |= WMI_CHAN_FLAG_ALLOW_HT;
1712 if (arg->allow_vht)
1713 flags |= WMI_CHAN_FLAG_ALLOW_VHT;
1714 if (arg->ht40plus)
1715 flags |= WMI_CHAN_FLAG_HT40_PLUS;
1716 if (arg->chan_radar)
1717 flags |= WMI_CHAN_FLAG_DFS;
1718
1719 ch->band_center_freq2 = 0;
1720 ch->mhz = __cpu_to_le32(arg->freq);
1721 ch->band_center_freq1 = __cpu_to_le32(arg->band_center_freq1);
1722 if (arg->mode == MODE_11AC_VHT80_80) {
1723 ch->band_center_freq2 = __cpu_to_le32(arg->band_center_freq2);
1724 chan = ieee80211_get_channel(ar->hw->wiphy,
1725 arg->band_center_freq2 - 10);
1726 }
1727
1728 if (arg->mode == MODE_11AC_VHT160) {
1729 u32 band_center_freq1;
1730 u32 band_center_freq2;
1731
1732 if (arg->freq > arg->band_center_freq1) {
1733 band_center_freq1 = arg->band_center_freq1 + 40;
1734 band_center_freq2 = arg->band_center_freq1 - 40;
1735 } else {
1736 band_center_freq1 = arg->band_center_freq1 - 40;
1737 band_center_freq2 = arg->band_center_freq1 + 40;
1738 }
1739
1740 ch->band_center_freq1 =
1741 __cpu_to_le32(band_center_freq1);
1742 /* Minus 10 to get a defined 5G channel frequency*/
1743 chan = ieee80211_get_channel(ar->hw->wiphy,
1744 band_center_freq2 - 10);
1745 /* The center frequency of the entire VHT160 */
1746 ch->band_center_freq2 = __cpu_to_le32(arg->band_center_freq1);
1747 }
1748
1749 if (chan && chan->flags & IEEE80211_CHAN_RADAR)
1750 flags |= WMI_CHAN_FLAG_DFS_CFREQ2;
1751
1752 ch->min_power = arg->min_power;
1753 ch->max_power = arg->max_power;
1754 ch->reg_power = arg->max_reg_power;
1755 ch->antenna_max = arg->max_antenna_gain;
1756 ch->max_tx_power = arg->max_power;
1757
1758 /* mode & flags share storage */
1759 ch->mode = arg->mode;
1760 ch->flags |= __cpu_to_le32(flags);
1761 }
1762
ath10k_wmi_wait_for_service_ready(struct ath10k * ar)1763 int ath10k_wmi_wait_for_service_ready(struct ath10k *ar)
1764 {
1765 unsigned long time_left;
1766
1767 time_left = wait_for_completion_timeout(&ar->wmi.service_ready,
1768 WMI_SERVICE_READY_TIMEOUT_HZ);
1769 if (!time_left)
1770 return -ETIMEDOUT;
1771 return 0;
1772 }
1773
ath10k_wmi_wait_for_unified_ready(struct ath10k * ar)1774 int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar)
1775 {
1776 unsigned long time_left;
1777
1778 time_left = wait_for_completion_timeout(&ar->wmi.unified_ready,
1779 WMI_UNIFIED_READY_TIMEOUT_HZ);
1780 if (!time_left)
1781 return -ETIMEDOUT;
1782 return 0;
1783 }
1784
ath10k_wmi_alloc_skb(struct ath10k * ar,u32 len)1785 struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len)
1786 {
1787 struct sk_buff *skb;
1788 u32 round_len = roundup(len, 4);
1789
1790 skb = ath10k_htc_alloc_skb(ar, WMI_SKB_HEADROOM + round_len);
1791 if (!skb)
1792 return NULL;
1793
1794 skb_reserve(skb, WMI_SKB_HEADROOM);
1795 if (!IS_ALIGNED((unsigned long)skb->data, 4))
1796 ath10k_warn(ar, "Unaligned WMI skb\n");
1797
1798 skb_put(skb, round_len);
1799 memset(skb->data, 0, round_len);
1800
1801 return skb;
1802 }
1803
ath10k_wmi_htc_tx_complete(struct ath10k * ar,struct sk_buff * skb)1804 static void ath10k_wmi_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb)
1805 {
1806 dev_kfree_skb(skb);
1807 }
1808
ath10k_wmi_cmd_send_nowait(struct ath10k * ar,struct sk_buff * skb,u32 cmd_id)1809 int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb,
1810 u32 cmd_id)
1811 {
1812 struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(skb);
1813 struct wmi_cmd_hdr *cmd_hdr;
1814 int ret;
1815 u32 cmd = 0;
1816
1817 if (skb_push(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
1818 return -ENOMEM;
1819
1820 cmd |= SM(cmd_id, WMI_CMD_HDR_CMD_ID);
1821
1822 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
1823 cmd_hdr->cmd_id = __cpu_to_le32(cmd);
1824
1825 memset(skb_cb, 0, sizeof(*skb_cb));
1826 trace_ath10k_wmi_cmd(ar, cmd_id, skb->data, skb->len);
1827 ret = ath10k_htc_send(&ar->htc, ar->wmi.eid, skb);
1828
1829 if (ret)
1830 goto err_pull;
1831
1832 return 0;
1833
1834 err_pull:
1835 skb_pull(skb, sizeof(struct wmi_cmd_hdr));
1836 return ret;
1837 }
1838
ath10k_wmi_tx_beacon_nowait(struct ath10k_vif * arvif)1839 static void ath10k_wmi_tx_beacon_nowait(struct ath10k_vif *arvif)
1840 {
1841 struct ath10k *ar = arvif->ar;
1842 struct ath10k_skb_cb *cb;
1843 struct sk_buff *bcn;
1844 bool dtim_zero;
1845 bool deliver_cab;
1846 int ret;
1847
1848 spin_lock_bh(&ar->data_lock);
1849
1850 bcn = arvif->beacon;
1851
1852 if (!bcn)
1853 goto unlock;
1854
1855 cb = ATH10K_SKB_CB(bcn);
1856
1857 switch (arvif->beacon_state) {
1858 case ATH10K_BEACON_SENDING:
1859 case ATH10K_BEACON_SENT:
1860 break;
1861 case ATH10K_BEACON_SCHEDULED:
1862 arvif->beacon_state = ATH10K_BEACON_SENDING;
1863 spin_unlock_bh(&ar->data_lock);
1864
1865 dtim_zero = !!(cb->flags & ATH10K_SKB_F_DTIM_ZERO);
1866 deliver_cab = !!(cb->flags & ATH10K_SKB_F_DELIVER_CAB);
1867 ret = ath10k_wmi_beacon_send_ref_nowait(arvif->ar,
1868 arvif->vdev_id,
1869 bcn->data, bcn->len,
1870 cb->paddr,
1871 dtim_zero,
1872 deliver_cab);
1873
1874 spin_lock_bh(&ar->data_lock);
1875
1876 if (ret == 0)
1877 arvif->beacon_state = ATH10K_BEACON_SENT;
1878 else
1879 arvif->beacon_state = ATH10K_BEACON_SCHEDULED;
1880 }
1881
1882 unlock:
1883 spin_unlock_bh(&ar->data_lock);
1884 }
1885
ath10k_wmi_tx_beacons_iter(void * data,u8 * mac,struct ieee80211_vif * vif)1886 static void ath10k_wmi_tx_beacons_iter(void *data, u8 *mac,
1887 struct ieee80211_vif *vif)
1888 {
1889 struct ath10k_vif *arvif = (void *)vif->drv_priv;
1890
1891 ath10k_wmi_tx_beacon_nowait(arvif);
1892 }
1893
ath10k_wmi_tx_beacons_nowait(struct ath10k * ar)1894 static void ath10k_wmi_tx_beacons_nowait(struct ath10k *ar)
1895 {
1896 ieee80211_iterate_active_interfaces_atomic(ar->hw,
1897 ATH10K_ITER_NORMAL_FLAGS,
1898 ath10k_wmi_tx_beacons_iter,
1899 NULL);
1900 }
1901
ath10k_wmi_op_ep_tx_credits(struct ath10k * ar)1902 static void ath10k_wmi_op_ep_tx_credits(struct ath10k *ar)
1903 {
1904 /* try to send pending beacons first. they take priority */
1905 ath10k_wmi_tx_beacons_nowait(ar);
1906
1907 wake_up(&ar->wmi.tx_credits_wq);
1908 }
1909
ath10k_wmi_cmd_send(struct ath10k * ar,struct sk_buff * skb,u32 cmd_id)1910 int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id)
1911 {
1912 int ret = -EOPNOTSUPP;
1913
1914 might_sleep();
1915
1916 if (cmd_id == WMI_CMD_UNSUPPORTED) {
1917 ath10k_warn(ar, "wmi command %d is not supported by firmware\n",
1918 cmd_id);
1919 return ret;
1920 }
1921
1922 wait_event_timeout(ar->wmi.tx_credits_wq, ({
1923 /* try to send pending beacons first. they take priority */
1924 ath10k_wmi_tx_beacons_nowait(ar);
1925
1926 ret = ath10k_wmi_cmd_send_nowait(ar, skb, cmd_id);
1927
1928 if (ret && test_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags))
1929 ret = -ESHUTDOWN;
1930
1931 (ret != -EAGAIN);
1932 }), 3 * HZ);
1933
1934 if (ret)
1935 dev_kfree_skb_any(skb);
1936
1937 if (ret == -EAGAIN) {
1938 ath10k_warn(ar, "wmi command %d timeout, restarting hardware\n",
1939 cmd_id);
1940 ath10k_core_start_recovery(ar);
1941 }
1942
1943 return ret;
1944 }
1945
1946 static struct sk_buff *
ath10k_wmi_op_gen_mgmt_tx(struct ath10k * ar,struct sk_buff * msdu)1947 ath10k_wmi_op_gen_mgmt_tx(struct ath10k *ar, struct sk_buff *msdu)
1948 {
1949 struct ath10k_skb_cb *cb = ATH10K_SKB_CB(msdu);
1950 struct ath10k_vif *arvif;
1951 struct wmi_mgmt_tx_cmd *cmd;
1952 struct ieee80211_hdr *hdr;
1953 struct sk_buff *skb;
1954 int len;
1955 u32 vdev_id;
1956 u32 buf_len = msdu->len;
1957 u16 fc;
1958 const u8 *peer_addr;
1959
1960 hdr = (struct ieee80211_hdr *)msdu->data;
1961 fc = le16_to_cpu(hdr->frame_control);
1962
1963 if (cb->vif) {
1964 arvif = (void *)cb->vif->drv_priv;
1965 vdev_id = arvif->vdev_id;
1966 } else {
1967 vdev_id = 0;
1968 }
1969
1970 if (WARN_ON_ONCE(!ieee80211_is_mgmt(hdr->frame_control)))
1971 return ERR_PTR(-EINVAL);
1972
1973 len = sizeof(cmd->hdr) + msdu->len;
1974
1975 if ((ieee80211_is_action(hdr->frame_control) ||
1976 ieee80211_is_deauth(hdr->frame_control) ||
1977 ieee80211_is_disassoc(hdr->frame_control)) &&
1978 ieee80211_has_protected(hdr->frame_control)) {
1979 peer_addr = hdr->addr1;
1980 if (is_multicast_ether_addr(peer_addr)) {
1981 len += sizeof(struct ieee80211_mmie_16);
1982 buf_len += sizeof(struct ieee80211_mmie_16);
1983 } else {
1984 if (cb->ucast_cipher == WLAN_CIPHER_SUITE_GCMP ||
1985 cb->ucast_cipher == WLAN_CIPHER_SUITE_GCMP_256) {
1986 len += IEEE80211_GCMP_MIC_LEN;
1987 buf_len += IEEE80211_GCMP_MIC_LEN;
1988 } else {
1989 len += IEEE80211_CCMP_MIC_LEN;
1990 buf_len += IEEE80211_CCMP_MIC_LEN;
1991 }
1992 }
1993 }
1994
1995 len = round_up(len, 4);
1996
1997 skb = ath10k_wmi_alloc_skb(ar, len);
1998 if (!skb)
1999 return ERR_PTR(-ENOMEM);
2000
2001 cmd = (struct wmi_mgmt_tx_cmd *)skb->data;
2002
2003 cmd->hdr.vdev_id = __cpu_to_le32(vdev_id);
2004 cmd->hdr.tx_rate = 0;
2005 cmd->hdr.tx_power = 0;
2006 cmd->hdr.buf_len = __cpu_to_le32(buf_len);
2007
2008 ether_addr_copy(cmd->hdr.peer_macaddr.addr, ieee80211_get_DA(hdr));
2009 memcpy(cmd->buf, msdu->data, msdu->len);
2010
2011 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi mgmt tx skb %pK len %d ftype %02x stype %02x\n",
2012 msdu, skb->len, fc & IEEE80211_FCTL_FTYPE,
2013 fc & IEEE80211_FCTL_STYPE);
2014 trace_ath10k_tx_hdr(ar, skb->data, skb->len);
2015 trace_ath10k_tx_payload(ar, skb->data, skb->len);
2016
2017 return skb;
2018 }
2019
ath10k_wmi_event_scan_started(struct ath10k * ar)2020 static void ath10k_wmi_event_scan_started(struct ath10k *ar)
2021 {
2022 lockdep_assert_held(&ar->data_lock);
2023
2024 switch (ar->scan.state) {
2025 case ATH10K_SCAN_IDLE:
2026 case ATH10K_SCAN_RUNNING:
2027 case ATH10K_SCAN_ABORTING:
2028 ath10k_warn(ar, "received scan started event in an invalid scan state: %s (%d)\n",
2029 ath10k_scan_state_str(ar->scan.state),
2030 ar->scan.state);
2031 break;
2032 case ATH10K_SCAN_STARTING:
2033 ar->scan.state = ATH10K_SCAN_RUNNING;
2034
2035 if (ar->scan.is_roc)
2036 ieee80211_ready_on_channel(ar->hw);
2037
2038 complete(&ar->scan.started);
2039 break;
2040 }
2041 }
2042
ath10k_wmi_event_scan_start_failed(struct ath10k * ar)2043 static void ath10k_wmi_event_scan_start_failed(struct ath10k *ar)
2044 {
2045 lockdep_assert_held(&ar->data_lock);
2046
2047 switch (ar->scan.state) {
2048 case ATH10K_SCAN_IDLE:
2049 case ATH10K_SCAN_RUNNING:
2050 case ATH10K_SCAN_ABORTING:
2051 ath10k_warn(ar, "received scan start failed event in an invalid scan state: %s (%d)\n",
2052 ath10k_scan_state_str(ar->scan.state),
2053 ar->scan.state);
2054 break;
2055 case ATH10K_SCAN_STARTING:
2056 complete(&ar->scan.started);
2057 __ath10k_scan_finish(ar);
2058 break;
2059 }
2060 }
2061
ath10k_wmi_event_scan_completed(struct ath10k * ar)2062 static void ath10k_wmi_event_scan_completed(struct ath10k *ar)
2063 {
2064 lockdep_assert_held(&ar->data_lock);
2065
2066 switch (ar->scan.state) {
2067 case ATH10K_SCAN_IDLE:
2068 case ATH10K_SCAN_STARTING:
2069 /* One suspected reason scan can be completed while starting is
2070 * if firmware fails to deliver all scan events to the host,
2071 * e.g. when transport pipe is full. This has been observed
2072 * with spectral scan phyerr events starving wmi transport
2073 * pipe. In such case the "scan completed" event should be (and
2074 * is) ignored by the host as it may be just firmware's scan
2075 * state machine recovering.
2076 */
2077 ath10k_warn(ar, "received scan completed event in an invalid scan state: %s (%d)\n",
2078 ath10k_scan_state_str(ar->scan.state),
2079 ar->scan.state);
2080 break;
2081 case ATH10K_SCAN_RUNNING:
2082 case ATH10K_SCAN_ABORTING:
2083 __ath10k_scan_finish(ar);
2084 break;
2085 }
2086 }
2087
ath10k_wmi_event_scan_bss_chan(struct ath10k * ar)2088 static void ath10k_wmi_event_scan_bss_chan(struct ath10k *ar)
2089 {
2090 lockdep_assert_held(&ar->data_lock);
2091
2092 switch (ar->scan.state) {
2093 case ATH10K_SCAN_IDLE:
2094 case ATH10K_SCAN_STARTING:
2095 ath10k_warn(ar, "received scan bss chan event in an invalid scan state: %s (%d)\n",
2096 ath10k_scan_state_str(ar->scan.state),
2097 ar->scan.state);
2098 break;
2099 case ATH10K_SCAN_RUNNING:
2100 case ATH10K_SCAN_ABORTING:
2101 ar->scan_channel = NULL;
2102 break;
2103 }
2104 }
2105
ath10k_wmi_event_scan_foreign_chan(struct ath10k * ar,u32 freq)2106 static void ath10k_wmi_event_scan_foreign_chan(struct ath10k *ar, u32 freq)
2107 {
2108 lockdep_assert_held(&ar->data_lock);
2109
2110 switch (ar->scan.state) {
2111 case ATH10K_SCAN_IDLE:
2112 case ATH10K_SCAN_STARTING:
2113 ath10k_warn(ar, "received scan foreign chan event in an invalid scan state: %s (%d)\n",
2114 ath10k_scan_state_str(ar->scan.state),
2115 ar->scan.state);
2116 break;
2117 case ATH10K_SCAN_RUNNING:
2118 case ATH10K_SCAN_ABORTING:
2119 ar->scan_channel = ieee80211_get_channel(ar->hw->wiphy, freq);
2120
2121 if (ar->scan.is_roc && ar->scan.roc_freq == freq)
2122 complete(&ar->scan.on_channel);
2123 break;
2124 }
2125 }
2126
2127 static const char *
ath10k_wmi_event_scan_type_str(enum wmi_scan_event_type type,enum wmi_scan_completion_reason reason)2128 ath10k_wmi_event_scan_type_str(enum wmi_scan_event_type type,
2129 enum wmi_scan_completion_reason reason)
2130 {
2131 switch (type) {
2132 case WMI_SCAN_EVENT_STARTED:
2133 return "started";
2134 case WMI_SCAN_EVENT_COMPLETED:
2135 switch (reason) {
2136 case WMI_SCAN_REASON_COMPLETED:
2137 return "completed";
2138 case WMI_SCAN_REASON_CANCELLED:
2139 return "completed [cancelled]";
2140 case WMI_SCAN_REASON_PREEMPTED:
2141 return "completed [preempted]";
2142 case WMI_SCAN_REASON_TIMEDOUT:
2143 return "completed [timedout]";
2144 case WMI_SCAN_REASON_INTERNAL_FAILURE:
2145 return "completed [internal err]";
2146 case WMI_SCAN_REASON_MAX:
2147 break;
2148 }
2149 return "completed [unknown]";
2150 case WMI_SCAN_EVENT_BSS_CHANNEL:
2151 return "bss channel";
2152 case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
2153 return "foreign channel";
2154 case WMI_SCAN_EVENT_DEQUEUED:
2155 return "dequeued";
2156 case WMI_SCAN_EVENT_PREEMPTED:
2157 return "preempted";
2158 case WMI_SCAN_EVENT_START_FAILED:
2159 return "start failed";
2160 case WMI_SCAN_EVENT_RESTARTED:
2161 return "restarted";
2162 case WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT:
2163 return "foreign channel exit";
2164 default:
2165 return "unknown";
2166 }
2167 }
2168
ath10k_wmi_op_pull_scan_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_scan_ev_arg * arg)2169 static int ath10k_wmi_op_pull_scan_ev(struct ath10k *ar, struct sk_buff *skb,
2170 struct wmi_scan_ev_arg *arg)
2171 {
2172 struct wmi_scan_event *ev = (void *)skb->data;
2173
2174 if (skb->len < sizeof(*ev))
2175 return -EPROTO;
2176
2177 skb_pull(skb, sizeof(*ev));
2178 arg->event_type = ev->event_type;
2179 arg->reason = ev->reason;
2180 arg->channel_freq = ev->channel_freq;
2181 arg->scan_req_id = ev->scan_req_id;
2182 arg->scan_id = ev->scan_id;
2183 arg->vdev_id = ev->vdev_id;
2184
2185 return 0;
2186 }
2187
ath10k_wmi_event_scan(struct ath10k * ar,struct sk_buff * skb)2188 int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb)
2189 {
2190 struct wmi_scan_ev_arg arg = {};
2191 enum wmi_scan_event_type event_type;
2192 enum wmi_scan_completion_reason reason;
2193 u32 freq;
2194 u32 req_id;
2195 u32 scan_id;
2196 u32 vdev_id;
2197 int ret;
2198
2199 ret = ath10k_wmi_pull_scan(ar, skb, &arg);
2200 if (ret) {
2201 ath10k_warn(ar, "failed to parse scan event: %d\n", ret);
2202 return ret;
2203 }
2204
2205 event_type = __le32_to_cpu(arg.event_type);
2206 reason = __le32_to_cpu(arg.reason);
2207 freq = __le32_to_cpu(arg.channel_freq);
2208 req_id = __le32_to_cpu(arg.scan_req_id);
2209 scan_id = __le32_to_cpu(arg.scan_id);
2210 vdev_id = __le32_to_cpu(arg.vdev_id);
2211
2212 spin_lock_bh(&ar->data_lock);
2213
2214 ath10k_dbg(ar, ATH10K_DBG_WMI,
2215 "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n",
2216 ath10k_wmi_event_scan_type_str(event_type, reason),
2217 event_type, reason, freq, req_id, scan_id, vdev_id,
2218 ath10k_scan_state_str(ar->scan.state), ar->scan.state);
2219
2220 switch (event_type) {
2221 case WMI_SCAN_EVENT_STARTED:
2222 ath10k_wmi_event_scan_started(ar);
2223 break;
2224 case WMI_SCAN_EVENT_COMPLETED:
2225 ath10k_wmi_event_scan_completed(ar);
2226 break;
2227 case WMI_SCAN_EVENT_BSS_CHANNEL:
2228 ath10k_wmi_event_scan_bss_chan(ar);
2229 break;
2230 case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
2231 ath10k_wmi_event_scan_foreign_chan(ar, freq);
2232 break;
2233 case WMI_SCAN_EVENT_START_FAILED:
2234 ath10k_warn(ar, "received scan start failure event\n");
2235 ath10k_wmi_event_scan_start_failed(ar);
2236 break;
2237 case WMI_SCAN_EVENT_DEQUEUED:
2238 case WMI_SCAN_EVENT_PREEMPTED:
2239 case WMI_SCAN_EVENT_RESTARTED:
2240 case WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT:
2241 default:
2242 break;
2243 }
2244
2245 spin_unlock_bh(&ar->data_lock);
2246 return 0;
2247 }
2248
2249 /* If keys are configured, HW decrypts all frames
2250 * with protected bit set. Mark such frames as decrypted.
2251 */
ath10k_wmi_handle_wep_reauth(struct ath10k * ar,struct sk_buff * skb,struct ieee80211_rx_status * status)2252 static void ath10k_wmi_handle_wep_reauth(struct ath10k *ar,
2253 struct sk_buff *skb,
2254 struct ieee80211_rx_status *status)
2255 {
2256 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
2257 unsigned int hdrlen;
2258 bool peer_key;
2259 u8 *addr, keyidx;
2260
2261 if (!ieee80211_is_auth(hdr->frame_control) ||
2262 !ieee80211_has_protected(hdr->frame_control))
2263 return;
2264
2265 hdrlen = ieee80211_hdrlen(hdr->frame_control);
2266 if (skb->len < (hdrlen + IEEE80211_WEP_IV_LEN))
2267 return;
2268
2269 keyidx = skb->data[hdrlen + (IEEE80211_WEP_IV_LEN - 1)] >> WEP_KEYID_SHIFT;
2270 addr = ieee80211_get_SA(hdr);
2271
2272 spin_lock_bh(&ar->data_lock);
2273 peer_key = ath10k_mac_is_peer_wep_key_set(ar, addr, keyidx);
2274 spin_unlock_bh(&ar->data_lock);
2275
2276 if (peer_key) {
2277 ath10k_dbg(ar, ATH10K_DBG_MAC,
2278 "mac wep key present for peer %pM\n", addr);
2279 status->flag |= RX_FLAG_DECRYPTED;
2280 }
2281 }
2282
ath10k_wmi_op_pull_mgmt_rx_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_mgmt_rx_ev_arg * arg)2283 static int ath10k_wmi_op_pull_mgmt_rx_ev(struct ath10k *ar, struct sk_buff *skb,
2284 struct wmi_mgmt_rx_ev_arg *arg)
2285 {
2286 struct wmi_mgmt_rx_event_v1 *ev_v1;
2287 struct wmi_mgmt_rx_event_v2 *ev_v2;
2288 struct wmi_mgmt_rx_hdr_v1 *ev_hdr;
2289 struct wmi_mgmt_rx_ext_info *ext_info;
2290 size_t pull_len;
2291 u32 msdu_len;
2292 u32 len;
2293
2294 if (test_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX,
2295 ar->running_fw->fw_file.fw_features)) {
2296 ev_v2 = (struct wmi_mgmt_rx_event_v2 *)skb->data;
2297 ev_hdr = &ev_v2->hdr.v1;
2298 pull_len = sizeof(*ev_v2);
2299 } else {
2300 ev_v1 = (struct wmi_mgmt_rx_event_v1 *)skb->data;
2301 ev_hdr = &ev_v1->hdr;
2302 pull_len = sizeof(*ev_v1);
2303 }
2304
2305 if (skb->len < pull_len)
2306 return -EPROTO;
2307
2308 skb_pull(skb, pull_len);
2309 arg->channel = ev_hdr->channel;
2310 arg->buf_len = ev_hdr->buf_len;
2311 arg->status = ev_hdr->status;
2312 arg->snr = ev_hdr->snr;
2313 arg->phy_mode = ev_hdr->phy_mode;
2314 arg->rate = ev_hdr->rate;
2315
2316 msdu_len = __le32_to_cpu(arg->buf_len);
2317 if (skb->len < msdu_len)
2318 return -EPROTO;
2319
2320 if (le32_to_cpu(arg->status) & WMI_RX_STATUS_EXT_INFO) {
2321 len = ALIGN(le32_to_cpu(arg->buf_len), 4);
2322 ext_info = (struct wmi_mgmt_rx_ext_info *)(skb->data + len);
2323 memcpy(&arg->ext_info, ext_info,
2324 sizeof(struct wmi_mgmt_rx_ext_info));
2325 }
2326 /* the WMI buffer might've ended up being padded to 4 bytes due to HTC
2327 * trailer with credit update. Trim the excess garbage.
2328 */
2329 skb_trim(skb, msdu_len);
2330
2331 return 0;
2332 }
2333
ath10k_wmi_10_4_op_pull_mgmt_rx_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_mgmt_rx_ev_arg * arg)2334 static int ath10k_wmi_10_4_op_pull_mgmt_rx_ev(struct ath10k *ar,
2335 struct sk_buff *skb,
2336 struct wmi_mgmt_rx_ev_arg *arg)
2337 {
2338 struct wmi_10_4_mgmt_rx_event *ev;
2339 struct wmi_10_4_mgmt_rx_hdr *ev_hdr;
2340 size_t pull_len;
2341 u32 msdu_len;
2342 struct wmi_mgmt_rx_ext_info *ext_info;
2343 u32 len;
2344
2345 ev = (struct wmi_10_4_mgmt_rx_event *)skb->data;
2346 ev_hdr = &ev->hdr;
2347 pull_len = sizeof(*ev);
2348
2349 if (skb->len < pull_len)
2350 return -EPROTO;
2351
2352 skb_pull(skb, pull_len);
2353 arg->channel = ev_hdr->channel;
2354 arg->buf_len = ev_hdr->buf_len;
2355 arg->status = ev_hdr->status;
2356 arg->snr = ev_hdr->snr;
2357 arg->phy_mode = ev_hdr->phy_mode;
2358 arg->rate = ev_hdr->rate;
2359
2360 msdu_len = __le32_to_cpu(arg->buf_len);
2361 if (skb->len < msdu_len)
2362 return -EPROTO;
2363
2364 if (le32_to_cpu(arg->status) & WMI_RX_STATUS_EXT_INFO) {
2365 len = ALIGN(le32_to_cpu(arg->buf_len), 4);
2366 ext_info = (struct wmi_mgmt_rx_ext_info *)(skb->data + len);
2367 memcpy(&arg->ext_info, ext_info,
2368 sizeof(struct wmi_mgmt_rx_ext_info));
2369 }
2370
2371 /* Make sure bytes added for padding are removed. */
2372 skb_trim(skb, msdu_len);
2373
2374 return 0;
2375 }
2376
ath10k_wmi_rx_is_decrypted(struct ath10k * ar,struct ieee80211_hdr * hdr)2377 static bool ath10k_wmi_rx_is_decrypted(struct ath10k *ar,
2378 struct ieee80211_hdr *hdr)
2379 {
2380 if (!ieee80211_has_protected(hdr->frame_control))
2381 return false;
2382
2383 /* FW delivers WEP Shared Auth frame with Protected Bit set and
2384 * encrypted payload. However in case of PMF it delivers decrypted
2385 * frames with Protected Bit set.
2386 */
2387 if (ieee80211_is_auth(hdr->frame_control))
2388 return false;
2389
2390 /* qca99x0 based FW delivers broadcast or multicast management frames
2391 * (ex: group privacy action frames in mesh) as encrypted payload.
2392 */
2393 if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) &&
2394 ar->hw_params.sw_decrypt_mcast_mgmt)
2395 return false;
2396
2397 return true;
2398 }
2399
2400 static int
wmi_process_mgmt_tx_comp(struct ath10k * ar,struct mgmt_tx_compl_params * param)2401 wmi_process_mgmt_tx_comp(struct ath10k *ar, struct mgmt_tx_compl_params *param)
2402 {
2403 struct ath10k_mgmt_tx_pkt_addr *pkt_addr;
2404 struct ath10k_wmi *wmi = &ar->wmi;
2405 struct ieee80211_tx_info *info;
2406 struct sk_buff *msdu;
2407 int ret;
2408
2409 spin_lock_bh(&ar->data_lock);
2410
2411 pkt_addr = idr_find(&wmi->mgmt_pending_tx, param->desc_id);
2412 if (!pkt_addr) {
2413 ath10k_warn(ar, "received mgmt tx completion for invalid msdu_id: %d\n",
2414 param->desc_id);
2415 ret = -ENOENT;
2416 goto out;
2417 }
2418
2419 msdu = pkt_addr->vaddr;
2420 dma_unmap_single(ar->dev, pkt_addr->paddr,
2421 msdu->len, DMA_TO_DEVICE);
2422 info = IEEE80211_SKB_CB(msdu);
2423
2424 if (param->status) {
2425 info->flags &= ~IEEE80211_TX_STAT_ACK;
2426 } else {
2427 info->flags |= IEEE80211_TX_STAT_ACK;
2428 info->status.ack_signal = ATH10K_DEFAULT_NOISE_FLOOR +
2429 param->ack_rssi;
2430 info->status.flags |= IEEE80211_TX_STATUS_ACK_SIGNAL_VALID;
2431 }
2432
2433 ieee80211_tx_status_irqsafe(ar->hw, msdu);
2434
2435 ret = 0;
2436
2437 out:
2438 idr_remove(&wmi->mgmt_pending_tx, param->desc_id);
2439 spin_unlock_bh(&ar->data_lock);
2440 return ret;
2441 }
2442
ath10k_wmi_event_mgmt_tx_compl(struct ath10k * ar,struct sk_buff * skb)2443 int ath10k_wmi_event_mgmt_tx_compl(struct ath10k *ar, struct sk_buff *skb)
2444 {
2445 struct wmi_tlv_mgmt_tx_compl_ev_arg arg;
2446 struct mgmt_tx_compl_params param;
2447 int ret;
2448
2449 ret = ath10k_wmi_pull_mgmt_tx_compl(ar, skb, &arg);
2450 if (ret) {
2451 ath10k_warn(ar, "failed to parse mgmt comp event: %d\n", ret);
2452 return ret;
2453 }
2454
2455 memset(¶m, 0, sizeof(struct mgmt_tx_compl_params));
2456 param.desc_id = __le32_to_cpu(arg.desc_id);
2457 param.status = __le32_to_cpu(arg.status);
2458
2459 if (test_bit(WMI_SERVICE_TX_DATA_ACK_RSSI, ar->wmi.svc_map))
2460 param.ack_rssi = __le32_to_cpu(arg.ack_rssi);
2461
2462 wmi_process_mgmt_tx_comp(ar, ¶m);
2463
2464 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi tlv evnt mgmt tx completion\n");
2465
2466 return 0;
2467 }
2468
ath10k_wmi_event_mgmt_tx_bundle_compl(struct ath10k * ar,struct sk_buff * skb)2469 int ath10k_wmi_event_mgmt_tx_bundle_compl(struct ath10k *ar, struct sk_buff *skb)
2470 {
2471 struct wmi_tlv_mgmt_tx_bundle_compl_ev_arg arg;
2472 struct mgmt_tx_compl_params param;
2473 u32 num_reports;
2474 int i, ret;
2475
2476 ret = ath10k_wmi_pull_mgmt_tx_bundle_compl(ar, skb, &arg);
2477 if (ret) {
2478 ath10k_warn(ar, "failed to parse bundle mgmt compl event: %d\n", ret);
2479 return ret;
2480 }
2481
2482 num_reports = __le32_to_cpu(arg.num_reports);
2483
2484 for (i = 0; i < num_reports; i++) {
2485 memset(¶m, 0, sizeof(struct mgmt_tx_compl_params));
2486 param.desc_id = __le32_to_cpu(arg.desc_ids[i]);
2487 param.status = __le32_to_cpu(arg.desc_ids[i]);
2488
2489 if (test_bit(WMI_SERVICE_TX_DATA_ACK_RSSI, ar->wmi.svc_map))
2490 param.ack_rssi = __le32_to_cpu(arg.ack_rssi[i]);
2491 wmi_process_mgmt_tx_comp(ar, ¶m);
2492 }
2493
2494 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi tlv event bundle mgmt tx completion\n");
2495
2496 return 0;
2497 }
2498
ath10k_wmi_event_mgmt_rx(struct ath10k * ar,struct sk_buff * skb)2499 int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb)
2500 {
2501 struct wmi_mgmt_rx_ev_arg arg = {};
2502 struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
2503 struct ieee80211_hdr *hdr;
2504 struct ieee80211_supported_band *sband;
2505 u32 rx_status;
2506 u32 channel;
2507 u32 phy_mode;
2508 u32 snr, rssi;
2509 u32 rate;
2510 u16 fc;
2511 int ret, i;
2512
2513 ret = ath10k_wmi_pull_mgmt_rx(ar, skb, &arg);
2514 if (ret) {
2515 ath10k_warn(ar, "failed to parse mgmt rx event: %d\n", ret);
2516 dev_kfree_skb(skb);
2517 return ret;
2518 }
2519
2520 channel = __le32_to_cpu(arg.channel);
2521 rx_status = __le32_to_cpu(arg.status);
2522 snr = __le32_to_cpu(arg.snr);
2523 phy_mode = __le32_to_cpu(arg.phy_mode);
2524 rate = __le32_to_cpu(arg.rate);
2525
2526 memset(status, 0, sizeof(*status));
2527
2528 ath10k_dbg(ar, ATH10K_DBG_MGMT,
2529 "event mgmt rx status %08x\n", rx_status);
2530
2531 if ((test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) ||
2532 (rx_status & (WMI_RX_STATUS_ERR_DECRYPT |
2533 WMI_RX_STATUS_ERR_KEY_CACHE_MISS | WMI_RX_STATUS_ERR_CRC))) {
2534 dev_kfree_skb(skb);
2535 return 0;
2536 }
2537
2538 if (rx_status & WMI_RX_STATUS_ERR_MIC)
2539 status->flag |= RX_FLAG_MMIC_ERROR;
2540
2541 if (rx_status & WMI_RX_STATUS_EXT_INFO) {
2542 status->mactime =
2543 __le64_to_cpu(arg.ext_info.rx_mac_timestamp);
2544 status->flag |= RX_FLAG_MACTIME_END;
2545 }
2546 /* Hardware can Rx CCK rates on 5GHz. In that case phy_mode is set to
2547 * MODE_11B. This means phy_mode is not a reliable source for the band
2548 * of mgmt rx.
2549 */
2550 if (channel >= 1 && channel <= 14) {
2551 status->band = NL80211_BAND_2GHZ;
2552 } else if (channel >= 36 && channel <= ATH10K_MAX_5G_CHAN) {
2553 status->band = NL80211_BAND_5GHZ;
2554 } else {
2555 /* Shouldn't happen unless list of advertised channels to
2556 * mac80211 has been changed.
2557 */
2558 WARN_ON_ONCE(1);
2559 dev_kfree_skb(skb);
2560 return 0;
2561 }
2562
2563 if (phy_mode == MODE_11B && status->band == NL80211_BAND_5GHZ)
2564 ath10k_dbg(ar, ATH10K_DBG_MGMT, "wmi mgmt rx 11b (CCK) on 5GHz\n");
2565
2566 sband = &ar->mac.sbands[status->band];
2567
2568 status->freq = ieee80211_channel_to_frequency(channel, status->band);
2569 status->signal = snr + ATH10K_DEFAULT_NOISE_FLOOR;
2570
2571 BUILD_BUG_ON(ARRAY_SIZE(status->chain_signal) != ARRAY_SIZE(arg.rssi));
2572
2573 for (i = 0; i < ARRAY_SIZE(status->chain_signal); i++) {
2574 status->chains &= ~BIT(i);
2575 rssi = __le32_to_cpu(arg.rssi[i]);
2576 ath10k_dbg(ar, ATH10K_DBG_MGMT, "mgmt rssi[%d]:%d\n", i, arg.rssi[i]);
2577
2578 if (rssi != ATH10K_INVALID_RSSI && rssi != 0) {
2579 status->chain_signal[i] = ATH10K_DEFAULT_NOISE_FLOOR + rssi;
2580 status->chains |= BIT(i);
2581 }
2582 }
2583
2584 status->rate_idx = ath10k_mac_bitrate_to_idx(sband, rate / 100);
2585
2586 hdr = (struct ieee80211_hdr *)skb->data;
2587 fc = le16_to_cpu(hdr->frame_control);
2588
2589 /* Firmware is guaranteed to report all essential management frames via
2590 * WMI while it can deliver some extra via HTT. Since there can be
2591 * duplicates split the reporting wrt monitor/sniffing.
2592 */
2593 status->flag |= RX_FLAG_SKIP_MONITOR;
2594
2595 ath10k_wmi_handle_wep_reauth(ar, skb, status);
2596
2597 if (ath10k_wmi_rx_is_decrypted(ar, hdr)) {
2598 status->flag |= RX_FLAG_DECRYPTED;
2599
2600 if (!ieee80211_is_action(hdr->frame_control) &&
2601 !ieee80211_is_deauth(hdr->frame_control) &&
2602 !ieee80211_is_disassoc(hdr->frame_control)) {
2603 status->flag |= RX_FLAG_IV_STRIPPED |
2604 RX_FLAG_MMIC_STRIPPED;
2605 hdr->frame_control = __cpu_to_le16(fc &
2606 ~IEEE80211_FCTL_PROTECTED);
2607 }
2608 }
2609
2610 if (ieee80211_is_beacon(hdr->frame_control))
2611 ath10k_mac_handle_beacon(ar, skb);
2612
2613 if (ieee80211_is_beacon(hdr->frame_control) ||
2614 ieee80211_is_probe_resp(hdr->frame_control))
2615 status->boottime_ns = ktime_get_boottime_ns();
2616
2617 ath10k_dbg(ar, ATH10K_DBG_MGMT,
2618 "event mgmt rx skb %pK len %d ftype %02x stype %02x\n",
2619 skb, skb->len,
2620 fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE);
2621
2622 ath10k_dbg(ar, ATH10K_DBG_MGMT,
2623 "event mgmt rx freq %d band %d snr %d, rate_idx %d\n",
2624 status->freq, status->band, status->signal,
2625 status->rate_idx);
2626
2627 ieee80211_rx_ni(ar->hw, skb);
2628
2629 return 0;
2630 }
2631
freq_to_idx(struct ath10k * ar,int freq)2632 static int freq_to_idx(struct ath10k *ar, int freq)
2633 {
2634 struct ieee80211_supported_band *sband;
2635 int band, ch, idx = 0;
2636
2637 for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) {
2638 sband = ar->hw->wiphy->bands[band];
2639 if (!sband)
2640 continue;
2641
2642 for (ch = 0; ch < sband->n_channels; ch++, idx++)
2643 if (sband->channels[ch].center_freq == freq)
2644 goto exit;
2645 }
2646
2647 exit:
2648 return idx;
2649 }
2650
ath10k_wmi_op_pull_ch_info_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_ch_info_ev_arg * arg)2651 static int ath10k_wmi_op_pull_ch_info_ev(struct ath10k *ar, struct sk_buff *skb,
2652 struct wmi_ch_info_ev_arg *arg)
2653 {
2654 struct wmi_chan_info_event *ev = (void *)skb->data;
2655
2656 if (skb->len < sizeof(*ev))
2657 return -EPROTO;
2658
2659 skb_pull(skb, sizeof(*ev));
2660 arg->err_code = ev->err_code;
2661 arg->freq = ev->freq;
2662 arg->cmd_flags = ev->cmd_flags;
2663 arg->noise_floor = ev->noise_floor;
2664 arg->rx_clear_count = ev->rx_clear_count;
2665 arg->cycle_count = ev->cycle_count;
2666
2667 return 0;
2668 }
2669
ath10k_wmi_10_4_op_pull_ch_info_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_ch_info_ev_arg * arg)2670 static int ath10k_wmi_10_4_op_pull_ch_info_ev(struct ath10k *ar,
2671 struct sk_buff *skb,
2672 struct wmi_ch_info_ev_arg *arg)
2673 {
2674 struct wmi_10_4_chan_info_event *ev = (void *)skb->data;
2675
2676 if (skb->len < sizeof(*ev))
2677 return -EPROTO;
2678
2679 skb_pull(skb, sizeof(*ev));
2680 arg->err_code = ev->err_code;
2681 arg->freq = ev->freq;
2682 arg->cmd_flags = ev->cmd_flags;
2683 arg->noise_floor = ev->noise_floor;
2684 arg->rx_clear_count = ev->rx_clear_count;
2685 arg->cycle_count = ev->cycle_count;
2686 arg->chan_tx_pwr_range = ev->chan_tx_pwr_range;
2687 arg->chan_tx_pwr_tp = ev->chan_tx_pwr_tp;
2688 arg->rx_frame_count = ev->rx_frame_count;
2689
2690 return 0;
2691 }
2692
2693 /*
2694 * Handle the channel info event for firmware which only sends one
2695 * chan_info event per scanned channel.
2696 */
ath10k_wmi_event_chan_info_unpaired(struct ath10k * ar,struct chan_info_params * params)2697 static void ath10k_wmi_event_chan_info_unpaired(struct ath10k *ar,
2698 struct chan_info_params *params)
2699 {
2700 struct survey_info *survey;
2701 int idx;
2702
2703 if (params->cmd_flags & WMI_CHAN_INFO_FLAG_COMPLETE) {
2704 ath10k_dbg(ar, ATH10K_DBG_WMI, "chan info report completed\n");
2705 return;
2706 }
2707
2708 idx = freq_to_idx(ar, params->freq);
2709 if (idx >= ARRAY_SIZE(ar->survey)) {
2710 ath10k_warn(ar, "chan info: invalid frequency %d (idx %d out of bounds)\n",
2711 params->freq, idx);
2712 return;
2713 }
2714
2715 survey = &ar->survey[idx];
2716
2717 if (!params->mac_clk_mhz)
2718 return;
2719
2720 memset(survey, 0, sizeof(*survey));
2721
2722 survey->noise = params->noise_floor;
2723 survey->time = (params->cycle_count / params->mac_clk_mhz) / 1000;
2724 survey->time_busy = (params->rx_clear_count / params->mac_clk_mhz) / 1000;
2725 survey->filled |= SURVEY_INFO_NOISE_DBM | SURVEY_INFO_TIME |
2726 SURVEY_INFO_TIME_BUSY;
2727 }
2728
2729 /*
2730 * Handle the channel info event for firmware which sends chan_info
2731 * event in pairs(start and stop events) for every scanned channel.
2732 */
ath10k_wmi_event_chan_info_paired(struct ath10k * ar,struct chan_info_params * params)2733 static void ath10k_wmi_event_chan_info_paired(struct ath10k *ar,
2734 struct chan_info_params *params)
2735 {
2736 struct survey_info *survey;
2737 int idx;
2738
2739 idx = freq_to_idx(ar, params->freq);
2740 if (idx >= ARRAY_SIZE(ar->survey)) {
2741 ath10k_warn(ar, "chan info: invalid frequency %d (idx %d out of bounds)\n",
2742 params->freq, idx);
2743 return;
2744 }
2745
2746 if (params->cmd_flags & WMI_CHAN_INFO_FLAG_COMPLETE) {
2747 if (ar->ch_info_can_report_survey) {
2748 survey = &ar->survey[idx];
2749 survey->noise = params->noise_floor;
2750 survey->filled = SURVEY_INFO_NOISE_DBM;
2751
2752 ath10k_hw_fill_survey_time(ar,
2753 survey,
2754 params->cycle_count,
2755 params->rx_clear_count,
2756 ar->survey_last_cycle_count,
2757 ar->survey_last_rx_clear_count);
2758 }
2759
2760 ar->ch_info_can_report_survey = false;
2761 } else {
2762 ar->ch_info_can_report_survey = true;
2763 }
2764
2765 if (!(params->cmd_flags & WMI_CHAN_INFO_FLAG_PRE_COMPLETE)) {
2766 ar->survey_last_rx_clear_count = params->rx_clear_count;
2767 ar->survey_last_cycle_count = params->cycle_count;
2768 }
2769 }
2770
ath10k_wmi_event_chan_info(struct ath10k * ar,struct sk_buff * skb)2771 void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb)
2772 {
2773 struct chan_info_params ch_info_param;
2774 struct wmi_ch_info_ev_arg arg = {};
2775 int ret;
2776
2777 ret = ath10k_wmi_pull_ch_info(ar, skb, &arg);
2778 if (ret) {
2779 ath10k_warn(ar, "failed to parse chan info event: %d\n", ret);
2780 return;
2781 }
2782
2783 ch_info_param.err_code = __le32_to_cpu(arg.err_code);
2784 ch_info_param.freq = __le32_to_cpu(arg.freq);
2785 ch_info_param.cmd_flags = __le32_to_cpu(arg.cmd_flags);
2786 ch_info_param.noise_floor = __le32_to_cpu(arg.noise_floor);
2787 ch_info_param.rx_clear_count = __le32_to_cpu(arg.rx_clear_count);
2788 ch_info_param.cycle_count = __le32_to_cpu(arg.cycle_count);
2789 ch_info_param.mac_clk_mhz = __le32_to_cpu(arg.mac_clk_mhz);
2790
2791 ath10k_dbg(ar, ATH10K_DBG_WMI,
2792 "chan info err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d\n",
2793 ch_info_param.err_code, ch_info_param.freq, ch_info_param.cmd_flags,
2794 ch_info_param.noise_floor, ch_info_param.rx_clear_count,
2795 ch_info_param.cycle_count);
2796
2797 spin_lock_bh(&ar->data_lock);
2798
2799 switch (ar->scan.state) {
2800 case ATH10K_SCAN_IDLE:
2801 case ATH10K_SCAN_STARTING:
2802 ath10k_dbg(ar, ATH10K_DBG_WMI, "received chan info event without a scan request, ignoring\n");
2803 goto exit;
2804 case ATH10K_SCAN_RUNNING:
2805 case ATH10K_SCAN_ABORTING:
2806 break;
2807 }
2808
2809 if (test_bit(ATH10K_FW_FEATURE_SINGLE_CHAN_INFO_PER_CHANNEL,
2810 ar->running_fw->fw_file.fw_features))
2811 ath10k_wmi_event_chan_info_unpaired(ar, &ch_info_param);
2812 else
2813 ath10k_wmi_event_chan_info_paired(ar, &ch_info_param);
2814
2815 exit:
2816 spin_unlock_bh(&ar->data_lock);
2817 }
2818
ath10k_wmi_event_echo(struct ath10k * ar,struct sk_buff * skb)2819 void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb)
2820 {
2821 struct wmi_echo_ev_arg arg = {};
2822 int ret;
2823
2824 ret = ath10k_wmi_pull_echo_ev(ar, skb, &arg);
2825 if (ret) {
2826 ath10k_warn(ar, "failed to parse echo: %d\n", ret);
2827 return;
2828 }
2829
2830 ath10k_dbg(ar, ATH10K_DBG_WMI,
2831 "wmi event echo value 0x%08x\n",
2832 le32_to_cpu(arg.value));
2833
2834 if (le32_to_cpu(arg.value) == ATH10K_WMI_BARRIER_ECHO_ID)
2835 complete(&ar->wmi.barrier);
2836 }
2837
ath10k_wmi_event_debug_mesg(struct ath10k * ar,struct sk_buff * skb)2838 int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb)
2839 {
2840 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event debug mesg len %d\n",
2841 skb->len);
2842
2843 trace_ath10k_wmi_dbglog(ar, skb->data, skb->len);
2844
2845 return 0;
2846 }
2847
ath10k_wmi_pull_pdev_stats_base(const struct wmi_pdev_stats_base * src,struct ath10k_fw_stats_pdev * dst)2848 void ath10k_wmi_pull_pdev_stats_base(const struct wmi_pdev_stats_base *src,
2849 struct ath10k_fw_stats_pdev *dst)
2850 {
2851 dst->ch_noise_floor = __le32_to_cpu(src->chan_nf);
2852 dst->tx_frame_count = __le32_to_cpu(src->tx_frame_count);
2853 dst->rx_frame_count = __le32_to_cpu(src->rx_frame_count);
2854 dst->rx_clear_count = __le32_to_cpu(src->rx_clear_count);
2855 dst->cycle_count = __le32_to_cpu(src->cycle_count);
2856 dst->phy_err_count = __le32_to_cpu(src->phy_err_count);
2857 dst->chan_tx_power = __le32_to_cpu(src->chan_tx_pwr);
2858 }
2859
ath10k_wmi_pull_pdev_stats_tx(const struct wmi_pdev_stats_tx * src,struct ath10k_fw_stats_pdev * dst)2860 void ath10k_wmi_pull_pdev_stats_tx(const struct wmi_pdev_stats_tx *src,
2861 struct ath10k_fw_stats_pdev *dst)
2862 {
2863 dst->comp_queued = __le32_to_cpu(src->comp_queued);
2864 dst->comp_delivered = __le32_to_cpu(src->comp_delivered);
2865 dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued);
2866 dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued);
2867 dst->wmm_drop = __le32_to_cpu(src->wmm_drop);
2868 dst->local_enqued = __le32_to_cpu(src->local_enqued);
2869 dst->local_freed = __le32_to_cpu(src->local_freed);
2870 dst->hw_queued = __le32_to_cpu(src->hw_queued);
2871 dst->hw_reaped = __le32_to_cpu(src->hw_reaped);
2872 dst->underrun = __le32_to_cpu(src->underrun);
2873 dst->tx_abort = __le32_to_cpu(src->tx_abort);
2874 dst->mpdus_requeued = __le32_to_cpu(src->mpdus_requeued);
2875 dst->tx_ko = __le32_to_cpu(src->tx_ko);
2876 dst->data_rc = __le32_to_cpu(src->data_rc);
2877 dst->self_triggers = __le32_to_cpu(src->self_triggers);
2878 dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure);
2879 dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err);
2880 dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry);
2881 dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout);
2882 dst->pdev_resets = __le32_to_cpu(src->pdev_resets);
2883 dst->phy_underrun = __le32_to_cpu(src->phy_underrun);
2884 dst->txop_ovf = __le32_to_cpu(src->txop_ovf);
2885 }
2886
2887 static void
ath10k_wmi_10_4_pull_pdev_stats_tx(const struct wmi_10_4_pdev_stats_tx * src,struct ath10k_fw_stats_pdev * dst)2888 ath10k_wmi_10_4_pull_pdev_stats_tx(const struct wmi_10_4_pdev_stats_tx *src,
2889 struct ath10k_fw_stats_pdev *dst)
2890 {
2891 dst->comp_queued = __le32_to_cpu(src->comp_queued);
2892 dst->comp_delivered = __le32_to_cpu(src->comp_delivered);
2893 dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued);
2894 dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued);
2895 dst->wmm_drop = __le32_to_cpu(src->wmm_drop);
2896 dst->local_enqued = __le32_to_cpu(src->local_enqued);
2897 dst->local_freed = __le32_to_cpu(src->local_freed);
2898 dst->hw_queued = __le32_to_cpu(src->hw_queued);
2899 dst->hw_reaped = __le32_to_cpu(src->hw_reaped);
2900 dst->underrun = __le32_to_cpu(src->underrun);
2901 dst->tx_abort = __le32_to_cpu(src->tx_abort);
2902 dst->mpdus_requeued = __le32_to_cpu(src->mpdus_requeued);
2903 dst->tx_ko = __le32_to_cpu(src->tx_ko);
2904 dst->data_rc = __le32_to_cpu(src->data_rc);
2905 dst->self_triggers = __le32_to_cpu(src->self_triggers);
2906 dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure);
2907 dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err);
2908 dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry);
2909 dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout);
2910 dst->pdev_resets = __le32_to_cpu(src->pdev_resets);
2911 dst->phy_underrun = __le32_to_cpu(src->phy_underrun);
2912 dst->txop_ovf = __le32_to_cpu(src->txop_ovf);
2913 dst->hw_paused = __le32_to_cpu(src->hw_paused);
2914 dst->seq_posted = __le32_to_cpu(src->seq_posted);
2915 dst->seq_failed_queueing =
2916 __le32_to_cpu(src->seq_failed_queueing);
2917 dst->seq_completed = __le32_to_cpu(src->seq_completed);
2918 dst->seq_restarted = __le32_to_cpu(src->seq_restarted);
2919 dst->mu_seq_posted = __le32_to_cpu(src->mu_seq_posted);
2920 dst->mpdus_sw_flush = __le32_to_cpu(src->mpdus_sw_flush);
2921 dst->mpdus_hw_filter = __le32_to_cpu(src->mpdus_hw_filter);
2922 dst->mpdus_truncated = __le32_to_cpu(src->mpdus_truncated);
2923 dst->mpdus_ack_failed = __le32_to_cpu(src->mpdus_ack_failed);
2924 dst->mpdus_hw_filter = __le32_to_cpu(src->mpdus_hw_filter);
2925 dst->mpdus_expired = __le32_to_cpu(src->mpdus_expired);
2926 }
2927
ath10k_wmi_pull_pdev_stats_rx(const struct wmi_pdev_stats_rx * src,struct ath10k_fw_stats_pdev * dst)2928 void ath10k_wmi_pull_pdev_stats_rx(const struct wmi_pdev_stats_rx *src,
2929 struct ath10k_fw_stats_pdev *dst)
2930 {
2931 dst->mid_ppdu_route_change = __le32_to_cpu(src->mid_ppdu_route_change);
2932 dst->status_rcvd = __le32_to_cpu(src->status_rcvd);
2933 dst->r0_frags = __le32_to_cpu(src->r0_frags);
2934 dst->r1_frags = __le32_to_cpu(src->r1_frags);
2935 dst->r2_frags = __le32_to_cpu(src->r2_frags);
2936 dst->r3_frags = __le32_to_cpu(src->r3_frags);
2937 dst->htt_msdus = __le32_to_cpu(src->htt_msdus);
2938 dst->htt_mpdus = __le32_to_cpu(src->htt_mpdus);
2939 dst->loc_msdus = __le32_to_cpu(src->loc_msdus);
2940 dst->loc_mpdus = __le32_to_cpu(src->loc_mpdus);
2941 dst->oversize_amsdu = __le32_to_cpu(src->oversize_amsdu);
2942 dst->phy_errs = __le32_to_cpu(src->phy_errs);
2943 dst->phy_err_drop = __le32_to_cpu(src->phy_err_drop);
2944 dst->mpdu_errs = __le32_to_cpu(src->mpdu_errs);
2945 }
2946
ath10k_wmi_pull_pdev_stats_extra(const struct wmi_pdev_stats_extra * src,struct ath10k_fw_stats_pdev * dst)2947 void ath10k_wmi_pull_pdev_stats_extra(const struct wmi_pdev_stats_extra *src,
2948 struct ath10k_fw_stats_pdev *dst)
2949 {
2950 dst->ack_rx_bad = __le32_to_cpu(src->ack_rx_bad);
2951 dst->rts_bad = __le32_to_cpu(src->rts_bad);
2952 dst->rts_good = __le32_to_cpu(src->rts_good);
2953 dst->fcs_bad = __le32_to_cpu(src->fcs_bad);
2954 dst->no_beacons = __le32_to_cpu(src->no_beacons);
2955 dst->mib_int_count = __le32_to_cpu(src->mib_int_count);
2956 }
2957
ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats * src,struct ath10k_fw_stats_peer * dst)2958 void ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats *src,
2959 struct ath10k_fw_stats_peer *dst)
2960 {
2961 ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr);
2962 dst->peer_rssi = __le32_to_cpu(src->peer_rssi);
2963 dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate);
2964 }
2965
2966 static void
ath10k_wmi_10_4_pull_peer_stats(const struct wmi_10_4_peer_stats * src,struct ath10k_fw_stats_peer * dst)2967 ath10k_wmi_10_4_pull_peer_stats(const struct wmi_10_4_peer_stats *src,
2968 struct ath10k_fw_stats_peer *dst)
2969 {
2970 ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr);
2971 dst->peer_rssi = __le32_to_cpu(src->peer_rssi);
2972 dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate);
2973 dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
2974 }
2975
2976 static void
ath10k_wmi_10_4_pull_vdev_stats(const struct wmi_vdev_stats_extd * src,struct ath10k_fw_stats_vdev_extd * dst)2977 ath10k_wmi_10_4_pull_vdev_stats(const struct wmi_vdev_stats_extd *src,
2978 struct ath10k_fw_stats_vdev_extd *dst)
2979 {
2980 dst->vdev_id = __le32_to_cpu(src->vdev_id);
2981 dst->ppdu_aggr_cnt = __le32_to_cpu(src->ppdu_aggr_cnt);
2982 dst->ppdu_noack = __le32_to_cpu(src->ppdu_noack);
2983 dst->mpdu_queued = __le32_to_cpu(src->mpdu_queued);
2984 dst->ppdu_nonaggr_cnt = __le32_to_cpu(src->ppdu_nonaggr_cnt);
2985 dst->mpdu_sw_requeued = __le32_to_cpu(src->mpdu_sw_requeued);
2986 dst->mpdu_suc_retry = __le32_to_cpu(src->mpdu_suc_retry);
2987 dst->mpdu_suc_multitry = __le32_to_cpu(src->mpdu_suc_multitry);
2988 dst->mpdu_fail_retry = __le32_to_cpu(src->mpdu_fail_retry);
2989 dst->tx_ftm_suc = __le32_to_cpu(src->tx_ftm_suc);
2990 dst->tx_ftm_suc_retry = __le32_to_cpu(src->tx_ftm_suc_retry);
2991 dst->tx_ftm_fail = __le32_to_cpu(src->tx_ftm_fail);
2992 dst->rx_ftmr_cnt = __le32_to_cpu(src->rx_ftmr_cnt);
2993 dst->rx_ftmr_dup_cnt = __le32_to_cpu(src->rx_ftmr_dup_cnt);
2994 dst->rx_iftmr_cnt = __le32_to_cpu(src->rx_iftmr_cnt);
2995 dst->rx_iftmr_dup_cnt = __le32_to_cpu(src->rx_iftmr_dup_cnt);
2996 }
2997
ath10k_wmi_main_op_pull_fw_stats(struct ath10k * ar,struct sk_buff * skb,struct ath10k_fw_stats * stats)2998 static int ath10k_wmi_main_op_pull_fw_stats(struct ath10k *ar,
2999 struct sk_buff *skb,
3000 struct ath10k_fw_stats *stats)
3001 {
3002 const struct wmi_stats_event *ev = (void *)skb->data;
3003 u32 num_pdev_stats, num_peer_stats;
3004 int i;
3005
3006 if (!skb_pull(skb, sizeof(*ev)))
3007 return -EPROTO;
3008
3009 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
3010 num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
3011
3012 for (i = 0; i < num_pdev_stats; i++) {
3013 const struct wmi_pdev_stats *src;
3014 struct ath10k_fw_stats_pdev *dst;
3015
3016 src = (void *)skb->data;
3017 if (!skb_pull(skb, sizeof(*src)))
3018 return -EPROTO;
3019
3020 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3021 if (!dst)
3022 continue;
3023
3024 ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
3025 ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
3026 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
3027
3028 list_add_tail(&dst->list, &stats->pdevs);
3029 }
3030
3031 /* fw doesn't implement vdev stats */
3032
3033 for (i = 0; i < num_peer_stats; i++) {
3034 const struct wmi_peer_stats *src;
3035 struct ath10k_fw_stats_peer *dst;
3036
3037 src = (void *)skb->data;
3038 if (!skb_pull(skb, sizeof(*src)))
3039 return -EPROTO;
3040
3041 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3042 if (!dst)
3043 continue;
3044
3045 ath10k_wmi_pull_peer_stats(src, dst);
3046 list_add_tail(&dst->list, &stats->peers);
3047 }
3048
3049 return 0;
3050 }
3051
ath10k_wmi_10x_op_pull_fw_stats(struct ath10k * ar,struct sk_buff * skb,struct ath10k_fw_stats * stats)3052 static int ath10k_wmi_10x_op_pull_fw_stats(struct ath10k *ar,
3053 struct sk_buff *skb,
3054 struct ath10k_fw_stats *stats)
3055 {
3056 const struct wmi_stats_event *ev = (void *)skb->data;
3057 u32 num_pdev_stats, num_peer_stats;
3058 int i;
3059
3060 if (!skb_pull(skb, sizeof(*ev)))
3061 return -EPROTO;
3062
3063 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
3064 num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
3065
3066 for (i = 0; i < num_pdev_stats; i++) {
3067 const struct wmi_10x_pdev_stats *src;
3068 struct ath10k_fw_stats_pdev *dst;
3069
3070 src = (void *)skb->data;
3071 if (!skb_pull(skb, sizeof(*src)))
3072 return -EPROTO;
3073
3074 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3075 if (!dst)
3076 continue;
3077
3078 ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
3079 ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
3080 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
3081 ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
3082
3083 list_add_tail(&dst->list, &stats->pdevs);
3084 }
3085
3086 /* fw doesn't implement vdev stats */
3087
3088 for (i = 0; i < num_peer_stats; i++) {
3089 const struct wmi_10x_peer_stats *src;
3090 struct ath10k_fw_stats_peer *dst;
3091
3092 src = (void *)skb->data;
3093 if (!skb_pull(skb, sizeof(*src)))
3094 return -EPROTO;
3095
3096 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3097 if (!dst)
3098 continue;
3099
3100 ath10k_wmi_pull_peer_stats(&src->old, dst);
3101
3102 dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
3103
3104 list_add_tail(&dst->list, &stats->peers);
3105 }
3106
3107 return 0;
3108 }
3109
ath10k_wmi_10_2_op_pull_fw_stats(struct ath10k * ar,struct sk_buff * skb,struct ath10k_fw_stats * stats)3110 static int ath10k_wmi_10_2_op_pull_fw_stats(struct ath10k *ar,
3111 struct sk_buff *skb,
3112 struct ath10k_fw_stats *stats)
3113 {
3114 const struct wmi_10_2_stats_event *ev = (void *)skb->data;
3115 u32 num_pdev_stats;
3116 u32 num_pdev_ext_stats;
3117 u32 num_peer_stats;
3118 int i;
3119
3120 if (!skb_pull(skb, sizeof(*ev)))
3121 return -EPROTO;
3122
3123 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
3124 num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
3125 num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
3126
3127 for (i = 0; i < num_pdev_stats; i++) {
3128 const struct wmi_10_2_pdev_stats *src;
3129 struct ath10k_fw_stats_pdev *dst;
3130
3131 src = (void *)skb->data;
3132 if (!skb_pull(skb, sizeof(*src)))
3133 return -EPROTO;
3134
3135 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3136 if (!dst)
3137 continue;
3138
3139 ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
3140 ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
3141 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
3142 ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
3143 /* FIXME: expose 10.2 specific values */
3144
3145 list_add_tail(&dst->list, &stats->pdevs);
3146 }
3147
3148 for (i = 0; i < num_pdev_ext_stats; i++) {
3149 const struct wmi_10_2_pdev_ext_stats *src;
3150
3151 src = (void *)skb->data;
3152 if (!skb_pull(skb, sizeof(*src)))
3153 return -EPROTO;
3154
3155 /* FIXME: expose values to userspace
3156 *
3157 * Note: Even though this loop seems to do nothing it is
3158 * required to parse following sub-structures properly.
3159 */
3160 }
3161
3162 /* fw doesn't implement vdev stats */
3163
3164 for (i = 0; i < num_peer_stats; i++) {
3165 const struct wmi_10_2_peer_stats *src;
3166 struct ath10k_fw_stats_peer *dst;
3167
3168 src = (void *)skb->data;
3169 if (!skb_pull(skb, sizeof(*src)))
3170 return -EPROTO;
3171
3172 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3173 if (!dst)
3174 continue;
3175
3176 ath10k_wmi_pull_peer_stats(&src->old, dst);
3177
3178 dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
3179 /* FIXME: expose 10.2 specific values */
3180
3181 list_add_tail(&dst->list, &stats->peers);
3182 }
3183
3184 return 0;
3185 }
3186
ath10k_wmi_10_2_4_op_pull_fw_stats(struct ath10k * ar,struct sk_buff * skb,struct ath10k_fw_stats * stats)3187 static int ath10k_wmi_10_2_4_op_pull_fw_stats(struct ath10k *ar,
3188 struct sk_buff *skb,
3189 struct ath10k_fw_stats *stats)
3190 {
3191 const struct wmi_10_2_stats_event *ev = (void *)skb->data;
3192 u32 num_pdev_stats;
3193 u32 num_pdev_ext_stats;
3194 u32 num_peer_stats;
3195 int i;
3196
3197 if (!skb_pull(skb, sizeof(*ev)))
3198 return -EPROTO;
3199
3200 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
3201 num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
3202 num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
3203
3204 for (i = 0; i < num_pdev_stats; i++) {
3205 const struct wmi_10_2_pdev_stats *src;
3206 struct ath10k_fw_stats_pdev *dst;
3207
3208 src = (void *)skb->data;
3209 if (!skb_pull(skb, sizeof(*src)))
3210 return -EPROTO;
3211
3212 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3213 if (!dst)
3214 continue;
3215
3216 ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
3217 ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
3218 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
3219 ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
3220 /* FIXME: expose 10.2 specific values */
3221
3222 list_add_tail(&dst->list, &stats->pdevs);
3223 }
3224
3225 for (i = 0; i < num_pdev_ext_stats; i++) {
3226 const struct wmi_10_2_pdev_ext_stats *src;
3227
3228 src = (void *)skb->data;
3229 if (!skb_pull(skb, sizeof(*src)))
3230 return -EPROTO;
3231
3232 /* FIXME: expose values to userspace
3233 *
3234 * Note: Even though this loop seems to do nothing it is
3235 * required to parse following sub-structures properly.
3236 */
3237 }
3238
3239 /* fw doesn't implement vdev stats */
3240
3241 for (i = 0; i < num_peer_stats; i++) {
3242 const struct wmi_10_2_4_ext_peer_stats *src;
3243 struct ath10k_fw_stats_peer *dst;
3244 int stats_len;
3245
3246 if (test_bit(WMI_SERVICE_PEER_STATS, ar->wmi.svc_map))
3247 stats_len = sizeof(struct wmi_10_2_4_ext_peer_stats);
3248 else
3249 stats_len = sizeof(struct wmi_10_2_4_peer_stats);
3250
3251 src = (void *)skb->data;
3252 if (!skb_pull(skb, stats_len))
3253 return -EPROTO;
3254
3255 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3256 if (!dst)
3257 continue;
3258
3259 ath10k_wmi_pull_peer_stats(&src->common.old, dst);
3260
3261 dst->peer_rx_rate = __le32_to_cpu(src->common.peer_rx_rate);
3262
3263 if (ath10k_peer_stats_enabled(ar))
3264 dst->rx_duration = __le32_to_cpu(src->rx_duration);
3265 /* FIXME: expose 10.2 specific values */
3266
3267 list_add_tail(&dst->list, &stats->peers);
3268 }
3269
3270 return 0;
3271 }
3272
ath10k_wmi_10_4_op_pull_fw_stats(struct ath10k * ar,struct sk_buff * skb,struct ath10k_fw_stats * stats)3273 static int ath10k_wmi_10_4_op_pull_fw_stats(struct ath10k *ar,
3274 struct sk_buff *skb,
3275 struct ath10k_fw_stats *stats)
3276 {
3277 const struct wmi_10_2_stats_event *ev = (void *)skb->data;
3278 u32 num_pdev_stats;
3279 u32 num_pdev_ext_stats;
3280 u32 num_vdev_stats;
3281 u32 num_peer_stats;
3282 u32 num_bcnflt_stats;
3283 u32 stats_id;
3284 int i;
3285
3286 if (!skb_pull(skb, sizeof(*ev)))
3287 return -EPROTO;
3288
3289 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
3290 num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
3291 num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
3292 num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
3293 num_bcnflt_stats = __le32_to_cpu(ev->num_bcnflt_stats);
3294 stats_id = __le32_to_cpu(ev->stats_id);
3295
3296 for (i = 0; i < num_pdev_stats; i++) {
3297 const struct wmi_10_4_pdev_stats *src;
3298 struct ath10k_fw_stats_pdev *dst;
3299
3300 src = (void *)skb->data;
3301 if (!skb_pull(skb, sizeof(*src)))
3302 return -EPROTO;
3303
3304 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3305 if (!dst)
3306 continue;
3307
3308 ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
3309 ath10k_wmi_10_4_pull_pdev_stats_tx(&src->tx, dst);
3310 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
3311 dst->rx_ovfl_errs = __le32_to_cpu(src->rx_ovfl_errs);
3312 ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
3313
3314 list_add_tail(&dst->list, &stats->pdevs);
3315 }
3316
3317 for (i = 0; i < num_pdev_ext_stats; i++) {
3318 const struct wmi_10_2_pdev_ext_stats *src;
3319
3320 src = (void *)skb->data;
3321 if (!skb_pull(skb, sizeof(*src)))
3322 return -EPROTO;
3323
3324 /* FIXME: expose values to userspace
3325 *
3326 * Note: Even though this loop seems to do nothing it is
3327 * required to parse following sub-structures properly.
3328 */
3329 }
3330
3331 for (i = 0; i < num_vdev_stats; i++) {
3332 const struct wmi_vdev_stats *src;
3333
3334 /* Ignore vdev stats here as it has only vdev id. Actual vdev
3335 * stats will be retrieved from vdev extended stats.
3336 */
3337 src = (void *)skb->data;
3338 if (!skb_pull(skb, sizeof(*src)))
3339 return -EPROTO;
3340 }
3341
3342 for (i = 0; i < num_peer_stats; i++) {
3343 const struct wmi_10_4_peer_stats *src;
3344 struct ath10k_fw_stats_peer *dst;
3345
3346 src = (void *)skb->data;
3347 if (!skb_pull(skb, sizeof(*src)))
3348 return -EPROTO;
3349
3350 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3351 if (!dst)
3352 continue;
3353
3354 ath10k_wmi_10_4_pull_peer_stats(src, dst);
3355 list_add_tail(&dst->list, &stats->peers);
3356 }
3357
3358 for (i = 0; i < num_bcnflt_stats; i++) {
3359 const struct wmi_10_4_bss_bcn_filter_stats *src;
3360
3361 src = (void *)skb->data;
3362 if (!skb_pull(skb, sizeof(*src)))
3363 return -EPROTO;
3364
3365 /* FIXME: expose values to userspace
3366 *
3367 * Note: Even though this loop seems to do nothing it is
3368 * required to parse following sub-structures properly.
3369 */
3370 }
3371
3372 if (stats_id & WMI_10_4_STAT_PEER_EXTD) {
3373 stats->extended = true;
3374
3375 for (i = 0; i < num_peer_stats; i++) {
3376 const struct wmi_10_4_peer_extd_stats *src;
3377 struct ath10k_fw_extd_stats_peer *dst;
3378
3379 src = (void *)skb->data;
3380 if (!skb_pull(skb, sizeof(*src)))
3381 return -EPROTO;
3382
3383 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3384 if (!dst)
3385 continue;
3386
3387 ether_addr_copy(dst->peer_macaddr,
3388 src->peer_macaddr.addr);
3389 dst->rx_duration = __le32_to_cpu(src->rx_duration);
3390 list_add_tail(&dst->list, &stats->peers_extd);
3391 }
3392 }
3393
3394 if (stats_id & WMI_10_4_STAT_VDEV_EXTD) {
3395 for (i = 0; i < num_vdev_stats; i++) {
3396 const struct wmi_vdev_stats_extd *src;
3397 struct ath10k_fw_stats_vdev_extd *dst;
3398
3399 src = (void *)skb->data;
3400 if (!skb_pull(skb, sizeof(*src)))
3401 return -EPROTO;
3402
3403 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3404 if (!dst)
3405 continue;
3406 ath10k_wmi_10_4_pull_vdev_stats(src, dst);
3407 list_add_tail(&dst->list, &stats->vdevs);
3408 }
3409 }
3410
3411 return 0;
3412 }
3413
ath10k_wmi_event_update_stats(struct ath10k * ar,struct sk_buff * skb)3414 void ath10k_wmi_event_update_stats(struct ath10k *ar, struct sk_buff *skb)
3415 {
3416 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_UPDATE_STATS_EVENTID\n");
3417 ath10k_debug_fw_stats_process(ar, skb);
3418 }
3419
3420 static int
ath10k_wmi_op_pull_vdev_start_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_vdev_start_ev_arg * arg)3421 ath10k_wmi_op_pull_vdev_start_ev(struct ath10k *ar, struct sk_buff *skb,
3422 struct wmi_vdev_start_ev_arg *arg)
3423 {
3424 struct wmi_vdev_start_response_event *ev = (void *)skb->data;
3425
3426 if (skb->len < sizeof(*ev))
3427 return -EPROTO;
3428
3429 skb_pull(skb, sizeof(*ev));
3430 arg->vdev_id = ev->vdev_id;
3431 arg->req_id = ev->req_id;
3432 arg->resp_type = ev->resp_type;
3433 arg->status = ev->status;
3434
3435 return 0;
3436 }
3437
ath10k_wmi_event_vdev_start_resp(struct ath10k * ar,struct sk_buff * skb)3438 void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar, struct sk_buff *skb)
3439 {
3440 struct wmi_vdev_start_ev_arg arg = {};
3441 int ret;
3442 u32 status;
3443
3444 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_START_RESP_EVENTID\n");
3445
3446 ar->last_wmi_vdev_start_status = 0;
3447
3448 ret = ath10k_wmi_pull_vdev_start(ar, skb, &arg);
3449 if (ret) {
3450 ath10k_warn(ar, "failed to parse vdev start event: %d\n", ret);
3451 ar->last_wmi_vdev_start_status = ret;
3452 goto out;
3453 }
3454
3455 status = __le32_to_cpu(arg.status);
3456 if (WARN_ON_ONCE(status)) {
3457 ath10k_warn(ar, "vdev-start-response reports status error: %d (%s)\n",
3458 status, (status == WMI_VDEV_START_CHAN_INVALID) ?
3459 "chan-invalid" : "unknown");
3460 /* Setup is done one way or another though, so we should still
3461 * do the completion, so don't return here.
3462 */
3463 ar->last_wmi_vdev_start_status = -EINVAL;
3464 }
3465
3466 out:
3467 complete(&ar->vdev_setup_done);
3468 }
3469
ath10k_wmi_event_vdev_stopped(struct ath10k * ar,struct sk_buff * skb)3470 void ath10k_wmi_event_vdev_stopped(struct ath10k *ar, struct sk_buff *skb)
3471 {
3472 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STOPPED_EVENTID\n");
3473 complete(&ar->vdev_setup_done);
3474 }
3475
3476 static int
ath10k_wmi_op_pull_peer_kick_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_peer_kick_ev_arg * arg)3477 ath10k_wmi_op_pull_peer_kick_ev(struct ath10k *ar, struct sk_buff *skb,
3478 struct wmi_peer_kick_ev_arg *arg)
3479 {
3480 struct wmi_peer_sta_kickout_event *ev = (void *)skb->data;
3481
3482 if (skb->len < sizeof(*ev))
3483 return -EPROTO;
3484
3485 skb_pull(skb, sizeof(*ev));
3486 arg->mac_addr = ev->peer_macaddr.addr;
3487
3488 return 0;
3489 }
3490
ath10k_wmi_event_peer_sta_kickout(struct ath10k * ar,struct sk_buff * skb)3491 void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar, struct sk_buff *skb)
3492 {
3493 struct wmi_peer_kick_ev_arg arg = {};
3494 struct ieee80211_sta *sta;
3495 int ret;
3496
3497 ret = ath10k_wmi_pull_peer_kick(ar, skb, &arg);
3498 if (ret) {
3499 ath10k_warn(ar, "failed to parse peer kickout event: %d\n",
3500 ret);
3501 return;
3502 }
3503
3504 ath10k_dbg(ar, ATH10K_DBG_STA, "wmi event peer sta kickout %pM\n",
3505 arg.mac_addr);
3506
3507 rcu_read_lock();
3508
3509 sta = ieee80211_find_sta_by_ifaddr(ar->hw, arg.mac_addr, NULL);
3510 if (!sta) {
3511 ath10k_warn(ar, "Spurious quick kickout for STA %pM\n",
3512 arg.mac_addr);
3513 goto exit;
3514 }
3515
3516 ieee80211_report_low_ack(sta, 10);
3517
3518 exit:
3519 rcu_read_unlock();
3520 }
3521
3522 /*
3523 * FIXME
3524 *
3525 * We don't report to mac80211 sleep state of connected
3526 * stations. Due to this mac80211 can't fill in TIM IE
3527 * correctly.
3528 *
3529 * I know of no way of getting nullfunc frames that contain
3530 * sleep transition from connected stations - these do not
3531 * seem to be sent from the target to the host. There also
3532 * doesn't seem to be a dedicated event for that. So the
3533 * only way left to do this would be to read tim_bitmap
3534 * during SWBA.
3535 *
3536 * We could probably try using tim_bitmap from SWBA to tell
3537 * mac80211 which stations are asleep and which are not. The
3538 * problem here is calling mac80211 functions so many times
3539 * could take too long and make us miss the time to submit
3540 * the beacon to the target.
3541 *
3542 * So as a workaround we try to extend the TIM IE if there
3543 * is unicast buffered for stations with aid > 7 and fill it
3544 * in ourselves.
3545 */
ath10k_wmi_update_tim(struct ath10k * ar,struct ath10k_vif * arvif,struct sk_buff * bcn,const struct wmi_tim_info_arg * tim_info)3546 static void ath10k_wmi_update_tim(struct ath10k *ar,
3547 struct ath10k_vif *arvif,
3548 struct sk_buff *bcn,
3549 const struct wmi_tim_info_arg *tim_info)
3550 {
3551 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)bcn->data;
3552 struct ieee80211_tim_ie *tim;
3553 u8 *ies, *ie;
3554 u8 ie_len, pvm_len;
3555 __le32 t;
3556 u32 v, tim_len;
3557
3558 /* When FW reports 0 in tim_len, ensure at least first byte
3559 * in tim_bitmap is considered for pvm calculation.
3560 */
3561 tim_len = tim_info->tim_len ? __le32_to_cpu(tim_info->tim_len) : 1;
3562
3563 /* if next SWBA has no tim_changed the tim_bitmap is garbage.
3564 * we must copy the bitmap upon change and reuse it later
3565 */
3566 if (__le32_to_cpu(tim_info->tim_changed)) {
3567 int i;
3568
3569 if (sizeof(arvif->u.ap.tim_bitmap) < tim_len) {
3570 ath10k_warn(ar, "SWBA TIM field is too big (%u), truncated it to %zu",
3571 tim_len, sizeof(arvif->u.ap.tim_bitmap));
3572 tim_len = sizeof(arvif->u.ap.tim_bitmap);
3573 }
3574
3575 for (i = 0; i < tim_len; i++) {
3576 t = tim_info->tim_bitmap[i / 4];
3577 v = __le32_to_cpu(t);
3578 arvif->u.ap.tim_bitmap[i] = (v >> ((i % 4) * 8)) & 0xFF;
3579 }
3580
3581 /* FW reports either length 0 or length based on max supported
3582 * station. so we calculate this on our own
3583 */
3584 arvif->u.ap.tim_len = 0;
3585 for (i = 0; i < tim_len; i++)
3586 if (arvif->u.ap.tim_bitmap[i])
3587 arvif->u.ap.tim_len = i;
3588
3589 arvif->u.ap.tim_len++;
3590 }
3591
3592 ies = bcn->data;
3593 ies += ieee80211_hdrlen(hdr->frame_control);
3594 ies += 12; /* fixed parameters */
3595
3596 ie = (u8 *)cfg80211_find_ie(WLAN_EID_TIM, ies,
3597 (u8 *)skb_tail_pointer(bcn) - ies);
3598 if (!ie) {
3599 if (arvif->vdev_type != WMI_VDEV_TYPE_IBSS)
3600 ath10k_warn(ar, "no tim ie found;\n");
3601 return;
3602 }
3603
3604 tim = (void *)ie + 2;
3605 ie_len = ie[1];
3606 pvm_len = ie_len - 3; /* exclude dtim count, dtim period, bmap ctl */
3607
3608 if (pvm_len < arvif->u.ap.tim_len) {
3609 int expand_size = tim_len - pvm_len;
3610 int move_size = skb_tail_pointer(bcn) - (ie + 2 + ie_len);
3611 void *next_ie = ie + 2 + ie_len;
3612
3613 if (skb_put(bcn, expand_size)) {
3614 memmove(next_ie + expand_size, next_ie, move_size);
3615
3616 ie[1] += expand_size;
3617 ie_len += expand_size;
3618 pvm_len += expand_size;
3619 } else {
3620 ath10k_warn(ar, "tim expansion failed\n");
3621 }
3622 }
3623
3624 if (pvm_len > tim_len) {
3625 ath10k_warn(ar, "tim pvm length is too great (%d)\n", pvm_len);
3626 return;
3627 }
3628
3629 tim->bitmap_ctrl = !!__le32_to_cpu(tim_info->tim_mcast);
3630 memcpy(tim->virtual_map, arvif->u.ap.tim_bitmap, pvm_len);
3631
3632 if (tim->dtim_count == 0) {
3633 ATH10K_SKB_CB(bcn)->flags |= ATH10K_SKB_F_DTIM_ZERO;
3634
3635 if (__le32_to_cpu(tim_info->tim_mcast) == 1)
3636 ATH10K_SKB_CB(bcn)->flags |= ATH10K_SKB_F_DELIVER_CAB;
3637 }
3638
3639 ath10k_dbg(ar, ATH10K_DBG_MGMT, "dtim %d/%d mcast %d pvmlen %d\n",
3640 tim->dtim_count, tim->dtim_period,
3641 tim->bitmap_ctrl, pvm_len);
3642 }
3643
ath10k_wmi_update_noa(struct ath10k * ar,struct ath10k_vif * arvif,struct sk_buff * bcn,const struct wmi_p2p_noa_info * noa)3644 static void ath10k_wmi_update_noa(struct ath10k *ar, struct ath10k_vif *arvif,
3645 struct sk_buff *bcn,
3646 const struct wmi_p2p_noa_info *noa)
3647 {
3648 if (!arvif->vif->p2p)
3649 return;
3650
3651 ath10k_dbg(ar, ATH10K_DBG_MGMT, "noa changed: %d\n", noa->changed);
3652
3653 if (noa->changed & WMI_P2P_NOA_CHANGED_BIT)
3654 ath10k_p2p_noa_update(arvif, noa);
3655
3656 if (arvif->u.ap.noa_data)
3657 if (!pskb_expand_head(bcn, 0, arvif->u.ap.noa_len, GFP_ATOMIC))
3658 skb_put_data(bcn, arvif->u.ap.noa_data,
3659 arvif->u.ap.noa_len);
3660 }
3661
ath10k_wmi_op_pull_swba_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_swba_ev_arg * arg)3662 static int ath10k_wmi_op_pull_swba_ev(struct ath10k *ar, struct sk_buff *skb,
3663 struct wmi_swba_ev_arg *arg)
3664 {
3665 struct wmi_host_swba_event *ev = (void *)skb->data;
3666 u32 map;
3667 size_t i;
3668
3669 if (skb->len < sizeof(*ev))
3670 return -EPROTO;
3671
3672 skb_pull(skb, sizeof(*ev));
3673 arg->vdev_map = ev->vdev_map;
3674
3675 for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
3676 if (!(map & BIT(0)))
3677 continue;
3678
3679 /* If this happens there were some changes in firmware and
3680 * ath10k should update the max size of tim_info array.
3681 */
3682 if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
3683 break;
3684
3685 if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
3686 sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
3687 ath10k_warn(ar, "refusing to parse invalid swba structure\n");
3688 return -EPROTO;
3689 }
3690
3691 arg->tim_info[i].tim_len = ev->bcn_info[i].tim_info.tim_len;
3692 arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
3693 arg->tim_info[i].tim_bitmap =
3694 ev->bcn_info[i].tim_info.tim_bitmap;
3695 arg->tim_info[i].tim_changed =
3696 ev->bcn_info[i].tim_info.tim_changed;
3697 arg->tim_info[i].tim_num_ps_pending =
3698 ev->bcn_info[i].tim_info.tim_num_ps_pending;
3699
3700 arg->noa_info[i] = &ev->bcn_info[i].p2p_noa_info;
3701 i++;
3702 }
3703
3704 return 0;
3705 }
3706
ath10k_wmi_10_2_4_op_pull_swba_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_swba_ev_arg * arg)3707 static int ath10k_wmi_10_2_4_op_pull_swba_ev(struct ath10k *ar,
3708 struct sk_buff *skb,
3709 struct wmi_swba_ev_arg *arg)
3710 {
3711 struct wmi_10_2_4_host_swba_event *ev = (void *)skb->data;
3712 u32 map;
3713 size_t i;
3714
3715 if (skb->len < sizeof(*ev))
3716 return -EPROTO;
3717
3718 skb_pull(skb, sizeof(*ev));
3719 arg->vdev_map = ev->vdev_map;
3720
3721 for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
3722 if (!(map & BIT(0)))
3723 continue;
3724
3725 /* If this happens there were some changes in firmware and
3726 * ath10k should update the max size of tim_info array.
3727 */
3728 if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
3729 break;
3730
3731 if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
3732 sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
3733 ath10k_warn(ar, "refusing to parse invalid swba structure\n");
3734 return -EPROTO;
3735 }
3736
3737 arg->tim_info[i].tim_len = ev->bcn_info[i].tim_info.tim_len;
3738 arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
3739 arg->tim_info[i].tim_bitmap =
3740 ev->bcn_info[i].tim_info.tim_bitmap;
3741 arg->tim_info[i].tim_changed =
3742 ev->bcn_info[i].tim_info.tim_changed;
3743 arg->tim_info[i].tim_num_ps_pending =
3744 ev->bcn_info[i].tim_info.tim_num_ps_pending;
3745 i++;
3746 }
3747
3748 return 0;
3749 }
3750
ath10k_wmi_10_4_op_pull_swba_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_swba_ev_arg * arg)3751 static int ath10k_wmi_10_4_op_pull_swba_ev(struct ath10k *ar,
3752 struct sk_buff *skb,
3753 struct wmi_swba_ev_arg *arg)
3754 {
3755 struct wmi_10_4_host_swba_event *ev = (void *)skb->data;
3756 u32 map, tim_len;
3757 size_t i;
3758
3759 if (skb->len < sizeof(*ev))
3760 return -EPROTO;
3761
3762 skb_pull(skb, sizeof(*ev));
3763 arg->vdev_map = ev->vdev_map;
3764
3765 for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
3766 if (!(map & BIT(0)))
3767 continue;
3768
3769 /* If this happens there were some changes in firmware and
3770 * ath10k should update the max size of tim_info array.
3771 */
3772 if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
3773 break;
3774
3775 if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
3776 sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
3777 ath10k_warn(ar, "refusing to parse invalid swba structure\n");
3778 return -EPROTO;
3779 }
3780
3781 tim_len = __le32_to_cpu(ev->bcn_info[i].tim_info.tim_len);
3782 if (tim_len) {
3783 /* Exclude 4 byte guard length */
3784 tim_len -= 4;
3785 arg->tim_info[i].tim_len = __cpu_to_le32(tim_len);
3786 } else {
3787 arg->tim_info[i].tim_len = 0;
3788 }
3789
3790 arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
3791 arg->tim_info[i].tim_bitmap =
3792 ev->bcn_info[i].tim_info.tim_bitmap;
3793 arg->tim_info[i].tim_changed =
3794 ev->bcn_info[i].tim_info.tim_changed;
3795 arg->tim_info[i].tim_num_ps_pending =
3796 ev->bcn_info[i].tim_info.tim_num_ps_pending;
3797
3798 /* 10.4 firmware doesn't have p2p support. notice of absence
3799 * info can be ignored for now.
3800 */
3801
3802 i++;
3803 }
3804
3805 return 0;
3806 }
3807
ath10k_wmi_10_4_txbf_conf_scheme(struct ath10k * ar)3808 static enum wmi_txbf_conf ath10k_wmi_10_4_txbf_conf_scheme(struct ath10k *ar)
3809 {
3810 return WMI_TXBF_CONF_BEFORE_ASSOC;
3811 }
3812
ath10k_wmi_event_host_swba(struct ath10k * ar,struct sk_buff * skb)3813 void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb)
3814 {
3815 struct wmi_swba_ev_arg arg = {};
3816 u32 map;
3817 int i = -1;
3818 const struct wmi_tim_info_arg *tim_info;
3819 const struct wmi_p2p_noa_info *noa_info;
3820 struct ath10k_vif *arvif;
3821 struct sk_buff *bcn;
3822 dma_addr_t paddr;
3823 int ret, vdev_id = 0;
3824
3825 ret = ath10k_wmi_pull_swba(ar, skb, &arg);
3826 if (ret) {
3827 ath10k_warn(ar, "failed to parse swba event: %d\n", ret);
3828 return;
3829 }
3830
3831 map = __le32_to_cpu(arg.vdev_map);
3832
3833 ath10k_dbg(ar, ATH10K_DBG_MGMT, "mgmt swba vdev_map 0x%x\n",
3834 map);
3835
3836 for (; map; map >>= 1, vdev_id++) {
3837 if (!(map & 0x1))
3838 continue;
3839
3840 i++;
3841
3842 if (i >= WMI_MAX_AP_VDEV) {
3843 ath10k_warn(ar, "swba has corrupted vdev map\n");
3844 break;
3845 }
3846
3847 tim_info = &arg.tim_info[i];
3848 noa_info = arg.noa_info[i];
3849
3850 ath10k_dbg(ar, ATH10K_DBG_MGMT,
3851 "mgmt event bcn_info %d tim_len %d mcast %d changed %d num_ps_pending %d bitmap 0x%08x%08x%08x%08x\n",
3852 i,
3853 __le32_to_cpu(tim_info->tim_len),
3854 __le32_to_cpu(tim_info->tim_mcast),
3855 __le32_to_cpu(tim_info->tim_changed),
3856 __le32_to_cpu(tim_info->tim_num_ps_pending),
3857 __le32_to_cpu(tim_info->tim_bitmap[3]),
3858 __le32_to_cpu(tim_info->tim_bitmap[2]),
3859 __le32_to_cpu(tim_info->tim_bitmap[1]),
3860 __le32_to_cpu(tim_info->tim_bitmap[0]));
3861
3862 /* TODO: Only first 4 word from tim_bitmap is dumped.
3863 * Extend debug code to dump full tim_bitmap.
3864 */
3865
3866 arvif = ath10k_get_arvif(ar, vdev_id);
3867 if (arvif == NULL) {
3868 ath10k_warn(ar, "no vif for vdev_id %d found\n",
3869 vdev_id);
3870 continue;
3871 }
3872
3873 /* mac80211 would have already asked us to stop beaconing and
3874 * bring the vdev down, so continue in that case
3875 */
3876 if (!arvif->is_up)
3877 continue;
3878
3879 /* There are no completions for beacons so wait for next SWBA
3880 * before telling mac80211 to decrement CSA counter
3881 *
3882 * Once CSA counter is completed stop sending beacons until
3883 * actual channel switch is done
3884 */
3885 if (arvif->vif->bss_conf.csa_active &&
3886 ieee80211_beacon_cntdwn_is_complete(arvif->vif)) {
3887 ieee80211_csa_finish(arvif->vif);
3888 continue;
3889 }
3890
3891 bcn = ieee80211_beacon_get(ar->hw, arvif->vif, 0);
3892 if (!bcn) {
3893 ath10k_warn(ar, "could not get mac80211 beacon\n");
3894 continue;
3895 }
3896
3897 ath10k_tx_h_seq_no(arvif->vif, bcn);
3898 ath10k_wmi_update_tim(ar, arvif, bcn, tim_info);
3899 ath10k_wmi_update_noa(ar, arvif, bcn, noa_info);
3900
3901 spin_lock_bh(&ar->data_lock);
3902
3903 if (arvif->beacon) {
3904 switch (arvif->beacon_state) {
3905 case ATH10K_BEACON_SENT:
3906 break;
3907 case ATH10K_BEACON_SCHEDULED:
3908 ath10k_warn(ar, "SWBA overrun on vdev %d, skipped old beacon\n",
3909 arvif->vdev_id);
3910 break;
3911 case ATH10K_BEACON_SENDING:
3912 ath10k_warn(ar, "SWBA overrun on vdev %d, skipped new beacon\n",
3913 arvif->vdev_id);
3914 dev_kfree_skb(bcn);
3915 goto skip;
3916 }
3917
3918 ath10k_mac_vif_beacon_free(arvif);
3919 }
3920
3921 if (!arvif->beacon_buf) {
3922 paddr = dma_map_single(arvif->ar->dev, bcn->data,
3923 bcn->len, DMA_TO_DEVICE);
3924 ret = dma_mapping_error(arvif->ar->dev, paddr);
3925 if (ret) {
3926 ath10k_warn(ar, "failed to map beacon: %d\n",
3927 ret);
3928 dev_kfree_skb_any(bcn);
3929 goto skip;
3930 }
3931
3932 ATH10K_SKB_CB(bcn)->paddr = paddr;
3933 } else {
3934 if (bcn->len > IEEE80211_MAX_FRAME_LEN) {
3935 ath10k_warn(ar, "trimming beacon %d -> %d bytes!\n",
3936 bcn->len, IEEE80211_MAX_FRAME_LEN);
3937 skb_trim(bcn, IEEE80211_MAX_FRAME_LEN);
3938 }
3939 memcpy(arvif->beacon_buf, bcn->data, bcn->len);
3940 ATH10K_SKB_CB(bcn)->paddr = arvif->beacon_paddr;
3941 }
3942
3943 arvif->beacon = bcn;
3944 arvif->beacon_state = ATH10K_BEACON_SCHEDULED;
3945
3946 trace_ath10k_tx_hdr(ar, bcn->data, bcn->len);
3947 trace_ath10k_tx_payload(ar, bcn->data, bcn->len);
3948
3949 skip:
3950 spin_unlock_bh(&ar->data_lock);
3951 }
3952
3953 ath10k_wmi_tx_beacons_nowait(ar);
3954 }
3955
ath10k_wmi_event_tbttoffset_update(struct ath10k * ar,struct sk_buff * skb)3956 void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, struct sk_buff *skb)
3957 {
3958 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TBTTOFFSET_UPDATE_EVENTID\n");
3959 }
3960
ath10k_radar_detected(struct ath10k * ar)3961 static void ath10k_radar_detected(struct ath10k *ar)
3962 {
3963 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs radar detected\n");
3964 ATH10K_DFS_STAT_INC(ar, radar_detected);
3965
3966 /* Control radar events reporting in debugfs file
3967 * dfs_block_radar_events
3968 */
3969 if (ar->dfs_block_radar_events)
3970 ath10k_info(ar, "DFS Radar detected, but ignored as requested\n");
3971 else
3972 ieee80211_radar_detected(ar->hw);
3973 }
3974
ath10k_radar_confirmation_work(struct work_struct * work)3975 static void ath10k_radar_confirmation_work(struct work_struct *work)
3976 {
3977 struct ath10k *ar = container_of(work, struct ath10k,
3978 radar_confirmation_work);
3979 struct ath10k_radar_found_info radar_info;
3980 int ret, time_left;
3981
3982 reinit_completion(&ar->wmi.radar_confirm);
3983
3984 spin_lock_bh(&ar->data_lock);
3985 memcpy(&radar_info, &ar->last_radar_info, sizeof(radar_info));
3986 spin_unlock_bh(&ar->data_lock);
3987
3988 ret = ath10k_wmi_report_radar_found(ar, &radar_info);
3989 if (ret) {
3990 ath10k_warn(ar, "failed to send radar found %d\n", ret);
3991 goto wait_complete;
3992 }
3993
3994 time_left = wait_for_completion_timeout(&ar->wmi.radar_confirm,
3995 ATH10K_WMI_DFS_CONF_TIMEOUT_HZ);
3996 if (time_left) {
3997 /* DFS Confirmation status event received and
3998 * necessary action completed.
3999 */
4000 goto wait_complete;
4001 } else {
4002 /* DFS Confirmation event not received from FW.Considering this
4003 * as real radar.
4004 */
4005 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4006 "dfs confirmation not received from fw, considering as radar\n");
4007 goto radar_detected;
4008 }
4009
4010 radar_detected:
4011 ath10k_radar_detected(ar);
4012
4013 /* Reset state to allow sending confirmation on consecutive radar
4014 * detections, unless radar confirmation is disabled/stopped.
4015 */
4016 wait_complete:
4017 spin_lock_bh(&ar->data_lock);
4018 if (ar->radar_conf_state != ATH10K_RADAR_CONFIRMATION_STOPPED)
4019 ar->radar_conf_state = ATH10K_RADAR_CONFIRMATION_IDLE;
4020 spin_unlock_bh(&ar->data_lock);
4021 }
4022
ath10k_dfs_radar_report(struct ath10k * ar,struct wmi_phyerr_ev_arg * phyerr,const struct phyerr_radar_report * rr,u64 tsf)4023 static void ath10k_dfs_radar_report(struct ath10k *ar,
4024 struct wmi_phyerr_ev_arg *phyerr,
4025 const struct phyerr_radar_report *rr,
4026 u64 tsf)
4027 {
4028 u32 reg0, reg1, tsf32l;
4029 struct ieee80211_channel *ch;
4030 struct pulse_event pe;
4031 struct radar_detector_specs rs;
4032 u64 tsf64;
4033 u8 rssi, width;
4034 struct ath10k_radar_found_info *radar_info;
4035
4036 reg0 = __le32_to_cpu(rr->reg0);
4037 reg1 = __le32_to_cpu(rr->reg1);
4038
4039 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4040 "wmi phyerr radar report chirp %d max_width %d agc_total_gain %d pulse_delta_diff %d\n",
4041 MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP),
4042 MS(reg0, RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH),
4043 MS(reg0, RADAR_REPORT_REG0_AGC_TOTAL_GAIN),
4044 MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_DIFF));
4045 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4046 "wmi phyerr radar report pulse_delta_pean %d pulse_sidx %d fft_valid %d agc_mb_gain %d subchan_mask %d\n",
4047 MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_PEAK),
4048 MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX),
4049 MS(reg1, RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID),
4050 MS(reg1, RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN),
4051 MS(reg1, RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK));
4052 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4053 "wmi phyerr radar report pulse_tsf_offset 0x%X pulse_dur: %d\n",
4054 MS(reg1, RADAR_REPORT_REG1_PULSE_TSF_OFFSET),
4055 MS(reg1, RADAR_REPORT_REG1_PULSE_DUR));
4056
4057 if (!ar->dfs_detector)
4058 return;
4059
4060 spin_lock_bh(&ar->data_lock);
4061 ch = ar->rx_channel;
4062
4063 /* fetch target operating channel during channel change */
4064 if (!ch)
4065 ch = ar->tgt_oper_chan;
4066
4067 spin_unlock_bh(&ar->data_lock);
4068
4069 if (!ch) {
4070 ath10k_warn(ar, "failed to derive channel for radar pulse, treating as radar\n");
4071 goto radar_detected;
4072 }
4073
4074 /* report event to DFS pattern detector */
4075 tsf32l = phyerr->tsf_timestamp;
4076 tsf64 = tsf & (~0xFFFFFFFFULL);
4077 tsf64 |= tsf32l;
4078
4079 width = MS(reg1, RADAR_REPORT_REG1_PULSE_DUR);
4080 rssi = phyerr->rssi_combined;
4081
4082 /* hardware store this as 8 bit signed value,
4083 * set to zero if negative number
4084 */
4085 if (rssi & 0x80)
4086 rssi = 0;
4087
4088 pe.ts = tsf64;
4089 pe.freq = ch->center_freq;
4090 pe.width = width;
4091 pe.rssi = rssi;
4092 pe.chirp = (MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP) != 0);
4093 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4094 "dfs add pulse freq: %d, width: %d, rssi %d, tsf: %llX\n",
4095 pe.freq, pe.width, pe.rssi, pe.ts);
4096
4097 ATH10K_DFS_STAT_INC(ar, pulses_detected);
4098
4099 if (!ar->dfs_detector->add_pulse(ar->dfs_detector, &pe, &rs)) {
4100 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4101 "dfs no pulse pattern detected, yet\n");
4102 return;
4103 }
4104
4105 if ((test_bit(WMI_SERVICE_HOST_DFS_CHECK_SUPPORT, ar->wmi.svc_map)) &&
4106 ar->dfs_detector->region == NL80211_DFS_FCC) {
4107 /* Consecutive radar indications need not be
4108 * sent to the firmware until we get confirmation
4109 * for the previous detected radar.
4110 */
4111 spin_lock_bh(&ar->data_lock);
4112 if (ar->radar_conf_state != ATH10K_RADAR_CONFIRMATION_IDLE) {
4113 spin_unlock_bh(&ar->data_lock);
4114 return;
4115 }
4116 ar->radar_conf_state = ATH10K_RADAR_CONFIRMATION_INPROGRESS;
4117 radar_info = &ar->last_radar_info;
4118
4119 radar_info->pri_min = rs.pri_min;
4120 radar_info->pri_max = rs.pri_max;
4121 radar_info->width_min = rs.width_min;
4122 radar_info->width_max = rs.width_max;
4123 /*TODO Find sidx_min and sidx_max */
4124 radar_info->sidx_min = MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX);
4125 radar_info->sidx_max = MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX);
4126
4127 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4128 "sending wmi radar found cmd pri_min %d pri_max %d width_min %d width_max %d sidx_min %d sidx_max %d\n",
4129 radar_info->pri_min, radar_info->pri_max,
4130 radar_info->width_min, radar_info->width_max,
4131 radar_info->sidx_min, radar_info->sidx_max);
4132 ieee80211_queue_work(ar->hw, &ar->radar_confirmation_work);
4133 spin_unlock_bh(&ar->data_lock);
4134 return;
4135 }
4136
4137 radar_detected:
4138 ath10k_radar_detected(ar);
4139 }
4140
ath10k_dfs_fft_report(struct ath10k * ar,struct wmi_phyerr_ev_arg * phyerr,const struct phyerr_fft_report * fftr,u64 tsf)4141 static int ath10k_dfs_fft_report(struct ath10k *ar,
4142 struct wmi_phyerr_ev_arg *phyerr,
4143 const struct phyerr_fft_report *fftr,
4144 u64 tsf)
4145 {
4146 u32 reg0, reg1;
4147 u8 rssi, peak_mag;
4148
4149 reg0 = __le32_to_cpu(fftr->reg0);
4150 reg1 = __le32_to_cpu(fftr->reg1);
4151 rssi = phyerr->rssi_combined;
4152
4153 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4154 "wmi phyerr fft report total_gain_db %d base_pwr_db %d fft_chn_idx %d peak_sidx %d\n",
4155 MS(reg0, SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB),
4156 MS(reg0, SEARCH_FFT_REPORT_REG0_BASE_PWR_DB),
4157 MS(reg0, SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX),
4158 MS(reg0, SEARCH_FFT_REPORT_REG0_PEAK_SIDX));
4159 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4160 "wmi phyerr fft report rel_pwr_db %d avgpwr_db %d peak_mag %d num_store_bin %d\n",
4161 MS(reg1, SEARCH_FFT_REPORT_REG1_RELPWR_DB),
4162 MS(reg1, SEARCH_FFT_REPORT_REG1_AVGPWR_DB),
4163 MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG),
4164 MS(reg1, SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB));
4165
4166 peak_mag = MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG);
4167
4168 /* false event detection */
4169 if (rssi == DFS_RSSI_POSSIBLY_FALSE &&
4170 peak_mag < 2 * DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE) {
4171 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs false pulse detected\n");
4172 ATH10K_DFS_STAT_INC(ar, pulses_discarded);
4173 return -EINVAL;
4174 }
4175
4176 return 0;
4177 }
4178
ath10k_wmi_event_dfs(struct ath10k * ar,struct wmi_phyerr_ev_arg * phyerr,u64 tsf)4179 void ath10k_wmi_event_dfs(struct ath10k *ar,
4180 struct wmi_phyerr_ev_arg *phyerr,
4181 u64 tsf)
4182 {
4183 int buf_len, tlv_len, res, i = 0;
4184 const struct phyerr_tlv *tlv;
4185 const struct phyerr_radar_report *rr;
4186 const struct phyerr_fft_report *fftr;
4187 const u8 *tlv_buf;
4188
4189 buf_len = phyerr->buf_len;
4190 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4191 "wmi event dfs err_code %d rssi %d tsfl 0x%X tsf64 0x%llX len %d\n",
4192 phyerr->phy_err_code, phyerr->rssi_combined,
4193 phyerr->tsf_timestamp, tsf, buf_len);
4194
4195 /* Skip event if DFS disabled */
4196 if (!IS_ENABLED(CONFIG_ATH10K_DFS_CERTIFIED))
4197 return;
4198
4199 ATH10K_DFS_STAT_INC(ar, pulses_total);
4200
4201 while (i < buf_len) {
4202 if (i + sizeof(*tlv) > buf_len) {
4203 ath10k_warn(ar, "too short buf for tlv header (%d)\n",
4204 i);
4205 return;
4206 }
4207
4208 tlv = (struct phyerr_tlv *)&phyerr->buf[i];
4209 tlv_len = __le16_to_cpu(tlv->len);
4210 tlv_buf = &phyerr->buf[i + sizeof(*tlv)];
4211 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4212 "wmi event dfs tlv_len %d tlv_tag 0x%02X tlv_sig 0x%02X\n",
4213 tlv_len, tlv->tag, tlv->sig);
4214
4215 switch (tlv->tag) {
4216 case PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY:
4217 if (i + sizeof(*tlv) + sizeof(*rr) > buf_len) {
4218 ath10k_warn(ar, "too short radar pulse summary (%d)\n",
4219 i);
4220 return;
4221 }
4222
4223 rr = (struct phyerr_radar_report *)tlv_buf;
4224 ath10k_dfs_radar_report(ar, phyerr, rr, tsf);
4225 break;
4226 case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
4227 if (i + sizeof(*tlv) + sizeof(*fftr) > buf_len) {
4228 ath10k_warn(ar, "too short fft report (%d)\n",
4229 i);
4230 return;
4231 }
4232
4233 fftr = (struct phyerr_fft_report *)tlv_buf;
4234 res = ath10k_dfs_fft_report(ar, phyerr, fftr, tsf);
4235 if (res)
4236 return;
4237 break;
4238 }
4239
4240 i += sizeof(*tlv) + tlv_len;
4241 }
4242 }
4243
ath10k_wmi_event_spectral_scan(struct ath10k * ar,struct wmi_phyerr_ev_arg * phyerr,u64 tsf)4244 void ath10k_wmi_event_spectral_scan(struct ath10k *ar,
4245 struct wmi_phyerr_ev_arg *phyerr,
4246 u64 tsf)
4247 {
4248 int buf_len, tlv_len, res, i = 0;
4249 struct phyerr_tlv *tlv;
4250 const void *tlv_buf;
4251 const struct phyerr_fft_report *fftr;
4252 size_t fftr_len;
4253
4254 buf_len = phyerr->buf_len;
4255
4256 while (i < buf_len) {
4257 if (i + sizeof(*tlv) > buf_len) {
4258 ath10k_warn(ar, "failed to parse phyerr tlv header at byte %d\n",
4259 i);
4260 return;
4261 }
4262
4263 tlv = (struct phyerr_tlv *)&phyerr->buf[i];
4264 tlv_len = __le16_to_cpu(tlv->len);
4265 tlv_buf = &phyerr->buf[i + sizeof(*tlv)];
4266
4267 if (i + sizeof(*tlv) + tlv_len > buf_len) {
4268 ath10k_warn(ar, "failed to parse phyerr tlv payload at byte %d\n",
4269 i);
4270 return;
4271 }
4272
4273 switch (tlv->tag) {
4274 case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
4275 if (sizeof(*fftr) > tlv_len) {
4276 ath10k_warn(ar, "failed to parse fft report at byte %d\n",
4277 i);
4278 return;
4279 }
4280
4281 fftr_len = tlv_len - sizeof(*fftr);
4282 fftr = tlv_buf;
4283 res = ath10k_spectral_process_fft(ar, phyerr,
4284 fftr, fftr_len,
4285 tsf);
4286 if (res < 0) {
4287 ath10k_dbg(ar, ATH10K_DBG_WMI, "failed to process fft report: %d\n",
4288 res);
4289 return;
4290 }
4291 break;
4292 }
4293
4294 i += sizeof(*tlv) + tlv_len;
4295 }
4296 }
4297
ath10k_wmi_op_pull_phyerr_ev_hdr(struct ath10k * ar,struct sk_buff * skb,struct wmi_phyerr_hdr_arg * arg)4298 static int ath10k_wmi_op_pull_phyerr_ev_hdr(struct ath10k *ar,
4299 struct sk_buff *skb,
4300 struct wmi_phyerr_hdr_arg *arg)
4301 {
4302 struct wmi_phyerr_event *ev = (void *)skb->data;
4303
4304 if (skb->len < sizeof(*ev))
4305 return -EPROTO;
4306
4307 arg->num_phyerrs = __le32_to_cpu(ev->num_phyerrs);
4308 arg->tsf_l32 = __le32_to_cpu(ev->tsf_l32);
4309 arg->tsf_u32 = __le32_to_cpu(ev->tsf_u32);
4310 arg->buf_len = skb->len - sizeof(*ev);
4311 arg->phyerrs = ev->phyerrs;
4312
4313 return 0;
4314 }
4315
ath10k_wmi_10_4_op_pull_phyerr_ev_hdr(struct ath10k * ar,struct sk_buff * skb,struct wmi_phyerr_hdr_arg * arg)4316 static int ath10k_wmi_10_4_op_pull_phyerr_ev_hdr(struct ath10k *ar,
4317 struct sk_buff *skb,
4318 struct wmi_phyerr_hdr_arg *arg)
4319 {
4320 struct wmi_10_4_phyerr_event *ev = (void *)skb->data;
4321
4322 if (skb->len < sizeof(*ev))
4323 return -EPROTO;
4324
4325 /* 10.4 firmware always reports only one phyerr */
4326 arg->num_phyerrs = 1;
4327
4328 arg->tsf_l32 = __le32_to_cpu(ev->tsf_l32);
4329 arg->tsf_u32 = __le32_to_cpu(ev->tsf_u32);
4330 arg->buf_len = skb->len;
4331 arg->phyerrs = skb->data;
4332
4333 return 0;
4334 }
4335
ath10k_wmi_op_pull_phyerr_ev(struct ath10k * ar,const void * phyerr_buf,int left_len,struct wmi_phyerr_ev_arg * arg)4336 int ath10k_wmi_op_pull_phyerr_ev(struct ath10k *ar,
4337 const void *phyerr_buf,
4338 int left_len,
4339 struct wmi_phyerr_ev_arg *arg)
4340 {
4341 const struct wmi_phyerr *phyerr = phyerr_buf;
4342 int i;
4343
4344 if (left_len < sizeof(*phyerr)) {
4345 ath10k_warn(ar, "wrong phyerr event head len %d (need: >=%zd)\n",
4346 left_len, sizeof(*phyerr));
4347 return -EINVAL;
4348 }
4349
4350 arg->tsf_timestamp = __le32_to_cpu(phyerr->tsf_timestamp);
4351 arg->freq1 = __le16_to_cpu(phyerr->freq1);
4352 arg->freq2 = __le16_to_cpu(phyerr->freq2);
4353 arg->rssi_combined = phyerr->rssi_combined;
4354 arg->chan_width_mhz = phyerr->chan_width_mhz;
4355 arg->buf_len = __le32_to_cpu(phyerr->buf_len);
4356 arg->buf = phyerr->buf;
4357 arg->hdr_len = sizeof(*phyerr);
4358
4359 for (i = 0; i < 4; i++)
4360 arg->nf_chains[i] = __le16_to_cpu(phyerr->nf_chains[i]);
4361
4362 switch (phyerr->phy_err_code) {
4363 case PHY_ERROR_GEN_SPECTRAL_SCAN:
4364 arg->phy_err_code = PHY_ERROR_SPECTRAL_SCAN;
4365 break;
4366 case PHY_ERROR_GEN_FALSE_RADAR_EXT:
4367 arg->phy_err_code = PHY_ERROR_FALSE_RADAR_EXT;
4368 break;
4369 case PHY_ERROR_GEN_RADAR:
4370 arg->phy_err_code = PHY_ERROR_RADAR;
4371 break;
4372 default:
4373 arg->phy_err_code = PHY_ERROR_UNKNOWN;
4374 break;
4375 }
4376
4377 return 0;
4378 }
4379
ath10k_wmi_10_4_op_pull_phyerr_ev(struct ath10k * ar,const void * phyerr_buf,int left_len,struct wmi_phyerr_ev_arg * arg)4380 static int ath10k_wmi_10_4_op_pull_phyerr_ev(struct ath10k *ar,
4381 const void *phyerr_buf,
4382 int left_len,
4383 struct wmi_phyerr_ev_arg *arg)
4384 {
4385 const struct wmi_10_4_phyerr_event *phyerr = phyerr_buf;
4386 u32 phy_err_mask;
4387 int i;
4388
4389 if (left_len < sizeof(*phyerr)) {
4390 ath10k_warn(ar, "wrong phyerr event head len %d (need: >=%zd)\n",
4391 left_len, sizeof(*phyerr));
4392 return -EINVAL;
4393 }
4394
4395 arg->tsf_timestamp = __le32_to_cpu(phyerr->tsf_timestamp);
4396 arg->freq1 = __le16_to_cpu(phyerr->freq1);
4397 arg->freq2 = __le16_to_cpu(phyerr->freq2);
4398 arg->rssi_combined = phyerr->rssi_combined;
4399 arg->chan_width_mhz = phyerr->chan_width_mhz;
4400 arg->buf_len = __le32_to_cpu(phyerr->buf_len);
4401 arg->buf = phyerr->buf;
4402 arg->hdr_len = sizeof(*phyerr);
4403
4404 for (i = 0; i < 4; i++)
4405 arg->nf_chains[i] = __le16_to_cpu(phyerr->nf_chains[i]);
4406
4407 phy_err_mask = __le32_to_cpu(phyerr->phy_err_mask[0]);
4408
4409 if (phy_err_mask & PHY_ERROR_10_4_SPECTRAL_SCAN_MASK)
4410 arg->phy_err_code = PHY_ERROR_SPECTRAL_SCAN;
4411 else if (phy_err_mask & PHY_ERROR_10_4_RADAR_MASK)
4412 arg->phy_err_code = PHY_ERROR_RADAR;
4413 else
4414 arg->phy_err_code = PHY_ERROR_UNKNOWN;
4415
4416 return 0;
4417 }
4418
ath10k_wmi_event_phyerr(struct ath10k * ar,struct sk_buff * skb)4419 void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb)
4420 {
4421 struct wmi_phyerr_hdr_arg hdr_arg = {};
4422 struct wmi_phyerr_ev_arg phyerr_arg = {};
4423 const void *phyerr;
4424 u32 count, i, buf_len, phy_err_code;
4425 u64 tsf;
4426 int left_len, ret;
4427
4428 ATH10K_DFS_STAT_INC(ar, phy_errors);
4429
4430 ret = ath10k_wmi_pull_phyerr_hdr(ar, skb, &hdr_arg);
4431 if (ret) {
4432 ath10k_warn(ar, "failed to parse phyerr event hdr: %d\n", ret);
4433 return;
4434 }
4435
4436 /* Check number of included events */
4437 count = hdr_arg.num_phyerrs;
4438
4439 left_len = hdr_arg.buf_len;
4440
4441 tsf = hdr_arg.tsf_u32;
4442 tsf <<= 32;
4443 tsf |= hdr_arg.tsf_l32;
4444
4445 ath10k_dbg(ar, ATH10K_DBG_WMI,
4446 "wmi event phyerr count %d tsf64 0x%llX\n",
4447 count, tsf);
4448
4449 phyerr = hdr_arg.phyerrs;
4450 for (i = 0; i < count; i++) {
4451 ret = ath10k_wmi_pull_phyerr(ar, phyerr, left_len, &phyerr_arg);
4452 if (ret) {
4453 ath10k_warn(ar, "failed to parse phyerr event (%d)\n",
4454 i);
4455 return;
4456 }
4457
4458 left_len -= phyerr_arg.hdr_len;
4459 buf_len = phyerr_arg.buf_len;
4460 phy_err_code = phyerr_arg.phy_err_code;
4461
4462 if (left_len < buf_len) {
4463 ath10k_warn(ar, "single event (%d) wrong buf len\n", i);
4464 return;
4465 }
4466
4467 left_len -= buf_len;
4468
4469 switch (phy_err_code) {
4470 case PHY_ERROR_RADAR:
4471 ath10k_wmi_event_dfs(ar, &phyerr_arg, tsf);
4472 break;
4473 case PHY_ERROR_SPECTRAL_SCAN:
4474 ath10k_wmi_event_spectral_scan(ar, &phyerr_arg, tsf);
4475 break;
4476 case PHY_ERROR_FALSE_RADAR_EXT:
4477 ath10k_wmi_event_dfs(ar, &phyerr_arg, tsf);
4478 ath10k_wmi_event_spectral_scan(ar, &phyerr_arg, tsf);
4479 break;
4480 default:
4481 break;
4482 }
4483
4484 phyerr = phyerr + phyerr_arg.hdr_len + buf_len;
4485 }
4486 }
4487
4488 static int
ath10k_wmi_10_4_op_pull_dfs_status_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_dfs_status_ev_arg * arg)4489 ath10k_wmi_10_4_op_pull_dfs_status_ev(struct ath10k *ar, struct sk_buff *skb,
4490 struct wmi_dfs_status_ev_arg *arg)
4491 {
4492 struct wmi_dfs_status_ev_arg *ev = (void *)skb->data;
4493
4494 if (skb->len < sizeof(*ev))
4495 return -EPROTO;
4496
4497 arg->status = ev->status;
4498
4499 return 0;
4500 }
4501
4502 static void
ath10k_wmi_event_dfs_status_check(struct ath10k * ar,struct sk_buff * skb)4503 ath10k_wmi_event_dfs_status_check(struct ath10k *ar, struct sk_buff *skb)
4504 {
4505 struct wmi_dfs_status_ev_arg status_arg = {};
4506 int ret;
4507
4508 ret = ath10k_wmi_pull_dfs_status(ar, skb, &status_arg);
4509
4510 if (ret) {
4511 ath10k_warn(ar, "failed to parse dfs status event: %d\n", ret);
4512 return;
4513 }
4514
4515 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4516 "dfs status event received from fw: %d\n",
4517 status_arg.status);
4518
4519 /* Even in case of radar detection failure we follow the same
4520 * behaviour as if radar is detected i.e to switch to a different
4521 * channel.
4522 */
4523 if (status_arg.status == WMI_HW_RADAR_DETECTED ||
4524 status_arg.status == WMI_RADAR_DETECTION_FAIL)
4525 ath10k_radar_detected(ar);
4526 complete(&ar->wmi.radar_confirm);
4527 }
4528
ath10k_wmi_event_roam(struct ath10k * ar,struct sk_buff * skb)4529 void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb)
4530 {
4531 struct wmi_roam_ev_arg arg = {};
4532 int ret;
4533 u32 vdev_id;
4534 u32 reason;
4535 s32 rssi;
4536
4537 ret = ath10k_wmi_pull_roam_ev(ar, skb, &arg);
4538 if (ret) {
4539 ath10k_warn(ar, "failed to parse roam event: %d\n", ret);
4540 return;
4541 }
4542
4543 vdev_id = __le32_to_cpu(arg.vdev_id);
4544 reason = __le32_to_cpu(arg.reason);
4545 rssi = __le32_to_cpu(arg.rssi);
4546 rssi += WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT;
4547
4548 ath10k_dbg(ar, ATH10K_DBG_WMI,
4549 "wmi roam event vdev %u reason 0x%08x rssi %d\n",
4550 vdev_id, reason, rssi);
4551
4552 if (reason >= WMI_ROAM_REASON_MAX)
4553 ath10k_warn(ar, "ignoring unknown roam event reason %d on vdev %i\n",
4554 reason, vdev_id);
4555
4556 switch (reason) {
4557 case WMI_ROAM_REASON_BEACON_MISS:
4558 ath10k_mac_handle_beacon_miss(ar, vdev_id);
4559 break;
4560 case WMI_ROAM_REASON_BETTER_AP:
4561 case WMI_ROAM_REASON_LOW_RSSI:
4562 case WMI_ROAM_REASON_SUITABLE_AP_FOUND:
4563 case WMI_ROAM_REASON_HO_FAILED:
4564 ath10k_warn(ar, "ignoring not implemented roam event reason %d on vdev %i\n",
4565 reason, vdev_id);
4566 break;
4567 }
4568 }
4569
ath10k_wmi_event_profile_match(struct ath10k * ar,struct sk_buff * skb)4570 void ath10k_wmi_event_profile_match(struct ath10k *ar, struct sk_buff *skb)
4571 {
4572 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PROFILE_MATCH\n");
4573 }
4574
ath10k_wmi_event_debug_print(struct ath10k * ar,struct sk_buff * skb)4575 void ath10k_wmi_event_debug_print(struct ath10k *ar, struct sk_buff *skb)
4576 {
4577 char buf[101], c;
4578 int i;
4579
4580 for (i = 0; i < sizeof(buf) - 1; i++) {
4581 if (i >= skb->len)
4582 break;
4583
4584 c = skb->data[i];
4585
4586 if (c == '\0')
4587 break;
4588
4589 if (isascii(c) && isprint(c))
4590 buf[i] = c;
4591 else
4592 buf[i] = '.';
4593 }
4594
4595 if (i == sizeof(buf) - 1)
4596 ath10k_warn(ar, "wmi debug print truncated: %d\n", skb->len);
4597
4598 /* for some reason the debug prints end with \n, remove that */
4599 if (skb->data[i - 1] == '\n')
4600 i--;
4601
4602 /* the last byte is always reserved for the null character */
4603 buf[i] = '\0';
4604
4605 ath10k_dbg(ar, ATH10K_DBG_WMI_PRINT, "wmi print '%s'\n", buf);
4606 }
4607
ath10k_wmi_event_pdev_qvit(struct ath10k * ar,struct sk_buff * skb)4608 void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb)
4609 {
4610 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_QVIT_EVENTID\n");
4611 }
4612
ath10k_wmi_event_wlan_profile_data(struct ath10k * ar,struct sk_buff * skb)4613 void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar, struct sk_buff *skb)
4614 {
4615 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_WLAN_PROFILE_DATA_EVENTID\n");
4616 }
4617
ath10k_wmi_event_rtt_measurement_report(struct ath10k * ar,struct sk_buff * skb)4618 void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar,
4619 struct sk_buff *skb)
4620 {
4621 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_MEASUREMENT_REPORT_EVENTID\n");
4622 }
4623
ath10k_wmi_event_tsf_measurement_report(struct ath10k * ar,struct sk_buff * skb)4624 void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar,
4625 struct sk_buff *skb)
4626 {
4627 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TSF_MEASUREMENT_REPORT_EVENTID\n");
4628 }
4629
ath10k_wmi_event_rtt_error_report(struct ath10k * ar,struct sk_buff * skb)4630 void ath10k_wmi_event_rtt_error_report(struct ath10k *ar, struct sk_buff *skb)
4631 {
4632 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_ERROR_REPORT_EVENTID\n");
4633 }
4634
ath10k_wmi_event_wow_wakeup_host(struct ath10k * ar,struct sk_buff * skb)4635 void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar, struct sk_buff *skb)
4636 {
4637 struct wmi_wow_ev_arg ev = {};
4638 int ret;
4639
4640 complete(&ar->wow.wakeup_completed);
4641
4642 ret = ath10k_wmi_pull_wow_event(ar, skb, &ev);
4643 if (ret) {
4644 ath10k_warn(ar, "failed to parse wow wakeup event: %d\n", ret);
4645 return;
4646 }
4647
4648 ath10k_dbg(ar, ATH10K_DBG_WMI, "wow wakeup host reason %s\n",
4649 wow_reason(ev.wake_reason));
4650 }
4651
ath10k_wmi_event_dcs_interference(struct ath10k * ar,struct sk_buff * skb)4652 void ath10k_wmi_event_dcs_interference(struct ath10k *ar, struct sk_buff *skb)
4653 {
4654 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_DCS_INTERFERENCE_EVENTID\n");
4655 }
4656
ath10k_tpc_config_get_rate(struct ath10k * ar,struct wmi_pdev_tpc_config_event * ev,u32 rate_idx,u32 num_chains,u32 rate_code,u8 type)4657 static u8 ath10k_tpc_config_get_rate(struct ath10k *ar,
4658 struct wmi_pdev_tpc_config_event *ev,
4659 u32 rate_idx, u32 num_chains,
4660 u32 rate_code, u8 type)
4661 {
4662 u8 tpc, num_streams, preamble, ch, stm_idx;
4663
4664 num_streams = ATH10K_HW_NSS(rate_code);
4665 preamble = ATH10K_HW_PREAMBLE(rate_code);
4666 ch = num_chains - 1;
4667
4668 tpc = min_t(u8, ev->rates_array[rate_idx], ev->max_reg_allow_pow[ch]);
4669
4670 if (__le32_to_cpu(ev->num_tx_chain) <= 1)
4671 goto out;
4672
4673 if (preamble == WMI_RATE_PREAMBLE_CCK)
4674 goto out;
4675
4676 stm_idx = num_streams - 1;
4677 if (num_chains <= num_streams)
4678 goto out;
4679
4680 switch (type) {
4681 case WMI_TPC_TABLE_TYPE_STBC:
4682 tpc = min_t(u8, tpc,
4683 ev->max_reg_allow_pow_agstbc[ch - 1][stm_idx]);
4684 break;
4685 case WMI_TPC_TABLE_TYPE_TXBF:
4686 tpc = min_t(u8, tpc,
4687 ev->max_reg_allow_pow_agtxbf[ch - 1][stm_idx]);
4688 break;
4689 case WMI_TPC_TABLE_TYPE_CDD:
4690 tpc = min_t(u8, tpc,
4691 ev->max_reg_allow_pow_agcdd[ch - 1][stm_idx]);
4692 break;
4693 default:
4694 ath10k_warn(ar, "unknown wmi tpc table type: %d\n", type);
4695 tpc = 0;
4696 break;
4697 }
4698
4699 out:
4700 return tpc;
4701 }
4702
ath10k_tpc_config_disp_tables(struct ath10k * ar,struct wmi_pdev_tpc_config_event * ev,struct ath10k_tpc_stats * tpc_stats,u8 * rate_code,u16 * pream_table,u8 type)4703 static void ath10k_tpc_config_disp_tables(struct ath10k *ar,
4704 struct wmi_pdev_tpc_config_event *ev,
4705 struct ath10k_tpc_stats *tpc_stats,
4706 u8 *rate_code, u16 *pream_table, u8 type)
4707 {
4708 u32 i, j, pream_idx, flags;
4709 u8 tpc[WMI_TPC_TX_N_CHAIN];
4710 char tpc_value[WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];
4711 char buff[WMI_TPC_BUF_SIZE];
4712
4713 flags = __le32_to_cpu(ev->flags);
4714
4715 switch (type) {
4716 case WMI_TPC_TABLE_TYPE_CDD:
4717 if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_CDD)) {
4718 ath10k_dbg(ar, ATH10K_DBG_WMI, "CDD not supported\n");
4719 tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
4720 return;
4721 }
4722 break;
4723 case WMI_TPC_TABLE_TYPE_STBC:
4724 if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_STBC)) {
4725 ath10k_dbg(ar, ATH10K_DBG_WMI, "STBC not supported\n");
4726 tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
4727 return;
4728 }
4729 break;
4730 case WMI_TPC_TABLE_TYPE_TXBF:
4731 if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_TXBF)) {
4732 ath10k_dbg(ar, ATH10K_DBG_WMI, "TXBF not supported\n");
4733 tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
4734 return;
4735 }
4736 break;
4737 default:
4738 ath10k_dbg(ar, ATH10K_DBG_WMI,
4739 "invalid table type in wmi tpc event: %d\n", type);
4740 return;
4741 }
4742
4743 pream_idx = 0;
4744 for (i = 0; i < tpc_stats->rate_max; i++) {
4745 memset(tpc_value, 0, sizeof(tpc_value));
4746 memset(buff, 0, sizeof(buff));
4747 if (i == pream_table[pream_idx])
4748 pream_idx++;
4749
4750 for (j = 0; j < tpc_stats->num_tx_chain; j++) {
4751 tpc[j] = ath10k_tpc_config_get_rate(ar, ev, i, j + 1,
4752 rate_code[i],
4753 type);
4754 snprintf(buff, sizeof(buff), "%8d ", tpc[j]);
4755 strlcat(tpc_value, buff, sizeof(tpc_value));
4756 }
4757 tpc_stats->tpc_table[type].pream_idx[i] = pream_idx;
4758 tpc_stats->tpc_table[type].rate_code[i] = rate_code[i];
4759 memcpy(tpc_stats->tpc_table[type].tpc_value[i],
4760 tpc_value, sizeof(tpc_value));
4761 }
4762 }
4763
ath10k_wmi_tpc_config_get_rate_code(u8 * rate_code,u16 * pream_table,u32 num_tx_chain)4764 void ath10k_wmi_tpc_config_get_rate_code(u8 *rate_code, u16 *pream_table,
4765 u32 num_tx_chain)
4766 {
4767 u32 i, j, pream_idx;
4768 u8 rate_idx;
4769
4770 /* Create the rate code table based on the chains supported */
4771 rate_idx = 0;
4772 pream_idx = 0;
4773
4774 /* Fill CCK rate code */
4775 for (i = 0; i < 4; i++) {
4776 rate_code[rate_idx] =
4777 ATH10K_HW_RATECODE(i, 0, WMI_RATE_PREAMBLE_CCK);
4778 rate_idx++;
4779 }
4780 pream_table[pream_idx] = rate_idx;
4781 pream_idx++;
4782
4783 /* Fill OFDM rate code */
4784 for (i = 0; i < 8; i++) {
4785 rate_code[rate_idx] =
4786 ATH10K_HW_RATECODE(i, 0, WMI_RATE_PREAMBLE_OFDM);
4787 rate_idx++;
4788 }
4789 pream_table[pream_idx] = rate_idx;
4790 pream_idx++;
4791
4792 /* Fill HT20 rate code */
4793 for (i = 0; i < num_tx_chain; i++) {
4794 for (j = 0; j < 8; j++) {
4795 rate_code[rate_idx] =
4796 ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_HT);
4797 rate_idx++;
4798 }
4799 }
4800 pream_table[pream_idx] = rate_idx;
4801 pream_idx++;
4802
4803 /* Fill HT40 rate code */
4804 for (i = 0; i < num_tx_chain; i++) {
4805 for (j = 0; j < 8; j++) {
4806 rate_code[rate_idx] =
4807 ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_HT);
4808 rate_idx++;
4809 }
4810 }
4811 pream_table[pream_idx] = rate_idx;
4812 pream_idx++;
4813
4814 /* Fill VHT20 rate code */
4815 for (i = 0; i < num_tx_chain; i++) {
4816 for (j = 0; j < 10; j++) {
4817 rate_code[rate_idx] =
4818 ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
4819 rate_idx++;
4820 }
4821 }
4822 pream_table[pream_idx] = rate_idx;
4823 pream_idx++;
4824
4825 /* Fill VHT40 rate code */
4826 for (i = 0; i < num_tx_chain; i++) {
4827 for (j = 0; j < 10; j++) {
4828 rate_code[rate_idx] =
4829 ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
4830 rate_idx++;
4831 }
4832 }
4833 pream_table[pream_idx] = rate_idx;
4834 pream_idx++;
4835
4836 /* Fill VHT80 rate code */
4837 for (i = 0; i < num_tx_chain; i++) {
4838 for (j = 0; j < 10; j++) {
4839 rate_code[rate_idx] =
4840 ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
4841 rate_idx++;
4842 }
4843 }
4844 pream_table[pream_idx] = rate_idx;
4845 pream_idx++;
4846
4847 rate_code[rate_idx++] =
4848 ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_CCK);
4849 rate_code[rate_idx++] =
4850 ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
4851 rate_code[rate_idx++] =
4852 ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_CCK);
4853 rate_code[rate_idx++] =
4854 ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
4855 rate_code[rate_idx++] =
4856 ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
4857
4858 pream_table[pream_idx] = ATH10K_TPC_PREAM_TABLE_END;
4859 }
4860
ath10k_wmi_event_pdev_tpc_config(struct ath10k * ar,struct sk_buff * skb)4861 void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar, struct sk_buff *skb)
4862 {
4863 u32 num_tx_chain, rate_max;
4864 u8 rate_code[WMI_TPC_RATE_MAX];
4865 u16 pream_table[WMI_TPC_PREAM_TABLE_MAX];
4866 struct wmi_pdev_tpc_config_event *ev;
4867 struct ath10k_tpc_stats *tpc_stats;
4868
4869 ev = (struct wmi_pdev_tpc_config_event *)skb->data;
4870
4871 num_tx_chain = __le32_to_cpu(ev->num_tx_chain);
4872
4873 if (num_tx_chain > WMI_TPC_TX_N_CHAIN) {
4874 ath10k_warn(ar, "number of tx chain is %d greater than TPC configured tx chain %d\n",
4875 num_tx_chain, WMI_TPC_TX_N_CHAIN);
4876 return;
4877 }
4878
4879 rate_max = __le32_to_cpu(ev->rate_max);
4880 if (rate_max > WMI_TPC_RATE_MAX) {
4881 ath10k_warn(ar, "number of rate is %d greater than TPC configured rate %d\n",
4882 rate_max, WMI_TPC_RATE_MAX);
4883 rate_max = WMI_TPC_RATE_MAX;
4884 }
4885
4886 tpc_stats = kzalloc(sizeof(*tpc_stats), GFP_ATOMIC);
4887 if (!tpc_stats)
4888 return;
4889
4890 ath10k_wmi_tpc_config_get_rate_code(rate_code, pream_table,
4891 num_tx_chain);
4892
4893 tpc_stats->chan_freq = __le32_to_cpu(ev->chan_freq);
4894 tpc_stats->phy_mode = __le32_to_cpu(ev->phy_mode);
4895 tpc_stats->ctl = __le32_to_cpu(ev->ctl);
4896 tpc_stats->reg_domain = __le32_to_cpu(ev->reg_domain);
4897 tpc_stats->twice_antenna_gain = a_sle32_to_cpu(ev->twice_antenna_gain);
4898 tpc_stats->twice_antenna_reduction =
4899 __le32_to_cpu(ev->twice_antenna_reduction);
4900 tpc_stats->power_limit = __le32_to_cpu(ev->power_limit);
4901 tpc_stats->twice_max_rd_power = __le32_to_cpu(ev->twice_max_rd_power);
4902 tpc_stats->num_tx_chain = num_tx_chain;
4903 tpc_stats->rate_max = rate_max;
4904
4905 ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
4906 rate_code, pream_table,
4907 WMI_TPC_TABLE_TYPE_CDD);
4908 ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
4909 rate_code, pream_table,
4910 WMI_TPC_TABLE_TYPE_STBC);
4911 ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
4912 rate_code, pream_table,
4913 WMI_TPC_TABLE_TYPE_TXBF);
4914
4915 ath10k_debug_tpc_stats_process(ar, tpc_stats);
4916
4917 ath10k_dbg(ar, ATH10K_DBG_WMI,
4918 "wmi event tpc config channel %d mode %d ctl %d regd %d gain %d %d limit %d max_power %d tx_chanins %d rates %d\n",
4919 __le32_to_cpu(ev->chan_freq),
4920 __le32_to_cpu(ev->phy_mode),
4921 __le32_to_cpu(ev->ctl),
4922 __le32_to_cpu(ev->reg_domain),
4923 a_sle32_to_cpu(ev->twice_antenna_gain),
4924 __le32_to_cpu(ev->twice_antenna_reduction),
4925 __le32_to_cpu(ev->power_limit),
4926 __le32_to_cpu(ev->twice_max_rd_power) / 2,
4927 __le32_to_cpu(ev->num_tx_chain),
4928 __le32_to_cpu(ev->rate_max));
4929 }
4930
4931 static u8
ath10k_wmi_tpc_final_get_rate(struct ath10k * ar,struct wmi_pdev_tpc_final_table_event * ev,u32 rate_idx,u32 num_chains,u32 rate_code,u8 type,u32 pream_idx)4932 ath10k_wmi_tpc_final_get_rate(struct ath10k *ar,
4933 struct wmi_pdev_tpc_final_table_event *ev,
4934 u32 rate_idx, u32 num_chains,
4935 u32 rate_code, u8 type, u32 pream_idx)
4936 {
4937 u8 tpc, num_streams, preamble, ch, stm_idx;
4938 s8 pow_agcdd, pow_agstbc, pow_agtxbf;
4939 int pream;
4940
4941 num_streams = ATH10K_HW_NSS(rate_code);
4942 preamble = ATH10K_HW_PREAMBLE(rate_code);
4943 ch = num_chains - 1;
4944 stm_idx = num_streams - 1;
4945 pream = -1;
4946
4947 if (__le32_to_cpu(ev->chan_freq) <= 2483) {
4948 switch (pream_idx) {
4949 case WMI_TPC_PREAM_2GHZ_CCK:
4950 pream = 0;
4951 break;
4952 case WMI_TPC_PREAM_2GHZ_OFDM:
4953 pream = 1;
4954 break;
4955 case WMI_TPC_PREAM_2GHZ_HT20:
4956 case WMI_TPC_PREAM_2GHZ_VHT20:
4957 pream = 2;
4958 break;
4959 case WMI_TPC_PREAM_2GHZ_HT40:
4960 case WMI_TPC_PREAM_2GHZ_VHT40:
4961 pream = 3;
4962 break;
4963 case WMI_TPC_PREAM_2GHZ_VHT80:
4964 pream = 4;
4965 break;
4966 default:
4967 pream = -1;
4968 break;
4969 }
4970 }
4971
4972 if (__le32_to_cpu(ev->chan_freq) >= 5180) {
4973 switch (pream_idx) {
4974 case WMI_TPC_PREAM_5GHZ_OFDM:
4975 pream = 0;
4976 break;
4977 case WMI_TPC_PREAM_5GHZ_HT20:
4978 case WMI_TPC_PREAM_5GHZ_VHT20:
4979 pream = 1;
4980 break;
4981 case WMI_TPC_PREAM_5GHZ_HT40:
4982 case WMI_TPC_PREAM_5GHZ_VHT40:
4983 pream = 2;
4984 break;
4985 case WMI_TPC_PREAM_5GHZ_VHT80:
4986 pream = 3;
4987 break;
4988 case WMI_TPC_PREAM_5GHZ_HTCUP:
4989 pream = 4;
4990 break;
4991 default:
4992 pream = -1;
4993 break;
4994 }
4995 }
4996
4997 if (pream == -1) {
4998 ath10k_warn(ar, "unknown wmi tpc final index and frequency: %u, %u\n",
4999 pream_idx, __le32_to_cpu(ev->chan_freq));
5000 tpc = 0;
5001 goto out;
5002 }
5003
5004 if (pream == 4)
5005 tpc = min_t(u8, ev->rates_array[rate_idx],
5006 ev->max_reg_allow_pow[ch]);
5007 else
5008 tpc = min_t(u8, min_t(u8, ev->rates_array[rate_idx],
5009 ev->max_reg_allow_pow[ch]),
5010 ev->ctl_power_table[0][pream][stm_idx]);
5011
5012 if (__le32_to_cpu(ev->num_tx_chain) <= 1)
5013 goto out;
5014
5015 if (preamble == WMI_RATE_PREAMBLE_CCK)
5016 goto out;
5017
5018 if (num_chains <= num_streams)
5019 goto out;
5020
5021 switch (type) {
5022 case WMI_TPC_TABLE_TYPE_STBC:
5023 pow_agstbc = ev->max_reg_allow_pow_agstbc[ch - 1][stm_idx];
5024 if (pream == 4)
5025 tpc = min_t(u8, tpc, pow_agstbc);
5026 else
5027 tpc = min_t(u8, min_t(u8, tpc, pow_agstbc),
5028 ev->ctl_power_table[0][pream][stm_idx]);
5029 break;
5030 case WMI_TPC_TABLE_TYPE_TXBF:
5031 pow_agtxbf = ev->max_reg_allow_pow_agtxbf[ch - 1][stm_idx];
5032 if (pream == 4)
5033 tpc = min_t(u8, tpc, pow_agtxbf);
5034 else
5035 tpc = min_t(u8, min_t(u8, tpc, pow_agtxbf),
5036 ev->ctl_power_table[1][pream][stm_idx]);
5037 break;
5038 case WMI_TPC_TABLE_TYPE_CDD:
5039 pow_agcdd = ev->max_reg_allow_pow_agcdd[ch - 1][stm_idx];
5040 if (pream == 4)
5041 tpc = min_t(u8, tpc, pow_agcdd);
5042 else
5043 tpc = min_t(u8, min_t(u8, tpc, pow_agcdd),
5044 ev->ctl_power_table[0][pream][stm_idx]);
5045 break;
5046 default:
5047 ath10k_warn(ar, "unknown wmi tpc final table type: %d\n", type);
5048 tpc = 0;
5049 break;
5050 }
5051
5052 out:
5053 return tpc;
5054 }
5055
5056 static void
ath10k_wmi_tpc_stats_final_disp_tables(struct ath10k * ar,struct wmi_pdev_tpc_final_table_event * ev,struct ath10k_tpc_stats_final * tpc_stats,u8 * rate_code,u16 * pream_table,u8 type)5057 ath10k_wmi_tpc_stats_final_disp_tables(struct ath10k *ar,
5058 struct wmi_pdev_tpc_final_table_event *ev,
5059 struct ath10k_tpc_stats_final *tpc_stats,
5060 u8 *rate_code, u16 *pream_table, u8 type)
5061 {
5062 u32 i, j, pream_idx, flags;
5063 u8 tpc[WMI_TPC_TX_N_CHAIN];
5064 char tpc_value[WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];
5065 char buff[WMI_TPC_BUF_SIZE];
5066
5067 flags = __le32_to_cpu(ev->flags);
5068
5069 switch (type) {
5070 case WMI_TPC_TABLE_TYPE_CDD:
5071 if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_CDD)) {
5072 ath10k_dbg(ar, ATH10K_DBG_WMI, "CDD not supported\n");
5073 tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
5074 return;
5075 }
5076 break;
5077 case WMI_TPC_TABLE_TYPE_STBC:
5078 if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_STBC)) {
5079 ath10k_dbg(ar, ATH10K_DBG_WMI, "STBC not supported\n");
5080 tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
5081 return;
5082 }
5083 break;
5084 case WMI_TPC_TABLE_TYPE_TXBF:
5085 if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_TXBF)) {
5086 ath10k_dbg(ar, ATH10K_DBG_WMI, "TXBF not supported\n");
5087 tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
5088 return;
5089 }
5090 break;
5091 default:
5092 ath10k_dbg(ar, ATH10K_DBG_WMI,
5093 "invalid table type in wmi tpc event: %d\n", type);
5094 return;
5095 }
5096
5097 pream_idx = 0;
5098 for (i = 0; i < tpc_stats->rate_max; i++) {
5099 memset(tpc_value, 0, sizeof(tpc_value));
5100 memset(buff, 0, sizeof(buff));
5101 if (i == pream_table[pream_idx])
5102 pream_idx++;
5103
5104 for (j = 0; j < tpc_stats->num_tx_chain; j++) {
5105 tpc[j] = ath10k_wmi_tpc_final_get_rate(ar, ev, i, j + 1,
5106 rate_code[i],
5107 type, pream_idx);
5108 snprintf(buff, sizeof(buff), "%8d ", tpc[j]);
5109 strlcat(tpc_value, buff, sizeof(tpc_value));
5110 }
5111 tpc_stats->tpc_table_final[type].pream_idx[i] = pream_idx;
5112 tpc_stats->tpc_table_final[type].rate_code[i] = rate_code[i];
5113 memcpy(tpc_stats->tpc_table_final[type].tpc_value[i],
5114 tpc_value, sizeof(tpc_value));
5115 }
5116 }
5117
ath10k_wmi_event_tpc_final_table(struct ath10k * ar,struct sk_buff * skb)5118 void ath10k_wmi_event_tpc_final_table(struct ath10k *ar, struct sk_buff *skb)
5119 {
5120 u32 num_tx_chain, rate_max;
5121 u8 rate_code[WMI_TPC_FINAL_RATE_MAX];
5122 u16 pream_table[WMI_TPC_PREAM_TABLE_MAX];
5123 struct wmi_pdev_tpc_final_table_event *ev;
5124 struct ath10k_tpc_stats_final *tpc_stats;
5125
5126 ev = (struct wmi_pdev_tpc_final_table_event *)skb->data;
5127
5128 num_tx_chain = __le32_to_cpu(ev->num_tx_chain);
5129 if (num_tx_chain > WMI_TPC_TX_N_CHAIN) {
5130 ath10k_warn(ar, "number of tx chain is %d greater than TPC final configured tx chain %d\n",
5131 num_tx_chain, WMI_TPC_TX_N_CHAIN);
5132 return;
5133 }
5134
5135 rate_max = __le32_to_cpu(ev->rate_max);
5136 if (rate_max > WMI_TPC_FINAL_RATE_MAX) {
5137 ath10k_warn(ar, "number of rate is %d greater than TPC final configured rate %d\n",
5138 rate_max, WMI_TPC_FINAL_RATE_MAX);
5139 rate_max = WMI_TPC_FINAL_RATE_MAX;
5140 }
5141
5142 tpc_stats = kzalloc(sizeof(*tpc_stats), GFP_ATOMIC);
5143 if (!tpc_stats)
5144 return;
5145
5146 ath10k_wmi_tpc_config_get_rate_code(rate_code, pream_table,
5147 num_tx_chain);
5148
5149 tpc_stats->chan_freq = __le32_to_cpu(ev->chan_freq);
5150 tpc_stats->phy_mode = __le32_to_cpu(ev->phy_mode);
5151 tpc_stats->ctl = __le32_to_cpu(ev->ctl);
5152 tpc_stats->reg_domain = __le32_to_cpu(ev->reg_domain);
5153 tpc_stats->twice_antenna_gain = a_sle32_to_cpu(ev->twice_antenna_gain);
5154 tpc_stats->twice_antenna_reduction =
5155 __le32_to_cpu(ev->twice_antenna_reduction);
5156 tpc_stats->power_limit = __le32_to_cpu(ev->power_limit);
5157 tpc_stats->twice_max_rd_power = __le32_to_cpu(ev->twice_max_rd_power);
5158 tpc_stats->num_tx_chain = num_tx_chain;
5159 tpc_stats->rate_max = rate_max;
5160
5161 ath10k_wmi_tpc_stats_final_disp_tables(ar, ev, tpc_stats,
5162 rate_code, pream_table,
5163 WMI_TPC_TABLE_TYPE_CDD);
5164 ath10k_wmi_tpc_stats_final_disp_tables(ar, ev, tpc_stats,
5165 rate_code, pream_table,
5166 WMI_TPC_TABLE_TYPE_STBC);
5167 ath10k_wmi_tpc_stats_final_disp_tables(ar, ev, tpc_stats,
5168 rate_code, pream_table,
5169 WMI_TPC_TABLE_TYPE_TXBF);
5170
5171 ath10k_debug_tpc_stats_final_process(ar, tpc_stats);
5172
5173 ath10k_dbg(ar, ATH10K_DBG_WMI,
5174 "wmi event tpc final table channel %d mode %d ctl %d regd %d gain %d %d limit %d max_power %d tx_chanins %d rates %d\n",
5175 __le32_to_cpu(ev->chan_freq),
5176 __le32_to_cpu(ev->phy_mode),
5177 __le32_to_cpu(ev->ctl),
5178 __le32_to_cpu(ev->reg_domain),
5179 a_sle32_to_cpu(ev->twice_antenna_gain),
5180 __le32_to_cpu(ev->twice_antenna_reduction),
5181 __le32_to_cpu(ev->power_limit),
5182 __le32_to_cpu(ev->twice_max_rd_power) / 2,
5183 __le32_to_cpu(ev->num_tx_chain),
5184 __le32_to_cpu(ev->rate_max));
5185 }
5186
5187 static void
ath10k_wmi_handle_tdls_peer_event(struct ath10k * ar,struct sk_buff * skb)5188 ath10k_wmi_handle_tdls_peer_event(struct ath10k *ar, struct sk_buff *skb)
5189 {
5190 struct wmi_tdls_peer_event *ev;
5191 struct ath10k_peer *peer;
5192 struct ath10k_vif *arvif;
5193 int vdev_id;
5194 int peer_status;
5195 int peer_reason;
5196 u8 reason;
5197
5198 if (skb->len < sizeof(*ev)) {
5199 ath10k_err(ar, "received tdls peer event with invalid size (%d bytes)\n",
5200 skb->len);
5201 return;
5202 }
5203
5204 ev = (struct wmi_tdls_peer_event *)skb->data;
5205 vdev_id = __le32_to_cpu(ev->vdev_id);
5206 peer_status = __le32_to_cpu(ev->peer_status);
5207 peer_reason = __le32_to_cpu(ev->peer_reason);
5208
5209 spin_lock_bh(&ar->data_lock);
5210 peer = ath10k_peer_find(ar, vdev_id, ev->peer_macaddr.addr);
5211 spin_unlock_bh(&ar->data_lock);
5212
5213 if (!peer) {
5214 ath10k_warn(ar, "failed to find peer entry for %pM\n",
5215 ev->peer_macaddr.addr);
5216 return;
5217 }
5218
5219 switch (peer_status) {
5220 case WMI_TDLS_SHOULD_TEARDOWN:
5221 switch (peer_reason) {
5222 case WMI_TDLS_TEARDOWN_REASON_PTR_TIMEOUT:
5223 case WMI_TDLS_TEARDOWN_REASON_NO_RESPONSE:
5224 case WMI_TDLS_TEARDOWN_REASON_RSSI:
5225 reason = WLAN_REASON_TDLS_TEARDOWN_UNREACHABLE;
5226 break;
5227 default:
5228 reason = WLAN_REASON_TDLS_TEARDOWN_UNSPECIFIED;
5229 break;
5230 }
5231
5232 arvif = ath10k_get_arvif(ar, vdev_id);
5233 if (!arvif) {
5234 ath10k_warn(ar, "received tdls peer event for invalid vdev id %u\n",
5235 vdev_id);
5236 return;
5237 }
5238
5239 ieee80211_tdls_oper_request(arvif->vif, ev->peer_macaddr.addr,
5240 NL80211_TDLS_TEARDOWN, reason,
5241 GFP_ATOMIC);
5242
5243 ath10k_dbg(ar, ATH10K_DBG_WMI,
5244 "received tdls teardown event for peer %pM reason %u\n",
5245 ev->peer_macaddr.addr, peer_reason);
5246 break;
5247 default:
5248 ath10k_dbg(ar, ATH10K_DBG_WMI,
5249 "received unknown tdls peer event %u\n",
5250 peer_status);
5251 break;
5252 }
5253 }
5254
5255 static void
ath10k_wmi_event_peer_sta_ps_state_chg(struct ath10k * ar,struct sk_buff * skb)5256 ath10k_wmi_event_peer_sta_ps_state_chg(struct ath10k *ar, struct sk_buff *skb)
5257 {
5258 struct wmi_peer_sta_ps_state_chg_event *ev;
5259 struct ieee80211_sta *sta;
5260 struct ath10k_sta *arsta;
5261 u8 peer_addr[ETH_ALEN];
5262
5263 lockdep_assert_held(&ar->data_lock);
5264
5265 ev = (struct wmi_peer_sta_ps_state_chg_event *)skb->data;
5266 ether_addr_copy(peer_addr, ev->peer_macaddr.addr);
5267
5268 rcu_read_lock();
5269
5270 sta = ieee80211_find_sta_by_ifaddr(ar->hw, peer_addr, NULL);
5271
5272 if (!sta) {
5273 ath10k_warn(ar, "failed to find station entry %pM\n",
5274 peer_addr);
5275 goto exit;
5276 }
5277
5278 arsta = (struct ath10k_sta *)sta->drv_priv;
5279 arsta->peer_ps_state = __le32_to_cpu(ev->peer_ps_state);
5280
5281 exit:
5282 rcu_read_unlock();
5283 }
5284
ath10k_wmi_event_pdev_ftm_intg(struct ath10k * ar,struct sk_buff * skb)5285 void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar, struct sk_buff *skb)
5286 {
5287 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_FTM_INTG_EVENTID\n");
5288 }
5289
ath10k_wmi_event_gtk_offload_status(struct ath10k * ar,struct sk_buff * skb)5290 void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar, struct sk_buff *skb)
5291 {
5292 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_OFFLOAD_STATUS_EVENTID\n");
5293 }
5294
ath10k_wmi_event_gtk_rekey_fail(struct ath10k * ar,struct sk_buff * skb)5295 void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar, struct sk_buff *skb)
5296 {
5297 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_REKEY_FAIL_EVENTID\n");
5298 }
5299
ath10k_wmi_event_delba_complete(struct ath10k * ar,struct sk_buff * skb)5300 void ath10k_wmi_event_delba_complete(struct ath10k *ar, struct sk_buff *skb)
5301 {
5302 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_DELBA_COMPLETE_EVENTID\n");
5303 }
5304
ath10k_wmi_event_addba_complete(struct ath10k * ar,struct sk_buff * skb)5305 void ath10k_wmi_event_addba_complete(struct ath10k *ar, struct sk_buff *skb)
5306 {
5307 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_ADDBA_COMPLETE_EVENTID\n");
5308 }
5309
ath10k_wmi_event_vdev_install_key_complete(struct ath10k * ar,struct sk_buff * skb)5310 void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar,
5311 struct sk_buff *skb)
5312 {
5313 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID\n");
5314 }
5315
ath10k_wmi_event_inst_rssi_stats(struct ath10k * ar,struct sk_buff * skb)5316 void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar, struct sk_buff *skb)
5317 {
5318 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_INST_RSSI_STATS_EVENTID\n");
5319 }
5320
ath10k_wmi_event_vdev_standby_req(struct ath10k * ar,struct sk_buff * skb)5321 void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar, struct sk_buff *skb)
5322 {
5323 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STANDBY_REQ_EVENTID\n");
5324 }
5325
ath10k_wmi_event_vdev_resume_req(struct ath10k * ar,struct sk_buff * skb)5326 void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar, struct sk_buff *skb)
5327 {
5328 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_RESUME_REQ_EVENTID\n");
5329 }
5330
ath10k_wmi_alloc_chunk(struct ath10k * ar,u32 req_id,u32 num_units,u32 unit_len)5331 static int ath10k_wmi_alloc_chunk(struct ath10k *ar, u32 req_id,
5332 u32 num_units, u32 unit_len)
5333 {
5334 dma_addr_t paddr;
5335 u32 pool_size;
5336 int idx = ar->wmi.num_mem_chunks;
5337 void *vaddr;
5338
5339 pool_size = num_units * round_up(unit_len, 4);
5340 vaddr = dma_alloc_coherent(ar->dev, pool_size, &paddr, GFP_KERNEL);
5341
5342 if (!vaddr)
5343 return -ENOMEM;
5344
5345 ar->wmi.mem_chunks[idx].vaddr = vaddr;
5346 ar->wmi.mem_chunks[idx].paddr = paddr;
5347 ar->wmi.mem_chunks[idx].len = pool_size;
5348 ar->wmi.mem_chunks[idx].req_id = req_id;
5349 ar->wmi.num_mem_chunks++;
5350
5351 return num_units;
5352 }
5353
ath10k_wmi_alloc_host_mem(struct ath10k * ar,u32 req_id,u32 num_units,u32 unit_len)5354 static int ath10k_wmi_alloc_host_mem(struct ath10k *ar, u32 req_id,
5355 u32 num_units, u32 unit_len)
5356 {
5357 int ret;
5358
5359 while (num_units) {
5360 ret = ath10k_wmi_alloc_chunk(ar, req_id, num_units, unit_len);
5361 if (ret < 0)
5362 return ret;
5363
5364 num_units -= ret;
5365 }
5366
5367 return 0;
5368 }
5369
5370 static bool
ath10k_wmi_is_host_mem_allocated(struct ath10k * ar,const struct wlan_host_mem_req ** mem_reqs,u32 num_mem_reqs)5371 ath10k_wmi_is_host_mem_allocated(struct ath10k *ar,
5372 const struct wlan_host_mem_req **mem_reqs,
5373 u32 num_mem_reqs)
5374 {
5375 u32 req_id, num_units, unit_size, num_unit_info;
5376 u32 pool_size;
5377 int i, j;
5378 bool found;
5379
5380 if (ar->wmi.num_mem_chunks != num_mem_reqs)
5381 return false;
5382
5383 for (i = 0; i < num_mem_reqs; ++i) {
5384 req_id = __le32_to_cpu(mem_reqs[i]->req_id);
5385 num_units = __le32_to_cpu(mem_reqs[i]->num_units);
5386 unit_size = __le32_to_cpu(mem_reqs[i]->unit_size);
5387 num_unit_info = __le32_to_cpu(mem_reqs[i]->num_unit_info);
5388
5389 if (num_unit_info & NUM_UNITS_IS_NUM_ACTIVE_PEERS) {
5390 if (ar->num_active_peers)
5391 num_units = ar->num_active_peers + 1;
5392 else
5393 num_units = ar->max_num_peers + 1;
5394 } else if (num_unit_info & NUM_UNITS_IS_NUM_PEERS) {
5395 num_units = ar->max_num_peers + 1;
5396 } else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS) {
5397 num_units = ar->max_num_vdevs + 1;
5398 }
5399
5400 found = false;
5401 for (j = 0; j < ar->wmi.num_mem_chunks; j++) {
5402 if (ar->wmi.mem_chunks[j].req_id == req_id) {
5403 pool_size = num_units * round_up(unit_size, 4);
5404 if (ar->wmi.mem_chunks[j].len == pool_size) {
5405 found = true;
5406 break;
5407 }
5408 }
5409 }
5410 if (!found)
5411 return false;
5412 }
5413
5414 return true;
5415 }
5416
5417 static int
ath10k_wmi_main_op_pull_svc_rdy_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_svc_rdy_ev_arg * arg)5418 ath10k_wmi_main_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
5419 struct wmi_svc_rdy_ev_arg *arg)
5420 {
5421 struct wmi_service_ready_event *ev;
5422 size_t i, n;
5423
5424 if (skb->len < sizeof(*ev))
5425 return -EPROTO;
5426
5427 ev = (void *)skb->data;
5428 skb_pull(skb, sizeof(*ev));
5429 arg->min_tx_power = ev->hw_min_tx_power;
5430 arg->max_tx_power = ev->hw_max_tx_power;
5431 arg->ht_cap = ev->ht_cap_info;
5432 arg->vht_cap = ev->vht_cap_info;
5433 arg->vht_supp_mcs = ev->vht_supp_mcs;
5434 arg->sw_ver0 = ev->sw_version;
5435 arg->sw_ver1 = ev->sw_version_1;
5436 arg->phy_capab = ev->phy_capability;
5437 arg->num_rf_chains = ev->num_rf_chains;
5438 arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd;
5439 arg->low_2ghz_chan = ev->hal_reg_capabilities.low_2ghz_chan;
5440 arg->high_2ghz_chan = ev->hal_reg_capabilities.high_2ghz_chan;
5441 arg->low_5ghz_chan = ev->hal_reg_capabilities.low_5ghz_chan;
5442 arg->high_5ghz_chan = ev->hal_reg_capabilities.high_5ghz_chan;
5443 arg->num_mem_reqs = ev->num_mem_reqs;
5444 arg->service_map = ev->wmi_service_bitmap;
5445 arg->service_map_len = sizeof(ev->wmi_service_bitmap);
5446
5447 n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs),
5448 ARRAY_SIZE(arg->mem_reqs));
5449 for (i = 0; i < n; i++)
5450 arg->mem_reqs[i] = &ev->mem_reqs[i];
5451
5452 if (skb->len <
5453 __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0]))
5454 return -EPROTO;
5455
5456 return 0;
5457 }
5458
5459 static int
ath10k_wmi_10x_op_pull_svc_rdy_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_svc_rdy_ev_arg * arg)5460 ath10k_wmi_10x_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
5461 struct wmi_svc_rdy_ev_arg *arg)
5462 {
5463 struct wmi_10x_service_ready_event *ev;
5464 int i, n;
5465
5466 if (skb->len < sizeof(*ev))
5467 return -EPROTO;
5468
5469 ev = (void *)skb->data;
5470 skb_pull(skb, sizeof(*ev));
5471 arg->min_tx_power = ev->hw_min_tx_power;
5472 arg->max_tx_power = ev->hw_max_tx_power;
5473 arg->ht_cap = ev->ht_cap_info;
5474 arg->vht_cap = ev->vht_cap_info;
5475 arg->vht_supp_mcs = ev->vht_supp_mcs;
5476 arg->sw_ver0 = ev->sw_version;
5477 arg->phy_capab = ev->phy_capability;
5478 arg->num_rf_chains = ev->num_rf_chains;
5479 arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd;
5480 arg->low_2ghz_chan = ev->hal_reg_capabilities.low_2ghz_chan;
5481 arg->high_2ghz_chan = ev->hal_reg_capabilities.high_2ghz_chan;
5482 arg->low_5ghz_chan = ev->hal_reg_capabilities.low_5ghz_chan;
5483 arg->high_5ghz_chan = ev->hal_reg_capabilities.high_5ghz_chan;
5484 arg->num_mem_reqs = ev->num_mem_reqs;
5485 arg->service_map = ev->wmi_service_bitmap;
5486 arg->service_map_len = sizeof(ev->wmi_service_bitmap);
5487
5488 /* Deliberately skipping ev->sys_cap_info as WMI and WMI-TLV have
5489 * different values. We would need a translation to handle that,
5490 * but as we don't currently need anything from sys_cap_info from
5491 * WMI interface (only from WMI-TLV) safest it to skip it.
5492 */
5493
5494 n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs),
5495 ARRAY_SIZE(arg->mem_reqs));
5496 for (i = 0; i < n; i++)
5497 arg->mem_reqs[i] = &ev->mem_reqs[i];
5498
5499 if (skb->len <
5500 __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0]))
5501 return -EPROTO;
5502
5503 return 0;
5504 }
5505
ath10k_wmi_event_service_ready_work(struct work_struct * work)5506 static void ath10k_wmi_event_service_ready_work(struct work_struct *work)
5507 {
5508 struct ath10k *ar = container_of(work, struct ath10k, svc_rdy_work);
5509 struct sk_buff *skb = ar->svc_rdy_skb;
5510 struct wmi_svc_rdy_ev_arg arg = {};
5511 u32 num_units, req_id, unit_size, num_mem_reqs, num_unit_info, i;
5512 int ret;
5513 bool allocated;
5514
5515 if (!skb) {
5516 ath10k_warn(ar, "invalid service ready event skb\n");
5517 return;
5518 }
5519
5520 ret = ath10k_wmi_pull_svc_rdy(ar, skb, &arg);
5521 if (ret) {
5522 ath10k_warn(ar, "failed to parse service ready: %d\n", ret);
5523 return;
5524 }
5525
5526 ath10k_wmi_map_svc(ar, arg.service_map, ar->wmi.svc_map,
5527 arg.service_map_len);
5528
5529 ar->hw_min_tx_power = __le32_to_cpu(arg.min_tx_power);
5530 ar->hw_max_tx_power = __le32_to_cpu(arg.max_tx_power);
5531 ar->ht_cap_info = __le32_to_cpu(arg.ht_cap);
5532 ar->vht_cap_info = __le32_to_cpu(arg.vht_cap);
5533 ar->vht_supp_mcs = __le32_to_cpu(arg.vht_supp_mcs);
5534 ar->fw_version_major =
5535 (__le32_to_cpu(arg.sw_ver0) & 0xff000000) >> 24;
5536 ar->fw_version_minor = (__le32_to_cpu(arg.sw_ver0) & 0x00ffffff);
5537 ar->fw_version_release =
5538 (__le32_to_cpu(arg.sw_ver1) & 0xffff0000) >> 16;
5539 ar->fw_version_build = (__le32_to_cpu(arg.sw_ver1) & 0x0000ffff);
5540 ar->phy_capability = __le32_to_cpu(arg.phy_capab);
5541 ar->num_rf_chains = __le32_to_cpu(arg.num_rf_chains);
5542 ar->hw_eeprom_rd = __le32_to_cpu(arg.eeprom_rd);
5543 ar->low_2ghz_chan = __le32_to_cpu(arg.low_2ghz_chan);
5544 ar->high_2ghz_chan = __le32_to_cpu(arg.high_2ghz_chan);
5545 ar->low_5ghz_chan = __le32_to_cpu(arg.low_5ghz_chan);
5546 ar->high_5ghz_chan = __le32_to_cpu(arg.high_5ghz_chan);
5547 ar->sys_cap_info = __le32_to_cpu(arg.sys_cap_info);
5548
5549 ath10k_dbg_dump(ar, ATH10K_DBG_WMI, NULL, "wmi svc: ",
5550 arg.service_map, arg.service_map_len);
5551 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi sys_cap_info 0x%x\n",
5552 ar->sys_cap_info);
5553
5554 if (ar->num_rf_chains > ar->max_spatial_stream) {
5555 ath10k_warn(ar, "hardware advertises support for more spatial streams than it should (%d > %d)\n",
5556 ar->num_rf_chains, ar->max_spatial_stream);
5557 ar->num_rf_chains = ar->max_spatial_stream;
5558 }
5559
5560 if (!ar->cfg_tx_chainmask) {
5561 ar->cfg_tx_chainmask = (1 << ar->num_rf_chains) - 1;
5562 ar->cfg_rx_chainmask = (1 << ar->num_rf_chains) - 1;
5563 }
5564
5565 if (strlen(ar->hw->wiphy->fw_version) == 0) {
5566 snprintf(ar->hw->wiphy->fw_version,
5567 sizeof(ar->hw->wiphy->fw_version),
5568 "%u.%u.%u.%u",
5569 ar->fw_version_major,
5570 ar->fw_version_minor,
5571 ar->fw_version_release,
5572 ar->fw_version_build);
5573 }
5574
5575 num_mem_reqs = __le32_to_cpu(arg.num_mem_reqs);
5576 if (num_mem_reqs > WMI_MAX_MEM_REQS) {
5577 ath10k_warn(ar, "requested memory chunks number (%d) exceeds the limit\n",
5578 num_mem_reqs);
5579 return;
5580 }
5581
5582 if (test_bit(WMI_SERVICE_PEER_CACHING, ar->wmi.svc_map)) {
5583 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL,
5584 ar->running_fw->fw_file.fw_features))
5585 ar->num_active_peers = TARGET_10_4_QCACHE_ACTIVE_PEERS_PFC +
5586 ar->max_num_vdevs;
5587 else
5588 ar->num_active_peers = TARGET_10_4_QCACHE_ACTIVE_PEERS +
5589 ar->max_num_vdevs;
5590
5591 ar->max_num_peers = TARGET_10_4_NUM_QCACHE_PEERS_MAX +
5592 ar->max_num_vdevs;
5593 ar->num_tids = ar->num_active_peers * 2;
5594 ar->max_num_stations = TARGET_10_4_NUM_QCACHE_PEERS_MAX;
5595 }
5596
5597 /* TODO: Adjust max peer count for cases like WMI_SERVICE_RATECTRL_CACHE
5598 * and WMI_SERVICE_IRAM_TIDS, etc.
5599 */
5600
5601 allocated = ath10k_wmi_is_host_mem_allocated(ar, arg.mem_reqs,
5602 num_mem_reqs);
5603 if (allocated)
5604 goto skip_mem_alloc;
5605
5606 /* Either this event is received during boot time or there is a change
5607 * in memory requirement from firmware when compared to last request.
5608 * Free any old memory and do a fresh allocation based on the current
5609 * memory requirement.
5610 */
5611 ath10k_wmi_free_host_mem(ar);
5612
5613 for (i = 0; i < num_mem_reqs; ++i) {
5614 req_id = __le32_to_cpu(arg.mem_reqs[i]->req_id);
5615 num_units = __le32_to_cpu(arg.mem_reqs[i]->num_units);
5616 unit_size = __le32_to_cpu(arg.mem_reqs[i]->unit_size);
5617 num_unit_info = __le32_to_cpu(arg.mem_reqs[i]->num_unit_info);
5618
5619 if (num_unit_info & NUM_UNITS_IS_NUM_ACTIVE_PEERS) {
5620 if (ar->num_active_peers)
5621 num_units = ar->num_active_peers + 1;
5622 else
5623 num_units = ar->max_num_peers + 1;
5624 } else if (num_unit_info & NUM_UNITS_IS_NUM_PEERS) {
5625 /* number of units to allocate is number of
5626 * peers, 1 extra for self peer on target
5627 * this needs to be tied, host and target
5628 * can get out of sync
5629 */
5630 num_units = ar->max_num_peers + 1;
5631 } else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS) {
5632 num_units = ar->max_num_vdevs + 1;
5633 }
5634
5635 ath10k_dbg(ar, ATH10K_DBG_WMI,
5636 "wmi mem_req_id %d num_units %d num_unit_info %d unit size %d actual units %d\n",
5637 req_id,
5638 __le32_to_cpu(arg.mem_reqs[i]->num_units),
5639 num_unit_info,
5640 unit_size,
5641 num_units);
5642
5643 ret = ath10k_wmi_alloc_host_mem(ar, req_id, num_units,
5644 unit_size);
5645 if (ret)
5646 return;
5647 }
5648
5649 skip_mem_alloc:
5650 ath10k_dbg(ar, ATH10K_DBG_WMI,
5651 "wmi event service ready min_tx_power 0x%08x max_tx_power 0x%08x ht_cap 0x%08x vht_cap 0x%08x vht_supp_mcs 0x%08x sw_ver0 0x%08x sw_ver1 0x%08x fw_build 0x%08x phy_capab 0x%08x num_rf_chains 0x%08x eeprom_rd 0x%08x low_2ghz_chan %d high_2ghz_chan %d low_5ghz_chan %d high_5ghz_chan %d num_mem_reqs 0x%08x\n",
5652 __le32_to_cpu(arg.min_tx_power),
5653 __le32_to_cpu(arg.max_tx_power),
5654 __le32_to_cpu(arg.ht_cap),
5655 __le32_to_cpu(arg.vht_cap),
5656 __le32_to_cpu(arg.vht_supp_mcs),
5657 __le32_to_cpu(arg.sw_ver0),
5658 __le32_to_cpu(arg.sw_ver1),
5659 __le32_to_cpu(arg.fw_build),
5660 __le32_to_cpu(arg.phy_capab),
5661 __le32_to_cpu(arg.num_rf_chains),
5662 __le32_to_cpu(arg.eeprom_rd),
5663 __le32_to_cpu(arg.low_2ghz_chan),
5664 __le32_to_cpu(arg.high_2ghz_chan),
5665 __le32_to_cpu(arg.low_5ghz_chan),
5666 __le32_to_cpu(arg.high_5ghz_chan),
5667 __le32_to_cpu(arg.num_mem_reqs));
5668
5669 dev_kfree_skb(skb);
5670 ar->svc_rdy_skb = NULL;
5671 complete(&ar->wmi.service_ready);
5672 }
5673
ath10k_wmi_event_service_ready(struct ath10k * ar,struct sk_buff * skb)5674 void ath10k_wmi_event_service_ready(struct ath10k *ar, struct sk_buff *skb)
5675 {
5676 ar->svc_rdy_skb = skb;
5677 queue_work(ar->workqueue_aux, &ar->svc_rdy_work);
5678 }
5679
ath10k_wmi_op_pull_rdy_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_rdy_ev_arg * arg)5680 static int ath10k_wmi_op_pull_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
5681 struct wmi_rdy_ev_arg *arg)
5682 {
5683 struct wmi_ready_event *ev = (void *)skb->data;
5684
5685 if (skb->len < sizeof(*ev))
5686 return -EPROTO;
5687
5688 skb_pull(skb, sizeof(*ev));
5689 arg->sw_version = ev->sw_version;
5690 arg->abi_version = ev->abi_version;
5691 arg->status = ev->status;
5692 arg->mac_addr = ev->mac_addr.addr;
5693
5694 return 0;
5695 }
5696
ath10k_wmi_op_pull_roam_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_roam_ev_arg * arg)5697 static int ath10k_wmi_op_pull_roam_ev(struct ath10k *ar, struct sk_buff *skb,
5698 struct wmi_roam_ev_arg *arg)
5699 {
5700 struct wmi_roam_ev *ev = (void *)skb->data;
5701
5702 if (skb->len < sizeof(*ev))
5703 return -EPROTO;
5704
5705 skb_pull(skb, sizeof(*ev));
5706 arg->vdev_id = ev->vdev_id;
5707 arg->reason = ev->reason;
5708
5709 return 0;
5710 }
5711
ath10k_wmi_op_pull_echo_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_echo_ev_arg * arg)5712 static int ath10k_wmi_op_pull_echo_ev(struct ath10k *ar,
5713 struct sk_buff *skb,
5714 struct wmi_echo_ev_arg *arg)
5715 {
5716 struct wmi_echo_event *ev = (void *)skb->data;
5717
5718 arg->value = ev->value;
5719
5720 return 0;
5721 }
5722
ath10k_wmi_event_ready(struct ath10k * ar,struct sk_buff * skb)5723 int ath10k_wmi_event_ready(struct ath10k *ar, struct sk_buff *skb)
5724 {
5725 struct wmi_rdy_ev_arg arg = {};
5726 int ret;
5727
5728 ret = ath10k_wmi_pull_rdy(ar, skb, &arg);
5729 if (ret) {
5730 ath10k_warn(ar, "failed to parse ready event: %d\n", ret);
5731 return ret;
5732 }
5733
5734 ath10k_dbg(ar, ATH10K_DBG_WMI,
5735 "wmi event ready sw_version 0x%08x abi_version %u mac_addr %pM status %d\n",
5736 __le32_to_cpu(arg.sw_version),
5737 __le32_to_cpu(arg.abi_version),
5738 arg.mac_addr,
5739 __le32_to_cpu(arg.status));
5740
5741 if (is_zero_ether_addr(ar->mac_addr))
5742 ether_addr_copy(ar->mac_addr, arg.mac_addr);
5743 complete(&ar->wmi.unified_ready);
5744 return 0;
5745 }
5746
ath10k_wmi_event_service_available(struct ath10k * ar,struct sk_buff * skb)5747 void ath10k_wmi_event_service_available(struct ath10k *ar, struct sk_buff *skb)
5748 {
5749 int ret;
5750 struct wmi_svc_avail_ev_arg arg = {};
5751
5752 ret = ath10k_wmi_pull_svc_avail(ar, skb, &arg);
5753 if (ret) {
5754 ath10k_warn(ar, "failed to parse service available event: %d\n",
5755 ret);
5756 }
5757
5758 /*
5759 * Initialization of "arg.service_map_ext_valid" to ZERO is necessary
5760 * for the below logic to work.
5761 */
5762 if (arg.service_map_ext_valid)
5763 ath10k_wmi_map_svc_ext(ar, arg.service_map_ext, ar->wmi.svc_map,
5764 __le32_to_cpu(arg.service_map_ext_len));
5765 }
5766
ath10k_wmi_event_temperature(struct ath10k * ar,struct sk_buff * skb)5767 static int ath10k_wmi_event_temperature(struct ath10k *ar, struct sk_buff *skb)
5768 {
5769 const struct wmi_pdev_temperature_event *ev;
5770
5771 ev = (struct wmi_pdev_temperature_event *)skb->data;
5772 if (WARN_ON(skb->len < sizeof(*ev)))
5773 return -EPROTO;
5774
5775 ath10k_thermal_event_temperature(ar, __le32_to_cpu(ev->temperature));
5776 return 0;
5777 }
5778
ath10k_wmi_event_pdev_bss_chan_info(struct ath10k * ar,struct sk_buff * skb)5779 static int ath10k_wmi_event_pdev_bss_chan_info(struct ath10k *ar,
5780 struct sk_buff *skb)
5781 {
5782 struct wmi_pdev_bss_chan_info_event *ev;
5783 struct survey_info *survey;
5784 u64 busy, total, tx, rx, rx_bss;
5785 u32 freq, noise_floor;
5786 u32 cc_freq_hz = ar->hw_params.channel_counters_freq_hz;
5787 int idx;
5788
5789 ev = (struct wmi_pdev_bss_chan_info_event *)skb->data;
5790 if (WARN_ON(skb->len < sizeof(*ev)))
5791 return -EPROTO;
5792
5793 freq = __le32_to_cpu(ev->freq);
5794 noise_floor = __le32_to_cpu(ev->noise_floor);
5795 busy = __le64_to_cpu(ev->cycle_busy);
5796 total = __le64_to_cpu(ev->cycle_total);
5797 tx = __le64_to_cpu(ev->cycle_tx);
5798 rx = __le64_to_cpu(ev->cycle_rx);
5799 rx_bss = __le64_to_cpu(ev->cycle_rx_bss);
5800
5801 ath10k_dbg(ar, ATH10K_DBG_WMI,
5802 "wmi event pdev bss chan info:\n freq: %d noise: %d cycle: busy %llu total %llu tx %llu rx %llu rx_bss %llu\n",
5803 freq, noise_floor, busy, total, tx, rx, rx_bss);
5804
5805 spin_lock_bh(&ar->data_lock);
5806 idx = freq_to_idx(ar, freq);
5807 if (idx >= ARRAY_SIZE(ar->survey)) {
5808 ath10k_warn(ar, "bss chan info: invalid frequency %d (idx %d out of bounds)\n",
5809 freq, idx);
5810 goto exit;
5811 }
5812
5813 survey = &ar->survey[idx];
5814
5815 survey->noise = noise_floor;
5816 survey->time = div_u64(total, cc_freq_hz);
5817 survey->time_busy = div_u64(busy, cc_freq_hz);
5818 survey->time_rx = div_u64(rx_bss, cc_freq_hz);
5819 survey->time_tx = div_u64(tx, cc_freq_hz);
5820 survey->filled |= (SURVEY_INFO_NOISE_DBM |
5821 SURVEY_INFO_TIME |
5822 SURVEY_INFO_TIME_BUSY |
5823 SURVEY_INFO_TIME_RX |
5824 SURVEY_INFO_TIME_TX);
5825 exit:
5826 spin_unlock_bh(&ar->data_lock);
5827 complete(&ar->bss_survey_done);
5828 return 0;
5829 }
5830
ath10k_wmi_queue_set_coverage_class_work(struct ath10k * ar)5831 static inline void ath10k_wmi_queue_set_coverage_class_work(struct ath10k *ar)
5832 {
5833 if (ar->hw_params.hw_ops->set_coverage_class) {
5834 spin_lock_bh(&ar->data_lock);
5835
5836 /* This call only ensures that the modified coverage class
5837 * persists in case the firmware sets the registers back to
5838 * their default value. So calling it is only necessary if the
5839 * coverage class has a non-zero value.
5840 */
5841 if (ar->fw_coverage.coverage_class)
5842 queue_work(ar->workqueue, &ar->set_coverage_class_work);
5843
5844 spin_unlock_bh(&ar->data_lock);
5845 }
5846 }
5847
ath10k_wmi_op_rx(struct ath10k * ar,struct sk_buff * skb)5848 static void ath10k_wmi_op_rx(struct ath10k *ar, struct sk_buff *skb)
5849 {
5850 struct wmi_cmd_hdr *cmd_hdr;
5851 enum wmi_event_id id;
5852
5853 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
5854 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
5855
5856 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
5857 goto out;
5858
5859 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
5860
5861 switch (id) {
5862 case WMI_MGMT_RX_EVENTID:
5863 ath10k_wmi_event_mgmt_rx(ar, skb);
5864 /* mgmt_rx() owns the skb now! */
5865 return;
5866 case WMI_SCAN_EVENTID:
5867 ath10k_wmi_event_scan(ar, skb);
5868 ath10k_wmi_queue_set_coverage_class_work(ar);
5869 break;
5870 case WMI_CHAN_INFO_EVENTID:
5871 ath10k_wmi_event_chan_info(ar, skb);
5872 break;
5873 case WMI_ECHO_EVENTID:
5874 ath10k_wmi_event_echo(ar, skb);
5875 break;
5876 case WMI_DEBUG_MESG_EVENTID:
5877 ath10k_wmi_event_debug_mesg(ar, skb);
5878 ath10k_wmi_queue_set_coverage_class_work(ar);
5879 break;
5880 case WMI_UPDATE_STATS_EVENTID:
5881 ath10k_wmi_event_update_stats(ar, skb);
5882 break;
5883 case WMI_VDEV_START_RESP_EVENTID:
5884 ath10k_wmi_event_vdev_start_resp(ar, skb);
5885 ath10k_wmi_queue_set_coverage_class_work(ar);
5886 break;
5887 case WMI_VDEV_STOPPED_EVENTID:
5888 ath10k_wmi_event_vdev_stopped(ar, skb);
5889 ath10k_wmi_queue_set_coverage_class_work(ar);
5890 break;
5891 case WMI_PEER_STA_KICKOUT_EVENTID:
5892 ath10k_wmi_event_peer_sta_kickout(ar, skb);
5893 break;
5894 case WMI_HOST_SWBA_EVENTID:
5895 ath10k_wmi_event_host_swba(ar, skb);
5896 break;
5897 case WMI_TBTTOFFSET_UPDATE_EVENTID:
5898 ath10k_wmi_event_tbttoffset_update(ar, skb);
5899 break;
5900 case WMI_PHYERR_EVENTID:
5901 ath10k_wmi_event_phyerr(ar, skb);
5902 break;
5903 case WMI_ROAM_EVENTID:
5904 ath10k_wmi_event_roam(ar, skb);
5905 ath10k_wmi_queue_set_coverage_class_work(ar);
5906 break;
5907 case WMI_PROFILE_MATCH:
5908 ath10k_wmi_event_profile_match(ar, skb);
5909 break;
5910 case WMI_DEBUG_PRINT_EVENTID:
5911 ath10k_wmi_event_debug_print(ar, skb);
5912 ath10k_wmi_queue_set_coverage_class_work(ar);
5913 break;
5914 case WMI_PDEV_QVIT_EVENTID:
5915 ath10k_wmi_event_pdev_qvit(ar, skb);
5916 break;
5917 case WMI_WLAN_PROFILE_DATA_EVENTID:
5918 ath10k_wmi_event_wlan_profile_data(ar, skb);
5919 break;
5920 case WMI_RTT_MEASUREMENT_REPORT_EVENTID:
5921 ath10k_wmi_event_rtt_measurement_report(ar, skb);
5922 break;
5923 case WMI_TSF_MEASUREMENT_REPORT_EVENTID:
5924 ath10k_wmi_event_tsf_measurement_report(ar, skb);
5925 break;
5926 case WMI_RTT_ERROR_REPORT_EVENTID:
5927 ath10k_wmi_event_rtt_error_report(ar, skb);
5928 break;
5929 case WMI_WOW_WAKEUP_HOST_EVENTID:
5930 ath10k_wmi_event_wow_wakeup_host(ar, skb);
5931 break;
5932 case WMI_DCS_INTERFERENCE_EVENTID:
5933 ath10k_wmi_event_dcs_interference(ar, skb);
5934 break;
5935 case WMI_PDEV_TPC_CONFIG_EVENTID:
5936 ath10k_wmi_event_pdev_tpc_config(ar, skb);
5937 break;
5938 case WMI_PDEV_FTM_INTG_EVENTID:
5939 ath10k_wmi_event_pdev_ftm_intg(ar, skb);
5940 break;
5941 case WMI_GTK_OFFLOAD_STATUS_EVENTID:
5942 ath10k_wmi_event_gtk_offload_status(ar, skb);
5943 break;
5944 case WMI_GTK_REKEY_FAIL_EVENTID:
5945 ath10k_wmi_event_gtk_rekey_fail(ar, skb);
5946 break;
5947 case WMI_TX_DELBA_COMPLETE_EVENTID:
5948 ath10k_wmi_event_delba_complete(ar, skb);
5949 break;
5950 case WMI_TX_ADDBA_COMPLETE_EVENTID:
5951 ath10k_wmi_event_addba_complete(ar, skb);
5952 break;
5953 case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID:
5954 ath10k_wmi_event_vdev_install_key_complete(ar, skb);
5955 break;
5956 case WMI_SERVICE_READY_EVENTID:
5957 ath10k_wmi_event_service_ready(ar, skb);
5958 return;
5959 case WMI_READY_EVENTID:
5960 ath10k_wmi_event_ready(ar, skb);
5961 ath10k_wmi_queue_set_coverage_class_work(ar);
5962 break;
5963 case WMI_SERVICE_AVAILABLE_EVENTID:
5964 ath10k_wmi_event_service_available(ar, skb);
5965 break;
5966 default:
5967 ath10k_warn(ar, "Unknown eventid: %d\n", id);
5968 break;
5969 }
5970
5971 out:
5972 dev_kfree_skb(skb);
5973 }
5974
ath10k_wmi_10_1_op_rx(struct ath10k * ar,struct sk_buff * skb)5975 static void ath10k_wmi_10_1_op_rx(struct ath10k *ar, struct sk_buff *skb)
5976 {
5977 struct wmi_cmd_hdr *cmd_hdr;
5978 enum wmi_10x_event_id id;
5979 bool consumed;
5980
5981 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
5982 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
5983
5984 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
5985 goto out;
5986
5987 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
5988
5989 consumed = ath10k_tm_event_wmi(ar, id, skb);
5990
5991 /* Ready event must be handled normally also in UTF mode so that we
5992 * know the UTF firmware has booted, others we are just bypass WMI
5993 * events to testmode.
5994 */
5995 if (consumed && id != WMI_10X_READY_EVENTID) {
5996 ath10k_dbg(ar, ATH10K_DBG_WMI,
5997 "wmi testmode consumed 0x%x\n", id);
5998 goto out;
5999 }
6000
6001 switch (id) {
6002 case WMI_10X_MGMT_RX_EVENTID:
6003 ath10k_wmi_event_mgmt_rx(ar, skb);
6004 /* mgmt_rx() owns the skb now! */
6005 return;
6006 case WMI_10X_SCAN_EVENTID:
6007 ath10k_wmi_event_scan(ar, skb);
6008 ath10k_wmi_queue_set_coverage_class_work(ar);
6009 break;
6010 case WMI_10X_CHAN_INFO_EVENTID:
6011 ath10k_wmi_event_chan_info(ar, skb);
6012 break;
6013 case WMI_10X_ECHO_EVENTID:
6014 ath10k_wmi_event_echo(ar, skb);
6015 break;
6016 case WMI_10X_DEBUG_MESG_EVENTID:
6017 ath10k_wmi_event_debug_mesg(ar, skb);
6018 ath10k_wmi_queue_set_coverage_class_work(ar);
6019 break;
6020 case WMI_10X_UPDATE_STATS_EVENTID:
6021 ath10k_wmi_event_update_stats(ar, skb);
6022 break;
6023 case WMI_10X_VDEV_START_RESP_EVENTID:
6024 ath10k_wmi_event_vdev_start_resp(ar, skb);
6025 ath10k_wmi_queue_set_coverage_class_work(ar);
6026 break;
6027 case WMI_10X_VDEV_STOPPED_EVENTID:
6028 ath10k_wmi_event_vdev_stopped(ar, skb);
6029 ath10k_wmi_queue_set_coverage_class_work(ar);
6030 break;
6031 case WMI_10X_PEER_STA_KICKOUT_EVENTID:
6032 ath10k_wmi_event_peer_sta_kickout(ar, skb);
6033 break;
6034 case WMI_10X_HOST_SWBA_EVENTID:
6035 ath10k_wmi_event_host_swba(ar, skb);
6036 break;
6037 case WMI_10X_TBTTOFFSET_UPDATE_EVENTID:
6038 ath10k_wmi_event_tbttoffset_update(ar, skb);
6039 break;
6040 case WMI_10X_PHYERR_EVENTID:
6041 ath10k_wmi_event_phyerr(ar, skb);
6042 break;
6043 case WMI_10X_ROAM_EVENTID:
6044 ath10k_wmi_event_roam(ar, skb);
6045 ath10k_wmi_queue_set_coverage_class_work(ar);
6046 break;
6047 case WMI_10X_PROFILE_MATCH:
6048 ath10k_wmi_event_profile_match(ar, skb);
6049 break;
6050 case WMI_10X_DEBUG_PRINT_EVENTID:
6051 ath10k_wmi_event_debug_print(ar, skb);
6052 ath10k_wmi_queue_set_coverage_class_work(ar);
6053 break;
6054 case WMI_10X_PDEV_QVIT_EVENTID:
6055 ath10k_wmi_event_pdev_qvit(ar, skb);
6056 break;
6057 case WMI_10X_WLAN_PROFILE_DATA_EVENTID:
6058 ath10k_wmi_event_wlan_profile_data(ar, skb);
6059 break;
6060 case WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID:
6061 ath10k_wmi_event_rtt_measurement_report(ar, skb);
6062 break;
6063 case WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID:
6064 ath10k_wmi_event_tsf_measurement_report(ar, skb);
6065 break;
6066 case WMI_10X_RTT_ERROR_REPORT_EVENTID:
6067 ath10k_wmi_event_rtt_error_report(ar, skb);
6068 break;
6069 case WMI_10X_WOW_WAKEUP_HOST_EVENTID:
6070 ath10k_wmi_event_wow_wakeup_host(ar, skb);
6071 break;
6072 case WMI_10X_DCS_INTERFERENCE_EVENTID:
6073 ath10k_wmi_event_dcs_interference(ar, skb);
6074 break;
6075 case WMI_10X_PDEV_TPC_CONFIG_EVENTID:
6076 ath10k_wmi_event_pdev_tpc_config(ar, skb);
6077 break;
6078 case WMI_10X_INST_RSSI_STATS_EVENTID:
6079 ath10k_wmi_event_inst_rssi_stats(ar, skb);
6080 break;
6081 case WMI_10X_VDEV_STANDBY_REQ_EVENTID:
6082 ath10k_wmi_event_vdev_standby_req(ar, skb);
6083 break;
6084 case WMI_10X_VDEV_RESUME_REQ_EVENTID:
6085 ath10k_wmi_event_vdev_resume_req(ar, skb);
6086 break;
6087 case WMI_10X_SERVICE_READY_EVENTID:
6088 ath10k_wmi_event_service_ready(ar, skb);
6089 return;
6090 case WMI_10X_READY_EVENTID:
6091 ath10k_wmi_event_ready(ar, skb);
6092 ath10k_wmi_queue_set_coverage_class_work(ar);
6093 break;
6094 case WMI_10X_PDEV_UTF_EVENTID:
6095 /* ignore utf events */
6096 break;
6097 default:
6098 ath10k_warn(ar, "Unknown eventid: %d\n", id);
6099 break;
6100 }
6101
6102 out:
6103 dev_kfree_skb(skb);
6104 }
6105
ath10k_wmi_10_2_op_rx(struct ath10k * ar,struct sk_buff * skb)6106 static void ath10k_wmi_10_2_op_rx(struct ath10k *ar, struct sk_buff *skb)
6107 {
6108 struct wmi_cmd_hdr *cmd_hdr;
6109 enum wmi_10_2_event_id id;
6110 bool consumed;
6111
6112 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
6113 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
6114
6115 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
6116 goto out;
6117
6118 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
6119
6120 consumed = ath10k_tm_event_wmi(ar, id, skb);
6121
6122 /* Ready event must be handled normally also in UTF mode so that we
6123 * know the UTF firmware has booted, others we are just bypass WMI
6124 * events to testmode.
6125 */
6126 if (consumed && id != WMI_10_2_READY_EVENTID) {
6127 ath10k_dbg(ar, ATH10K_DBG_WMI,
6128 "wmi testmode consumed 0x%x\n", id);
6129 goto out;
6130 }
6131
6132 switch (id) {
6133 case WMI_10_2_MGMT_RX_EVENTID:
6134 ath10k_wmi_event_mgmt_rx(ar, skb);
6135 /* mgmt_rx() owns the skb now! */
6136 return;
6137 case WMI_10_2_SCAN_EVENTID:
6138 ath10k_wmi_event_scan(ar, skb);
6139 ath10k_wmi_queue_set_coverage_class_work(ar);
6140 break;
6141 case WMI_10_2_CHAN_INFO_EVENTID:
6142 ath10k_wmi_event_chan_info(ar, skb);
6143 break;
6144 case WMI_10_2_ECHO_EVENTID:
6145 ath10k_wmi_event_echo(ar, skb);
6146 break;
6147 case WMI_10_2_DEBUG_MESG_EVENTID:
6148 ath10k_wmi_event_debug_mesg(ar, skb);
6149 ath10k_wmi_queue_set_coverage_class_work(ar);
6150 break;
6151 case WMI_10_2_UPDATE_STATS_EVENTID:
6152 ath10k_wmi_event_update_stats(ar, skb);
6153 break;
6154 case WMI_10_2_VDEV_START_RESP_EVENTID:
6155 ath10k_wmi_event_vdev_start_resp(ar, skb);
6156 ath10k_wmi_queue_set_coverage_class_work(ar);
6157 break;
6158 case WMI_10_2_VDEV_STOPPED_EVENTID:
6159 ath10k_wmi_event_vdev_stopped(ar, skb);
6160 ath10k_wmi_queue_set_coverage_class_work(ar);
6161 break;
6162 case WMI_10_2_PEER_STA_KICKOUT_EVENTID:
6163 ath10k_wmi_event_peer_sta_kickout(ar, skb);
6164 break;
6165 case WMI_10_2_HOST_SWBA_EVENTID:
6166 ath10k_wmi_event_host_swba(ar, skb);
6167 break;
6168 case WMI_10_2_TBTTOFFSET_UPDATE_EVENTID:
6169 ath10k_wmi_event_tbttoffset_update(ar, skb);
6170 break;
6171 case WMI_10_2_PHYERR_EVENTID:
6172 ath10k_wmi_event_phyerr(ar, skb);
6173 break;
6174 case WMI_10_2_ROAM_EVENTID:
6175 ath10k_wmi_event_roam(ar, skb);
6176 ath10k_wmi_queue_set_coverage_class_work(ar);
6177 break;
6178 case WMI_10_2_PROFILE_MATCH:
6179 ath10k_wmi_event_profile_match(ar, skb);
6180 break;
6181 case WMI_10_2_DEBUG_PRINT_EVENTID:
6182 ath10k_wmi_event_debug_print(ar, skb);
6183 ath10k_wmi_queue_set_coverage_class_work(ar);
6184 break;
6185 case WMI_10_2_PDEV_QVIT_EVENTID:
6186 ath10k_wmi_event_pdev_qvit(ar, skb);
6187 break;
6188 case WMI_10_2_WLAN_PROFILE_DATA_EVENTID:
6189 ath10k_wmi_event_wlan_profile_data(ar, skb);
6190 break;
6191 case WMI_10_2_RTT_MEASUREMENT_REPORT_EVENTID:
6192 ath10k_wmi_event_rtt_measurement_report(ar, skb);
6193 break;
6194 case WMI_10_2_TSF_MEASUREMENT_REPORT_EVENTID:
6195 ath10k_wmi_event_tsf_measurement_report(ar, skb);
6196 break;
6197 case WMI_10_2_RTT_ERROR_REPORT_EVENTID:
6198 ath10k_wmi_event_rtt_error_report(ar, skb);
6199 break;
6200 case WMI_10_2_WOW_WAKEUP_HOST_EVENTID:
6201 ath10k_wmi_event_wow_wakeup_host(ar, skb);
6202 break;
6203 case WMI_10_2_DCS_INTERFERENCE_EVENTID:
6204 ath10k_wmi_event_dcs_interference(ar, skb);
6205 break;
6206 case WMI_10_2_PDEV_TPC_CONFIG_EVENTID:
6207 ath10k_wmi_event_pdev_tpc_config(ar, skb);
6208 break;
6209 case WMI_10_2_INST_RSSI_STATS_EVENTID:
6210 ath10k_wmi_event_inst_rssi_stats(ar, skb);
6211 break;
6212 case WMI_10_2_VDEV_STANDBY_REQ_EVENTID:
6213 ath10k_wmi_event_vdev_standby_req(ar, skb);
6214 ath10k_wmi_queue_set_coverage_class_work(ar);
6215 break;
6216 case WMI_10_2_VDEV_RESUME_REQ_EVENTID:
6217 ath10k_wmi_event_vdev_resume_req(ar, skb);
6218 ath10k_wmi_queue_set_coverage_class_work(ar);
6219 break;
6220 case WMI_10_2_SERVICE_READY_EVENTID:
6221 ath10k_wmi_event_service_ready(ar, skb);
6222 return;
6223 case WMI_10_2_READY_EVENTID:
6224 ath10k_wmi_event_ready(ar, skb);
6225 ath10k_wmi_queue_set_coverage_class_work(ar);
6226 break;
6227 case WMI_10_2_PDEV_TEMPERATURE_EVENTID:
6228 ath10k_wmi_event_temperature(ar, skb);
6229 break;
6230 case WMI_10_2_PDEV_BSS_CHAN_INFO_EVENTID:
6231 ath10k_wmi_event_pdev_bss_chan_info(ar, skb);
6232 break;
6233 case WMI_10_2_RTT_KEEPALIVE_EVENTID:
6234 case WMI_10_2_GPIO_INPUT_EVENTID:
6235 case WMI_10_2_PEER_RATECODE_LIST_EVENTID:
6236 case WMI_10_2_GENERIC_BUFFER_EVENTID:
6237 case WMI_10_2_MCAST_BUF_RELEASE_EVENTID:
6238 case WMI_10_2_MCAST_LIST_AGEOUT_EVENTID:
6239 case WMI_10_2_WDS_PEER_EVENTID:
6240 ath10k_dbg(ar, ATH10K_DBG_WMI,
6241 "received event id %d not implemented\n", id);
6242 break;
6243 case WMI_10_2_PEER_STA_PS_STATECHG_EVENTID:
6244 ath10k_wmi_event_peer_sta_ps_state_chg(ar, skb);
6245 break;
6246 default:
6247 ath10k_warn(ar, "Unknown eventid: %d\n", id);
6248 break;
6249 }
6250
6251 out:
6252 dev_kfree_skb(skb);
6253 }
6254
ath10k_wmi_10_4_op_rx(struct ath10k * ar,struct sk_buff * skb)6255 static void ath10k_wmi_10_4_op_rx(struct ath10k *ar, struct sk_buff *skb)
6256 {
6257 struct wmi_cmd_hdr *cmd_hdr;
6258 enum wmi_10_4_event_id id;
6259 bool consumed;
6260
6261 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
6262 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
6263
6264 if (!skb_pull(skb, sizeof(struct wmi_cmd_hdr)))
6265 goto out;
6266
6267 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
6268
6269 consumed = ath10k_tm_event_wmi(ar, id, skb);
6270
6271 /* Ready event must be handled normally also in UTF mode so that we
6272 * know the UTF firmware has booted, others we are just bypass WMI
6273 * events to testmode.
6274 */
6275 if (consumed && id != WMI_10_4_READY_EVENTID) {
6276 ath10k_dbg(ar, ATH10K_DBG_WMI,
6277 "wmi testmode consumed 0x%x\n", id);
6278 goto out;
6279 }
6280
6281 switch (id) {
6282 case WMI_10_4_MGMT_RX_EVENTID:
6283 ath10k_wmi_event_mgmt_rx(ar, skb);
6284 /* mgmt_rx() owns the skb now! */
6285 return;
6286 case WMI_10_4_ECHO_EVENTID:
6287 ath10k_wmi_event_echo(ar, skb);
6288 break;
6289 case WMI_10_4_DEBUG_MESG_EVENTID:
6290 ath10k_wmi_event_debug_mesg(ar, skb);
6291 ath10k_wmi_queue_set_coverage_class_work(ar);
6292 break;
6293 case WMI_10_4_SERVICE_READY_EVENTID:
6294 ath10k_wmi_event_service_ready(ar, skb);
6295 return;
6296 case WMI_10_4_SCAN_EVENTID:
6297 ath10k_wmi_event_scan(ar, skb);
6298 ath10k_wmi_queue_set_coverage_class_work(ar);
6299 break;
6300 case WMI_10_4_CHAN_INFO_EVENTID:
6301 ath10k_wmi_event_chan_info(ar, skb);
6302 break;
6303 case WMI_10_4_PHYERR_EVENTID:
6304 ath10k_wmi_event_phyerr(ar, skb);
6305 break;
6306 case WMI_10_4_READY_EVENTID:
6307 ath10k_wmi_event_ready(ar, skb);
6308 ath10k_wmi_queue_set_coverage_class_work(ar);
6309 break;
6310 case WMI_10_4_PEER_STA_KICKOUT_EVENTID:
6311 ath10k_wmi_event_peer_sta_kickout(ar, skb);
6312 break;
6313 case WMI_10_4_ROAM_EVENTID:
6314 ath10k_wmi_event_roam(ar, skb);
6315 ath10k_wmi_queue_set_coverage_class_work(ar);
6316 break;
6317 case WMI_10_4_HOST_SWBA_EVENTID:
6318 ath10k_wmi_event_host_swba(ar, skb);
6319 break;
6320 case WMI_10_4_TBTTOFFSET_UPDATE_EVENTID:
6321 ath10k_wmi_event_tbttoffset_update(ar, skb);
6322 break;
6323 case WMI_10_4_DEBUG_PRINT_EVENTID:
6324 ath10k_wmi_event_debug_print(ar, skb);
6325 ath10k_wmi_queue_set_coverage_class_work(ar);
6326 break;
6327 case WMI_10_4_VDEV_START_RESP_EVENTID:
6328 ath10k_wmi_event_vdev_start_resp(ar, skb);
6329 ath10k_wmi_queue_set_coverage_class_work(ar);
6330 break;
6331 case WMI_10_4_VDEV_STOPPED_EVENTID:
6332 ath10k_wmi_event_vdev_stopped(ar, skb);
6333 ath10k_wmi_queue_set_coverage_class_work(ar);
6334 break;
6335 case WMI_10_4_WOW_WAKEUP_HOST_EVENTID:
6336 case WMI_10_4_PEER_RATECODE_LIST_EVENTID:
6337 case WMI_10_4_WDS_PEER_EVENTID:
6338 case WMI_10_4_DEBUG_FATAL_CONDITION_EVENTID:
6339 ath10k_dbg(ar, ATH10K_DBG_WMI,
6340 "received event id %d not implemented\n", id);
6341 break;
6342 case WMI_10_4_UPDATE_STATS_EVENTID:
6343 ath10k_wmi_event_update_stats(ar, skb);
6344 break;
6345 case WMI_10_4_PDEV_TEMPERATURE_EVENTID:
6346 ath10k_wmi_event_temperature(ar, skb);
6347 break;
6348 case WMI_10_4_PDEV_BSS_CHAN_INFO_EVENTID:
6349 ath10k_wmi_event_pdev_bss_chan_info(ar, skb);
6350 break;
6351 case WMI_10_4_PDEV_TPC_CONFIG_EVENTID:
6352 ath10k_wmi_event_pdev_tpc_config(ar, skb);
6353 break;
6354 case WMI_10_4_TDLS_PEER_EVENTID:
6355 ath10k_wmi_handle_tdls_peer_event(ar, skb);
6356 break;
6357 case WMI_10_4_PDEV_TPC_TABLE_EVENTID:
6358 ath10k_wmi_event_tpc_final_table(ar, skb);
6359 break;
6360 case WMI_10_4_DFS_STATUS_CHECK_EVENTID:
6361 ath10k_wmi_event_dfs_status_check(ar, skb);
6362 break;
6363 case WMI_10_4_PEER_STA_PS_STATECHG_EVENTID:
6364 ath10k_wmi_event_peer_sta_ps_state_chg(ar, skb);
6365 break;
6366 default:
6367 ath10k_warn(ar, "Unknown eventid: %d\n", id);
6368 break;
6369 }
6370
6371 out:
6372 dev_kfree_skb(skb);
6373 }
6374
ath10k_wmi_process_rx(struct ath10k * ar,struct sk_buff * skb)6375 static void ath10k_wmi_process_rx(struct ath10k *ar, struct sk_buff *skb)
6376 {
6377 int ret;
6378
6379 ret = ath10k_wmi_rx(ar, skb);
6380 if (ret)
6381 ath10k_warn(ar, "failed to process wmi rx: %d\n", ret);
6382 }
6383
ath10k_wmi_connect(struct ath10k * ar)6384 int ath10k_wmi_connect(struct ath10k *ar)
6385 {
6386 int status;
6387 struct ath10k_htc_svc_conn_req conn_req;
6388 struct ath10k_htc_svc_conn_resp conn_resp;
6389
6390 memset(&ar->wmi.svc_map, 0, sizeof(ar->wmi.svc_map));
6391
6392 memset(&conn_req, 0, sizeof(conn_req));
6393 memset(&conn_resp, 0, sizeof(conn_resp));
6394
6395 /* these fields are the same for all service endpoints */
6396 conn_req.ep_ops.ep_tx_complete = ath10k_wmi_htc_tx_complete;
6397 conn_req.ep_ops.ep_rx_complete = ath10k_wmi_process_rx;
6398 conn_req.ep_ops.ep_tx_credits = ath10k_wmi_op_ep_tx_credits;
6399
6400 /* connect to control service */
6401 conn_req.service_id = ATH10K_HTC_SVC_ID_WMI_CONTROL;
6402
6403 status = ath10k_htc_connect_service(&ar->htc, &conn_req, &conn_resp);
6404 if (status) {
6405 ath10k_warn(ar, "failed to connect to WMI CONTROL service status: %d\n",
6406 status);
6407 return status;
6408 }
6409
6410 ar->wmi.eid = conn_resp.eid;
6411 return 0;
6412 }
6413
6414 static struct sk_buff *
ath10k_wmi_op_gen_pdev_set_base_macaddr(struct ath10k * ar,const u8 macaddr[ETH_ALEN])6415 ath10k_wmi_op_gen_pdev_set_base_macaddr(struct ath10k *ar,
6416 const u8 macaddr[ETH_ALEN])
6417 {
6418 struct wmi_pdev_set_base_macaddr_cmd *cmd;
6419 struct sk_buff *skb;
6420
6421 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6422 if (!skb)
6423 return ERR_PTR(-ENOMEM);
6424
6425 cmd = (struct wmi_pdev_set_base_macaddr_cmd *)skb->data;
6426 ether_addr_copy(cmd->mac_addr.addr, macaddr);
6427
6428 ath10k_dbg(ar, ATH10K_DBG_WMI,
6429 "wmi pdev basemac %pM\n", macaddr);
6430 return skb;
6431 }
6432
6433 static struct sk_buff *
ath10k_wmi_op_gen_pdev_set_rd(struct ath10k * ar,u16 rd,u16 rd2g,u16 rd5g,u16 ctl2g,u16 ctl5g,enum wmi_dfs_region dfs_reg)6434 ath10k_wmi_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16 rd5g,
6435 u16 ctl2g, u16 ctl5g,
6436 enum wmi_dfs_region dfs_reg)
6437 {
6438 struct wmi_pdev_set_regdomain_cmd *cmd;
6439 struct sk_buff *skb;
6440
6441 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6442 if (!skb)
6443 return ERR_PTR(-ENOMEM);
6444
6445 cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data;
6446 cmd->reg_domain = __cpu_to_le32(rd);
6447 cmd->reg_domain_2G = __cpu_to_le32(rd2g);
6448 cmd->reg_domain_5G = __cpu_to_le32(rd5g);
6449 cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
6450 cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
6451
6452 ath10k_dbg(ar, ATH10K_DBG_WMI,
6453 "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x\n",
6454 rd, rd2g, rd5g, ctl2g, ctl5g);
6455 return skb;
6456 }
6457
6458 static struct sk_buff *
ath10k_wmi_10x_op_gen_pdev_set_rd(struct ath10k * ar,u16 rd,u16 rd2g,u16 rd5g,u16 ctl2g,u16 ctl5g,enum wmi_dfs_region dfs_reg)6459 ath10k_wmi_10x_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16
6460 rd5g, u16 ctl2g, u16 ctl5g,
6461 enum wmi_dfs_region dfs_reg)
6462 {
6463 struct wmi_pdev_set_regdomain_cmd_10x *cmd;
6464 struct sk_buff *skb;
6465
6466 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6467 if (!skb)
6468 return ERR_PTR(-ENOMEM);
6469
6470 cmd = (struct wmi_pdev_set_regdomain_cmd_10x *)skb->data;
6471 cmd->reg_domain = __cpu_to_le32(rd);
6472 cmd->reg_domain_2G = __cpu_to_le32(rd2g);
6473 cmd->reg_domain_5G = __cpu_to_le32(rd5g);
6474 cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
6475 cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
6476 cmd->dfs_domain = __cpu_to_le32(dfs_reg);
6477
6478 ath10k_dbg(ar, ATH10K_DBG_WMI,
6479 "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x dfs_region %x\n",
6480 rd, rd2g, rd5g, ctl2g, ctl5g, dfs_reg);
6481 return skb;
6482 }
6483
6484 static struct sk_buff *
ath10k_wmi_op_gen_pdev_suspend(struct ath10k * ar,u32 suspend_opt)6485 ath10k_wmi_op_gen_pdev_suspend(struct ath10k *ar, u32 suspend_opt)
6486 {
6487 struct wmi_pdev_suspend_cmd *cmd;
6488 struct sk_buff *skb;
6489
6490 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6491 if (!skb)
6492 return ERR_PTR(-ENOMEM);
6493
6494 cmd = (struct wmi_pdev_suspend_cmd *)skb->data;
6495 cmd->suspend_opt = __cpu_to_le32(suspend_opt);
6496
6497 return skb;
6498 }
6499
6500 static struct sk_buff *
ath10k_wmi_op_gen_pdev_resume(struct ath10k * ar)6501 ath10k_wmi_op_gen_pdev_resume(struct ath10k *ar)
6502 {
6503 struct sk_buff *skb;
6504
6505 skb = ath10k_wmi_alloc_skb(ar, 0);
6506 if (!skb)
6507 return ERR_PTR(-ENOMEM);
6508
6509 return skb;
6510 }
6511
6512 static struct sk_buff *
ath10k_wmi_op_gen_pdev_set_param(struct ath10k * ar,u32 id,u32 value)6513 ath10k_wmi_op_gen_pdev_set_param(struct ath10k *ar, u32 id, u32 value)
6514 {
6515 struct wmi_pdev_set_param_cmd *cmd;
6516 struct sk_buff *skb;
6517
6518 if (id == WMI_PDEV_PARAM_UNSUPPORTED) {
6519 ath10k_warn(ar, "pdev param %d not supported by firmware\n",
6520 id);
6521 return ERR_PTR(-EOPNOTSUPP);
6522 }
6523
6524 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6525 if (!skb)
6526 return ERR_PTR(-ENOMEM);
6527
6528 cmd = (struct wmi_pdev_set_param_cmd *)skb->data;
6529 cmd->param_id = __cpu_to_le32(id);
6530 cmd->param_value = __cpu_to_le32(value);
6531
6532 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set param %d value %d\n",
6533 id, value);
6534 return skb;
6535 }
6536
ath10k_wmi_put_host_mem_chunks(struct ath10k * ar,struct wmi_host_mem_chunks * chunks)6537 void ath10k_wmi_put_host_mem_chunks(struct ath10k *ar,
6538 struct wmi_host_mem_chunks *chunks)
6539 {
6540 struct host_memory_chunk *chunk;
6541 int i;
6542
6543 chunks->count = __cpu_to_le32(ar->wmi.num_mem_chunks);
6544
6545 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
6546 chunk = &chunks->items[i];
6547 chunk->ptr = __cpu_to_le32(ar->wmi.mem_chunks[i].paddr);
6548 chunk->size = __cpu_to_le32(ar->wmi.mem_chunks[i].len);
6549 chunk->req_id = __cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
6550
6551 ath10k_dbg(ar, ATH10K_DBG_WMI,
6552 "wmi chunk %d len %d requested, addr 0x%llx\n",
6553 i,
6554 ar->wmi.mem_chunks[i].len,
6555 (unsigned long long)ar->wmi.mem_chunks[i].paddr);
6556 }
6557 }
6558
ath10k_wmi_op_gen_init(struct ath10k * ar)6559 static struct sk_buff *ath10k_wmi_op_gen_init(struct ath10k *ar)
6560 {
6561 struct wmi_init_cmd *cmd;
6562 struct sk_buff *buf;
6563 struct wmi_resource_config config = {};
6564 u32 val;
6565
6566 config.num_vdevs = __cpu_to_le32(TARGET_NUM_VDEVS);
6567 config.num_peers = __cpu_to_le32(TARGET_NUM_PEERS);
6568 config.num_offload_peers = __cpu_to_le32(TARGET_NUM_OFFLOAD_PEERS);
6569
6570 config.num_offload_reorder_bufs =
6571 __cpu_to_le32(TARGET_NUM_OFFLOAD_REORDER_BUFS);
6572
6573 config.num_peer_keys = __cpu_to_le32(TARGET_NUM_PEER_KEYS);
6574 config.num_tids = __cpu_to_le32(TARGET_NUM_TIDS);
6575 config.ast_skid_limit = __cpu_to_le32(TARGET_AST_SKID_LIMIT);
6576 config.tx_chain_mask = __cpu_to_le32(TARGET_TX_CHAIN_MASK);
6577 config.rx_chain_mask = __cpu_to_le32(TARGET_RX_CHAIN_MASK);
6578 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
6579 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
6580 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
6581 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_RX_TIMEOUT_HI_PRI);
6582 config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
6583 config.scan_max_pending_reqs =
6584 __cpu_to_le32(TARGET_SCAN_MAX_PENDING_REQS);
6585
6586 config.bmiss_offload_max_vdev =
6587 __cpu_to_le32(TARGET_BMISS_OFFLOAD_MAX_VDEV);
6588
6589 config.roam_offload_max_vdev =
6590 __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_VDEV);
6591
6592 config.roam_offload_max_ap_profiles =
6593 __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES);
6594
6595 config.num_mcast_groups = __cpu_to_le32(TARGET_NUM_MCAST_GROUPS);
6596 config.num_mcast_table_elems =
6597 __cpu_to_le32(TARGET_NUM_MCAST_TABLE_ELEMS);
6598
6599 config.mcast2ucast_mode = __cpu_to_le32(TARGET_MCAST2UCAST_MODE);
6600 config.tx_dbg_log_size = __cpu_to_le32(TARGET_TX_DBG_LOG_SIZE);
6601 config.num_wds_entries = __cpu_to_le32(TARGET_NUM_WDS_ENTRIES);
6602 config.dma_burst_size = __cpu_to_le32(TARGET_DMA_BURST_SIZE);
6603 config.mac_aggr_delim = __cpu_to_le32(TARGET_MAC_AGGR_DELIM);
6604
6605 val = TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
6606 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
6607
6608 config.vow_config = __cpu_to_le32(TARGET_VOW_CONFIG);
6609
6610 config.gtk_offload_max_vdev =
6611 __cpu_to_le32(TARGET_GTK_OFFLOAD_MAX_VDEV);
6612
6613 config.num_msdu_desc = __cpu_to_le32(TARGET_NUM_MSDU_DESC);
6614 config.max_frag_entries = __cpu_to_le32(TARGET_MAX_FRAG_ENTRIES);
6615
6616 buf = ath10k_wmi_alloc_skb(ar, struct_size(cmd, mem_chunks.items,
6617 ar->wmi.num_mem_chunks));
6618 if (!buf)
6619 return ERR_PTR(-ENOMEM);
6620
6621 cmd = (struct wmi_init_cmd *)buf->data;
6622
6623 memcpy(&cmd->resource_config, &config, sizeof(config));
6624 ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
6625
6626 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init\n");
6627 return buf;
6628 }
6629
ath10k_wmi_10_1_op_gen_init(struct ath10k * ar)6630 static struct sk_buff *ath10k_wmi_10_1_op_gen_init(struct ath10k *ar)
6631 {
6632 struct wmi_init_cmd_10x *cmd;
6633 struct sk_buff *buf;
6634 struct wmi_resource_config_10x config = {};
6635 u32 val;
6636
6637 config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
6638 config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
6639 config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
6640 config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
6641 config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
6642 config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
6643 config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
6644 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
6645 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
6646 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
6647 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
6648 config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
6649 config.scan_max_pending_reqs =
6650 __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
6651
6652 config.bmiss_offload_max_vdev =
6653 __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
6654
6655 config.roam_offload_max_vdev =
6656 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
6657
6658 config.roam_offload_max_ap_profiles =
6659 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
6660
6661 config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
6662 config.num_mcast_table_elems =
6663 __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
6664
6665 config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
6666 config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
6667 config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
6668 config.dma_burst_size = __cpu_to_le32(TARGET_10X_DMA_BURST_SIZE);
6669 config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
6670
6671 val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
6672 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
6673
6674 config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
6675
6676 config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
6677 config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
6678
6679 buf = ath10k_wmi_alloc_skb(ar, struct_size(cmd, mem_chunks.items,
6680 ar->wmi.num_mem_chunks));
6681 if (!buf)
6682 return ERR_PTR(-ENOMEM);
6683
6684 cmd = (struct wmi_init_cmd_10x *)buf->data;
6685
6686 memcpy(&cmd->resource_config, &config, sizeof(config));
6687 ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
6688
6689 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10x\n");
6690 return buf;
6691 }
6692
ath10k_wmi_10_2_op_gen_init(struct ath10k * ar)6693 static struct sk_buff *ath10k_wmi_10_2_op_gen_init(struct ath10k *ar)
6694 {
6695 struct wmi_init_cmd_10_2 *cmd;
6696 struct sk_buff *buf;
6697 struct wmi_resource_config_10x config = {};
6698 u32 val, features;
6699
6700 config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
6701 config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
6702
6703 if (ath10k_peer_stats_enabled(ar)) {
6704 config.num_peers = __cpu_to_le32(TARGET_10X_TX_STATS_NUM_PEERS);
6705 config.num_tids = __cpu_to_le32(TARGET_10X_TX_STATS_NUM_TIDS);
6706 } else {
6707 config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
6708 config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
6709 }
6710
6711 config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
6712 config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
6713 config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
6714 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
6715 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
6716 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
6717 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
6718 config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
6719
6720 config.scan_max_pending_reqs =
6721 __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
6722
6723 config.bmiss_offload_max_vdev =
6724 __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
6725
6726 config.roam_offload_max_vdev =
6727 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
6728
6729 config.roam_offload_max_ap_profiles =
6730 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
6731
6732 config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
6733 config.num_mcast_table_elems =
6734 __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
6735
6736 config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
6737 config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
6738 config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
6739 config.dma_burst_size = __cpu_to_le32(TARGET_10_2_DMA_BURST_SIZE);
6740 config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
6741
6742 val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
6743 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
6744
6745 config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
6746
6747 config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
6748 config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
6749
6750 buf = ath10k_wmi_alloc_skb(ar, struct_size(cmd, mem_chunks.items,
6751 ar->wmi.num_mem_chunks));
6752 if (!buf)
6753 return ERR_PTR(-ENOMEM);
6754
6755 cmd = (struct wmi_init_cmd_10_2 *)buf->data;
6756
6757 features = WMI_10_2_RX_BATCH_MODE;
6758
6759 if (test_bit(ATH10K_FLAG_BTCOEX, &ar->dev_flags) &&
6760 test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map))
6761 features |= WMI_10_2_COEX_GPIO;
6762
6763 if (ath10k_peer_stats_enabled(ar))
6764 features |= WMI_10_2_PEER_STATS;
6765
6766 if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map))
6767 features |= WMI_10_2_BSS_CHAN_INFO;
6768
6769 cmd->resource_config.feature_mask = __cpu_to_le32(features);
6770
6771 memcpy(&cmd->resource_config.common, &config, sizeof(config));
6772 ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
6773
6774 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.2\n");
6775 return buf;
6776 }
6777
ath10k_wmi_10_4_op_gen_init(struct ath10k * ar)6778 static struct sk_buff *ath10k_wmi_10_4_op_gen_init(struct ath10k *ar)
6779 {
6780 struct wmi_init_cmd_10_4 *cmd;
6781 struct sk_buff *buf;
6782 struct wmi_resource_config_10_4 config = {};
6783
6784 config.num_vdevs = __cpu_to_le32(ar->max_num_vdevs);
6785 config.num_peers = __cpu_to_le32(ar->max_num_peers);
6786 config.num_active_peers = __cpu_to_le32(ar->num_active_peers);
6787 config.num_tids = __cpu_to_le32(ar->num_tids);
6788
6789 config.num_offload_peers = __cpu_to_le32(TARGET_10_4_NUM_OFFLOAD_PEERS);
6790 config.num_offload_reorder_buffs =
6791 __cpu_to_le32(TARGET_10_4_NUM_OFFLOAD_REORDER_BUFFS);
6792 config.num_peer_keys = __cpu_to_le32(TARGET_10_4_NUM_PEER_KEYS);
6793 config.ast_skid_limit = __cpu_to_le32(TARGET_10_4_AST_SKID_LIMIT);
6794 config.tx_chain_mask = __cpu_to_le32(ar->hw_params.tx_chain_mask);
6795 config.rx_chain_mask = __cpu_to_le32(ar->hw_params.rx_chain_mask);
6796
6797 config.rx_timeout_pri[0] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
6798 config.rx_timeout_pri[1] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
6799 config.rx_timeout_pri[2] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
6800 config.rx_timeout_pri[3] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_HI_PRI);
6801
6802 config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
6803 config.scan_max_pending_req = __cpu_to_le32(TARGET_10_4_SCAN_MAX_REQS);
6804 config.bmiss_offload_max_vdev =
6805 __cpu_to_le32(TARGET_10_4_BMISS_OFFLOAD_MAX_VDEV);
6806 config.roam_offload_max_vdev =
6807 __cpu_to_le32(TARGET_10_4_ROAM_OFFLOAD_MAX_VDEV);
6808 config.roam_offload_max_ap_profiles =
6809 __cpu_to_le32(TARGET_10_4_ROAM_OFFLOAD_MAX_PROFILES);
6810 config.num_mcast_groups = __cpu_to_le32(TARGET_10_4_NUM_MCAST_GROUPS);
6811 config.num_mcast_table_elems =
6812 __cpu_to_le32(TARGET_10_4_NUM_MCAST_TABLE_ELEMS);
6813
6814 config.mcast2ucast_mode = __cpu_to_le32(TARGET_10_4_MCAST2UCAST_MODE);
6815 config.tx_dbg_log_size = __cpu_to_le32(TARGET_10_4_TX_DBG_LOG_SIZE);
6816 config.num_wds_entries = __cpu_to_le32(TARGET_10_4_NUM_WDS_ENTRIES);
6817 config.dma_burst_size = __cpu_to_le32(TARGET_10_4_DMA_BURST_SIZE);
6818 config.mac_aggr_delim = __cpu_to_le32(TARGET_10_4_MAC_AGGR_DELIM);
6819
6820 config.rx_skip_defrag_timeout_dup_detection_check =
6821 __cpu_to_le32(TARGET_10_4_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK);
6822
6823 config.vow_config = __cpu_to_le32(TARGET_10_4_VOW_CONFIG);
6824 config.gtk_offload_max_vdev =
6825 __cpu_to_le32(TARGET_10_4_GTK_OFFLOAD_MAX_VDEV);
6826 config.num_msdu_desc = __cpu_to_le32(ar->htt.max_num_pending_tx);
6827 config.max_frag_entries = __cpu_to_le32(TARGET_10_4_11AC_TX_MAX_FRAGS);
6828 config.max_peer_ext_stats =
6829 __cpu_to_le32(TARGET_10_4_MAX_PEER_EXT_STATS);
6830 config.smart_ant_cap = __cpu_to_le32(TARGET_10_4_SMART_ANT_CAP);
6831
6832 config.bk_minfree = __cpu_to_le32(TARGET_10_4_BK_MIN_FREE);
6833 config.be_minfree = __cpu_to_le32(TARGET_10_4_BE_MIN_FREE);
6834 config.vi_minfree = __cpu_to_le32(TARGET_10_4_VI_MIN_FREE);
6835 config.vo_minfree = __cpu_to_le32(TARGET_10_4_VO_MIN_FREE);
6836
6837 config.rx_batchmode = __cpu_to_le32(TARGET_10_4_RX_BATCH_MODE);
6838 config.tt_support =
6839 __cpu_to_le32(TARGET_10_4_THERMAL_THROTTLING_CONFIG);
6840 config.atf_config = __cpu_to_le32(TARGET_10_4_ATF_CONFIG);
6841 config.iphdr_pad_config = __cpu_to_le32(TARGET_10_4_IPHDR_PAD_CONFIG);
6842 config.qwrap_config = __cpu_to_le32(TARGET_10_4_QWRAP_CONFIG);
6843
6844 buf = ath10k_wmi_alloc_skb(ar, struct_size(cmd, mem_chunks.items,
6845 ar->wmi.num_mem_chunks));
6846 if (!buf)
6847 return ERR_PTR(-ENOMEM);
6848
6849 cmd = (struct wmi_init_cmd_10_4 *)buf->data;
6850 memcpy(&cmd->resource_config, &config, sizeof(config));
6851 ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
6852
6853 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.4\n");
6854 return buf;
6855 }
6856
ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg * arg)6857 int ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg *arg)
6858 {
6859 if (arg->ie_len > WLAN_SCAN_PARAMS_MAX_IE_LEN)
6860 return -EINVAL;
6861 if (arg->n_channels > ARRAY_SIZE(arg->channels))
6862 return -EINVAL;
6863 if (arg->n_ssids > WLAN_SCAN_PARAMS_MAX_SSID)
6864 return -EINVAL;
6865 if (arg->n_bssids > WLAN_SCAN_PARAMS_MAX_BSSID)
6866 return -EINVAL;
6867
6868 return 0;
6869 }
6870
6871 static size_t
ath10k_wmi_start_scan_tlvs_len(const struct wmi_start_scan_arg * arg)6872 ath10k_wmi_start_scan_tlvs_len(const struct wmi_start_scan_arg *arg)
6873 {
6874 int len = 0;
6875
6876 if (arg->ie_len) {
6877 len += sizeof(struct wmi_ie_data);
6878 len += roundup(arg->ie_len, 4);
6879 }
6880
6881 if (arg->n_channels) {
6882 len += sizeof(struct wmi_chan_list);
6883 len += sizeof(__le32) * arg->n_channels;
6884 }
6885
6886 if (arg->n_ssids) {
6887 len += sizeof(struct wmi_ssid_list);
6888 len += sizeof(struct wmi_ssid) * arg->n_ssids;
6889 }
6890
6891 if (arg->n_bssids) {
6892 len += sizeof(struct wmi_bssid_list);
6893 len += sizeof(struct wmi_mac_addr) * arg->n_bssids;
6894 }
6895
6896 return len;
6897 }
6898
ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common * cmn,const struct wmi_start_scan_arg * arg)6899 void ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common *cmn,
6900 const struct wmi_start_scan_arg *arg)
6901 {
6902 u32 scan_id;
6903 u32 scan_req_id;
6904
6905 scan_id = WMI_HOST_SCAN_REQ_ID_PREFIX;
6906 scan_id |= arg->scan_id;
6907
6908 scan_req_id = WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
6909 scan_req_id |= arg->scan_req_id;
6910
6911 cmn->scan_id = __cpu_to_le32(scan_id);
6912 cmn->scan_req_id = __cpu_to_le32(scan_req_id);
6913 cmn->vdev_id = __cpu_to_le32(arg->vdev_id);
6914 cmn->scan_priority = __cpu_to_le32(arg->scan_priority);
6915 cmn->notify_scan_events = __cpu_to_le32(arg->notify_scan_events);
6916 cmn->dwell_time_active = __cpu_to_le32(arg->dwell_time_active);
6917 cmn->dwell_time_passive = __cpu_to_le32(arg->dwell_time_passive);
6918 cmn->min_rest_time = __cpu_to_le32(arg->min_rest_time);
6919 cmn->max_rest_time = __cpu_to_le32(arg->max_rest_time);
6920 cmn->repeat_probe_time = __cpu_to_le32(arg->repeat_probe_time);
6921 cmn->probe_spacing_time = __cpu_to_le32(arg->probe_spacing_time);
6922 cmn->idle_time = __cpu_to_le32(arg->idle_time);
6923 cmn->max_scan_time = __cpu_to_le32(arg->max_scan_time);
6924 cmn->probe_delay = __cpu_to_le32(arg->probe_delay);
6925 cmn->scan_ctrl_flags = __cpu_to_le32(arg->scan_ctrl_flags);
6926 }
6927
6928 static void
ath10k_wmi_put_start_scan_tlvs(struct wmi_start_scan_tlvs * tlvs,const struct wmi_start_scan_arg * arg)6929 ath10k_wmi_put_start_scan_tlvs(struct wmi_start_scan_tlvs *tlvs,
6930 const struct wmi_start_scan_arg *arg)
6931 {
6932 struct wmi_ie_data *ie;
6933 struct wmi_chan_list *channels;
6934 struct wmi_ssid_list *ssids;
6935 struct wmi_bssid_list *bssids;
6936 void *ptr = tlvs->tlvs;
6937 int i;
6938
6939 if (arg->n_channels) {
6940 channels = ptr;
6941 channels->tag = __cpu_to_le32(WMI_CHAN_LIST_TAG);
6942 channels->num_chan = __cpu_to_le32(arg->n_channels);
6943
6944 for (i = 0; i < arg->n_channels; i++)
6945 channels->channel_list[i].freq =
6946 __cpu_to_le16(arg->channels[i]);
6947
6948 ptr += sizeof(*channels);
6949 ptr += sizeof(__le32) * arg->n_channels;
6950 }
6951
6952 if (arg->n_ssids) {
6953 ssids = ptr;
6954 ssids->tag = __cpu_to_le32(WMI_SSID_LIST_TAG);
6955 ssids->num_ssids = __cpu_to_le32(arg->n_ssids);
6956
6957 for (i = 0; i < arg->n_ssids; i++) {
6958 ssids->ssids[i].ssid_len =
6959 __cpu_to_le32(arg->ssids[i].len);
6960 memcpy(&ssids->ssids[i].ssid,
6961 arg->ssids[i].ssid,
6962 arg->ssids[i].len);
6963 }
6964
6965 ptr += sizeof(*ssids);
6966 ptr += sizeof(struct wmi_ssid) * arg->n_ssids;
6967 }
6968
6969 if (arg->n_bssids) {
6970 bssids = ptr;
6971 bssids->tag = __cpu_to_le32(WMI_BSSID_LIST_TAG);
6972 bssids->num_bssid = __cpu_to_le32(arg->n_bssids);
6973
6974 for (i = 0; i < arg->n_bssids; i++)
6975 ether_addr_copy(bssids->bssid_list[i].addr,
6976 arg->bssids[i].bssid);
6977
6978 ptr += sizeof(*bssids);
6979 ptr += sizeof(struct wmi_mac_addr) * arg->n_bssids;
6980 }
6981
6982 if (arg->ie_len) {
6983 ie = ptr;
6984 ie->tag = __cpu_to_le32(WMI_IE_TAG);
6985 ie->ie_len = __cpu_to_le32(arg->ie_len);
6986 memcpy(ie->ie_data, arg->ie, arg->ie_len);
6987
6988 ptr += sizeof(*ie);
6989 ptr += roundup(arg->ie_len, 4);
6990 }
6991 }
6992
6993 static struct sk_buff *
ath10k_wmi_op_gen_start_scan(struct ath10k * ar,const struct wmi_start_scan_arg * arg)6994 ath10k_wmi_op_gen_start_scan(struct ath10k *ar,
6995 const struct wmi_start_scan_arg *arg)
6996 {
6997 struct wmi_start_scan_cmd *cmd;
6998 struct sk_buff *skb;
6999 size_t len;
7000 int ret;
7001
7002 ret = ath10k_wmi_start_scan_verify(arg);
7003 if (ret)
7004 return ERR_PTR(ret);
7005
7006 len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg);
7007 skb = ath10k_wmi_alloc_skb(ar, len);
7008 if (!skb)
7009 return ERR_PTR(-ENOMEM);
7010
7011 cmd = (struct wmi_start_scan_cmd *)skb->data;
7012
7013 ath10k_wmi_put_start_scan_common(&cmd->common, arg);
7014 ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg);
7015
7016 cmd->burst_duration_ms = __cpu_to_le32(0);
7017
7018 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi start scan\n");
7019 return skb;
7020 }
7021
7022 static struct sk_buff *
ath10k_wmi_10x_op_gen_start_scan(struct ath10k * ar,const struct wmi_start_scan_arg * arg)7023 ath10k_wmi_10x_op_gen_start_scan(struct ath10k *ar,
7024 const struct wmi_start_scan_arg *arg)
7025 {
7026 struct wmi_10x_start_scan_cmd *cmd;
7027 struct sk_buff *skb;
7028 size_t len;
7029 int ret;
7030
7031 ret = ath10k_wmi_start_scan_verify(arg);
7032 if (ret)
7033 return ERR_PTR(ret);
7034
7035 len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg);
7036 skb = ath10k_wmi_alloc_skb(ar, len);
7037 if (!skb)
7038 return ERR_PTR(-ENOMEM);
7039
7040 cmd = (struct wmi_10x_start_scan_cmd *)skb->data;
7041
7042 ath10k_wmi_put_start_scan_common(&cmd->common, arg);
7043 ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg);
7044
7045 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi 10x start scan\n");
7046 return skb;
7047 }
7048
ath10k_wmi_start_scan_init(struct ath10k * ar,struct wmi_start_scan_arg * arg)7049 void ath10k_wmi_start_scan_init(struct ath10k *ar,
7050 struct wmi_start_scan_arg *arg)
7051 {
7052 /* setup commonly used values */
7053 arg->scan_req_id = 1;
7054 arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
7055 arg->dwell_time_active = 50;
7056 arg->dwell_time_passive = 150;
7057 arg->min_rest_time = 50;
7058 arg->max_rest_time = 500;
7059 arg->repeat_probe_time = 0;
7060 arg->probe_spacing_time = 0;
7061 arg->idle_time = 0;
7062 arg->max_scan_time = 20000;
7063 arg->probe_delay = 5;
7064 arg->notify_scan_events = WMI_SCAN_EVENT_STARTED
7065 | WMI_SCAN_EVENT_COMPLETED
7066 | WMI_SCAN_EVENT_BSS_CHANNEL
7067 | WMI_SCAN_EVENT_FOREIGN_CHANNEL
7068 | WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT
7069 | WMI_SCAN_EVENT_DEQUEUED;
7070 arg->scan_ctrl_flags |= WMI_SCAN_CHAN_STAT_EVENT;
7071 arg->n_bssids = 1;
7072 arg->bssids[0].bssid = "\xFF\xFF\xFF\xFF\xFF\xFF";
7073 }
7074
7075 static struct sk_buff *
ath10k_wmi_op_gen_stop_scan(struct ath10k * ar,const struct wmi_stop_scan_arg * arg)7076 ath10k_wmi_op_gen_stop_scan(struct ath10k *ar,
7077 const struct wmi_stop_scan_arg *arg)
7078 {
7079 struct wmi_stop_scan_cmd *cmd;
7080 struct sk_buff *skb;
7081 u32 scan_id;
7082 u32 req_id;
7083
7084 if (arg->req_id > 0xFFF)
7085 return ERR_PTR(-EINVAL);
7086 if (arg->req_type == WMI_SCAN_STOP_ONE && arg->u.scan_id > 0xFFF)
7087 return ERR_PTR(-EINVAL);
7088
7089 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7090 if (!skb)
7091 return ERR_PTR(-ENOMEM);
7092
7093 scan_id = arg->u.scan_id;
7094 scan_id |= WMI_HOST_SCAN_REQ_ID_PREFIX;
7095
7096 req_id = arg->req_id;
7097 req_id |= WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
7098
7099 cmd = (struct wmi_stop_scan_cmd *)skb->data;
7100 cmd->req_type = __cpu_to_le32(arg->req_type);
7101 cmd->vdev_id = __cpu_to_le32(arg->u.vdev_id);
7102 cmd->scan_id = __cpu_to_le32(scan_id);
7103 cmd->scan_req_id = __cpu_to_le32(req_id);
7104
7105 ath10k_dbg(ar, ATH10K_DBG_WMI,
7106 "wmi stop scan reqid %d req_type %d vdev/scan_id %d\n",
7107 arg->req_id, arg->req_type, arg->u.scan_id);
7108 return skb;
7109 }
7110
7111 static struct sk_buff *
ath10k_wmi_op_gen_vdev_create(struct ath10k * ar,u32 vdev_id,enum wmi_vdev_type type,enum wmi_vdev_subtype subtype,const u8 macaddr[ETH_ALEN])7112 ath10k_wmi_op_gen_vdev_create(struct ath10k *ar, u32 vdev_id,
7113 enum wmi_vdev_type type,
7114 enum wmi_vdev_subtype subtype,
7115 const u8 macaddr[ETH_ALEN])
7116 {
7117 struct wmi_vdev_create_cmd *cmd;
7118 struct sk_buff *skb;
7119
7120 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7121 if (!skb)
7122 return ERR_PTR(-ENOMEM);
7123
7124 cmd = (struct wmi_vdev_create_cmd *)skb->data;
7125 cmd->vdev_id = __cpu_to_le32(vdev_id);
7126 cmd->vdev_type = __cpu_to_le32(type);
7127 cmd->vdev_subtype = __cpu_to_le32(subtype);
7128 ether_addr_copy(cmd->vdev_macaddr.addr, macaddr);
7129
7130 ath10k_dbg(ar, ATH10K_DBG_WMI,
7131 "WMI vdev create: id %d type %d subtype %d macaddr %pM\n",
7132 vdev_id, type, subtype, macaddr);
7133 return skb;
7134 }
7135
7136 static struct sk_buff *
ath10k_wmi_op_gen_vdev_delete(struct ath10k * ar,u32 vdev_id)7137 ath10k_wmi_op_gen_vdev_delete(struct ath10k *ar, u32 vdev_id)
7138 {
7139 struct wmi_vdev_delete_cmd *cmd;
7140 struct sk_buff *skb;
7141
7142 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7143 if (!skb)
7144 return ERR_PTR(-ENOMEM);
7145
7146 cmd = (struct wmi_vdev_delete_cmd *)skb->data;
7147 cmd->vdev_id = __cpu_to_le32(vdev_id);
7148
7149 ath10k_dbg(ar, ATH10K_DBG_WMI,
7150 "WMI vdev delete id %d\n", vdev_id);
7151 return skb;
7152 }
7153
7154 static struct sk_buff *
ath10k_wmi_op_gen_vdev_start(struct ath10k * ar,const struct wmi_vdev_start_request_arg * arg,bool restart)7155 ath10k_wmi_op_gen_vdev_start(struct ath10k *ar,
7156 const struct wmi_vdev_start_request_arg *arg,
7157 bool restart)
7158 {
7159 struct wmi_vdev_start_request_cmd *cmd;
7160 struct sk_buff *skb;
7161 const char *cmdname;
7162 u32 flags = 0;
7163
7164 if (WARN_ON(arg->hidden_ssid && !arg->ssid))
7165 return ERR_PTR(-EINVAL);
7166 if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid)))
7167 return ERR_PTR(-EINVAL);
7168
7169 if (restart)
7170 cmdname = "restart";
7171 else
7172 cmdname = "start";
7173
7174 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7175 if (!skb)
7176 return ERR_PTR(-ENOMEM);
7177
7178 if (arg->hidden_ssid)
7179 flags |= WMI_VDEV_START_HIDDEN_SSID;
7180 if (arg->pmf_enabled)
7181 flags |= WMI_VDEV_START_PMF_ENABLED;
7182
7183 cmd = (struct wmi_vdev_start_request_cmd *)skb->data;
7184 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
7185 cmd->disable_hw_ack = __cpu_to_le32(arg->disable_hw_ack);
7186 cmd->beacon_interval = __cpu_to_le32(arg->bcn_intval);
7187 cmd->dtim_period = __cpu_to_le32(arg->dtim_period);
7188 cmd->flags = __cpu_to_le32(flags);
7189 cmd->bcn_tx_rate = __cpu_to_le32(arg->bcn_tx_rate);
7190 cmd->bcn_tx_power = __cpu_to_le32(arg->bcn_tx_power);
7191
7192 if (arg->ssid) {
7193 cmd->ssid.ssid_len = __cpu_to_le32(arg->ssid_len);
7194 memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len);
7195 }
7196
7197 ath10k_wmi_put_wmi_channel(ar, &cmd->chan, &arg->channel);
7198
7199 ath10k_dbg(ar, ATH10K_DBG_WMI,
7200 "wmi vdev %s id 0x%x flags: 0x%0X, freq %d, mode %d, ch_flags: 0x%0X, max_power: %d\n",
7201 cmdname, arg->vdev_id,
7202 flags, arg->channel.freq, arg->channel.mode,
7203 cmd->chan.flags, arg->channel.max_power);
7204
7205 return skb;
7206 }
7207
7208 static struct sk_buff *
ath10k_wmi_op_gen_vdev_stop(struct ath10k * ar,u32 vdev_id)7209 ath10k_wmi_op_gen_vdev_stop(struct ath10k *ar, u32 vdev_id)
7210 {
7211 struct wmi_vdev_stop_cmd *cmd;
7212 struct sk_buff *skb;
7213
7214 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7215 if (!skb)
7216 return ERR_PTR(-ENOMEM);
7217
7218 cmd = (struct wmi_vdev_stop_cmd *)skb->data;
7219 cmd->vdev_id = __cpu_to_le32(vdev_id);
7220
7221 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi vdev stop id 0x%x\n", vdev_id);
7222 return skb;
7223 }
7224
7225 static struct sk_buff *
ath10k_wmi_op_gen_vdev_up(struct ath10k * ar,u32 vdev_id,u32 aid,const u8 * bssid)7226 ath10k_wmi_op_gen_vdev_up(struct ath10k *ar, u32 vdev_id, u32 aid,
7227 const u8 *bssid)
7228 {
7229 struct wmi_vdev_up_cmd *cmd;
7230 struct sk_buff *skb;
7231
7232 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7233 if (!skb)
7234 return ERR_PTR(-ENOMEM);
7235
7236 cmd = (struct wmi_vdev_up_cmd *)skb->data;
7237 cmd->vdev_id = __cpu_to_le32(vdev_id);
7238 cmd->vdev_assoc_id = __cpu_to_le32(aid);
7239 ether_addr_copy(cmd->vdev_bssid.addr, bssid);
7240
7241 ath10k_dbg(ar, ATH10K_DBG_WMI,
7242 "wmi mgmt vdev up id 0x%x assoc id %d bssid %pM\n",
7243 vdev_id, aid, bssid);
7244 return skb;
7245 }
7246
7247 static struct sk_buff *
ath10k_wmi_op_gen_vdev_down(struct ath10k * ar,u32 vdev_id)7248 ath10k_wmi_op_gen_vdev_down(struct ath10k *ar, u32 vdev_id)
7249 {
7250 struct wmi_vdev_down_cmd *cmd;
7251 struct sk_buff *skb;
7252
7253 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7254 if (!skb)
7255 return ERR_PTR(-ENOMEM);
7256
7257 cmd = (struct wmi_vdev_down_cmd *)skb->data;
7258 cmd->vdev_id = __cpu_to_le32(vdev_id);
7259
7260 ath10k_dbg(ar, ATH10K_DBG_WMI,
7261 "wmi mgmt vdev down id 0x%x\n", vdev_id);
7262 return skb;
7263 }
7264
7265 static struct sk_buff *
ath10k_wmi_op_gen_vdev_set_param(struct ath10k * ar,u32 vdev_id,u32 param_id,u32 param_value)7266 ath10k_wmi_op_gen_vdev_set_param(struct ath10k *ar, u32 vdev_id,
7267 u32 param_id, u32 param_value)
7268 {
7269 struct wmi_vdev_set_param_cmd *cmd;
7270 struct sk_buff *skb;
7271
7272 if (param_id == WMI_VDEV_PARAM_UNSUPPORTED) {
7273 ath10k_dbg(ar, ATH10K_DBG_WMI,
7274 "vdev param %d not supported by firmware\n",
7275 param_id);
7276 return ERR_PTR(-EOPNOTSUPP);
7277 }
7278
7279 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7280 if (!skb)
7281 return ERR_PTR(-ENOMEM);
7282
7283 cmd = (struct wmi_vdev_set_param_cmd *)skb->data;
7284 cmd->vdev_id = __cpu_to_le32(vdev_id);
7285 cmd->param_id = __cpu_to_le32(param_id);
7286 cmd->param_value = __cpu_to_le32(param_value);
7287
7288 ath10k_dbg(ar, ATH10K_DBG_WMI,
7289 "wmi vdev id 0x%x set param %d value %d\n",
7290 vdev_id, param_id, param_value);
7291 return skb;
7292 }
7293
7294 static struct sk_buff *
ath10k_wmi_op_gen_vdev_install_key(struct ath10k * ar,const struct wmi_vdev_install_key_arg * arg)7295 ath10k_wmi_op_gen_vdev_install_key(struct ath10k *ar,
7296 const struct wmi_vdev_install_key_arg *arg)
7297 {
7298 struct wmi_vdev_install_key_cmd *cmd;
7299 struct sk_buff *skb;
7300
7301 if (arg->key_cipher == WMI_CIPHER_NONE && arg->key_data != NULL)
7302 return ERR_PTR(-EINVAL);
7303 if (arg->key_cipher != WMI_CIPHER_NONE && arg->key_data == NULL)
7304 return ERR_PTR(-EINVAL);
7305
7306 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd) + arg->key_len);
7307 if (!skb)
7308 return ERR_PTR(-ENOMEM);
7309
7310 cmd = (struct wmi_vdev_install_key_cmd *)skb->data;
7311 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
7312 cmd->key_idx = __cpu_to_le32(arg->key_idx);
7313 cmd->key_flags = __cpu_to_le32(arg->key_flags);
7314 cmd->key_cipher = __cpu_to_le32(arg->key_cipher);
7315 cmd->key_len = __cpu_to_le32(arg->key_len);
7316 cmd->key_txmic_len = __cpu_to_le32(arg->key_txmic_len);
7317 cmd->key_rxmic_len = __cpu_to_le32(arg->key_rxmic_len);
7318
7319 if (arg->macaddr)
7320 ether_addr_copy(cmd->peer_macaddr.addr, arg->macaddr);
7321 if (arg->key_data)
7322 memcpy(cmd->key_data, arg->key_data, arg->key_len);
7323
7324 ath10k_dbg(ar, ATH10K_DBG_WMI,
7325 "wmi vdev install key idx %d cipher %d len %d\n",
7326 arg->key_idx, arg->key_cipher, arg->key_len);
7327 return skb;
7328 }
7329
7330 static struct sk_buff *
ath10k_wmi_op_gen_vdev_spectral_conf(struct ath10k * ar,const struct wmi_vdev_spectral_conf_arg * arg)7331 ath10k_wmi_op_gen_vdev_spectral_conf(struct ath10k *ar,
7332 const struct wmi_vdev_spectral_conf_arg *arg)
7333 {
7334 struct wmi_vdev_spectral_conf_cmd *cmd;
7335 struct sk_buff *skb;
7336
7337 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7338 if (!skb)
7339 return ERR_PTR(-ENOMEM);
7340
7341 cmd = (struct wmi_vdev_spectral_conf_cmd *)skb->data;
7342 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
7343 cmd->scan_count = __cpu_to_le32(arg->scan_count);
7344 cmd->scan_period = __cpu_to_le32(arg->scan_period);
7345 cmd->scan_priority = __cpu_to_le32(arg->scan_priority);
7346 cmd->scan_fft_size = __cpu_to_le32(arg->scan_fft_size);
7347 cmd->scan_gc_ena = __cpu_to_le32(arg->scan_gc_ena);
7348 cmd->scan_restart_ena = __cpu_to_le32(arg->scan_restart_ena);
7349 cmd->scan_noise_floor_ref = __cpu_to_le32(arg->scan_noise_floor_ref);
7350 cmd->scan_init_delay = __cpu_to_le32(arg->scan_init_delay);
7351 cmd->scan_nb_tone_thr = __cpu_to_le32(arg->scan_nb_tone_thr);
7352 cmd->scan_str_bin_thr = __cpu_to_le32(arg->scan_str_bin_thr);
7353 cmd->scan_wb_rpt_mode = __cpu_to_le32(arg->scan_wb_rpt_mode);
7354 cmd->scan_rssi_rpt_mode = __cpu_to_le32(arg->scan_rssi_rpt_mode);
7355 cmd->scan_rssi_thr = __cpu_to_le32(arg->scan_rssi_thr);
7356 cmd->scan_pwr_format = __cpu_to_le32(arg->scan_pwr_format);
7357 cmd->scan_rpt_mode = __cpu_to_le32(arg->scan_rpt_mode);
7358 cmd->scan_bin_scale = __cpu_to_le32(arg->scan_bin_scale);
7359 cmd->scan_dbm_adj = __cpu_to_le32(arg->scan_dbm_adj);
7360 cmd->scan_chn_mask = __cpu_to_le32(arg->scan_chn_mask);
7361
7362 return skb;
7363 }
7364
7365 static struct sk_buff *
ath10k_wmi_op_gen_vdev_spectral_enable(struct ath10k * ar,u32 vdev_id,u32 trigger,u32 enable)7366 ath10k_wmi_op_gen_vdev_spectral_enable(struct ath10k *ar, u32 vdev_id,
7367 u32 trigger, u32 enable)
7368 {
7369 struct wmi_vdev_spectral_enable_cmd *cmd;
7370 struct sk_buff *skb;
7371
7372 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7373 if (!skb)
7374 return ERR_PTR(-ENOMEM);
7375
7376 cmd = (struct wmi_vdev_spectral_enable_cmd *)skb->data;
7377 cmd->vdev_id = __cpu_to_le32(vdev_id);
7378 cmd->trigger_cmd = __cpu_to_le32(trigger);
7379 cmd->enable_cmd = __cpu_to_le32(enable);
7380
7381 return skb;
7382 }
7383
7384 static struct sk_buff *
ath10k_wmi_op_gen_peer_create(struct ath10k * ar,u32 vdev_id,const u8 peer_addr[ETH_ALEN],enum wmi_peer_type peer_type)7385 ath10k_wmi_op_gen_peer_create(struct ath10k *ar, u32 vdev_id,
7386 const u8 peer_addr[ETH_ALEN],
7387 enum wmi_peer_type peer_type)
7388 {
7389 struct wmi_peer_create_cmd *cmd;
7390 struct sk_buff *skb;
7391
7392 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7393 if (!skb)
7394 return ERR_PTR(-ENOMEM);
7395
7396 cmd = (struct wmi_peer_create_cmd *)skb->data;
7397 cmd->vdev_id = __cpu_to_le32(vdev_id);
7398 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
7399 cmd->peer_type = __cpu_to_le32(peer_type);
7400
7401 ath10k_dbg(ar, ATH10K_DBG_WMI,
7402 "wmi peer create vdev_id %d peer_addr %pM\n",
7403 vdev_id, peer_addr);
7404 return skb;
7405 }
7406
7407 static struct sk_buff *
ath10k_wmi_op_gen_peer_delete(struct ath10k * ar,u32 vdev_id,const u8 peer_addr[ETH_ALEN])7408 ath10k_wmi_op_gen_peer_delete(struct ath10k *ar, u32 vdev_id,
7409 const u8 peer_addr[ETH_ALEN])
7410 {
7411 struct wmi_peer_delete_cmd *cmd;
7412 struct sk_buff *skb;
7413
7414 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7415 if (!skb)
7416 return ERR_PTR(-ENOMEM);
7417
7418 cmd = (struct wmi_peer_delete_cmd *)skb->data;
7419 cmd->vdev_id = __cpu_to_le32(vdev_id);
7420 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
7421
7422 ath10k_dbg(ar, ATH10K_DBG_WMI,
7423 "wmi peer delete vdev_id %d peer_addr %pM\n",
7424 vdev_id, peer_addr);
7425 return skb;
7426 }
7427
7428 static struct sk_buff *
ath10k_wmi_op_gen_peer_flush(struct ath10k * ar,u32 vdev_id,const u8 peer_addr[ETH_ALEN],u32 tid_bitmap)7429 ath10k_wmi_op_gen_peer_flush(struct ath10k *ar, u32 vdev_id,
7430 const u8 peer_addr[ETH_ALEN], u32 tid_bitmap)
7431 {
7432 struct wmi_peer_flush_tids_cmd *cmd;
7433 struct sk_buff *skb;
7434
7435 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7436 if (!skb)
7437 return ERR_PTR(-ENOMEM);
7438
7439 cmd = (struct wmi_peer_flush_tids_cmd *)skb->data;
7440 cmd->vdev_id = __cpu_to_le32(vdev_id);
7441 cmd->peer_tid_bitmap = __cpu_to_le32(tid_bitmap);
7442 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
7443
7444 ath10k_dbg(ar, ATH10K_DBG_WMI,
7445 "wmi peer flush vdev_id %d peer_addr %pM tids %08x\n",
7446 vdev_id, peer_addr, tid_bitmap);
7447 return skb;
7448 }
7449
7450 static struct sk_buff *
ath10k_wmi_op_gen_peer_set_param(struct ath10k * ar,u32 vdev_id,const u8 * peer_addr,enum wmi_peer_param param_id,u32 param_value)7451 ath10k_wmi_op_gen_peer_set_param(struct ath10k *ar, u32 vdev_id,
7452 const u8 *peer_addr,
7453 enum wmi_peer_param param_id,
7454 u32 param_value)
7455 {
7456 struct wmi_peer_set_param_cmd *cmd;
7457 struct sk_buff *skb;
7458
7459 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7460 if (!skb)
7461 return ERR_PTR(-ENOMEM);
7462
7463 cmd = (struct wmi_peer_set_param_cmd *)skb->data;
7464 cmd->vdev_id = __cpu_to_le32(vdev_id);
7465 cmd->param_id = __cpu_to_le32(param_id);
7466 cmd->param_value = __cpu_to_le32(param_value);
7467 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
7468
7469 ath10k_dbg(ar, ATH10K_DBG_WMI,
7470 "wmi vdev %d peer 0x%pM set param %d value %d\n",
7471 vdev_id, peer_addr, param_id, param_value);
7472 return skb;
7473 }
7474
7475 static struct sk_buff *
ath10k_wmi_op_gen_set_psmode(struct ath10k * ar,u32 vdev_id,enum wmi_sta_ps_mode psmode)7476 ath10k_wmi_op_gen_set_psmode(struct ath10k *ar, u32 vdev_id,
7477 enum wmi_sta_ps_mode psmode)
7478 {
7479 struct wmi_sta_powersave_mode_cmd *cmd;
7480 struct sk_buff *skb;
7481
7482 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7483 if (!skb)
7484 return ERR_PTR(-ENOMEM);
7485
7486 cmd = (struct wmi_sta_powersave_mode_cmd *)skb->data;
7487 cmd->vdev_id = __cpu_to_le32(vdev_id);
7488 cmd->sta_ps_mode = __cpu_to_le32(psmode);
7489
7490 ath10k_dbg(ar, ATH10K_DBG_WMI,
7491 "wmi set powersave id 0x%x mode %d\n",
7492 vdev_id, psmode);
7493 return skb;
7494 }
7495
7496 static struct sk_buff *
ath10k_wmi_op_gen_set_sta_ps(struct ath10k * ar,u32 vdev_id,enum wmi_sta_powersave_param param_id,u32 value)7497 ath10k_wmi_op_gen_set_sta_ps(struct ath10k *ar, u32 vdev_id,
7498 enum wmi_sta_powersave_param param_id,
7499 u32 value)
7500 {
7501 struct wmi_sta_powersave_param_cmd *cmd;
7502 struct sk_buff *skb;
7503
7504 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7505 if (!skb)
7506 return ERR_PTR(-ENOMEM);
7507
7508 cmd = (struct wmi_sta_powersave_param_cmd *)skb->data;
7509 cmd->vdev_id = __cpu_to_le32(vdev_id);
7510 cmd->param_id = __cpu_to_le32(param_id);
7511 cmd->param_value = __cpu_to_le32(value);
7512
7513 ath10k_dbg(ar, ATH10K_DBG_STA,
7514 "wmi sta ps param vdev_id 0x%x param %d value %d\n",
7515 vdev_id, param_id, value);
7516 return skb;
7517 }
7518
7519 static struct sk_buff *
ath10k_wmi_op_gen_set_ap_ps(struct ath10k * ar,u32 vdev_id,const u8 * mac,enum wmi_ap_ps_peer_param param_id,u32 value)7520 ath10k_wmi_op_gen_set_ap_ps(struct ath10k *ar, u32 vdev_id, const u8 *mac,
7521 enum wmi_ap_ps_peer_param param_id, u32 value)
7522 {
7523 struct wmi_ap_ps_peer_cmd *cmd;
7524 struct sk_buff *skb;
7525
7526 if (!mac)
7527 return ERR_PTR(-EINVAL);
7528
7529 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7530 if (!skb)
7531 return ERR_PTR(-ENOMEM);
7532
7533 cmd = (struct wmi_ap_ps_peer_cmd *)skb->data;
7534 cmd->vdev_id = __cpu_to_le32(vdev_id);
7535 cmd->param_id = __cpu_to_le32(param_id);
7536 cmd->param_value = __cpu_to_le32(value);
7537 ether_addr_copy(cmd->peer_macaddr.addr, mac);
7538
7539 ath10k_dbg(ar, ATH10K_DBG_WMI,
7540 "wmi ap ps param vdev_id 0x%X param %d value %d mac_addr %pM\n",
7541 vdev_id, param_id, value, mac);
7542 return skb;
7543 }
7544
7545 static struct sk_buff *
ath10k_wmi_op_gen_scan_chan_list(struct ath10k * ar,const struct wmi_scan_chan_list_arg * arg)7546 ath10k_wmi_op_gen_scan_chan_list(struct ath10k *ar,
7547 const struct wmi_scan_chan_list_arg *arg)
7548 {
7549 struct wmi_scan_chan_list_cmd *cmd;
7550 struct sk_buff *skb;
7551 struct wmi_channel_arg *ch;
7552 struct wmi_channel *ci;
7553 int i;
7554
7555 skb = ath10k_wmi_alloc_skb(ar, struct_size(cmd, chan_info, arg->n_channels));
7556 if (!skb)
7557 return ERR_PTR(-EINVAL);
7558
7559 cmd = (struct wmi_scan_chan_list_cmd *)skb->data;
7560 cmd->num_scan_chans = __cpu_to_le32(arg->n_channels);
7561
7562 for (i = 0; i < arg->n_channels; i++) {
7563 ch = &arg->channels[i];
7564 ci = &cmd->chan_info[i];
7565
7566 ath10k_wmi_put_wmi_channel(ar, ci, ch);
7567 }
7568
7569 return skb;
7570 }
7571
7572 static void
ath10k_wmi_peer_assoc_fill(struct ath10k * ar,void * buf,const struct wmi_peer_assoc_complete_arg * arg)7573 ath10k_wmi_peer_assoc_fill(struct ath10k *ar, void *buf,
7574 const struct wmi_peer_assoc_complete_arg *arg)
7575 {
7576 struct wmi_common_peer_assoc_complete_cmd *cmd = buf;
7577
7578 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
7579 cmd->peer_new_assoc = __cpu_to_le32(arg->peer_reassoc ? 0 : 1);
7580 cmd->peer_associd = __cpu_to_le32(arg->peer_aid);
7581 cmd->peer_flags = __cpu_to_le32(arg->peer_flags);
7582 cmd->peer_caps = __cpu_to_le32(arg->peer_caps);
7583 cmd->peer_listen_intval = __cpu_to_le32(arg->peer_listen_intval);
7584 cmd->peer_ht_caps = __cpu_to_le32(arg->peer_ht_caps);
7585 cmd->peer_max_mpdu = __cpu_to_le32(arg->peer_max_mpdu);
7586 cmd->peer_mpdu_density = __cpu_to_le32(arg->peer_mpdu_density);
7587 cmd->peer_rate_caps = __cpu_to_le32(arg->peer_rate_caps);
7588 cmd->peer_nss = __cpu_to_le32(arg->peer_num_spatial_streams);
7589 cmd->peer_vht_caps = __cpu_to_le32(arg->peer_vht_caps);
7590 cmd->peer_phymode = __cpu_to_le32(arg->peer_phymode);
7591
7592 ether_addr_copy(cmd->peer_macaddr.addr, arg->addr);
7593
7594 cmd->peer_legacy_rates.num_rates =
7595 __cpu_to_le32(arg->peer_legacy_rates.num_rates);
7596 memcpy(cmd->peer_legacy_rates.rates, arg->peer_legacy_rates.rates,
7597 arg->peer_legacy_rates.num_rates);
7598
7599 cmd->peer_ht_rates.num_rates =
7600 __cpu_to_le32(arg->peer_ht_rates.num_rates);
7601 memcpy(cmd->peer_ht_rates.rates, arg->peer_ht_rates.rates,
7602 arg->peer_ht_rates.num_rates);
7603
7604 cmd->peer_vht_rates.rx_max_rate =
7605 __cpu_to_le32(arg->peer_vht_rates.rx_max_rate);
7606 cmd->peer_vht_rates.rx_mcs_set =
7607 __cpu_to_le32(arg->peer_vht_rates.rx_mcs_set);
7608 cmd->peer_vht_rates.tx_max_rate =
7609 __cpu_to_le32(arg->peer_vht_rates.tx_max_rate);
7610 cmd->peer_vht_rates.tx_mcs_set =
7611 __cpu_to_le32(arg->peer_vht_rates.tx_mcs_set);
7612 }
7613
7614 static void
ath10k_wmi_peer_assoc_fill_main(struct ath10k * ar,void * buf,const struct wmi_peer_assoc_complete_arg * arg)7615 ath10k_wmi_peer_assoc_fill_main(struct ath10k *ar, void *buf,
7616 const struct wmi_peer_assoc_complete_arg *arg)
7617 {
7618 struct wmi_main_peer_assoc_complete_cmd *cmd = buf;
7619
7620 ath10k_wmi_peer_assoc_fill(ar, buf, arg);
7621 memset(cmd->peer_ht_info, 0, sizeof(cmd->peer_ht_info));
7622 }
7623
7624 static void
ath10k_wmi_peer_assoc_fill_10_1(struct ath10k * ar,void * buf,const struct wmi_peer_assoc_complete_arg * arg)7625 ath10k_wmi_peer_assoc_fill_10_1(struct ath10k *ar, void *buf,
7626 const struct wmi_peer_assoc_complete_arg *arg)
7627 {
7628 ath10k_wmi_peer_assoc_fill(ar, buf, arg);
7629 }
7630
7631 static void
ath10k_wmi_peer_assoc_fill_10_2(struct ath10k * ar,void * buf,const struct wmi_peer_assoc_complete_arg * arg)7632 ath10k_wmi_peer_assoc_fill_10_2(struct ath10k *ar, void *buf,
7633 const struct wmi_peer_assoc_complete_arg *arg)
7634 {
7635 struct wmi_10_2_peer_assoc_complete_cmd *cmd = buf;
7636 int max_mcs, max_nss;
7637 u32 info0;
7638
7639 /* TODO: Is using max values okay with firmware? */
7640 max_mcs = 0xf;
7641 max_nss = 0xf;
7642
7643 info0 = SM(max_mcs, WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX) |
7644 SM(max_nss, WMI_PEER_ASSOC_INFO0_MAX_NSS);
7645
7646 ath10k_wmi_peer_assoc_fill(ar, buf, arg);
7647 cmd->info0 = __cpu_to_le32(info0);
7648 }
7649
7650 static void
ath10k_wmi_peer_assoc_fill_10_4(struct ath10k * ar,void * buf,const struct wmi_peer_assoc_complete_arg * arg)7651 ath10k_wmi_peer_assoc_fill_10_4(struct ath10k *ar, void *buf,
7652 const struct wmi_peer_assoc_complete_arg *arg)
7653 {
7654 struct wmi_10_4_peer_assoc_complete_cmd *cmd = buf;
7655
7656 ath10k_wmi_peer_assoc_fill_10_2(ar, buf, arg);
7657 cmd->peer_bw_rxnss_override =
7658 __cpu_to_le32(arg->peer_bw_rxnss_override);
7659 }
7660
7661 static int
ath10k_wmi_peer_assoc_check_arg(const struct wmi_peer_assoc_complete_arg * arg)7662 ath10k_wmi_peer_assoc_check_arg(const struct wmi_peer_assoc_complete_arg *arg)
7663 {
7664 if (arg->peer_mpdu_density > 16)
7665 return -EINVAL;
7666 if (arg->peer_legacy_rates.num_rates > MAX_SUPPORTED_RATES)
7667 return -EINVAL;
7668 if (arg->peer_ht_rates.num_rates > MAX_SUPPORTED_RATES)
7669 return -EINVAL;
7670
7671 return 0;
7672 }
7673
7674 static struct sk_buff *
ath10k_wmi_op_gen_peer_assoc(struct ath10k * ar,const struct wmi_peer_assoc_complete_arg * arg)7675 ath10k_wmi_op_gen_peer_assoc(struct ath10k *ar,
7676 const struct wmi_peer_assoc_complete_arg *arg)
7677 {
7678 size_t len = sizeof(struct wmi_main_peer_assoc_complete_cmd);
7679 struct sk_buff *skb;
7680 int ret;
7681
7682 ret = ath10k_wmi_peer_assoc_check_arg(arg);
7683 if (ret)
7684 return ERR_PTR(ret);
7685
7686 skb = ath10k_wmi_alloc_skb(ar, len);
7687 if (!skb)
7688 return ERR_PTR(-ENOMEM);
7689
7690 ath10k_wmi_peer_assoc_fill_main(ar, skb->data, arg);
7691
7692 ath10k_dbg(ar, ATH10K_DBG_WMI,
7693 "wmi peer assoc vdev %d addr %pM (%s)\n",
7694 arg->vdev_id, arg->addr,
7695 arg->peer_reassoc ? "reassociate" : "new");
7696 return skb;
7697 }
7698
7699 static struct sk_buff *
ath10k_wmi_10_1_op_gen_peer_assoc(struct ath10k * ar,const struct wmi_peer_assoc_complete_arg * arg)7700 ath10k_wmi_10_1_op_gen_peer_assoc(struct ath10k *ar,
7701 const struct wmi_peer_assoc_complete_arg *arg)
7702 {
7703 size_t len = sizeof(struct wmi_10_1_peer_assoc_complete_cmd);
7704 struct sk_buff *skb;
7705 int ret;
7706
7707 ret = ath10k_wmi_peer_assoc_check_arg(arg);
7708 if (ret)
7709 return ERR_PTR(ret);
7710
7711 skb = ath10k_wmi_alloc_skb(ar, len);
7712 if (!skb)
7713 return ERR_PTR(-ENOMEM);
7714
7715 ath10k_wmi_peer_assoc_fill_10_1(ar, skb->data, arg);
7716
7717 ath10k_dbg(ar, ATH10K_DBG_WMI,
7718 "wmi peer assoc vdev %d addr %pM (%s)\n",
7719 arg->vdev_id, arg->addr,
7720 arg->peer_reassoc ? "reassociate" : "new");
7721 return skb;
7722 }
7723
7724 static struct sk_buff *
ath10k_wmi_10_2_op_gen_peer_assoc(struct ath10k * ar,const struct wmi_peer_assoc_complete_arg * arg)7725 ath10k_wmi_10_2_op_gen_peer_assoc(struct ath10k *ar,
7726 const struct wmi_peer_assoc_complete_arg *arg)
7727 {
7728 size_t len = sizeof(struct wmi_10_2_peer_assoc_complete_cmd);
7729 struct sk_buff *skb;
7730 int ret;
7731
7732 ret = ath10k_wmi_peer_assoc_check_arg(arg);
7733 if (ret)
7734 return ERR_PTR(ret);
7735
7736 skb = ath10k_wmi_alloc_skb(ar, len);
7737 if (!skb)
7738 return ERR_PTR(-ENOMEM);
7739
7740 ath10k_wmi_peer_assoc_fill_10_2(ar, skb->data, arg);
7741
7742 ath10k_dbg(ar, ATH10K_DBG_WMI,
7743 "wmi peer assoc vdev %d addr %pM (%s)\n",
7744 arg->vdev_id, arg->addr,
7745 arg->peer_reassoc ? "reassociate" : "new");
7746 return skb;
7747 }
7748
7749 static struct sk_buff *
ath10k_wmi_10_4_op_gen_peer_assoc(struct ath10k * ar,const struct wmi_peer_assoc_complete_arg * arg)7750 ath10k_wmi_10_4_op_gen_peer_assoc(struct ath10k *ar,
7751 const struct wmi_peer_assoc_complete_arg *arg)
7752 {
7753 size_t len = sizeof(struct wmi_10_4_peer_assoc_complete_cmd);
7754 struct sk_buff *skb;
7755 int ret;
7756
7757 ret = ath10k_wmi_peer_assoc_check_arg(arg);
7758 if (ret)
7759 return ERR_PTR(ret);
7760
7761 skb = ath10k_wmi_alloc_skb(ar, len);
7762 if (!skb)
7763 return ERR_PTR(-ENOMEM);
7764
7765 ath10k_wmi_peer_assoc_fill_10_4(ar, skb->data, arg);
7766
7767 ath10k_dbg(ar, ATH10K_DBG_WMI,
7768 "wmi peer assoc vdev %d addr %pM (%s)\n",
7769 arg->vdev_id, arg->addr,
7770 arg->peer_reassoc ? "reassociate" : "new");
7771 return skb;
7772 }
7773
7774 static struct sk_buff *
ath10k_wmi_10_2_op_gen_pdev_get_temperature(struct ath10k * ar)7775 ath10k_wmi_10_2_op_gen_pdev_get_temperature(struct ath10k *ar)
7776 {
7777 struct sk_buff *skb;
7778
7779 skb = ath10k_wmi_alloc_skb(ar, 0);
7780 if (!skb)
7781 return ERR_PTR(-ENOMEM);
7782
7783 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev get temperature\n");
7784 return skb;
7785 }
7786
7787 static struct sk_buff *
ath10k_wmi_10_2_op_gen_pdev_bss_chan_info(struct ath10k * ar,enum wmi_bss_survey_req_type type)7788 ath10k_wmi_10_2_op_gen_pdev_bss_chan_info(struct ath10k *ar,
7789 enum wmi_bss_survey_req_type type)
7790 {
7791 struct wmi_pdev_chan_info_req_cmd *cmd;
7792 struct sk_buff *skb;
7793
7794 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7795 if (!skb)
7796 return ERR_PTR(-ENOMEM);
7797
7798 cmd = (struct wmi_pdev_chan_info_req_cmd *)skb->data;
7799 cmd->type = __cpu_to_le32(type);
7800
7801 ath10k_dbg(ar, ATH10K_DBG_WMI,
7802 "wmi pdev bss info request type %d\n", type);
7803
7804 return skb;
7805 }
7806
7807 /* This function assumes the beacon is already DMA mapped */
7808 static struct sk_buff *
ath10k_wmi_op_gen_beacon_dma(struct ath10k * ar,u32 vdev_id,const void * bcn,size_t bcn_len,u32 bcn_paddr,bool dtim_zero,bool deliver_cab)7809 ath10k_wmi_op_gen_beacon_dma(struct ath10k *ar, u32 vdev_id, const void *bcn,
7810 size_t bcn_len, u32 bcn_paddr, bool dtim_zero,
7811 bool deliver_cab)
7812 {
7813 struct wmi_bcn_tx_ref_cmd *cmd;
7814 struct sk_buff *skb;
7815 struct ieee80211_hdr *hdr;
7816 u16 fc;
7817
7818 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7819 if (!skb)
7820 return ERR_PTR(-ENOMEM);
7821
7822 hdr = (struct ieee80211_hdr *)bcn;
7823 fc = le16_to_cpu(hdr->frame_control);
7824
7825 cmd = (struct wmi_bcn_tx_ref_cmd *)skb->data;
7826 cmd->vdev_id = __cpu_to_le32(vdev_id);
7827 cmd->data_len = __cpu_to_le32(bcn_len);
7828 cmd->data_ptr = __cpu_to_le32(bcn_paddr);
7829 cmd->msdu_id = 0;
7830 cmd->frame_control = __cpu_to_le32(fc);
7831 cmd->flags = 0;
7832 cmd->antenna_mask = __cpu_to_le32(WMI_BCN_TX_REF_DEF_ANTENNA);
7833
7834 if (dtim_zero)
7835 cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DTIM_ZERO);
7836
7837 if (deliver_cab)
7838 cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DELIVER_CAB);
7839
7840 return skb;
7841 }
7842
ath10k_wmi_set_wmm_param(struct wmi_wmm_params * params,const struct wmi_wmm_params_arg * arg)7843 void ath10k_wmi_set_wmm_param(struct wmi_wmm_params *params,
7844 const struct wmi_wmm_params_arg *arg)
7845 {
7846 params->cwmin = __cpu_to_le32(arg->cwmin);
7847 params->cwmax = __cpu_to_le32(arg->cwmax);
7848 params->aifs = __cpu_to_le32(arg->aifs);
7849 params->txop = __cpu_to_le32(arg->txop);
7850 params->acm = __cpu_to_le32(arg->acm);
7851 params->no_ack = __cpu_to_le32(arg->no_ack);
7852 }
7853
7854 static struct sk_buff *
ath10k_wmi_op_gen_pdev_set_wmm(struct ath10k * ar,const struct wmi_wmm_params_all_arg * arg)7855 ath10k_wmi_op_gen_pdev_set_wmm(struct ath10k *ar,
7856 const struct wmi_wmm_params_all_arg *arg)
7857 {
7858 struct wmi_pdev_set_wmm_params *cmd;
7859 struct sk_buff *skb;
7860
7861 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7862 if (!skb)
7863 return ERR_PTR(-ENOMEM);
7864
7865 cmd = (struct wmi_pdev_set_wmm_params *)skb->data;
7866 ath10k_wmi_set_wmm_param(&cmd->ac_be, &arg->ac_be);
7867 ath10k_wmi_set_wmm_param(&cmd->ac_bk, &arg->ac_bk);
7868 ath10k_wmi_set_wmm_param(&cmd->ac_vi, &arg->ac_vi);
7869 ath10k_wmi_set_wmm_param(&cmd->ac_vo, &arg->ac_vo);
7870
7871 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set wmm params\n");
7872 return skb;
7873 }
7874
7875 static struct sk_buff *
ath10k_wmi_op_gen_request_stats(struct ath10k * ar,u32 stats_mask)7876 ath10k_wmi_op_gen_request_stats(struct ath10k *ar, u32 stats_mask)
7877 {
7878 struct wmi_request_stats_cmd *cmd;
7879 struct sk_buff *skb;
7880
7881 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7882 if (!skb)
7883 return ERR_PTR(-ENOMEM);
7884
7885 cmd = (struct wmi_request_stats_cmd *)skb->data;
7886 cmd->stats_id = __cpu_to_le32(stats_mask);
7887
7888 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi request stats 0x%08x\n",
7889 stats_mask);
7890 return skb;
7891 }
7892
7893 static struct sk_buff *
ath10k_wmi_op_gen_force_fw_hang(struct ath10k * ar,enum wmi_force_fw_hang_type type,u32 delay_ms)7894 ath10k_wmi_op_gen_force_fw_hang(struct ath10k *ar,
7895 enum wmi_force_fw_hang_type type, u32 delay_ms)
7896 {
7897 struct wmi_force_fw_hang_cmd *cmd;
7898 struct sk_buff *skb;
7899
7900 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7901 if (!skb)
7902 return ERR_PTR(-ENOMEM);
7903
7904 cmd = (struct wmi_force_fw_hang_cmd *)skb->data;
7905 cmd->type = __cpu_to_le32(type);
7906 cmd->delay_ms = __cpu_to_le32(delay_ms);
7907
7908 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi force fw hang %d delay %d\n",
7909 type, delay_ms);
7910 return skb;
7911 }
7912
7913 static struct sk_buff *
ath10k_wmi_op_gen_dbglog_cfg(struct ath10k * ar,u64 module_enable,u32 log_level)7914 ath10k_wmi_op_gen_dbglog_cfg(struct ath10k *ar, u64 module_enable,
7915 u32 log_level)
7916 {
7917 struct wmi_dbglog_cfg_cmd *cmd;
7918 struct sk_buff *skb;
7919 u32 cfg;
7920
7921 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7922 if (!skb)
7923 return ERR_PTR(-ENOMEM);
7924
7925 cmd = (struct wmi_dbglog_cfg_cmd *)skb->data;
7926
7927 if (module_enable) {
7928 cfg = SM(log_level,
7929 ATH10K_DBGLOG_CFG_LOG_LVL);
7930 } else {
7931 /* set back defaults, all modules with WARN level */
7932 cfg = SM(ATH10K_DBGLOG_LEVEL_WARN,
7933 ATH10K_DBGLOG_CFG_LOG_LVL);
7934 module_enable = ~0;
7935 }
7936
7937 cmd->module_enable = __cpu_to_le32(module_enable);
7938 cmd->module_valid = __cpu_to_le32(~0);
7939 cmd->config_enable = __cpu_to_le32(cfg);
7940 cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK);
7941
7942 ath10k_dbg(ar, ATH10K_DBG_WMI,
7943 "wmi dbglog cfg modules %08x %08x config %08x %08x\n",
7944 __le32_to_cpu(cmd->module_enable),
7945 __le32_to_cpu(cmd->module_valid),
7946 __le32_to_cpu(cmd->config_enable),
7947 __le32_to_cpu(cmd->config_valid));
7948 return skb;
7949 }
7950
7951 static struct sk_buff *
ath10k_wmi_10_4_op_gen_dbglog_cfg(struct ath10k * ar,u64 module_enable,u32 log_level)7952 ath10k_wmi_10_4_op_gen_dbglog_cfg(struct ath10k *ar, u64 module_enable,
7953 u32 log_level)
7954 {
7955 struct wmi_10_4_dbglog_cfg_cmd *cmd;
7956 struct sk_buff *skb;
7957 u32 cfg;
7958
7959 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7960 if (!skb)
7961 return ERR_PTR(-ENOMEM);
7962
7963 cmd = (struct wmi_10_4_dbglog_cfg_cmd *)skb->data;
7964
7965 if (module_enable) {
7966 cfg = SM(log_level,
7967 ATH10K_DBGLOG_CFG_LOG_LVL);
7968 } else {
7969 /* set back defaults, all modules with WARN level */
7970 cfg = SM(ATH10K_DBGLOG_LEVEL_WARN,
7971 ATH10K_DBGLOG_CFG_LOG_LVL);
7972 module_enable = ~0;
7973 }
7974
7975 cmd->module_enable = __cpu_to_le64(module_enable);
7976 cmd->module_valid = __cpu_to_le64(~0);
7977 cmd->config_enable = __cpu_to_le32(cfg);
7978 cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK);
7979
7980 ath10k_dbg(ar, ATH10K_DBG_WMI,
7981 "wmi dbglog cfg modules 0x%016llx 0x%016llx config %08x %08x\n",
7982 __le64_to_cpu(cmd->module_enable),
7983 __le64_to_cpu(cmd->module_valid),
7984 __le32_to_cpu(cmd->config_enable),
7985 __le32_to_cpu(cmd->config_valid));
7986 return skb;
7987 }
7988
7989 static struct sk_buff *
ath10k_wmi_op_gen_pktlog_enable(struct ath10k * ar,u32 ev_bitmap)7990 ath10k_wmi_op_gen_pktlog_enable(struct ath10k *ar, u32 ev_bitmap)
7991 {
7992 struct wmi_pdev_pktlog_enable_cmd *cmd;
7993 struct sk_buff *skb;
7994
7995 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7996 if (!skb)
7997 return ERR_PTR(-ENOMEM);
7998
7999 ev_bitmap &= ATH10K_PKTLOG_ANY;
8000
8001 cmd = (struct wmi_pdev_pktlog_enable_cmd *)skb->data;
8002 cmd->ev_bitmap = __cpu_to_le32(ev_bitmap);
8003
8004 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi enable pktlog filter 0x%08x\n",
8005 ev_bitmap);
8006 return skb;
8007 }
8008
8009 static struct sk_buff *
ath10k_wmi_op_gen_pktlog_disable(struct ath10k * ar)8010 ath10k_wmi_op_gen_pktlog_disable(struct ath10k *ar)
8011 {
8012 struct sk_buff *skb;
8013
8014 skb = ath10k_wmi_alloc_skb(ar, 0);
8015 if (!skb)
8016 return ERR_PTR(-ENOMEM);
8017
8018 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi disable pktlog\n");
8019 return skb;
8020 }
8021
8022 static struct sk_buff *
ath10k_wmi_op_gen_pdev_set_quiet_mode(struct ath10k * ar,u32 period,u32 duration,u32 next_offset,u32 enabled)8023 ath10k_wmi_op_gen_pdev_set_quiet_mode(struct ath10k *ar, u32 period,
8024 u32 duration, u32 next_offset,
8025 u32 enabled)
8026 {
8027 struct wmi_pdev_set_quiet_cmd *cmd;
8028 struct sk_buff *skb;
8029
8030 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8031 if (!skb)
8032 return ERR_PTR(-ENOMEM);
8033
8034 cmd = (struct wmi_pdev_set_quiet_cmd *)skb->data;
8035 cmd->period = __cpu_to_le32(period);
8036 cmd->duration = __cpu_to_le32(duration);
8037 cmd->next_start = __cpu_to_le32(next_offset);
8038 cmd->enabled = __cpu_to_le32(enabled);
8039
8040 ath10k_dbg(ar, ATH10K_DBG_WMI,
8041 "wmi quiet param: period %u duration %u enabled %d\n",
8042 period, duration, enabled);
8043 return skb;
8044 }
8045
8046 static struct sk_buff *
ath10k_wmi_op_gen_addba_clear_resp(struct ath10k * ar,u32 vdev_id,const u8 * mac)8047 ath10k_wmi_op_gen_addba_clear_resp(struct ath10k *ar, u32 vdev_id,
8048 const u8 *mac)
8049 {
8050 struct wmi_addba_clear_resp_cmd *cmd;
8051 struct sk_buff *skb;
8052
8053 if (!mac)
8054 return ERR_PTR(-EINVAL);
8055
8056 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8057 if (!skb)
8058 return ERR_PTR(-ENOMEM);
8059
8060 cmd = (struct wmi_addba_clear_resp_cmd *)skb->data;
8061 cmd->vdev_id = __cpu_to_le32(vdev_id);
8062 ether_addr_copy(cmd->peer_macaddr.addr, mac);
8063
8064 ath10k_dbg(ar, ATH10K_DBG_WMI,
8065 "wmi addba clear resp vdev_id 0x%X mac_addr %pM\n",
8066 vdev_id, mac);
8067 return skb;
8068 }
8069
8070 static struct sk_buff *
ath10k_wmi_op_gen_addba_send(struct ath10k * ar,u32 vdev_id,const u8 * mac,u32 tid,u32 buf_size)8071 ath10k_wmi_op_gen_addba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac,
8072 u32 tid, u32 buf_size)
8073 {
8074 struct wmi_addba_send_cmd *cmd;
8075 struct sk_buff *skb;
8076
8077 if (!mac)
8078 return ERR_PTR(-EINVAL);
8079
8080 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8081 if (!skb)
8082 return ERR_PTR(-ENOMEM);
8083
8084 cmd = (struct wmi_addba_send_cmd *)skb->data;
8085 cmd->vdev_id = __cpu_to_le32(vdev_id);
8086 ether_addr_copy(cmd->peer_macaddr.addr, mac);
8087 cmd->tid = __cpu_to_le32(tid);
8088 cmd->buffersize = __cpu_to_le32(buf_size);
8089
8090 ath10k_dbg(ar, ATH10K_DBG_WMI,
8091 "wmi addba send vdev_id 0x%X mac_addr %pM tid %u bufsize %u\n",
8092 vdev_id, mac, tid, buf_size);
8093 return skb;
8094 }
8095
8096 static struct sk_buff *
ath10k_wmi_op_gen_addba_set_resp(struct ath10k * ar,u32 vdev_id,const u8 * mac,u32 tid,u32 status)8097 ath10k_wmi_op_gen_addba_set_resp(struct ath10k *ar, u32 vdev_id, const u8 *mac,
8098 u32 tid, u32 status)
8099 {
8100 struct wmi_addba_setresponse_cmd *cmd;
8101 struct sk_buff *skb;
8102
8103 if (!mac)
8104 return ERR_PTR(-EINVAL);
8105
8106 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8107 if (!skb)
8108 return ERR_PTR(-ENOMEM);
8109
8110 cmd = (struct wmi_addba_setresponse_cmd *)skb->data;
8111 cmd->vdev_id = __cpu_to_le32(vdev_id);
8112 ether_addr_copy(cmd->peer_macaddr.addr, mac);
8113 cmd->tid = __cpu_to_le32(tid);
8114 cmd->statuscode = __cpu_to_le32(status);
8115
8116 ath10k_dbg(ar, ATH10K_DBG_WMI,
8117 "wmi addba set resp vdev_id 0x%X mac_addr %pM tid %u status %u\n",
8118 vdev_id, mac, tid, status);
8119 return skb;
8120 }
8121
8122 static struct sk_buff *
ath10k_wmi_op_gen_delba_send(struct ath10k * ar,u32 vdev_id,const u8 * mac,u32 tid,u32 initiator,u32 reason)8123 ath10k_wmi_op_gen_delba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac,
8124 u32 tid, u32 initiator, u32 reason)
8125 {
8126 struct wmi_delba_send_cmd *cmd;
8127 struct sk_buff *skb;
8128
8129 if (!mac)
8130 return ERR_PTR(-EINVAL);
8131
8132 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8133 if (!skb)
8134 return ERR_PTR(-ENOMEM);
8135
8136 cmd = (struct wmi_delba_send_cmd *)skb->data;
8137 cmd->vdev_id = __cpu_to_le32(vdev_id);
8138 ether_addr_copy(cmd->peer_macaddr.addr, mac);
8139 cmd->tid = __cpu_to_le32(tid);
8140 cmd->initiator = __cpu_to_le32(initiator);
8141 cmd->reasoncode = __cpu_to_le32(reason);
8142
8143 ath10k_dbg(ar, ATH10K_DBG_WMI,
8144 "wmi delba send vdev_id 0x%X mac_addr %pM tid %u initiator %u reason %u\n",
8145 vdev_id, mac, tid, initiator, reason);
8146 return skb;
8147 }
8148
8149 static struct sk_buff *
ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config(struct ath10k * ar,u32 param)8150 ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config(struct ath10k *ar, u32 param)
8151 {
8152 struct wmi_pdev_get_tpc_config_cmd *cmd;
8153 struct sk_buff *skb;
8154
8155 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8156 if (!skb)
8157 return ERR_PTR(-ENOMEM);
8158
8159 cmd = (struct wmi_pdev_get_tpc_config_cmd *)skb->data;
8160 cmd->param = __cpu_to_le32(param);
8161
8162 ath10k_dbg(ar, ATH10K_DBG_WMI,
8163 "wmi pdev get tpc config param %d\n", param);
8164 return skb;
8165 }
8166
ath10k_wmi_fw_stats_num_peers(struct list_head * head)8167 size_t ath10k_wmi_fw_stats_num_peers(struct list_head *head)
8168 {
8169 struct ath10k_fw_stats_peer *i;
8170 size_t num = 0;
8171
8172 list_for_each_entry(i, head, list)
8173 ++num;
8174
8175 return num;
8176 }
8177
ath10k_wmi_fw_stats_num_vdevs(struct list_head * head)8178 size_t ath10k_wmi_fw_stats_num_vdevs(struct list_head *head)
8179 {
8180 struct ath10k_fw_stats_vdev *i;
8181 size_t num = 0;
8182
8183 list_for_each_entry(i, head, list)
8184 ++num;
8185
8186 return num;
8187 }
8188
8189 static void
ath10k_wmi_fw_pdev_base_stats_fill(const struct ath10k_fw_stats_pdev * pdev,char * buf,u32 * length)8190 ath10k_wmi_fw_pdev_base_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
8191 char *buf, u32 *length)
8192 {
8193 u32 len = *length;
8194 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8195
8196 len += scnprintf(buf + len, buf_len - len, "\n");
8197 len += scnprintf(buf + len, buf_len - len, "%30s\n",
8198 "ath10k PDEV stats");
8199 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8200 "=================");
8201
8202 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8203 "Channel noise floor", pdev->ch_noise_floor);
8204 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8205 "Channel TX power", pdev->chan_tx_power);
8206 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8207 "TX frame count", pdev->tx_frame_count);
8208 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8209 "RX frame count", pdev->rx_frame_count);
8210 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8211 "RX clear count", pdev->rx_clear_count);
8212 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8213 "Cycle count", pdev->cycle_count);
8214 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8215 "PHY error count", pdev->phy_err_count);
8216
8217 *length = len;
8218 }
8219
8220 static void
ath10k_wmi_fw_pdev_extra_stats_fill(const struct ath10k_fw_stats_pdev * pdev,char * buf,u32 * length)8221 ath10k_wmi_fw_pdev_extra_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
8222 char *buf, u32 *length)
8223 {
8224 u32 len = *length;
8225 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8226
8227 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8228 "RTS bad count", pdev->rts_bad);
8229 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8230 "RTS good count", pdev->rts_good);
8231 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8232 "FCS bad count", pdev->fcs_bad);
8233 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8234 "No beacon count", pdev->no_beacons);
8235 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8236 "MIB int count", pdev->mib_int_count);
8237
8238 len += scnprintf(buf + len, buf_len - len, "\n");
8239 *length = len;
8240 }
8241
8242 static void
ath10k_wmi_fw_pdev_tx_stats_fill(const struct ath10k_fw_stats_pdev * pdev,char * buf,u32 * length)8243 ath10k_wmi_fw_pdev_tx_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
8244 char *buf, u32 *length)
8245 {
8246 u32 len = *length;
8247 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8248
8249 len += scnprintf(buf + len, buf_len - len, "\n%30s\n",
8250 "ath10k PDEV TX stats");
8251 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8252 "=================");
8253
8254 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8255 "HTT cookies queued", pdev->comp_queued);
8256 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8257 "HTT cookies disp.", pdev->comp_delivered);
8258 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8259 "MSDU queued", pdev->msdu_enqued);
8260 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8261 "MPDU queued", pdev->mpdu_enqued);
8262 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8263 "MSDUs dropped", pdev->wmm_drop);
8264 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8265 "Local enqued", pdev->local_enqued);
8266 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8267 "Local freed", pdev->local_freed);
8268 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8269 "HW queued", pdev->hw_queued);
8270 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8271 "PPDUs reaped", pdev->hw_reaped);
8272 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8273 "Num underruns", pdev->underrun);
8274 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8275 "PPDUs cleaned", pdev->tx_abort);
8276 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8277 "MPDUs requeued", pdev->mpdus_requeued);
8278 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8279 "Excessive retries", pdev->tx_ko);
8280 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8281 "HW rate", pdev->data_rc);
8282 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8283 "Sched self triggers", pdev->self_triggers);
8284 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8285 "Dropped due to SW retries",
8286 pdev->sw_retry_failure);
8287 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8288 "Illegal rate phy errors",
8289 pdev->illgl_rate_phy_err);
8290 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8291 "Pdev continuous xretry", pdev->pdev_cont_xretry);
8292 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8293 "TX timeout", pdev->pdev_tx_timeout);
8294 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8295 "PDEV resets", pdev->pdev_resets);
8296 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8297 "PHY underrun", pdev->phy_underrun);
8298 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8299 "MPDU is more than txop limit", pdev->txop_ovf);
8300 *length = len;
8301 }
8302
8303 static void
ath10k_wmi_fw_pdev_rx_stats_fill(const struct ath10k_fw_stats_pdev * pdev,char * buf,u32 * length)8304 ath10k_wmi_fw_pdev_rx_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
8305 char *buf, u32 *length)
8306 {
8307 u32 len = *length;
8308 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8309
8310 len += scnprintf(buf + len, buf_len - len, "\n%30s\n",
8311 "ath10k PDEV RX stats");
8312 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8313 "=================");
8314
8315 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8316 "Mid PPDU route change",
8317 pdev->mid_ppdu_route_change);
8318 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8319 "Tot. number of statuses", pdev->status_rcvd);
8320 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8321 "Extra frags on rings 0", pdev->r0_frags);
8322 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8323 "Extra frags on rings 1", pdev->r1_frags);
8324 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8325 "Extra frags on rings 2", pdev->r2_frags);
8326 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8327 "Extra frags on rings 3", pdev->r3_frags);
8328 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8329 "MSDUs delivered to HTT", pdev->htt_msdus);
8330 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8331 "MPDUs delivered to HTT", pdev->htt_mpdus);
8332 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8333 "MSDUs delivered to stack", pdev->loc_msdus);
8334 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8335 "MPDUs delivered to stack", pdev->loc_mpdus);
8336 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8337 "Oversized AMSDUs", pdev->oversize_amsdu);
8338 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8339 "PHY errors", pdev->phy_errs);
8340 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8341 "PHY errors drops", pdev->phy_err_drop);
8342 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8343 "MPDU errors (FCS, MIC, ENC)", pdev->mpdu_errs);
8344 *length = len;
8345 }
8346
8347 static void
ath10k_wmi_fw_vdev_stats_fill(const struct ath10k_fw_stats_vdev * vdev,char * buf,u32 * length)8348 ath10k_wmi_fw_vdev_stats_fill(const struct ath10k_fw_stats_vdev *vdev,
8349 char *buf, u32 *length)
8350 {
8351 u32 len = *length;
8352 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8353 int i;
8354
8355 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8356 "vdev id", vdev->vdev_id);
8357 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8358 "beacon snr", vdev->beacon_snr);
8359 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8360 "data snr", vdev->data_snr);
8361 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8362 "num rx frames", vdev->num_rx_frames);
8363 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8364 "num rts fail", vdev->num_rts_fail);
8365 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8366 "num rts success", vdev->num_rts_success);
8367 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8368 "num rx err", vdev->num_rx_err);
8369 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8370 "num rx discard", vdev->num_rx_discard);
8371 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8372 "num tx not acked", vdev->num_tx_not_acked);
8373
8374 for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames); i++)
8375 len += scnprintf(buf + len, buf_len - len,
8376 "%25s [%02d] %u\n",
8377 "num tx frames", i,
8378 vdev->num_tx_frames[i]);
8379
8380 for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames_retries); i++)
8381 len += scnprintf(buf + len, buf_len - len,
8382 "%25s [%02d] %u\n",
8383 "num tx frames retries", i,
8384 vdev->num_tx_frames_retries[i]);
8385
8386 for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames_failures); i++)
8387 len += scnprintf(buf + len, buf_len - len,
8388 "%25s [%02d] %u\n",
8389 "num tx frames failures", i,
8390 vdev->num_tx_frames_failures[i]);
8391
8392 for (i = 0 ; i < ARRAY_SIZE(vdev->tx_rate_history); i++)
8393 len += scnprintf(buf + len, buf_len - len,
8394 "%25s [%02d] 0x%08x\n",
8395 "tx rate history", i,
8396 vdev->tx_rate_history[i]);
8397
8398 for (i = 0 ; i < ARRAY_SIZE(vdev->beacon_rssi_history); i++)
8399 len += scnprintf(buf + len, buf_len - len,
8400 "%25s [%02d] %u\n",
8401 "beacon rssi history", i,
8402 vdev->beacon_rssi_history[i]);
8403
8404 len += scnprintf(buf + len, buf_len - len, "\n");
8405 *length = len;
8406 }
8407
8408 static void
ath10k_wmi_fw_peer_stats_fill(const struct ath10k_fw_stats_peer * peer,char * buf,u32 * length,bool extended_peer)8409 ath10k_wmi_fw_peer_stats_fill(const struct ath10k_fw_stats_peer *peer,
8410 char *buf, u32 *length, bool extended_peer)
8411 {
8412 u32 len = *length;
8413 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8414
8415 len += scnprintf(buf + len, buf_len - len, "%30s %pM\n",
8416 "Peer MAC address", peer->peer_macaddr);
8417 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8418 "Peer RSSI", peer->peer_rssi);
8419 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8420 "Peer TX rate", peer->peer_tx_rate);
8421 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8422 "Peer RX rate", peer->peer_rx_rate);
8423 if (!extended_peer)
8424 len += scnprintf(buf + len, buf_len - len, "%30s %llu\n",
8425 "Peer RX duration", peer->rx_duration);
8426
8427 len += scnprintf(buf + len, buf_len - len, "\n");
8428 *length = len;
8429 }
8430
8431 static void
ath10k_wmi_fw_extd_peer_stats_fill(const struct ath10k_fw_extd_stats_peer * peer,char * buf,u32 * length)8432 ath10k_wmi_fw_extd_peer_stats_fill(const struct ath10k_fw_extd_stats_peer *peer,
8433 char *buf, u32 *length)
8434 {
8435 u32 len = *length;
8436 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8437
8438 len += scnprintf(buf + len, buf_len - len, "%30s %pM\n",
8439 "Peer MAC address", peer->peer_macaddr);
8440 len += scnprintf(buf + len, buf_len - len, "%30s %llu\n",
8441 "Peer RX duration", peer->rx_duration);
8442 }
8443
ath10k_wmi_main_op_fw_stats_fill(struct ath10k * ar,struct ath10k_fw_stats * fw_stats,char * buf)8444 void ath10k_wmi_main_op_fw_stats_fill(struct ath10k *ar,
8445 struct ath10k_fw_stats *fw_stats,
8446 char *buf)
8447 {
8448 u32 len = 0;
8449 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8450 const struct ath10k_fw_stats_pdev *pdev;
8451 const struct ath10k_fw_stats_vdev *vdev;
8452 const struct ath10k_fw_stats_peer *peer;
8453 size_t num_peers;
8454 size_t num_vdevs;
8455
8456 spin_lock_bh(&ar->data_lock);
8457
8458 pdev = list_first_entry_or_null(&fw_stats->pdevs,
8459 struct ath10k_fw_stats_pdev, list);
8460 if (!pdev) {
8461 ath10k_warn(ar, "failed to get pdev stats\n");
8462 goto unlock;
8463 }
8464
8465 num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers);
8466 num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs);
8467
8468 ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
8469 ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
8470 ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
8471
8472 len += scnprintf(buf + len, buf_len - len, "\n");
8473 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
8474 "ath10k VDEV stats", num_vdevs);
8475 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8476 "=================");
8477
8478 list_for_each_entry(vdev, &fw_stats->vdevs, list) {
8479 ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len);
8480 }
8481
8482 len += scnprintf(buf + len, buf_len - len, "\n");
8483 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
8484 "ath10k PEER stats", num_peers);
8485 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8486 "=================");
8487
8488 list_for_each_entry(peer, &fw_stats->peers, list) {
8489 ath10k_wmi_fw_peer_stats_fill(peer, buf, &len,
8490 fw_stats->extended);
8491 }
8492
8493 unlock:
8494 spin_unlock_bh(&ar->data_lock);
8495
8496 if (len >= buf_len)
8497 buf[len - 1] = 0;
8498 else
8499 buf[len] = 0;
8500 }
8501
ath10k_wmi_10x_op_fw_stats_fill(struct ath10k * ar,struct ath10k_fw_stats * fw_stats,char * buf)8502 void ath10k_wmi_10x_op_fw_stats_fill(struct ath10k *ar,
8503 struct ath10k_fw_stats *fw_stats,
8504 char *buf)
8505 {
8506 unsigned int len = 0;
8507 unsigned int buf_len = ATH10K_FW_STATS_BUF_SIZE;
8508 const struct ath10k_fw_stats_pdev *pdev;
8509 const struct ath10k_fw_stats_vdev *vdev;
8510 const struct ath10k_fw_stats_peer *peer;
8511 size_t num_peers;
8512 size_t num_vdevs;
8513
8514 spin_lock_bh(&ar->data_lock);
8515
8516 pdev = list_first_entry_or_null(&fw_stats->pdevs,
8517 struct ath10k_fw_stats_pdev, list);
8518 if (!pdev) {
8519 ath10k_warn(ar, "failed to get pdev stats\n");
8520 goto unlock;
8521 }
8522
8523 num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers);
8524 num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs);
8525
8526 ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
8527 ath10k_wmi_fw_pdev_extra_stats_fill(pdev, buf, &len);
8528 ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
8529 ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
8530
8531 len += scnprintf(buf + len, buf_len - len, "\n");
8532 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
8533 "ath10k VDEV stats", num_vdevs);
8534 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8535 "=================");
8536
8537 list_for_each_entry(vdev, &fw_stats->vdevs, list) {
8538 ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len);
8539 }
8540
8541 len += scnprintf(buf + len, buf_len - len, "\n");
8542 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
8543 "ath10k PEER stats", num_peers);
8544 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8545 "=================");
8546
8547 list_for_each_entry(peer, &fw_stats->peers, list) {
8548 ath10k_wmi_fw_peer_stats_fill(peer, buf, &len,
8549 fw_stats->extended);
8550 }
8551
8552 unlock:
8553 spin_unlock_bh(&ar->data_lock);
8554
8555 if (len >= buf_len)
8556 buf[len - 1] = 0;
8557 else
8558 buf[len] = 0;
8559 }
8560
8561 static struct sk_buff *
ath10k_wmi_op_gen_pdev_enable_adaptive_cca(struct ath10k * ar,u8 enable,u32 detect_level,u32 detect_margin)8562 ath10k_wmi_op_gen_pdev_enable_adaptive_cca(struct ath10k *ar, u8 enable,
8563 u32 detect_level, u32 detect_margin)
8564 {
8565 struct wmi_pdev_set_adaptive_cca_params *cmd;
8566 struct sk_buff *skb;
8567
8568 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8569 if (!skb)
8570 return ERR_PTR(-ENOMEM);
8571
8572 cmd = (struct wmi_pdev_set_adaptive_cca_params *)skb->data;
8573 cmd->enable = __cpu_to_le32(enable);
8574 cmd->cca_detect_level = __cpu_to_le32(detect_level);
8575 cmd->cca_detect_margin = __cpu_to_le32(detect_margin);
8576
8577 ath10k_dbg(ar, ATH10K_DBG_WMI,
8578 "wmi pdev set adaptive cca params enable:%d detection level:%d detection margin:%d\n",
8579 enable, detect_level, detect_margin);
8580 return skb;
8581 }
8582
8583 static void
ath10k_wmi_fw_vdev_stats_extd_fill(const struct ath10k_fw_stats_vdev_extd * vdev,char * buf,u32 * length)8584 ath10k_wmi_fw_vdev_stats_extd_fill(const struct ath10k_fw_stats_vdev_extd *vdev,
8585 char *buf, u32 *length)
8586 {
8587 u32 len = *length;
8588 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8589 u32 val;
8590
8591 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8592 "vdev id", vdev->vdev_id);
8593 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8594 "ppdu aggr count", vdev->ppdu_aggr_cnt);
8595 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8596 "ppdu noack", vdev->ppdu_noack);
8597 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8598 "mpdu queued", vdev->mpdu_queued);
8599 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8600 "ppdu nonaggr count", vdev->ppdu_nonaggr_cnt);
8601 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8602 "mpdu sw requeued", vdev->mpdu_sw_requeued);
8603 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8604 "mpdu success retry", vdev->mpdu_suc_retry);
8605 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8606 "mpdu success multitry", vdev->mpdu_suc_multitry);
8607 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8608 "mpdu fail retry", vdev->mpdu_fail_retry);
8609 val = vdev->tx_ftm_suc;
8610 if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
8611 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8612 "tx ftm success",
8613 MS(val, WMI_VDEV_STATS_FTM_COUNT));
8614 val = vdev->tx_ftm_suc_retry;
8615 if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
8616 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8617 "tx ftm success retry",
8618 MS(val, WMI_VDEV_STATS_FTM_COUNT));
8619 val = vdev->tx_ftm_fail;
8620 if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
8621 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8622 "tx ftm fail",
8623 MS(val, WMI_VDEV_STATS_FTM_COUNT));
8624 val = vdev->rx_ftmr_cnt;
8625 if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
8626 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8627 "rx ftm request count",
8628 MS(val, WMI_VDEV_STATS_FTM_COUNT));
8629 val = vdev->rx_ftmr_dup_cnt;
8630 if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
8631 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8632 "rx ftm request dup count",
8633 MS(val, WMI_VDEV_STATS_FTM_COUNT));
8634 val = vdev->rx_iftmr_cnt;
8635 if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
8636 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8637 "rx initial ftm req count",
8638 MS(val, WMI_VDEV_STATS_FTM_COUNT));
8639 val = vdev->rx_iftmr_dup_cnt;
8640 if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
8641 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8642 "rx initial ftm req dup cnt",
8643 MS(val, WMI_VDEV_STATS_FTM_COUNT));
8644 len += scnprintf(buf + len, buf_len - len, "\n");
8645
8646 *length = len;
8647 }
8648
ath10k_wmi_10_4_op_fw_stats_fill(struct ath10k * ar,struct ath10k_fw_stats * fw_stats,char * buf)8649 void ath10k_wmi_10_4_op_fw_stats_fill(struct ath10k *ar,
8650 struct ath10k_fw_stats *fw_stats,
8651 char *buf)
8652 {
8653 u32 len = 0;
8654 u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8655 const struct ath10k_fw_stats_pdev *pdev;
8656 const struct ath10k_fw_stats_vdev_extd *vdev;
8657 const struct ath10k_fw_stats_peer *peer;
8658 const struct ath10k_fw_extd_stats_peer *extd_peer;
8659 size_t num_peers;
8660 size_t num_vdevs;
8661
8662 spin_lock_bh(&ar->data_lock);
8663
8664 pdev = list_first_entry_or_null(&fw_stats->pdevs,
8665 struct ath10k_fw_stats_pdev, list);
8666 if (!pdev) {
8667 ath10k_warn(ar, "failed to get pdev stats\n");
8668 goto unlock;
8669 }
8670
8671 num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers);
8672 num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs);
8673
8674 ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
8675 ath10k_wmi_fw_pdev_extra_stats_fill(pdev, buf, &len);
8676 ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
8677
8678 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8679 "HW paused", pdev->hw_paused);
8680 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8681 "Seqs posted", pdev->seq_posted);
8682 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8683 "Seqs failed queueing", pdev->seq_failed_queueing);
8684 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8685 "Seqs completed", pdev->seq_completed);
8686 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8687 "Seqs restarted", pdev->seq_restarted);
8688 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8689 "MU Seqs posted", pdev->mu_seq_posted);
8690 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8691 "MPDUs SW flushed", pdev->mpdus_sw_flush);
8692 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8693 "MPDUs HW filtered", pdev->mpdus_hw_filter);
8694 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8695 "MPDUs truncated", pdev->mpdus_truncated);
8696 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8697 "MPDUs receive no ACK", pdev->mpdus_ack_failed);
8698 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8699 "MPDUs expired", pdev->mpdus_expired);
8700
8701 ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
8702 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8703 "Num Rx Overflow errors", pdev->rx_ovfl_errs);
8704
8705 len += scnprintf(buf + len, buf_len - len, "\n");
8706 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
8707 "ath10k VDEV stats", num_vdevs);
8708 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8709 "=================");
8710 list_for_each_entry(vdev, &fw_stats->vdevs, list) {
8711 ath10k_wmi_fw_vdev_stats_extd_fill(vdev, buf, &len);
8712 }
8713
8714 len += scnprintf(buf + len, buf_len - len, "\n");
8715 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
8716 "ath10k PEER stats", num_peers);
8717 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8718 "=================");
8719
8720 list_for_each_entry(peer, &fw_stats->peers, list) {
8721 ath10k_wmi_fw_peer_stats_fill(peer, buf, &len,
8722 fw_stats->extended);
8723 }
8724
8725 if (fw_stats->extended) {
8726 list_for_each_entry(extd_peer, &fw_stats->peers_extd, list) {
8727 ath10k_wmi_fw_extd_peer_stats_fill(extd_peer, buf,
8728 &len);
8729 }
8730 }
8731
8732 unlock:
8733 spin_unlock_bh(&ar->data_lock);
8734
8735 if (len >= buf_len)
8736 buf[len - 1] = 0;
8737 else
8738 buf[len] = 0;
8739 }
8740
ath10k_wmi_op_get_vdev_subtype(struct ath10k * ar,enum wmi_vdev_subtype subtype)8741 int ath10k_wmi_op_get_vdev_subtype(struct ath10k *ar,
8742 enum wmi_vdev_subtype subtype)
8743 {
8744 switch (subtype) {
8745 case WMI_VDEV_SUBTYPE_NONE:
8746 return WMI_VDEV_SUBTYPE_LEGACY_NONE;
8747 case WMI_VDEV_SUBTYPE_P2P_DEVICE:
8748 return WMI_VDEV_SUBTYPE_LEGACY_P2P_DEV;
8749 case WMI_VDEV_SUBTYPE_P2P_CLIENT:
8750 return WMI_VDEV_SUBTYPE_LEGACY_P2P_CLI;
8751 case WMI_VDEV_SUBTYPE_P2P_GO:
8752 return WMI_VDEV_SUBTYPE_LEGACY_P2P_GO;
8753 case WMI_VDEV_SUBTYPE_PROXY_STA:
8754 return WMI_VDEV_SUBTYPE_LEGACY_PROXY_STA;
8755 case WMI_VDEV_SUBTYPE_MESH_11S:
8756 case WMI_VDEV_SUBTYPE_MESH_NON_11S:
8757 return -ENOTSUPP;
8758 }
8759 return -ENOTSUPP;
8760 }
8761
ath10k_wmi_10_2_4_op_get_vdev_subtype(struct ath10k * ar,enum wmi_vdev_subtype subtype)8762 static int ath10k_wmi_10_2_4_op_get_vdev_subtype(struct ath10k *ar,
8763 enum wmi_vdev_subtype subtype)
8764 {
8765 switch (subtype) {
8766 case WMI_VDEV_SUBTYPE_NONE:
8767 return WMI_VDEV_SUBTYPE_10_2_4_NONE;
8768 case WMI_VDEV_SUBTYPE_P2P_DEVICE:
8769 return WMI_VDEV_SUBTYPE_10_2_4_P2P_DEV;
8770 case WMI_VDEV_SUBTYPE_P2P_CLIENT:
8771 return WMI_VDEV_SUBTYPE_10_2_4_P2P_CLI;
8772 case WMI_VDEV_SUBTYPE_P2P_GO:
8773 return WMI_VDEV_SUBTYPE_10_2_4_P2P_GO;
8774 case WMI_VDEV_SUBTYPE_PROXY_STA:
8775 return WMI_VDEV_SUBTYPE_10_2_4_PROXY_STA;
8776 case WMI_VDEV_SUBTYPE_MESH_11S:
8777 return WMI_VDEV_SUBTYPE_10_2_4_MESH_11S;
8778 case WMI_VDEV_SUBTYPE_MESH_NON_11S:
8779 return -ENOTSUPP;
8780 }
8781 return -ENOTSUPP;
8782 }
8783
ath10k_wmi_10_4_op_get_vdev_subtype(struct ath10k * ar,enum wmi_vdev_subtype subtype)8784 static int ath10k_wmi_10_4_op_get_vdev_subtype(struct ath10k *ar,
8785 enum wmi_vdev_subtype subtype)
8786 {
8787 switch (subtype) {
8788 case WMI_VDEV_SUBTYPE_NONE:
8789 return WMI_VDEV_SUBTYPE_10_4_NONE;
8790 case WMI_VDEV_SUBTYPE_P2P_DEVICE:
8791 return WMI_VDEV_SUBTYPE_10_4_P2P_DEV;
8792 case WMI_VDEV_SUBTYPE_P2P_CLIENT:
8793 return WMI_VDEV_SUBTYPE_10_4_P2P_CLI;
8794 case WMI_VDEV_SUBTYPE_P2P_GO:
8795 return WMI_VDEV_SUBTYPE_10_4_P2P_GO;
8796 case WMI_VDEV_SUBTYPE_PROXY_STA:
8797 return WMI_VDEV_SUBTYPE_10_4_PROXY_STA;
8798 case WMI_VDEV_SUBTYPE_MESH_11S:
8799 return WMI_VDEV_SUBTYPE_10_4_MESH_11S;
8800 case WMI_VDEV_SUBTYPE_MESH_NON_11S:
8801 return WMI_VDEV_SUBTYPE_10_4_MESH_NON_11S;
8802 }
8803 return -ENOTSUPP;
8804 }
8805
8806 static struct sk_buff *
ath10k_wmi_10_4_ext_resource_config(struct ath10k * ar,enum wmi_host_platform_type type,u32 fw_feature_bitmap)8807 ath10k_wmi_10_4_ext_resource_config(struct ath10k *ar,
8808 enum wmi_host_platform_type type,
8809 u32 fw_feature_bitmap)
8810 {
8811 struct wmi_ext_resource_config_10_4_cmd *cmd;
8812 struct sk_buff *skb;
8813 u32 num_tdls_sleep_sta = 0;
8814
8815 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8816 if (!skb)
8817 return ERR_PTR(-ENOMEM);
8818
8819 if (test_bit(WMI_SERVICE_TDLS_UAPSD_SLEEP_STA, ar->wmi.svc_map))
8820 num_tdls_sleep_sta = TARGET_10_4_NUM_TDLS_SLEEP_STA;
8821
8822 cmd = (struct wmi_ext_resource_config_10_4_cmd *)skb->data;
8823 cmd->host_platform_config = __cpu_to_le32(type);
8824 cmd->fw_feature_bitmap = __cpu_to_le32(fw_feature_bitmap);
8825 cmd->wlan_gpio_priority = __cpu_to_le32(ar->coex_gpio_pin);
8826 cmd->coex_version = __cpu_to_le32(WMI_NO_COEX_VERSION_SUPPORT);
8827 cmd->coex_gpio_pin1 = __cpu_to_le32(-1);
8828 cmd->coex_gpio_pin2 = __cpu_to_le32(-1);
8829 cmd->coex_gpio_pin3 = __cpu_to_le32(-1);
8830 cmd->num_tdls_vdevs = __cpu_to_le32(TARGET_10_4_NUM_TDLS_VDEVS);
8831 cmd->num_tdls_conn_table_entries = __cpu_to_le32(20);
8832 cmd->max_tdls_concurrent_sleep_sta = __cpu_to_le32(num_tdls_sleep_sta);
8833 cmd->max_tdls_concurrent_buffer_sta =
8834 __cpu_to_le32(TARGET_10_4_NUM_TDLS_BUFFER_STA);
8835
8836 ath10k_dbg(ar, ATH10K_DBG_WMI,
8837 "wmi ext resource config host type %d firmware feature bitmap %08x\n",
8838 type, fw_feature_bitmap);
8839 return skb;
8840 }
8841
8842 static struct sk_buff *
ath10k_wmi_10_4_gen_update_fw_tdls_state(struct ath10k * ar,u32 vdev_id,enum wmi_tdls_state state)8843 ath10k_wmi_10_4_gen_update_fw_tdls_state(struct ath10k *ar, u32 vdev_id,
8844 enum wmi_tdls_state state)
8845 {
8846 struct wmi_10_4_tdls_set_state_cmd *cmd;
8847 struct sk_buff *skb;
8848 u32 options = 0;
8849
8850 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8851 if (!skb)
8852 return ERR_PTR(-ENOMEM);
8853
8854 if (test_bit(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY, ar->wmi.svc_map) &&
8855 state == WMI_TDLS_ENABLE_ACTIVE)
8856 state = WMI_TDLS_ENABLE_PASSIVE;
8857
8858 if (test_bit(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA, ar->wmi.svc_map))
8859 options |= WMI_TDLS_BUFFER_STA_EN;
8860
8861 cmd = (struct wmi_10_4_tdls_set_state_cmd *)skb->data;
8862 cmd->vdev_id = __cpu_to_le32(vdev_id);
8863 cmd->state = __cpu_to_le32(state);
8864 cmd->notification_interval_ms = __cpu_to_le32(5000);
8865 cmd->tx_discovery_threshold = __cpu_to_le32(100);
8866 cmd->tx_teardown_threshold = __cpu_to_le32(5);
8867 cmd->rssi_teardown_threshold = __cpu_to_le32(-75);
8868 cmd->rssi_delta = __cpu_to_le32(-20);
8869 cmd->tdls_options = __cpu_to_le32(options);
8870 cmd->tdls_peer_traffic_ind_window = __cpu_to_le32(2);
8871 cmd->tdls_peer_traffic_response_timeout_ms = __cpu_to_le32(5000);
8872 cmd->tdls_puapsd_mask = __cpu_to_le32(0xf);
8873 cmd->tdls_puapsd_inactivity_time_ms = __cpu_to_le32(0);
8874 cmd->tdls_puapsd_rx_frame_threshold = __cpu_to_le32(10);
8875 cmd->teardown_notification_ms = __cpu_to_le32(10);
8876 cmd->tdls_peer_kickout_threshold = __cpu_to_le32(96);
8877
8878 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi update fw tdls state %d for vdev %i\n",
8879 state, vdev_id);
8880 return skb;
8881 }
8882
ath10k_wmi_prepare_peer_qos(u8 uapsd_queues,u8 sp)8883 static u32 ath10k_wmi_prepare_peer_qos(u8 uapsd_queues, u8 sp)
8884 {
8885 u32 peer_qos = 0;
8886
8887 if (uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_VO)
8888 peer_qos |= WMI_TDLS_PEER_QOS_AC_VO;
8889 if (uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_VI)
8890 peer_qos |= WMI_TDLS_PEER_QOS_AC_VI;
8891 if (uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_BK)
8892 peer_qos |= WMI_TDLS_PEER_QOS_AC_BK;
8893 if (uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_BE)
8894 peer_qos |= WMI_TDLS_PEER_QOS_AC_BE;
8895
8896 peer_qos |= SM(sp, WMI_TDLS_PEER_SP);
8897
8898 return peer_qos;
8899 }
8900
8901 static struct sk_buff *
ath10k_wmi_10_4_op_gen_pdev_get_tpc_table_cmdid(struct ath10k * ar,u32 param)8902 ath10k_wmi_10_4_op_gen_pdev_get_tpc_table_cmdid(struct ath10k *ar, u32 param)
8903 {
8904 struct wmi_pdev_get_tpc_table_cmd *cmd;
8905 struct sk_buff *skb;
8906
8907 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8908 if (!skb)
8909 return ERR_PTR(-ENOMEM);
8910
8911 cmd = (struct wmi_pdev_get_tpc_table_cmd *)skb->data;
8912 cmd->param = __cpu_to_le32(param);
8913
8914 ath10k_dbg(ar, ATH10K_DBG_WMI,
8915 "wmi pdev get tpc table param:%d\n", param);
8916 return skb;
8917 }
8918
8919 static struct sk_buff *
ath10k_wmi_10_4_gen_tdls_peer_update(struct ath10k * ar,const struct wmi_tdls_peer_update_cmd_arg * arg,const struct wmi_tdls_peer_capab_arg * cap,const struct wmi_channel_arg * chan_arg)8920 ath10k_wmi_10_4_gen_tdls_peer_update(struct ath10k *ar,
8921 const struct wmi_tdls_peer_update_cmd_arg *arg,
8922 const struct wmi_tdls_peer_capab_arg *cap,
8923 const struct wmi_channel_arg *chan_arg)
8924 {
8925 struct wmi_10_4_tdls_peer_update_cmd *cmd;
8926 struct wmi_tdls_peer_capabilities *peer_cap;
8927 struct wmi_channel *chan;
8928 struct sk_buff *skb;
8929 u32 peer_qos;
8930 int len, chan_len;
8931 int i;
8932
8933 /* tdls peer update cmd has place holder for one channel*/
8934 chan_len = cap->peer_chan_len ? (cap->peer_chan_len - 1) : 0;
8935
8936 len = sizeof(*cmd) + chan_len * sizeof(*chan);
8937
8938 skb = ath10k_wmi_alloc_skb(ar, len);
8939 if (!skb)
8940 return ERR_PTR(-ENOMEM);
8941
8942 memset(skb->data, 0, sizeof(*cmd));
8943
8944 cmd = (struct wmi_10_4_tdls_peer_update_cmd *)skb->data;
8945 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
8946 ether_addr_copy(cmd->peer_macaddr.addr, arg->addr);
8947 cmd->peer_state = __cpu_to_le32(arg->peer_state);
8948
8949 peer_qos = ath10k_wmi_prepare_peer_qos(cap->peer_uapsd_queues,
8950 cap->peer_max_sp);
8951
8952 peer_cap = &cmd->peer_capab;
8953 peer_cap->peer_qos = __cpu_to_le32(peer_qos);
8954 peer_cap->buff_sta_support = __cpu_to_le32(cap->buff_sta_support);
8955 peer_cap->off_chan_support = __cpu_to_le32(cap->off_chan_support);
8956 peer_cap->peer_curr_operclass = __cpu_to_le32(cap->peer_curr_operclass);
8957 peer_cap->self_curr_operclass = __cpu_to_le32(cap->self_curr_operclass);
8958 peer_cap->peer_chan_len = __cpu_to_le32(cap->peer_chan_len);
8959 peer_cap->peer_operclass_len = __cpu_to_le32(cap->peer_operclass_len);
8960
8961 for (i = 0; i < WMI_TDLS_MAX_SUPP_OPER_CLASSES; i++)
8962 peer_cap->peer_operclass[i] = cap->peer_operclass[i];
8963
8964 peer_cap->is_peer_responder = __cpu_to_le32(cap->is_peer_responder);
8965 peer_cap->pref_offchan_num = __cpu_to_le32(cap->pref_offchan_num);
8966 peer_cap->pref_offchan_bw = __cpu_to_le32(cap->pref_offchan_bw);
8967
8968 for (i = 0; i < cap->peer_chan_len; i++) {
8969 chan = (struct wmi_channel *)&peer_cap->peer_chan_list[i];
8970 ath10k_wmi_put_wmi_channel(ar, chan, &chan_arg[i]);
8971 }
8972
8973 ath10k_dbg(ar, ATH10K_DBG_WMI,
8974 "wmi tdls peer update vdev %i state %d n_chans %u\n",
8975 arg->vdev_id, arg->peer_state, cap->peer_chan_len);
8976 return skb;
8977 }
8978
8979 static struct sk_buff *
ath10k_wmi_10_4_gen_radar_found(struct ath10k * ar,const struct ath10k_radar_found_info * arg)8980 ath10k_wmi_10_4_gen_radar_found(struct ath10k *ar,
8981 const struct ath10k_radar_found_info *arg)
8982 {
8983 struct wmi_radar_found_info *cmd;
8984 struct sk_buff *skb;
8985
8986 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8987 if (!skb)
8988 return ERR_PTR(-ENOMEM);
8989
8990 cmd = (struct wmi_radar_found_info *)skb->data;
8991 cmd->pri_min = __cpu_to_le32(arg->pri_min);
8992 cmd->pri_max = __cpu_to_le32(arg->pri_max);
8993 cmd->width_min = __cpu_to_le32(arg->width_min);
8994 cmd->width_max = __cpu_to_le32(arg->width_max);
8995 cmd->sidx_min = __cpu_to_le32(arg->sidx_min);
8996 cmd->sidx_max = __cpu_to_le32(arg->sidx_max);
8997
8998 ath10k_dbg(ar, ATH10K_DBG_WMI,
8999 "wmi radar found pri_min %d pri_max %d width_min %d width_max %d sidx_min %d sidx_max %d\n",
9000 arg->pri_min, arg->pri_max, arg->width_min,
9001 arg->width_max, arg->sidx_min, arg->sidx_max);
9002 return skb;
9003 }
9004
9005 static struct sk_buff *
ath10k_wmi_10_4_gen_per_peer_per_tid_cfg(struct ath10k * ar,const struct wmi_per_peer_per_tid_cfg_arg * arg)9006 ath10k_wmi_10_4_gen_per_peer_per_tid_cfg(struct ath10k *ar,
9007 const struct wmi_per_peer_per_tid_cfg_arg *arg)
9008 {
9009 struct wmi_peer_per_tid_cfg_cmd *cmd;
9010 struct sk_buff *skb;
9011
9012 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
9013 if (!skb)
9014 return ERR_PTR(-ENOMEM);
9015
9016 memset(skb->data, 0, sizeof(*cmd));
9017
9018 cmd = (struct wmi_peer_per_tid_cfg_cmd *)skb->data;
9019 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
9020 ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_macaddr.addr);
9021 cmd->tid = cpu_to_le32(arg->tid);
9022 cmd->ack_policy = cpu_to_le32(arg->ack_policy);
9023 cmd->aggr_control = cpu_to_le32(arg->aggr_control);
9024 cmd->rate_control = cpu_to_le32(arg->rate_ctrl);
9025 cmd->retry_count = cpu_to_le32(arg->retry_count);
9026 cmd->rcode_flags = cpu_to_le32(arg->rcode_flags);
9027 cmd->ext_tid_cfg_bitmap = cpu_to_le32(arg->ext_tid_cfg_bitmap);
9028 cmd->rtscts_ctrl = cpu_to_le32(arg->rtscts_ctrl);
9029
9030 ath10k_dbg(ar, ATH10K_DBG_WMI,
9031 "wmi noack tid %d vdev id %d ack_policy %d aggr %u rate_ctrl %u rcflag %u retry_count %d rtscts %d ext_tid_cfg_bitmap %d mac_addr %pM\n",
9032 arg->tid, arg->vdev_id, arg->ack_policy, arg->aggr_control,
9033 arg->rate_ctrl, arg->rcode_flags, arg->retry_count,
9034 arg->rtscts_ctrl, arg->ext_tid_cfg_bitmap, arg->peer_macaddr.addr);
9035 return skb;
9036 }
9037
9038 static struct sk_buff *
ath10k_wmi_op_gen_echo(struct ath10k * ar,u32 value)9039 ath10k_wmi_op_gen_echo(struct ath10k *ar, u32 value)
9040 {
9041 struct wmi_echo_cmd *cmd;
9042 struct sk_buff *skb;
9043
9044 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
9045 if (!skb)
9046 return ERR_PTR(-ENOMEM);
9047
9048 cmd = (struct wmi_echo_cmd *)skb->data;
9049 cmd->value = cpu_to_le32(value);
9050
9051 ath10k_dbg(ar, ATH10K_DBG_WMI,
9052 "wmi echo value 0x%08x\n", value);
9053 return skb;
9054 }
9055
9056 int
ath10k_wmi_barrier(struct ath10k * ar)9057 ath10k_wmi_barrier(struct ath10k *ar)
9058 {
9059 int ret;
9060 int time_left;
9061
9062 spin_lock_bh(&ar->data_lock);
9063 reinit_completion(&ar->wmi.barrier);
9064 spin_unlock_bh(&ar->data_lock);
9065
9066 ret = ath10k_wmi_echo(ar, ATH10K_WMI_BARRIER_ECHO_ID);
9067 if (ret) {
9068 ath10k_warn(ar, "failed to submit wmi echo: %d\n", ret);
9069 return ret;
9070 }
9071
9072 time_left = wait_for_completion_timeout(&ar->wmi.barrier,
9073 ATH10K_WMI_BARRIER_TIMEOUT_HZ);
9074 if (!time_left)
9075 return -ETIMEDOUT;
9076
9077 return 0;
9078 }
9079
9080 static struct sk_buff *
ath10k_wmi_10_2_4_op_gen_bb_timing(struct ath10k * ar,const struct wmi_bb_timing_cfg_arg * arg)9081 ath10k_wmi_10_2_4_op_gen_bb_timing(struct ath10k *ar,
9082 const struct wmi_bb_timing_cfg_arg *arg)
9083 {
9084 struct wmi_pdev_bb_timing_cfg_cmd *cmd;
9085 struct sk_buff *skb;
9086
9087 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
9088 if (!skb)
9089 return ERR_PTR(-ENOMEM);
9090
9091 cmd = (struct wmi_pdev_bb_timing_cfg_cmd *)skb->data;
9092 cmd->bb_tx_timing = __cpu_to_le32(arg->bb_tx_timing);
9093 cmd->bb_xpa_timing = __cpu_to_le32(arg->bb_xpa_timing);
9094
9095 ath10k_dbg(ar, ATH10K_DBG_WMI,
9096 "wmi pdev bb_tx_timing 0x%x bb_xpa_timing 0x%x\n",
9097 arg->bb_tx_timing, arg->bb_xpa_timing);
9098 return skb;
9099 }
9100
9101 static const struct wmi_ops wmi_ops = {
9102 .rx = ath10k_wmi_op_rx,
9103 .map_svc = wmi_main_svc_map,
9104
9105 .pull_scan = ath10k_wmi_op_pull_scan_ev,
9106 .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
9107 .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
9108 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
9109 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
9110 .pull_swba = ath10k_wmi_op_pull_swba_ev,
9111 .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
9112 .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
9113 .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev,
9114 .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
9115 .pull_fw_stats = ath10k_wmi_main_op_pull_fw_stats,
9116 .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
9117 .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
9118
9119 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
9120 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
9121 .gen_pdev_set_rd = ath10k_wmi_op_gen_pdev_set_rd,
9122 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
9123 .gen_init = ath10k_wmi_op_gen_init,
9124 .gen_start_scan = ath10k_wmi_op_gen_start_scan,
9125 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
9126 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
9127 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
9128 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
9129 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
9130 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
9131 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
9132 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
9133 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
9134 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
9135 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
9136 /* .gen_vdev_wmm_conf not implemented */
9137 .gen_peer_create = ath10k_wmi_op_gen_peer_create,
9138 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
9139 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
9140 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
9141 .gen_peer_assoc = ath10k_wmi_op_gen_peer_assoc,
9142 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
9143 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
9144 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
9145 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
9146 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
9147 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
9148 .gen_request_stats = ath10k_wmi_op_gen_request_stats,
9149 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
9150 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
9151 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
9152 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
9153 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
9154 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
9155 /* .gen_pdev_get_temperature not implemented */
9156 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
9157 .gen_addba_send = ath10k_wmi_op_gen_addba_send,
9158 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
9159 .gen_delba_send = ath10k_wmi_op_gen_delba_send,
9160 .fw_stats_fill = ath10k_wmi_main_op_fw_stats_fill,
9161 .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
9162 .gen_echo = ath10k_wmi_op_gen_echo,
9163 /* .gen_bcn_tmpl not implemented */
9164 /* .gen_prb_tmpl not implemented */
9165 /* .gen_p2p_go_bcn_ie not implemented */
9166 /* .gen_adaptive_qcs not implemented */
9167 /* .gen_pdev_enable_adaptive_cca not implemented */
9168 };
9169
9170 static const struct wmi_ops wmi_10_1_ops = {
9171 .rx = ath10k_wmi_10_1_op_rx,
9172 .map_svc = wmi_10x_svc_map,
9173 .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
9174 .pull_fw_stats = ath10k_wmi_10x_op_pull_fw_stats,
9175 .gen_init = ath10k_wmi_10_1_op_gen_init,
9176 .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
9177 .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
9178 .gen_peer_assoc = ath10k_wmi_10_1_op_gen_peer_assoc,
9179 /* .gen_pdev_get_temperature not implemented */
9180
9181 /* shared with main branch */
9182 .pull_scan = ath10k_wmi_op_pull_scan_ev,
9183 .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
9184 .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
9185 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
9186 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
9187 .pull_swba = ath10k_wmi_op_pull_swba_ev,
9188 .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
9189 .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
9190 .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
9191 .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
9192 .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
9193
9194 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
9195 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
9196 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
9197 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
9198 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
9199 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
9200 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
9201 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
9202 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
9203 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
9204 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
9205 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
9206 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
9207 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
9208 /* .gen_vdev_wmm_conf not implemented */
9209 .gen_peer_create = ath10k_wmi_op_gen_peer_create,
9210 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
9211 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
9212 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
9213 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
9214 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
9215 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
9216 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
9217 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
9218 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
9219 .gen_request_stats = ath10k_wmi_op_gen_request_stats,
9220 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
9221 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
9222 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
9223 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
9224 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
9225 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
9226 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
9227 .gen_addba_send = ath10k_wmi_op_gen_addba_send,
9228 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
9229 .gen_delba_send = ath10k_wmi_op_gen_delba_send,
9230 .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
9231 .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
9232 .gen_echo = ath10k_wmi_op_gen_echo,
9233 /* .gen_bcn_tmpl not implemented */
9234 /* .gen_prb_tmpl not implemented */
9235 /* .gen_p2p_go_bcn_ie not implemented */
9236 /* .gen_adaptive_qcs not implemented */
9237 /* .gen_pdev_enable_adaptive_cca not implemented */
9238 };
9239
9240 static const struct wmi_ops wmi_10_2_ops = {
9241 .rx = ath10k_wmi_10_2_op_rx,
9242 .pull_fw_stats = ath10k_wmi_10_2_op_pull_fw_stats,
9243 .gen_init = ath10k_wmi_10_2_op_gen_init,
9244 .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc,
9245 /* .gen_pdev_get_temperature not implemented */
9246
9247 /* shared with 10.1 */
9248 .map_svc = wmi_10x_svc_map,
9249 .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
9250 .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
9251 .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
9252 .gen_echo = ath10k_wmi_op_gen_echo,
9253
9254 .pull_scan = ath10k_wmi_op_pull_scan_ev,
9255 .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
9256 .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
9257 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
9258 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
9259 .pull_swba = ath10k_wmi_op_pull_swba_ev,
9260 .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
9261 .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
9262 .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
9263 .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
9264 .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
9265
9266 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
9267 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
9268 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
9269 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
9270 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
9271 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
9272 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
9273 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
9274 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
9275 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
9276 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
9277 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
9278 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
9279 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
9280 /* .gen_vdev_wmm_conf not implemented */
9281 .gen_peer_create = ath10k_wmi_op_gen_peer_create,
9282 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
9283 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
9284 .gen_pdev_set_base_macaddr = ath10k_wmi_op_gen_pdev_set_base_macaddr,
9285 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
9286 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
9287 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
9288 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
9289 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
9290 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
9291 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
9292 .gen_request_stats = ath10k_wmi_op_gen_request_stats,
9293 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
9294 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
9295 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
9296 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
9297 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
9298 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
9299 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
9300 .gen_addba_send = ath10k_wmi_op_gen_addba_send,
9301 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
9302 .gen_delba_send = ath10k_wmi_op_gen_delba_send,
9303 .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
9304 .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
9305 /* .gen_pdev_enable_adaptive_cca not implemented */
9306 };
9307
9308 static const struct wmi_ops wmi_10_2_4_ops = {
9309 .rx = ath10k_wmi_10_2_op_rx,
9310 .pull_fw_stats = ath10k_wmi_10_2_4_op_pull_fw_stats,
9311 .gen_init = ath10k_wmi_10_2_op_gen_init,
9312 .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc,
9313 .gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature,
9314 .gen_pdev_bss_chan_info_req = ath10k_wmi_10_2_op_gen_pdev_bss_chan_info,
9315
9316 /* shared with 10.1 */
9317 .map_svc = wmi_10x_svc_map,
9318 .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
9319 .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
9320 .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
9321 .gen_echo = ath10k_wmi_op_gen_echo,
9322
9323 .pull_scan = ath10k_wmi_op_pull_scan_ev,
9324 .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
9325 .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
9326 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
9327 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
9328 .pull_swba = ath10k_wmi_10_2_4_op_pull_swba_ev,
9329 .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
9330 .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
9331 .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
9332 .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
9333 .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
9334
9335 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
9336 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
9337 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
9338 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
9339 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
9340 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
9341 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
9342 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
9343 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
9344 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
9345 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
9346 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
9347 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
9348 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
9349 .gen_peer_create = ath10k_wmi_op_gen_peer_create,
9350 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
9351 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
9352 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
9353 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
9354 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
9355 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
9356 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
9357 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
9358 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
9359 .gen_request_stats = ath10k_wmi_op_gen_request_stats,
9360 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
9361 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
9362 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
9363 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
9364 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
9365 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
9366 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
9367 .gen_addba_send = ath10k_wmi_op_gen_addba_send,
9368 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
9369 .gen_delba_send = ath10k_wmi_op_gen_delba_send,
9370 .gen_pdev_get_tpc_config = ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config,
9371 .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
9372 .gen_pdev_enable_adaptive_cca =
9373 ath10k_wmi_op_gen_pdev_enable_adaptive_cca,
9374 .get_vdev_subtype = ath10k_wmi_10_2_4_op_get_vdev_subtype,
9375 .gen_bb_timing = ath10k_wmi_10_2_4_op_gen_bb_timing,
9376 /* .gen_bcn_tmpl not implemented */
9377 /* .gen_prb_tmpl not implemented */
9378 /* .gen_p2p_go_bcn_ie not implemented */
9379 /* .gen_adaptive_qcs not implemented */
9380 };
9381
9382 static const struct wmi_ops wmi_10_4_ops = {
9383 .rx = ath10k_wmi_10_4_op_rx,
9384 .map_svc = wmi_10_4_svc_map,
9385
9386 .pull_fw_stats = ath10k_wmi_10_4_op_pull_fw_stats,
9387 .pull_scan = ath10k_wmi_op_pull_scan_ev,
9388 .pull_mgmt_rx = ath10k_wmi_10_4_op_pull_mgmt_rx_ev,
9389 .pull_ch_info = ath10k_wmi_10_4_op_pull_ch_info_ev,
9390 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
9391 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
9392 .pull_swba = ath10k_wmi_10_4_op_pull_swba_ev,
9393 .pull_phyerr_hdr = ath10k_wmi_10_4_op_pull_phyerr_ev_hdr,
9394 .pull_phyerr = ath10k_wmi_10_4_op_pull_phyerr_ev,
9395 .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev,
9396 .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
9397 .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
9398 .pull_dfs_status_ev = ath10k_wmi_10_4_op_pull_dfs_status_ev,
9399 .get_txbf_conf_scheme = ath10k_wmi_10_4_txbf_conf_scheme,
9400
9401 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
9402 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
9403 .gen_pdev_set_base_macaddr = ath10k_wmi_op_gen_pdev_set_base_macaddr,
9404 .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
9405 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
9406 .gen_init = ath10k_wmi_10_4_op_gen_init,
9407 .gen_start_scan = ath10k_wmi_op_gen_start_scan,
9408 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
9409 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
9410 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
9411 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
9412 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
9413 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
9414 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
9415 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
9416 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
9417 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
9418 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
9419 .gen_peer_create = ath10k_wmi_op_gen_peer_create,
9420 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
9421 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
9422 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
9423 .gen_peer_assoc = ath10k_wmi_10_4_op_gen_peer_assoc,
9424 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
9425 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
9426 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
9427 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
9428 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
9429 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
9430 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
9431 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
9432 .gen_dbglog_cfg = ath10k_wmi_10_4_op_gen_dbglog_cfg,
9433 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
9434 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
9435 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
9436 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
9437 .gen_addba_send = ath10k_wmi_op_gen_addba_send,
9438 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
9439 .gen_delba_send = ath10k_wmi_op_gen_delba_send,
9440 .fw_stats_fill = ath10k_wmi_10_4_op_fw_stats_fill,
9441 .ext_resource_config = ath10k_wmi_10_4_ext_resource_config,
9442 .gen_update_fw_tdls_state = ath10k_wmi_10_4_gen_update_fw_tdls_state,
9443 .gen_tdls_peer_update = ath10k_wmi_10_4_gen_tdls_peer_update,
9444 .gen_pdev_get_tpc_table_cmdid =
9445 ath10k_wmi_10_4_op_gen_pdev_get_tpc_table_cmdid,
9446 .gen_radar_found = ath10k_wmi_10_4_gen_radar_found,
9447 .gen_per_peer_per_tid_cfg = ath10k_wmi_10_4_gen_per_peer_per_tid_cfg,
9448
9449 /* shared with 10.2 */
9450 .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
9451 .gen_request_stats = ath10k_wmi_op_gen_request_stats,
9452 .gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature,
9453 .get_vdev_subtype = ath10k_wmi_10_4_op_get_vdev_subtype,
9454 .gen_pdev_bss_chan_info_req = ath10k_wmi_10_2_op_gen_pdev_bss_chan_info,
9455 .gen_echo = ath10k_wmi_op_gen_echo,
9456 .gen_pdev_get_tpc_config = ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config,
9457 };
9458
ath10k_wmi_attach(struct ath10k * ar)9459 int ath10k_wmi_attach(struct ath10k *ar)
9460 {
9461 switch (ar->running_fw->fw_file.wmi_op_version) {
9462 case ATH10K_FW_WMI_OP_VERSION_10_4:
9463 ar->wmi.ops = &wmi_10_4_ops;
9464 ar->wmi.cmd = &wmi_10_4_cmd_map;
9465 ar->wmi.vdev_param = &wmi_10_4_vdev_param_map;
9466 ar->wmi.pdev_param = &wmi_10_4_pdev_param_map;
9467 ar->wmi.peer_param = &wmi_peer_param_map;
9468 ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
9469 ar->wmi_key_cipher = wmi_key_cipher_suites;
9470 break;
9471 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
9472 ar->wmi.cmd = &wmi_10_2_4_cmd_map;
9473 ar->wmi.ops = &wmi_10_2_4_ops;
9474 ar->wmi.vdev_param = &wmi_10_2_4_vdev_param_map;
9475 ar->wmi.pdev_param = &wmi_10_2_4_pdev_param_map;
9476 ar->wmi.peer_param = &wmi_peer_param_map;
9477 ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
9478 ar->wmi_key_cipher = wmi_key_cipher_suites;
9479 break;
9480 case ATH10K_FW_WMI_OP_VERSION_10_2:
9481 ar->wmi.cmd = &wmi_10_2_cmd_map;
9482 ar->wmi.ops = &wmi_10_2_ops;
9483 ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
9484 ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
9485 ar->wmi.peer_param = &wmi_peer_param_map;
9486 ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
9487 ar->wmi_key_cipher = wmi_key_cipher_suites;
9488 break;
9489 case ATH10K_FW_WMI_OP_VERSION_10_1:
9490 ar->wmi.cmd = &wmi_10x_cmd_map;
9491 ar->wmi.ops = &wmi_10_1_ops;
9492 ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
9493 ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
9494 ar->wmi.peer_param = &wmi_peer_param_map;
9495 ar->wmi.peer_flags = &wmi_10x_peer_flags_map;
9496 ar->wmi_key_cipher = wmi_key_cipher_suites;
9497 break;
9498 case ATH10K_FW_WMI_OP_VERSION_MAIN:
9499 ar->wmi.cmd = &wmi_cmd_map;
9500 ar->wmi.ops = &wmi_ops;
9501 ar->wmi.vdev_param = &wmi_vdev_param_map;
9502 ar->wmi.pdev_param = &wmi_pdev_param_map;
9503 ar->wmi.peer_param = &wmi_peer_param_map;
9504 ar->wmi.peer_flags = &wmi_peer_flags_map;
9505 ar->wmi_key_cipher = wmi_key_cipher_suites;
9506 break;
9507 case ATH10K_FW_WMI_OP_VERSION_TLV:
9508 ath10k_wmi_tlv_attach(ar);
9509 ar->wmi_key_cipher = wmi_tlv_key_cipher_suites;
9510 break;
9511 case ATH10K_FW_WMI_OP_VERSION_UNSET:
9512 case ATH10K_FW_WMI_OP_VERSION_MAX:
9513 ath10k_err(ar, "unsupported WMI op version: %d\n",
9514 ar->running_fw->fw_file.wmi_op_version);
9515 return -EINVAL;
9516 }
9517
9518 init_completion(&ar->wmi.service_ready);
9519 init_completion(&ar->wmi.unified_ready);
9520 init_completion(&ar->wmi.barrier);
9521 init_completion(&ar->wmi.radar_confirm);
9522
9523 INIT_WORK(&ar->svc_rdy_work, ath10k_wmi_event_service_ready_work);
9524 INIT_WORK(&ar->radar_confirmation_work,
9525 ath10k_radar_confirmation_work);
9526
9527 if (test_bit(ATH10K_FW_FEATURE_MGMT_TX_BY_REF,
9528 ar->running_fw->fw_file.fw_features)) {
9529 idr_init(&ar->wmi.mgmt_pending_tx);
9530 }
9531
9532 return 0;
9533 }
9534
ath10k_wmi_free_host_mem(struct ath10k * ar)9535 void ath10k_wmi_free_host_mem(struct ath10k *ar)
9536 {
9537 int i;
9538
9539 /* free the host memory chunks requested by firmware */
9540 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
9541 dma_free_coherent(ar->dev,
9542 ar->wmi.mem_chunks[i].len,
9543 ar->wmi.mem_chunks[i].vaddr,
9544 ar->wmi.mem_chunks[i].paddr);
9545 }
9546
9547 ar->wmi.num_mem_chunks = 0;
9548 }
9549
ath10k_wmi_mgmt_tx_clean_up_pending(int msdu_id,void * ptr,void * ctx)9550 static int ath10k_wmi_mgmt_tx_clean_up_pending(int msdu_id, void *ptr,
9551 void *ctx)
9552 {
9553 struct ath10k_mgmt_tx_pkt_addr *pkt_addr = ptr;
9554 struct ath10k *ar = ctx;
9555 struct sk_buff *msdu;
9556
9557 ath10k_dbg(ar, ATH10K_DBG_WMI,
9558 "force cleanup mgmt msdu_id %u\n", msdu_id);
9559
9560 msdu = pkt_addr->vaddr;
9561 dma_unmap_single(ar->dev, pkt_addr->paddr,
9562 msdu->len, DMA_TO_DEVICE);
9563 ieee80211_free_txskb(ar->hw, msdu);
9564
9565 return 0;
9566 }
9567
ath10k_wmi_detach(struct ath10k * ar)9568 void ath10k_wmi_detach(struct ath10k *ar)
9569 {
9570 if (test_bit(ATH10K_FW_FEATURE_MGMT_TX_BY_REF,
9571 ar->running_fw->fw_file.fw_features)) {
9572 spin_lock_bh(&ar->data_lock);
9573 idr_for_each(&ar->wmi.mgmt_pending_tx,
9574 ath10k_wmi_mgmt_tx_clean_up_pending, ar);
9575 idr_destroy(&ar->wmi.mgmt_pending_tx);
9576 spin_unlock_bh(&ar->data_lock);
9577 }
9578
9579 cancel_work_sync(&ar->svc_rdy_work);
9580 dev_kfree_skb(ar->svc_rdy_skb);
9581 }
9582