1 // SPDX-License-Identifier: ISC
2 /*
3 * Copyright (c) 2005-2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
5 * Copyright (c) 2018, The Linux Foundation. All rights reserved.
6 */
7
8 #include "core.h"
9 #include "htc.h"
10 #include "htt.h"
11 #include "txrx.h"
12 #include "debug.h"
13 #include "trace.h"
14 #include "mac.h"
15
16 #include <linux/log2.h>
17 #include <linux/bitfield.h>
18
19 /* when under memory pressure rx ring refill may fail and needs a retry */
20 #define HTT_RX_RING_REFILL_RETRY_MS 50
21
22 #define HTT_RX_RING_REFILL_RESCHED_MS 5
23
24 /* shortcut to interpret a raw memory buffer as a rx descriptor */
25 #define HTT_RX_BUF_TO_RX_DESC(hw, buf) ath10k_htt_rx_desc_from_raw_buffer(hw, buf)
26
27 static int ath10k_htt_rx_get_csum_state(struct ath10k_hw_params *hw, struct sk_buff *skb);
28
29 static struct sk_buff *
ath10k_htt_rx_find_skb_paddr(struct ath10k * ar,u64 paddr)30 ath10k_htt_rx_find_skb_paddr(struct ath10k *ar, u64 paddr)
31 {
32 struct ath10k_skb_rxcb *rxcb;
33
34 hash_for_each_possible(ar->htt.rx_ring.skb_table, rxcb, hlist, paddr)
35 if (rxcb->paddr == paddr)
36 return ATH10K_RXCB_SKB(rxcb);
37
38 WARN_ON_ONCE(1);
39 return NULL;
40 }
41
ath10k_htt_rx_ring_free(struct ath10k_htt * htt)42 static void ath10k_htt_rx_ring_free(struct ath10k_htt *htt)
43 {
44 struct sk_buff *skb;
45 struct ath10k_skb_rxcb *rxcb;
46 struct hlist_node *n;
47 int i;
48
49 if (htt->rx_ring.in_ord_rx) {
50 hash_for_each_safe(htt->rx_ring.skb_table, i, n, rxcb, hlist) {
51 skb = ATH10K_RXCB_SKB(rxcb);
52 dma_unmap_single(htt->ar->dev, rxcb->paddr,
53 skb->len + skb_tailroom(skb),
54 DMA_FROM_DEVICE);
55 hash_del(&rxcb->hlist);
56 dev_kfree_skb_any(skb);
57 }
58 } else {
59 for (i = 0; i < htt->rx_ring.size; i++) {
60 skb = htt->rx_ring.netbufs_ring[i];
61 if (!skb)
62 continue;
63
64 rxcb = ATH10K_SKB_RXCB(skb);
65 dma_unmap_single(htt->ar->dev, rxcb->paddr,
66 skb->len + skb_tailroom(skb),
67 DMA_FROM_DEVICE);
68 dev_kfree_skb_any(skb);
69 }
70 }
71
72 htt->rx_ring.fill_cnt = 0;
73 hash_init(htt->rx_ring.skb_table);
74 memset(htt->rx_ring.netbufs_ring, 0,
75 htt->rx_ring.size * sizeof(htt->rx_ring.netbufs_ring[0]));
76 }
77
ath10k_htt_get_rx_ring_size_32(struct ath10k_htt * htt)78 static size_t ath10k_htt_get_rx_ring_size_32(struct ath10k_htt *htt)
79 {
80 return htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring_32);
81 }
82
ath10k_htt_get_rx_ring_size_64(struct ath10k_htt * htt)83 static size_t ath10k_htt_get_rx_ring_size_64(struct ath10k_htt *htt)
84 {
85 return htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring_64);
86 }
87
ath10k_htt_config_paddrs_ring_32(struct ath10k_htt * htt,void * vaddr)88 static void ath10k_htt_config_paddrs_ring_32(struct ath10k_htt *htt,
89 void *vaddr)
90 {
91 htt->rx_ring.paddrs_ring_32 = vaddr;
92 }
93
ath10k_htt_config_paddrs_ring_64(struct ath10k_htt * htt,void * vaddr)94 static void ath10k_htt_config_paddrs_ring_64(struct ath10k_htt *htt,
95 void *vaddr)
96 {
97 htt->rx_ring.paddrs_ring_64 = vaddr;
98 }
99
ath10k_htt_set_paddrs_ring_32(struct ath10k_htt * htt,dma_addr_t paddr,int idx)100 static void ath10k_htt_set_paddrs_ring_32(struct ath10k_htt *htt,
101 dma_addr_t paddr, int idx)
102 {
103 htt->rx_ring.paddrs_ring_32[idx] = __cpu_to_le32(paddr);
104 }
105
ath10k_htt_set_paddrs_ring_64(struct ath10k_htt * htt,dma_addr_t paddr,int idx)106 static void ath10k_htt_set_paddrs_ring_64(struct ath10k_htt *htt,
107 dma_addr_t paddr, int idx)
108 {
109 htt->rx_ring.paddrs_ring_64[idx] = __cpu_to_le64(paddr);
110 }
111
ath10k_htt_reset_paddrs_ring_32(struct ath10k_htt * htt,int idx)112 static void ath10k_htt_reset_paddrs_ring_32(struct ath10k_htt *htt, int idx)
113 {
114 htt->rx_ring.paddrs_ring_32[idx] = 0;
115 }
116
ath10k_htt_reset_paddrs_ring_64(struct ath10k_htt * htt,int idx)117 static void ath10k_htt_reset_paddrs_ring_64(struct ath10k_htt *htt, int idx)
118 {
119 htt->rx_ring.paddrs_ring_64[idx] = 0;
120 }
121
ath10k_htt_get_vaddr_ring_32(struct ath10k_htt * htt)122 static void *ath10k_htt_get_vaddr_ring_32(struct ath10k_htt *htt)
123 {
124 return (void *)htt->rx_ring.paddrs_ring_32;
125 }
126
ath10k_htt_get_vaddr_ring_64(struct ath10k_htt * htt)127 static void *ath10k_htt_get_vaddr_ring_64(struct ath10k_htt *htt)
128 {
129 return (void *)htt->rx_ring.paddrs_ring_64;
130 }
131
__ath10k_htt_rx_ring_fill_n(struct ath10k_htt * htt,int num)132 static int __ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
133 {
134 struct ath10k_hw_params *hw = &htt->ar->hw_params;
135 struct htt_rx_desc *rx_desc;
136 struct ath10k_skb_rxcb *rxcb;
137 struct sk_buff *skb;
138 dma_addr_t paddr;
139 int ret = 0, idx;
140
141 /* The Full Rx Reorder firmware has no way of telling the host
142 * implicitly when it copied HTT Rx Ring buffers to MAC Rx Ring.
143 * To keep things simple make sure ring is always half empty. This
144 * guarantees there'll be no replenishment overruns possible.
145 */
146 BUILD_BUG_ON(HTT_RX_RING_FILL_LEVEL >= HTT_RX_RING_SIZE / 2);
147
148 idx = __le32_to_cpu(*htt->rx_ring.alloc_idx.vaddr);
149
150 if (idx < 0 || idx >= htt->rx_ring.size) {
151 ath10k_err(htt->ar, "rx ring index is not valid, firmware malfunctioning?\n");
152 idx &= htt->rx_ring.size_mask;
153 ret = -ENOMEM;
154 goto fail;
155 }
156
157 while (num > 0) {
158 skb = dev_alloc_skb(HTT_RX_BUF_SIZE + HTT_RX_DESC_ALIGN);
159 if (!skb) {
160 ret = -ENOMEM;
161 goto fail;
162 }
163
164 if (!IS_ALIGNED((unsigned long)skb->data, HTT_RX_DESC_ALIGN))
165 skb_pull(skb,
166 PTR_ALIGN(skb->data, HTT_RX_DESC_ALIGN) -
167 skb->data);
168
169 /* Clear rx_desc attention word before posting to Rx ring */
170 rx_desc = HTT_RX_BUF_TO_RX_DESC(hw, skb->data);
171 ath10k_htt_rx_desc_get_attention(hw, rx_desc)->flags = __cpu_to_le32(0);
172
173 paddr = dma_map_single(htt->ar->dev, skb->data,
174 skb->len + skb_tailroom(skb),
175 DMA_FROM_DEVICE);
176
177 if (unlikely(dma_mapping_error(htt->ar->dev, paddr))) {
178 dev_kfree_skb_any(skb);
179 ret = -ENOMEM;
180 goto fail;
181 }
182
183 rxcb = ATH10K_SKB_RXCB(skb);
184 rxcb->paddr = paddr;
185 htt->rx_ring.netbufs_ring[idx] = skb;
186 ath10k_htt_set_paddrs_ring(htt, paddr, idx);
187 htt->rx_ring.fill_cnt++;
188
189 if (htt->rx_ring.in_ord_rx) {
190 hash_add(htt->rx_ring.skb_table,
191 &ATH10K_SKB_RXCB(skb)->hlist,
192 paddr);
193 }
194
195 num--;
196 idx++;
197 idx &= htt->rx_ring.size_mask;
198 }
199
200 fail:
201 /*
202 * Make sure the rx buffer is updated before available buffer
203 * index to avoid any potential rx ring corruption.
204 */
205 mb();
206 *htt->rx_ring.alloc_idx.vaddr = __cpu_to_le32(idx);
207 return ret;
208 }
209
ath10k_htt_rx_ring_fill_n(struct ath10k_htt * htt,int num)210 static int ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
211 {
212 lockdep_assert_held(&htt->rx_ring.lock);
213 return __ath10k_htt_rx_ring_fill_n(htt, num);
214 }
215
ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt * htt)216 static void ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt *htt)
217 {
218 int ret, num_deficit, num_to_fill;
219
220 /* Refilling the whole RX ring buffer proves to be a bad idea. The
221 * reason is RX may take up significant amount of CPU cycles and starve
222 * other tasks, e.g. TX on an ethernet device while acting as a bridge
223 * with ath10k wlan interface. This ended up with very poor performance
224 * once CPU the host system was overwhelmed with RX on ath10k.
225 *
226 * By limiting the number of refills the replenishing occurs
227 * progressively. This in turns makes use of the fact tasklets are
228 * processed in FIFO order. This means actual RX processing can starve
229 * out refilling. If there's not enough buffers on RX ring FW will not
230 * report RX until it is refilled with enough buffers. This
231 * automatically balances load wrt to CPU power.
232 *
233 * This probably comes at a cost of lower maximum throughput but
234 * improves the average and stability.
235 */
236 spin_lock_bh(&htt->rx_ring.lock);
237 num_deficit = htt->rx_ring.fill_level - htt->rx_ring.fill_cnt;
238 num_to_fill = min(ATH10K_HTT_MAX_NUM_REFILL, num_deficit);
239 num_deficit -= num_to_fill;
240 ret = ath10k_htt_rx_ring_fill_n(htt, num_to_fill);
241 if (ret == -ENOMEM) {
242 /*
243 * Failed to fill it to the desired level -
244 * we'll start a timer and try again next time.
245 * As long as enough buffers are left in the ring for
246 * another A-MPDU rx, no special recovery is needed.
247 */
248 mod_timer(&htt->rx_ring.refill_retry_timer, jiffies +
249 msecs_to_jiffies(HTT_RX_RING_REFILL_RETRY_MS));
250 } else if (num_deficit > 0) {
251 mod_timer(&htt->rx_ring.refill_retry_timer, jiffies +
252 msecs_to_jiffies(HTT_RX_RING_REFILL_RESCHED_MS));
253 }
254 spin_unlock_bh(&htt->rx_ring.lock);
255 }
256
ath10k_htt_rx_ring_refill_retry(struct timer_list * t)257 static void ath10k_htt_rx_ring_refill_retry(struct timer_list *t)
258 {
259 struct ath10k_htt *htt = from_timer(htt, t, rx_ring.refill_retry_timer);
260
261 ath10k_htt_rx_msdu_buff_replenish(htt);
262 }
263
ath10k_htt_rx_ring_refill(struct ath10k * ar)264 int ath10k_htt_rx_ring_refill(struct ath10k *ar)
265 {
266 struct ath10k_htt *htt = &ar->htt;
267 int ret;
268
269 if (ar->bus_param.dev_type == ATH10K_DEV_TYPE_HL)
270 return 0;
271
272 spin_lock_bh(&htt->rx_ring.lock);
273 ret = ath10k_htt_rx_ring_fill_n(htt, (htt->rx_ring.fill_level -
274 htt->rx_ring.fill_cnt));
275
276 if (ret)
277 ath10k_htt_rx_ring_free(htt);
278
279 spin_unlock_bh(&htt->rx_ring.lock);
280
281 return ret;
282 }
283
ath10k_htt_rx_free(struct ath10k_htt * htt)284 void ath10k_htt_rx_free(struct ath10k_htt *htt)
285 {
286 if (htt->ar->bus_param.dev_type == ATH10K_DEV_TYPE_HL)
287 return;
288
289 del_timer_sync(&htt->rx_ring.refill_retry_timer);
290
291 skb_queue_purge(&htt->rx_msdus_q);
292 skb_queue_purge(&htt->rx_in_ord_compl_q);
293 skb_queue_purge(&htt->tx_fetch_ind_q);
294
295 spin_lock_bh(&htt->rx_ring.lock);
296 ath10k_htt_rx_ring_free(htt);
297 spin_unlock_bh(&htt->rx_ring.lock);
298
299 dma_free_coherent(htt->ar->dev,
300 ath10k_htt_get_rx_ring_size(htt),
301 ath10k_htt_get_vaddr_ring(htt),
302 htt->rx_ring.base_paddr);
303
304 ath10k_htt_config_paddrs_ring(htt, NULL);
305
306 dma_free_coherent(htt->ar->dev,
307 sizeof(*htt->rx_ring.alloc_idx.vaddr),
308 htt->rx_ring.alloc_idx.vaddr,
309 htt->rx_ring.alloc_idx.paddr);
310 htt->rx_ring.alloc_idx.vaddr = NULL;
311
312 kfree(htt->rx_ring.netbufs_ring);
313 htt->rx_ring.netbufs_ring = NULL;
314 }
315
ath10k_htt_rx_netbuf_pop(struct ath10k_htt * htt)316 static inline struct sk_buff *ath10k_htt_rx_netbuf_pop(struct ath10k_htt *htt)
317 {
318 struct ath10k *ar = htt->ar;
319 int idx;
320 struct sk_buff *msdu;
321
322 lockdep_assert_held(&htt->rx_ring.lock);
323
324 if (htt->rx_ring.fill_cnt == 0) {
325 ath10k_warn(ar, "tried to pop sk_buff from an empty rx ring\n");
326 return NULL;
327 }
328
329 idx = htt->rx_ring.sw_rd_idx.msdu_payld;
330 msdu = htt->rx_ring.netbufs_ring[idx];
331 htt->rx_ring.netbufs_ring[idx] = NULL;
332 ath10k_htt_reset_paddrs_ring(htt, idx);
333
334 idx++;
335 idx &= htt->rx_ring.size_mask;
336 htt->rx_ring.sw_rd_idx.msdu_payld = idx;
337 htt->rx_ring.fill_cnt--;
338
339 dma_unmap_single(htt->ar->dev,
340 ATH10K_SKB_RXCB(msdu)->paddr,
341 msdu->len + skb_tailroom(msdu),
342 DMA_FROM_DEVICE);
343 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ",
344 msdu->data, msdu->len + skb_tailroom(msdu));
345
346 return msdu;
347 }
348
349 /* return: < 0 fatal error, 0 - non chained msdu, 1 chained msdu */
ath10k_htt_rx_amsdu_pop(struct ath10k_htt * htt,struct sk_buff_head * amsdu)350 static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt,
351 struct sk_buff_head *amsdu)
352 {
353 struct ath10k *ar = htt->ar;
354 struct ath10k_hw_params *hw = &ar->hw_params;
355 int msdu_len, msdu_chaining = 0;
356 struct sk_buff *msdu;
357 struct htt_rx_desc *rx_desc;
358 struct rx_attention *rx_desc_attention;
359 struct rx_frag_info_common *rx_desc_frag_info_common;
360 struct rx_msdu_start_common *rx_desc_msdu_start_common;
361 struct rx_msdu_end_common *rx_desc_msdu_end_common;
362
363 lockdep_assert_held(&htt->rx_ring.lock);
364
365 for (;;) {
366 int last_msdu, msdu_len_invalid, msdu_chained;
367
368 msdu = ath10k_htt_rx_netbuf_pop(htt);
369 if (!msdu) {
370 __skb_queue_purge(amsdu);
371 return -ENOENT;
372 }
373
374 __skb_queue_tail(amsdu, msdu);
375
376 rx_desc = HTT_RX_BUF_TO_RX_DESC(hw, msdu->data);
377 rx_desc_attention = ath10k_htt_rx_desc_get_attention(hw, rx_desc);
378 rx_desc_msdu_start_common = ath10k_htt_rx_desc_get_msdu_start(hw,
379 rx_desc);
380 rx_desc_msdu_end_common = ath10k_htt_rx_desc_get_msdu_end(hw, rx_desc);
381 rx_desc_frag_info_common = ath10k_htt_rx_desc_get_frag_info(hw, rx_desc);
382
383 /* FIXME: we must report msdu payload since this is what caller
384 * expects now
385 */
386 skb_put(msdu, hw->rx_desc_ops->rx_desc_msdu_payload_offset);
387 skb_pull(msdu, hw->rx_desc_ops->rx_desc_msdu_payload_offset);
388
389 /*
390 * Sanity check - confirm the HW is finished filling in the
391 * rx data.
392 * If the HW and SW are working correctly, then it's guaranteed
393 * that the HW's MAC DMA is done before this point in the SW.
394 * To prevent the case that we handle a stale Rx descriptor,
395 * just assert for now until we have a way to recover.
396 */
397 if (!(__le32_to_cpu(rx_desc_attention->flags)
398 & RX_ATTENTION_FLAGS_MSDU_DONE)) {
399 __skb_queue_purge(amsdu);
400 return -EIO;
401 }
402
403 msdu_len_invalid = !!(__le32_to_cpu(rx_desc_attention->flags)
404 & (RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR |
405 RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR));
406 msdu_len = MS(__le32_to_cpu(rx_desc_msdu_start_common->info0),
407 RX_MSDU_START_INFO0_MSDU_LENGTH);
408 msdu_chained = rx_desc_frag_info_common->ring2_more_count;
409
410 if (msdu_len_invalid)
411 msdu_len = 0;
412
413 skb_trim(msdu, 0);
414 skb_put(msdu, min(msdu_len, ath10k_htt_rx_msdu_size(hw)));
415 msdu_len -= msdu->len;
416
417 /* Note: Chained buffers do not contain rx descriptor */
418 while (msdu_chained--) {
419 msdu = ath10k_htt_rx_netbuf_pop(htt);
420 if (!msdu) {
421 __skb_queue_purge(amsdu);
422 return -ENOENT;
423 }
424
425 __skb_queue_tail(amsdu, msdu);
426 skb_trim(msdu, 0);
427 skb_put(msdu, min(msdu_len, HTT_RX_BUF_SIZE));
428 msdu_len -= msdu->len;
429 msdu_chaining = 1;
430 }
431
432 last_msdu = __le32_to_cpu(rx_desc_msdu_end_common->info0) &
433 RX_MSDU_END_INFO0_LAST_MSDU;
434
435 /* FIXME: why are we skipping the first part of the rx_desc? */
436 trace_ath10k_htt_rx_desc(ar, (void *)rx_desc + sizeof(u32),
437 hw->rx_desc_ops->rx_desc_size - sizeof(u32));
438
439 if (last_msdu)
440 break;
441 }
442
443 if (skb_queue_empty(amsdu))
444 msdu_chaining = -1;
445
446 /*
447 * Don't refill the ring yet.
448 *
449 * First, the elements popped here are still in use - it is not
450 * safe to overwrite them until the matching call to
451 * mpdu_desc_list_next. Second, for efficiency it is preferable to
452 * refill the rx ring with 1 PPDU's worth of rx buffers (something
453 * like 32 x 3 buffers), rather than one MPDU's worth of rx buffers
454 * (something like 3 buffers). Consequently, we'll rely on the txrx
455 * SW to tell us when it is done pulling all the PPDU's rx buffers
456 * out of the rx ring, and then refill it just once.
457 */
458
459 return msdu_chaining;
460 }
461
ath10k_htt_rx_pop_paddr(struct ath10k_htt * htt,u64 paddr)462 static struct sk_buff *ath10k_htt_rx_pop_paddr(struct ath10k_htt *htt,
463 u64 paddr)
464 {
465 struct ath10k *ar = htt->ar;
466 struct ath10k_skb_rxcb *rxcb;
467 struct sk_buff *msdu;
468
469 lockdep_assert_held(&htt->rx_ring.lock);
470
471 msdu = ath10k_htt_rx_find_skb_paddr(ar, paddr);
472 if (!msdu)
473 return NULL;
474
475 rxcb = ATH10K_SKB_RXCB(msdu);
476 hash_del(&rxcb->hlist);
477 htt->rx_ring.fill_cnt--;
478
479 dma_unmap_single(htt->ar->dev, rxcb->paddr,
480 msdu->len + skb_tailroom(msdu),
481 DMA_FROM_DEVICE);
482 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ",
483 msdu->data, msdu->len + skb_tailroom(msdu));
484
485 return msdu;
486 }
487
ath10k_htt_append_frag_list(struct sk_buff * skb_head,struct sk_buff * frag_list,unsigned int frag_len)488 static inline void ath10k_htt_append_frag_list(struct sk_buff *skb_head,
489 struct sk_buff *frag_list,
490 unsigned int frag_len)
491 {
492 skb_shinfo(skb_head)->frag_list = frag_list;
493 skb_head->data_len = frag_len;
494 skb_head->len += skb_head->data_len;
495 }
496
ath10k_htt_rx_handle_amsdu_mon_32(struct ath10k_htt * htt,struct sk_buff * msdu,struct htt_rx_in_ord_msdu_desc ** msdu_desc)497 static int ath10k_htt_rx_handle_amsdu_mon_32(struct ath10k_htt *htt,
498 struct sk_buff *msdu,
499 struct htt_rx_in_ord_msdu_desc **msdu_desc)
500 {
501 struct ath10k *ar = htt->ar;
502 struct ath10k_hw_params *hw = &ar->hw_params;
503 u32 paddr;
504 struct sk_buff *frag_buf;
505 struct sk_buff *prev_frag_buf;
506 u8 last_frag;
507 struct htt_rx_in_ord_msdu_desc *ind_desc = *msdu_desc;
508 struct htt_rx_desc *rxd;
509 int amsdu_len = __le16_to_cpu(ind_desc->msdu_len);
510
511 rxd = HTT_RX_BUF_TO_RX_DESC(hw, msdu->data);
512 trace_ath10k_htt_rx_desc(ar, rxd, hw->rx_desc_ops->rx_desc_size);
513
514 skb_put(msdu, hw->rx_desc_ops->rx_desc_size);
515 skb_pull(msdu, hw->rx_desc_ops->rx_desc_size);
516 skb_put(msdu, min(amsdu_len, ath10k_htt_rx_msdu_size(hw)));
517 amsdu_len -= msdu->len;
518
519 last_frag = ind_desc->reserved;
520 if (last_frag) {
521 if (amsdu_len) {
522 ath10k_warn(ar, "invalid amsdu len %u, left %d",
523 __le16_to_cpu(ind_desc->msdu_len),
524 amsdu_len);
525 }
526 return 0;
527 }
528
529 ind_desc++;
530 paddr = __le32_to_cpu(ind_desc->msdu_paddr);
531 frag_buf = ath10k_htt_rx_pop_paddr(htt, paddr);
532 if (!frag_buf) {
533 ath10k_warn(ar, "failed to pop frag-1 paddr: 0x%x", paddr);
534 return -ENOENT;
535 }
536
537 skb_put(frag_buf, min(amsdu_len, HTT_RX_BUF_SIZE));
538 ath10k_htt_append_frag_list(msdu, frag_buf, amsdu_len);
539
540 amsdu_len -= frag_buf->len;
541 prev_frag_buf = frag_buf;
542 last_frag = ind_desc->reserved;
543 while (!last_frag) {
544 ind_desc++;
545 paddr = __le32_to_cpu(ind_desc->msdu_paddr);
546 frag_buf = ath10k_htt_rx_pop_paddr(htt, paddr);
547 if (!frag_buf) {
548 ath10k_warn(ar, "failed to pop frag-n paddr: 0x%x",
549 paddr);
550 prev_frag_buf->next = NULL;
551 return -ENOENT;
552 }
553
554 skb_put(frag_buf, min(amsdu_len, HTT_RX_BUF_SIZE));
555 last_frag = ind_desc->reserved;
556 amsdu_len -= frag_buf->len;
557
558 prev_frag_buf->next = frag_buf;
559 prev_frag_buf = frag_buf;
560 }
561
562 if (amsdu_len) {
563 ath10k_warn(ar, "invalid amsdu len %u, left %d",
564 __le16_to_cpu(ind_desc->msdu_len), amsdu_len);
565 }
566
567 *msdu_desc = ind_desc;
568
569 prev_frag_buf->next = NULL;
570 return 0;
571 }
572
573 static int
ath10k_htt_rx_handle_amsdu_mon_64(struct ath10k_htt * htt,struct sk_buff * msdu,struct htt_rx_in_ord_msdu_desc_ext ** msdu_desc)574 ath10k_htt_rx_handle_amsdu_mon_64(struct ath10k_htt *htt,
575 struct sk_buff *msdu,
576 struct htt_rx_in_ord_msdu_desc_ext **msdu_desc)
577 {
578 struct ath10k *ar = htt->ar;
579 struct ath10k_hw_params *hw = &ar->hw_params;
580 u64 paddr;
581 struct sk_buff *frag_buf;
582 struct sk_buff *prev_frag_buf;
583 u8 last_frag;
584 struct htt_rx_in_ord_msdu_desc_ext *ind_desc = *msdu_desc;
585 struct htt_rx_desc *rxd;
586 int amsdu_len = __le16_to_cpu(ind_desc->msdu_len);
587
588 rxd = HTT_RX_BUF_TO_RX_DESC(hw, msdu->data);
589 trace_ath10k_htt_rx_desc(ar, rxd, hw->rx_desc_ops->rx_desc_size);
590
591 skb_put(msdu, hw->rx_desc_ops->rx_desc_size);
592 skb_pull(msdu, hw->rx_desc_ops->rx_desc_size);
593 skb_put(msdu, min(amsdu_len, ath10k_htt_rx_msdu_size(hw)));
594 amsdu_len -= msdu->len;
595
596 last_frag = ind_desc->reserved;
597 if (last_frag) {
598 if (amsdu_len) {
599 ath10k_warn(ar, "invalid amsdu len %u, left %d",
600 __le16_to_cpu(ind_desc->msdu_len),
601 amsdu_len);
602 }
603 return 0;
604 }
605
606 ind_desc++;
607 paddr = __le64_to_cpu(ind_desc->msdu_paddr);
608 frag_buf = ath10k_htt_rx_pop_paddr(htt, paddr);
609 if (!frag_buf) {
610 ath10k_warn(ar, "failed to pop frag-1 paddr: 0x%llx", paddr);
611 return -ENOENT;
612 }
613
614 skb_put(frag_buf, min(amsdu_len, HTT_RX_BUF_SIZE));
615 ath10k_htt_append_frag_list(msdu, frag_buf, amsdu_len);
616
617 amsdu_len -= frag_buf->len;
618 prev_frag_buf = frag_buf;
619 last_frag = ind_desc->reserved;
620 while (!last_frag) {
621 ind_desc++;
622 paddr = __le64_to_cpu(ind_desc->msdu_paddr);
623 frag_buf = ath10k_htt_rx_pop_paddr(htt, paddr);
624 if (!frag_buf) {
625 ath10k_warn(ar, "failed to pop frag-n paddr: 0x%llx",
626 paddr);
627 prev_frag_buf->next = NULL;
628 return -ENOENT;
629 }
630
631 skb_put(frag_buf, min(amsdu_len, HTT_RX_BUF_SIZE));
632 last_frag = ind_desc->reserved;
633 amsdu_len -= frag_buf->len;
634
635 prev_frag_buf->next = frag_buf;
636 prev_frag_buf = frag_buf;
637 }
638
639 if (amsdu_len) {
640 ath10k_warn(ar, "invalid amsdu len %u, left %d",
641 __le16_to_cpu(ind_desc->msdu_len), amsdu_len);
642 }
643
644 *msdu_desc = ind_desc;
645
646 prev_frag_buf->next = NULL;
647 return 0;
648 }
649
ath10k_htt_rx_pop_paddr32_list(struct ath10k_htt * htt,struct htt_rx_in_ord_ind * ev,struct sk_buff_head * list)650 static int ath10k_htt_rx_pop_paddr32_list(struct ath10k_htt *htt,
651 struct htt_rx_in_ord_ind *ev,
652 struct sk_buff_head *list)
653 {
654 struct ath10k *ar = htt->ar;
655 struct ath10k_hw_params *hw = &ar->hw_params;
656 struct htt_rx_in_ord_msdu_desc *msdu_desc = ev->msdu_descs32;
657 struct htt_rx_desc *rxd;
658 struct rx_attention *rxd_attention;
659 struct sk_buff *msdu;
660 int msdu_count, ret;
661 bool is_offload;
662 u32 paddr;
663
664 lockdep_assert_held(&htt->rx_ring.lock);
665
666 msdu_count = __le16_to_cpu(ev->msdu_count);
667 is_offload = !!(ev->info & HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK);
668
669 while (msdu_count--) {
670 paddr = __le32_to_cpu(msdu_desc->msdu_paddr);
671
672 msdu = ath10k_htt_rx_pop_paddr(htt, paddr);
673 if (!msdu) {
674 __skb_queue_purge(list);
675 return -ENOENT;
676 }
677
678 if (!is_offload && ar->monitor_arvif) {
679 ret = ath10k_htt_rx_handle_amsdu_mon_32(htt, msdu,
680 &msdu_desc);
681 if (ret) {
682 __skb_queue_purge(list);
683 return ret;
684 }
685 __skb_queue_tail(list, msdu);
686 msdu_desc++;
687 continue;
688 }
689
690 __skb_queue_tail(list, msdu);
691
692 if (!is_offload) {
693 rxd = HTT_RX_BUF_TO_RX_DESC(hw, msdu->data);
694 rxd_attention = ath10k_htt_rx_desc_get_attention(hw, rxd);
695
696 trace_ath10k_htt_rx_desc(ar, rxd, hw->rx_desc_ops->rx_desc_size);
697
698 skb_put(msdu, hw->rx_desc_ops->rx_desc_size);
699 skb_pull(msdu, hw->rx_desc_ops->rx_desc_size);
700 skb_put(msdu, __le16_to_cpu(msdu_desc->msdu_len));
701
702 if (!(__le32_to_cpu(rxd_attention->flags) &
703 RX_ATTENTION_FLAGS_MSDU_DONE)) {
704 ath10k_warn(htt->ar, "tried to pop an incomplete frame, oops!\n");
705 return -EIO;
706 }
707 }
708
709 msdu_desc++;
710 }
711
712 return 0;
713 }
714
ath10k_htt_rx_pop_paddr64_list(struct ath10k_htt * htt,struct htt_rx_in_ord_ind * ev,struct sk_buff_head * list)715 static int ath10k_htt_rx_pop_paddr64_list(struct ath10k_htt *htt,
716 struct htt_rx_in_ord_ind *ev,
717 struct sk_buff_head *list)
718 {
719 struct ath10k *ar = htt->ar;
720 struct ath10k_hw_params *hw = &ar->hw_params;
721 struct htt_rx_in_ord_msdu_desc_ext *msdu_desc = ev->msdu_descs64;
722 struct htt_rx_desc *rxd;
723 struct rx_attention *rxd_attention;
724 struct sk_buff *msdu;
725 int msdu_count, ret;
726 bool is_offload;
727 u64 paddr;
728
729 lockdep_assert_held(&htt->rx_ring.lock);
730
731 msdu_count = __le16_to_cpu(ev->msdu_count);
732 is_offload = !!(ev->info & HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK);
733
734 while (msdu_count--) {
735 paddr = __le64_to_cpu(msdu_desc->msdu_paddr);
736 msdu = ath10k_htt_rx_pop_paddr(htt, paddr);
737 if (!msdu) {
738 __skb_queue_purge(list);
739 return -ENOENT;
740 }
741
742 if (!is_offload && ar->monitor_arvif) {
743 ret = ath10k_htt_rx_handle_amsdu_mon_64(htt, msdu,
744 &msdu_desc);
745 if (ret) {
746 __skb_queue_purge(list);
747 return ret;
748 }
749 __skb_queue_tail(list, msdu);
750 msdu_desc++;
751 continue;
752 }
753
754 __skb_queue_tail(list, msdu);
755
756 if (!is_offload) {
757 rxd = HTT_RX_BUF_TO_RX_DESC(hw, msdu->data);
758 rxd_attention = ath10k_htt_rx_desc_get_attention(hw, rxd);
759
760 trace_ath10k_htt_rx_desc(ar, rxd, hw->rx_desc_ops->rx_desc_size);
761
762 skb_put(msdu, hw->rx_desc_ops->rx_desc_size);
763 skb_pull(msdu, hw->rx_desc_ops->rx_desc_size);
764 skb_put(msdu, __le16_to_cpu(msdu_desc->msdu_len));
765
766 if (!(__le32_to_cpu(rxd_attention->flags) &
767 RX_ATTENTION_FLAGS_MSDU_DONE)) {
768 ath10k_warn(htt->ar, "tried to pop an incomplete frame, oops!\n");
769 return -EIO;
770 }
771 }
772
773 msdu_desc++;
774 }
775
776 return 0;
777 }
778
ath10k_htt_rx_alloc(struct ath10k_htt * htt)779 int ath10k_htt_rx_alloc(struct ath10k_htt *htt)
780 {
781 struct ath10k *ar = htt->ar;
782 dma_addr_t paddr;
783 void *vaddr, *vaddr_ring;
784 size_t size;
785 struct timer_list *timer = &htt->rx_ring.refill_retry_timer;
786
787 if (ar->bus_param.dev_type == ATH10K_DEV_TYPE_HL)
788 return 0;
789
790 htt->rx_confused = false;
791
792 /* XXX: The fill level could be changed during runtime in response to
793 * the host processing latency. Is this really worth it?
794 */
795 htt->rx_ring.size = HTT_RX_RING_SIZE;
796 htt->rx_ring.size_mask = htt->rx_ring.size - 1;
797 htt->rx_ring.fill_level = ar->hw_params.rx_ring_fill_level;
798
799 if (!is_power_of_2(htt->rx_ring.size)) {
800 ath10k_warn(ar, "htt rx ring size is not power of 2\n");
801 return -EINVAL;
802 }
803
804 htt->rx_ring.netbufs_ring =
805 kcalloc(htt->rx_ring.size, sizeof(struct sk_buff *),
806 GFP_KERNEL);
807 if (!htt->rx_ring.netbufs_ring)
808 goto err_netbuf;
809
810 size = ath10k_htt_get_rx_ring_size(htt);
811
812 vaddr_ring = dma_alloc_coherent(htt->ar->dev, size, &paddr, GFP_KERNEL);
813 if (!vaddr_ring)
814 goto err_dma_ring;
815
816 ath10k_htt_config_paddrs_ring(htt, vaddr_ring);
817 htt->rx_ring.base_paddr = paddr;
818
819 vaddr = dma_alloc_coherent(htt->ar->dev,
820 sizeof(*htt->rx_ring.alloc_idx.vaddr),
821 &paddr, GFP_KERNEL);
822 if (!vaddr)
823 goto err_dma_idx;
824
825 htt->rx_ring.alloc_idx.vaddr = vaddr;
826 htt->rx_ring.alloc_idx.paddr = paddr;
827 htt->rx_ring.sw_rd_idx.msdu_payld = htt->rx_ring.size_mask;
828 *htt->rx_ring.alloc_idx.vaddr = 0;
829
830 /* Initialize the Rx refill retry timer */
831 timer_setup(timer, ath10k_htt_rx_ring_refill_retry, 0);
832
833 spin_lock_init(&htt->rx_ring.lock);
834
835 htt->rx_ring.fill_cnt = 0;
836 htt->rx_ring.sw_rd_idx.msdu_payld = 0;
837 hash_init(htt->rx_ring.skb_table);
838
839 skb_queue_head_init(&htt->rx_msdus_q);
840 skb_queue_head_init(&htt->rx_in_ord_compl_q);
841 skb_queue_head_init(&htt->tx_fetch_ind_q);
842 atomic_set(&htt->num_mpdus_ready, 0);
843
844 ath10k_dbg(ar, ATH10K_DBG_BOOT, "htt rx ring size %d fill_level %d\n",
845 htt->rx_ring.size, htt->rx_ring.fill_level);
846 return 0;
847
848 err_dma_idx:
849 dma_free_coherent(htt->ar->dev,
850 ath10k_htt_get_rx_ring_size(htt),
851 vaddr_ring,
852 htt->rx_ring.base_paddr);
853 ath10k_htt_config_paddrs_ring(htt, NULL);
854 err_dma_ring:
855 kfree(htt->rx_ring.netbufs_ring);
856 htt->rx_ring.netbufs_ring = NULL;
857 err_netbuf:
858 return -ENOMEM;
859 }
860
ath10k_htt_rx_crypto_param_len(struct ath10k * ar,enum htt_rx_mpdu_encrypt_type type)861 static int ath10k_htt_rx_crypto_param_len(struct ath10k *ar,
862 enum htt_rx_mpdu_encrypt_type type)
863 {
864 switch (type) {
865 case HTT_RX_MPDU_ENCRYPT_NONE:
866 return 0;
867 case HTT_RX_MPDU_ENCRYPT_WEP40:
868 case HTT_RX_MPDU_ENCRYPT_WEP104:
869 return IEEE80211_WEP_IV_LEN;
870 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
871 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
872 return IEEE80211_TKIP_IV_LEN;
873 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
874 return IEEE80211_CCMP_HDR_LEN;
875 case HTT_RX_MPDU_ENCRYPT_AES_CCM256_WPA2:
876 return IEEE80211_CCMP_256_HDR_LEN;
877 case HTT_RX_MPDU_ENCRYPT_AES_GCMP_WPA2:
878 case HTT_RX_MPDU_ENCRYPT_AES_GCMP256_WPA2:
879 return IEEE80211_GCMP_HDR_LEN;
880 case HTT_RX_MPDU_ENCRYPT_WEP128:
881 case HTT_RX_MPDU_ENCRYPT_WAPI:
882 break;
883 }
884
885 ath10k_warn(ar, "unsupported encryption type %d\n", type);
886 return 0;
887 }
888
889 #define MICHAEL_MIC_LEN 8
890
ath10k_htt_rx_crypto_mic_len(struct ath10k * ar,enum htt_rx_mpdu_encrypt_type type)891 static int ath10k_htt_rx_crypto_mic_len(struct ath10k *ar,
892 enum htt_rx_mpdu_encrypt_type type)
893 {
894 switch (type) {
895 case HTT_RX_MPDU_ENCRYPT_NONE:
896 case HTT_RX_MPDU_ENCRYPT_WEP40:
897 case HTT_RX_MPDU_ENCRYPT_WEP104:
898 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
899 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
900 return 0;
901 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
902 return IEEE80211_CCMP_MIC_LEN;
903 case HTT_RX_MPDU_ENCRYPT_AES_CCM256_WPA2:
904 return IEEE80211_CCMP_256_MIC_LEN;
905 case HTT_RX_MPDU_ENCRYPT_AES_GCMP_WPA2:
906 case HTT_RX_MPDU_ENCRYPT_AES_GCMP256_WPA2:
907 return IEEE80211_GCMP_MIC_LEN;
908 case HTT_RX_MPDU_ENCRYPT_WEP128:
909 case HTT_RX_MPDU_ENCRYPT_WAPI:
910 break;
911 }
912
913 ath10k_warn(ar, "unsupported encryption type %d\n", type);
914 return 0;
915 }
916
ath10k_htt_rx_crypto_icv_len(struct ath10k * ar,enum htt_rx_mpdu_encrypt_type type)917 static int ath10k_htt_rx_crypto_icv_len(struct ath10k *ar,
918 enum htt_rx_mpdu_encrypt_type type)
919 {
920 switch (type) {
921 case HTT_RX_MPDU_ENCRYPT_NONE:
922 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
923 case HTT_RX_MPDU_ENCRYPT_AES_CCM256_WPA2:
924 case HTT_RX_MPDU_ENCRYPT_AES_GCMP_WPA2:
925 case HTT_RX_MPDU_ENCRYPT_AES_GCMP256_WPA2:
926 return 0;
927 case HTT_RX_MPDU_ENCRYPT_WEP40:
928 case HTT_RX_MPDU_ENCRYPT_WEP104:
929 return IEEE80211_WEP_ICV_LEN;
930 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
931 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
932 return IEEE80211_TKIP_ICV_LEN;
933 case HTT_RX_MPDU_ENCRYPT_WEP128:
934 case HTT_RX_MPDU_ENCRYPT_WAPI:
935 break;
936 }
937
938 ath10k_warn(ar, "unsupported encryption type %d\n", type);
939 return 0;
940 }
941
942 struct amsdu_subframe_hdr {
943 u8 dst[ETH_ALEN];
944 u8 src[ETH_ALEN];
945 __be16 len;
946 } __packed;
947
948 #define GROUP_ID_IS_SU_MIMO(x) ((x) == 0 || (x) == 63)
949
ath10k_bw_to_mac80211_bw(u8 bw)950 static inline u8 ath10k_bw_to_mac80211_bw(u8 bw)
951 {
952 u8 ret = 0;
953
954 switch (bw) {
955 case 0:
956 ret = RATE_INFO_BW_20;
957 break;
958 case 1:
959 ret = RATE_INFO_BW_40;
960 break;
961 case 2:
962 ret = RATE_INFO_BW_80;
963 break;
964 case 3:
965 ret = RATE_INFO_BW_160;
966 break;
967 }
968
969 return ret;
970 }
971
ath10k_htt_rx_h_rates(struct ath10k * ar,struct ieee80211_rx_status * status,struct htt_rx_desc * rxd)972 static void ath10k_htt_rx_h_rates(struct ath10k *ar,
973 struct ieee80211_rx_status *status,
974 struct htt_rx_desc *rxd)
975 {
976 struct ath10k_hw_params *hw = &ar->hw_params;
977 struct rx_attention *rxd_attention;
978 struct rx_mpdu_start *rxd_mpdu_start;
979 struct rx_mpdu_end *rxd_mpdu_end;
980 struct rx_msdu_start_common *rxd_msdu_start_common;
981 struct rx_msdu_end_common *rxd_msdu_end_common;
982 struct rx_ppdu_start *rxd_ppdu_start;
983 struct ieee80211_supported_band *sband;
984 u8 cck, rate, bw, sgi, mcs, nss;
985 u8 *rxd_msdu_payload;
986 u8 preamble = 0;
987 u8 group_id;
988 u32 info1, info2, info3;
989 u32 stbc, nsts_su;
990
991 rxd_attention = ath10k_htt_rx_desc_get_attention(hw, rxd);
992 rxd_mpdu_start = ath10k_htt_rx_desc_get_mpdu_start(hw, rxd);
993 rxd_mpdu_end = ath10k_htt_rx_desc_get_mpdu_end(hw, rxd);
994 rxd_msdu_start_common = ath10k_htt_rx_desc_get_msdu_start(hw, rxd);
995 rxd_msdu_end_common = ath10k_htt_rx_desc_get_msdu_end(hw, rxd);
996 rxd_ppdu_start = ath10k_htt_rx_desc_get_ppdu_start(hw, rxd);
997 rxd_msdu_payload = ath10k_htt_rx_desc_get_msdu_payload(hw, rxd);
998
999 info1 = __le32_to_cpu(rxd_ppdu_start->info1);
1000 info2 = __le32_to_cpu(rxd_ppdu_start->info2);
1001 info3 = __le32_to_cpu(rxd_ppdu_start->info3);
1002
1003 preamble = MS(info1, RX_PPDU_START_INFO1_PREAMBLE_TYPE);
1004
1005 switch (preamble) {
1006 case HTT_RX_LEGACY:
1007 /* To get legacy rate index band is required. Since band can't
1008 * be undefined check if freq is non-zero.
1009 */
1010 if (!status->freq)
1011 return;
1012
1013 cck = info1 & RX_PPDU_START_INFO1_L_SIG_RATE_SELECT;
1014 rate = MS(info1, RX_PPDU_START_INFO1_L_SIG_RATE);
1015 rate &= ~RX_PPDU_START_RATE_FLAG;
1016
1017 sband = &ar->mac.sbands[status->band];
1018 status->rate_idx = ath10k_mac_hw_rate_to_idx(sband, rate, cck);
1019 break;
1020 case HTT_RX_HT:
1021 case HTT_RX_HT_WITH_TXBF:
1022 /* HT-SIG - Table 20-11 in info2 and info3 */
1023 mcs = info2 & 0x1F;
1024 nss = mcs >> 3;
1025 bw = (info2 >> 7) & 1;
1026 sgi = (info3 >> 7) & 1;
1027
1028 status->rate_idx = mcs;
1029 status->encoding = RX_ENC_HT;
1030 if (sgi)
1031 status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
1032 if (bw)
1033 status->bw = RATE_INFO_BW_40;
1034 break;
1035 case HTT_RX_VHT:
1036 case HTT_RX_VHT_WITH_TXBF:
1037 /* VHT-SIG-A1 in info2, VHT-SIG-A2 in info3
1038 * TODO check this
1039 */
1040 bw = info2 & 3;
1041 sgi = info3 & 1;
1042 stbc = (info2 >> 3) & 1;
1043 group_id = (info2 >> 4) & 0x3F;
1044
1045 if (GROUP_ID_IS_SU_MIMO(group_id)) {
1046 mcs = (info3 >> 4) & 0x0F;
1047 nsts_su = ((info2 >> 10) & 0x07);
1048 if (stbc)
1049 nss = (nsts_su >> 2) + 1;
1050 else
1051 nss = (nsts_su + 1);
1052 } else {
1053 /* Hardware doesn't decode VHT-SIG-B into Rx descriptor
1054 * so it's impossible to decode MCS. Also since
1055 * firmware consumes Group Id Management frames host
1056 * has no knowledge regarding group/user position
1057 * mapping so it's impossible to pick the correct Nsts
1058 * from VHT-SIG-A1.
1059 *
1060 * Bandwidth and SGI are valid so report the rateinfo
1061 * on best-effort basis.
1062 */
1063 mcs = 0;
1064 nss = 1;
1065 }
1066
1067 if (mcs > 0x09) {
1068 ath10k_warn(ar, "invalid MCS received %u\n", mcs);
1069 ath10k_warn(ar, "rxd %08x mpdu start %08x %08x msdu start %08x %08x ppdu start %08x %08x %08x %08x %08x\n",
1070 __le32_to_cpu(rxd_attention->flags),
1071 __le32_to_cpu(rxd_mpdu_start->info0),
1072 __le32_to_cpu(rxd_mpdu_start->info1),
1073 __le32_to_cpu(rxd_msdu_start_common->info0),
1074 __le32_to_cpu(rxd_msdu_start_common->info1),
1075 rxd_ppdu_start->info0,
1076 __le32_to_cpu(rxd_ppdu_start->info1),
1077 __le32_to_cpu(rxd_ppdu_start->info2),
1078 __le32_to_cpu(rxd_ppdu_start->info3),
1079 __le32_to_cpu(rxd_ppdu_start->info4));
1080
1081 ath10k_warn(ar, "msdu end %08x mpdu end %08x\n",
1082 __le32_to_cpu(rxd_msdu_end_common->info0),
1083 __le32_to_cpu(rxd_mpdu_end->info0));
1084
1085 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL,
1086 "rx desc msdu payload: ",
1087 rxd_msdu_payload, 50);
1088 }
1089
1090 status->rate_idx = mcs;
1091 status->nss = nss;
1092
1093 if (sgi)
1094 status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
1095
1096 status->bw = ath10k_bw_to_mac80211_bw(bw);
1097 status->encoding = RX_ENC_VHT;
1098 break;
1099 default:
1100 break;
1101 }
1102 }
1103
1104 static struct ieee80211_channel *
ath10k_htt_rx_h_peer_channel(struct ath10k * ar,struct htt_rx_desc * rxd)1105 ath10k_htt_rx_h_peer_channel(struct ath10k *ar, struct htt_rx_desc *rxd)
1106 {
1107 struct ath10k_hw_params *hw = &ar->hw_params;
1108 struct rx_attention *rxd_attention;
1109 struct rx_msdu_end_common *rxd_msdu_end_common;
1110 struct rx_mpdu_start *rxd_mpdu_start;
1111 struct ath10k_peer *peer;
1112 struct ath10k_vif *arvif;
1113 struct cfg80211_chan_def def;
1114 u16 peer_id;
1115
1116 lockdep_assert_held(&ar->data_lock);
1117
1118 if (!rxd)
1119 return NULL;
1120
1121 rxd_attention = ath10k_htt_rx_desc_get_attention(hw, rxd);
1122 rxd_msdu_end_common = ath10k_htt_rx_desc_get_msdu_end(hw, rxd);
1123 rxd_mpdu_start = ath10k_htt_rx_desc_get_mpdu_start(hw, rxd);
1124
1125 if (rxd_attention->flags &
1126 __cpu_to_le32(RX_ATTENTION_FLAGS_PEER_IDX_INVALID))
1127 return NULL;
1128
1129 if (!(rxd_msdu_end_common->info0 &
1130 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU)))
1131 return NULL;
1132
1133 peer_id = MS(__le32_to_cpu(rxd_mpdu_start->info0),
1134 RX_MPDU_START_INFO0_PEER_IDX);
1135
1136 peer = ath10k_peer_find_by_id(ar, peer_id);
1137 if (!peer)
1138 return NULL;
1139
1140 arvif = ath10k_get_arvif(ar, peer->vdev_id);
1141 if (WARN_ON_ONCE(!arvif))
1142 return NULL;
1143
1144 if (ath10k_mac_vif_chan(arvif->vif, &def))
1145 return NULL;
1146
1147 return def.chan;
1148 }
1149
1150 static struct ieee80211_channel *
ath10k_htt_rx_h_vdev_channel(struct ath10k * ar,u32 vdev_id)1151 ath10k_htt_rx_h_vdev_channel(struct ath10k *ar, u32 vdev_id)
1152 {
1153 struct ath10k_vif *arvif;
1154 struct cfg80211_chan_def def;
1155
1156 lockdep_assert_held(&ar->data_lock);
1157
1158 list_for_each_entry(arvif, &ar->arvifs, list) {
1159 if (arvif->vdev_id == vdev_id &&
1160 ath10k_mac_vif_chan(arvif->vif, &def) == 0)
1161 return def.chan;
1162 }
1163
1164 return NULL;
1165 }
1166
1167 static void
ath10k_htt_rx_h_any_chan_iter(struct ieee80211_hw * hw,struct ieee80211_chanctx_conf * conf,void * data)1168 ath10k_htt_rx_h_any_chan_iter(struct ieee80211_hw *hw,
1169 struct ieee80211_chanctx_conf *conf,
1170 void *data)
1171 {
1172 struct cfg80211_chan_def *def = data;
1173
1174 *def = conf->def;
1175 }
1176
1177 static struct ieee80211_channel *
ath10k_htt_rx_h_any_channel(struct ath10k * ar)1178 ath10k_htt_rx_h_any_channel(struct ath10k *ar)
1179 {
1180 struct cfg80211_chan_def def = {};
1181
1182 ieee80211_iter_chan_contexts_atomic(ar->hw,
1183 ath10k_htt_rx_h_any_chan_iter,
1184 &def);
1185
1186 return def.chan;
1187 }
1188
ath10k_htt_rx_h_channel(struct ath10k * ar,struct ieee80211_rx_status * status,struct htt_rx_desc * rxd,u32 vdev_id)1189 static bool ath10k_htt_rx_h_channel(struct ath10k *ar,
1190 struct ieee80211_rx_status *status,
1191 struct htt_rx_desc *rxd,
1192 u32 vdev_id)
1193 {
1194 struct ieee80211_channel *ch;
1195
1196 spin_lock_bh(&ar->data_lock);
1197 ch = ar->scan_channel;
1198 if (!ch)
1199 ch = ar->rx_channel;
1200 if (!ch)
1201 ch = ath10k_htt_rx_h_peer_channel(ar, rxd);
1202 if (!ch)
1203 ch = ath10k_htt_rx_h_vdev_channel(ar, vdev_id);
1204 if (!ch)
1205 ch = ath10k_htt_rx_h_any_channel(ar);
1206 if (!ch)
1207 ch = ar->tgt_oper_chan;
1208 spin_unlock_bh(&ar->data_lock);
1209
1210 if (!ch)
1211 return false;
1212
1213 status->band = ch->band;
1214 status->freq = ch->center_freq;
1215
1216 return true;
1217 }
1218
ath10k_htt_rx_h_signal(struct ath10k * ar,struct ieee80211_rx_status * status,struct htt_rx_desc * rxd)1219 static void ath10k_htt_rx_h_signal(struct ath10k *ar,
1220 struct ieee80211_rx_status *status,
1221 struct htt_rx_desc *rxd)
1222 {
1223 struct ath10k_hw_params *hw = &ar->hw_params;
1224 struct rx_ppdu_start *rxd_ppdu_start = ath10k_htt_rx_desc_get_ppdu_start(hw, rxd);
1225 int i;
1226
1227 for (i = 0; i < IEEE80211_MAX_CHAINS ; i++) {
1228 status->chains &= ~BIT(i);
1229
1230 if (rxd_ppdu_start->rssi_chains[i].pri20_mhz != 0x80) {
1231 status->chain_signal[i] = ATH10K_DEFAULT_NOISE_FLOOR +
1232 rxd_ppdu_start->rssi_chains[i].pri20_mhz;
1233
1234 status->chains |= BIT(i);
1235 }
1236 }
1237
1238 /* FIXME: Get real NF */
1239 status->signal = ATH10K_DEFAULT_NOISE_FLOOR +
1240 rxd_ppdu_start->rssi_comb;
1241 status->flag &= ~RX_FLAG_NO_SIGNAL_VAL;
1242 }
1243
ath10k_htt_rx_h_mactime(struct ath10k * ar,struct ieee80211_rx_status * status,struct htt_rx_desc * rxd)1244 static void ath10k_htt_rx_h_mactime(struct ath10k *ar,
1245 struct ieee80211_rx_status *status,
1246 struct htt_rx_desc *rxd)
1247 {
1248 struct ath10k_hw_params *hw = &ar->hw_params;
1249 struct rx_ppdu_end_common *rxd_ppdu_end_common;
1250
1251 rxd_ppdu_end_common = ath10k_htt_rx_desc_get_ppdu_end(hw, rxd);
1252
1253 /* FIXME: TSF is known only at the end of PPDU, in the last MPDU. This
1254 * means all prior MSDUs in a PPDU are reported to mac80211 without the
1255 * TSF. Is it worth holding frames until end of PPDU is known?
1256 *
1257 * FIXME: Can we get/compute 64bit TSF?
1258 */
1259 status->mactime = __le32_to_cpu(rxd_ppdu_end_common->tsf_timestamp);
1260 status->flag |= RX_FLAG_MACTIME_END;
1261 }
1262
ath10k_htt_rx_h_ppdu(struct ath10k * ar,struct sk_buff_head * amsdu,struct ieee80211_rx_status * status,u32 vdev_id)1263 static void ath10k_htt_rx_h_ppdu(struct ath10k *ar,
1264 struct sk_buff_head *amsdu,
1265 struct ieee80211_rx_status *status,
1266 u32 vdev_id)
1267 {
1268 struct sk_buff *first;
1269 struct ath10k_hw_params *hw = &ar->hw_params;
1270 struct htt_rx_desc *rxd;
1271 struct rx_attention *rxd_attention;
1272 bool is_first_ppdu;
1273 bool is_last_ppdu;
1274
1275 if (skb_queue_empty(amsdu))
1276 return;
1277
1278 first = skb_peek(amsdu);
1279 rxd = HTT_RX_BUF_TO_RX_DESC(hw,
1280 (void *)first->data - hw->rx_desc_ops->rx_desc_size);
1281
1282 rxd_attention = ath10k_htt_rx_desc_get_attention(hw, rxd);
1283
1284 is_first_ppdu = !!(rxd_attention->flags &
1285 __cpu_to_le32(RX_ATTENTION_FLAGS_FIRST_MPDU));
1286 is_last_ppdu = !!(rxd_attention->flags &
1287 __cpu_to_le32(RX_ATTENTION_FLAGS_LAST_MPDU));
1288
1289 if (is_first_ppdu) {
1290 /* New PPDU starts so clear out the old per-PPDU status. */
1291 status->freq = 0;
1292 status->rate_idx = 0;
1293 status->nss = 0;
1294 status->encoding = RX_ENC_LEGACY;
1295 status->bw = RATE_INFO_BW_20;
1296
1297 status->flag &= ~RX_FLAG_MACTIME_END;
1298 status->flag |= RX_FLAG_NO_SIGNAL_VAL;
1299
1300 status->flag &= ~(RX_FLAG_AMPDU_IS_LAST);
1301 status->flag |= RX_FLAG_AMPDU_DETAILS | RX_FLAG_AMPDU_LAST_KNOWN;
1302 status->ampdu_reference = ar->ampdu_reference;
1303
1304 ath10k_htt_rx_h_signal(ar, status, rxd);
1305 ath10k_htt_rx_h_channel(ar, status, rxd, vdev_id);
1306 ath10k_htt_rx_h_rates(ar, status, rxd);
1307 }
1308
1309 if (is_last_ppdu) {
1310 ath10k_htt_rx_h_mactime(ar, status, rxd);
1311
1312 /* set ampdu last segment flag */
1313 status->flag |= RX_FLAG_AMPDU_IS_LAST;
1314 ar->ampdu_reference++;
1315 }
1316 }
1317
1318 static const char * const tid_to_ac[] = {
1319 "BE",
1320 "BK",
1321 "BK",
1322 "BE",
1323 "VI",
1324 "VI",
1325 "VO",
1326 "VO",
1327 };
1328
ath10k_get_tid(struct ieee80211_hdr * hdr,char * out,size_t size)1329 static char *ath10k_get_tid(struct ieee80211_hdr *hdr, char *out, size_t size)
1330 {
1331 u8 *qc;
1332 int tid;
1333
1334 if (!ieee80211_is_data_qos(hdr->frame_control))
1335 return "";
1336
1337 qc = ieee80211_get_qos_ctl(hdr);
1338 tid = *qc & IEEE80211_QOS_CTL_TID_MASK;
1339 if (tid < 8)
1340 snprintf(out, size, "tid %d (%s)", tid, tid_to_ac[tid]);
1341 else
1342 snprintf(out, size, "tid %d", tid);
1343
1344 return out;
1345 }
1346
ath10k_htt_rx_h_queue_msdu(struct ath10k * ar,struct ieee80211_rx_status * rx_status,struct sk_buff * skb)1347 static void ath10k_htt_rx_h_queue_msdu(struct ath10k *ar,
1348 struct ieee80211_rx_status *rx_status,
1349 struct sk_buff *skb)
1350 {
1351 struct ieee80211_rx_status *status;
1352
1353 status = IEEE80211_SKB_RXCB(skb);
1354 *status = *rx_status;
1355
1356 skb_queue_tail(&ar->htt.rx_msdus_q, skb);
1357 }
1358
ath10k_process_rx(struct ath10k * ar,struct sk_buff * skb)1359 static void ath10k_process_rx(struct ath10k *ar, struct sk_buff *skb)
1360 {
1361 struct ieee80211_rx_status *status;
1362 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1363 char tid[32];
1364
1365 status = IEEE80211_SKB_RXCB(skb);
1366
1367 if (!(ar->filter_flags & FIF_FCSFAIL) &&
1368 status->flag & RX_FLAG_FAILED_FCS_CRC) {
1369 ar->stats.rx_crc_err_drop++;
1370 dev_kfree_skb_any(skb);
1371 return;
1372 }
1373
1374 ath10k_dbg(ar, ATH10K_DBG_DATA,
1375 "rx skb %pK len %u peer %pM %s %s sn %u %s%s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%x fcs-err %i mic-err %i amsdu-more %i\n",
1376 skb,
1377 skb->len,
1378 ieee80211_get_SA(hdr),
1379 ath10k_get_tid(hdr, tid, sizeof(tid)),
1380 is_multicast_ether_addr(ieee80211_get_DA(hdr)) ?
1381 "mcast" : "ucast",
1382 (__le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4,
1383 (status->encoding == RX_ENC_LEGACY) ? "legacy" : "",
1384 (status->encoding == RX_ENC_HT) ? "ht" : "",
1385 (status->encoding == RX_ENC_VHT) ? "vht" : "",
1386 (status->bw == RATE_INFO_BW_40) ? "40" : "",
1387 (status->bw == RATE_INFO_BW_80) ? "80" : "",
1388 (status->bw == RATE_INFO_BW_160) ? "160" : "",
1389 status->enc_flags & RX_ENC_FLAG_SHORT_GI ? "sgi " : "",
1390 status->rate_idx,
1391 status->nss,
1392 status->freq,
1393 status->band, status->flag,
1394 !!(status->flag & RX_FLAG_FAILED_FCS_CRC),
1395 !!(status->flag & RX_FLAG_MMIC_ERROR),
1396 !!(status->flag & RX_FLAG_AMSDU_MORE));
1397 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "rx skb: ",
1398 skb->data, skb->len);
1399 trace_ath10k_rx_hdr(ar, skb->data, skb->len);
1400 trace_ath10k_rx_payload(ar, skb->data, skb->len);
1401
1402 ieee80211_rx_napi(ar->hw, NULL, skb, &ar->napi);
1403 }
1404
ath10k_htt_rx_nwifi_hdrlen(struct ath10k * ar,struct ieee80211_hdr * hdr)1405 static int ath10k_htt_rx_nwifi_hdrlen(struct ath10k *ar,
1406 struct ieee80211_hdr *hdr)
1407 {
1408 int len = ieee80211_hdrlen(hdr->frame_control);
1409
1410 if (!test_bit(ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING,
1411 ar->running_fw->fw_file.fw_features))
1412 len = round_up(len, 4);
1413
1414 return len;
1415 }
1416
ath10k_htt_rx_h_undecap_raw(struct ath10k * ar,struct sk_buff * msdu,struct ieee80211_rx_status * status,enum htt_rx_mpdu_encrypt_type enctype,bool is_decrypted,const u8 first_hdr[64])1417 static void ath10k_htt_rx_h_undecap_raw(struct ath10k *ar,
1418 struct sk_buff *msdu,
1419 struct ieee80211_rx_status *status,
1420 enum htt_rx_mpdu_encrypt_type enctype,
1421 bool is_decrypted,
1422 const u8 first_hdr[64])
1423 {
1424 struct ieee80211_hdr *hdr;
1425 struct ath10k_hw_params *hw = &ar->hw_params;
1426 struct htt_rx_desc *rxd;
1427 struct rx_msdu_end_common *rxd_msdu_end_common;
1428 size_t hdr_len;
1429 size_t crypto_len;
1430 bool is_first;
1431 bool is_last;
1432 bool msdu_limit_err;
1433 int bytes_aligned = ar->hw_params.decap_align_bytes;
1434 u8 *qos;
1435
1436 rxd = HTT_RX_BUF_TO_RX_DESC(hw,
1437 (void *)msdu->data - hw->rx_desc_ops->rx_desc_size);
1438
1439 rxd_msdu_end_common = ath10k_htt_rx_desc_get_msdu_end(hw, rxd);
1440 is_first = !!(rxd_msdu_end_common->info0 &
1441 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU));
1442 is_last = !!(rxd_msdu_end_common->info0 &
1443 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU));
1444
1445 /* Delivered decapped frame:
1446 * [802.11 header]
1447 * [crypto param] <-- can be trimmed if !fcs_err &&
1448 * !decrypt_err && !peer_idx_invalid
1449 * [amsdu header] <-- only if A-MSDU
1450 * [rfc1042/llc]
1451 * [payload]
1452 * [FCS] <-- at end, needs to be trimmed
1453 */
1454
1455 /* Some hardwares(QCA99x0 variants) limit number of msdus in a-msdu when
1456 * deaggregate, so that unwanted MSDU-deaggregation is avoided for
1457 * error packets. If limit exceeds, hw sends all remaining MSDUs as
1458 * a single last MSDU with this msdu limit error set.
1459 */
1460 msdu_limit_err = ath10k_htt_rx_desc_msdu_limit_error(hw, rxd);
1461
1462 /* If MSDU limit error happens, then don't warn on, the partial raw MSDU
1463 * without first MSDU is expected in that case, and handled later here.
1464 */
1465 /* This probably shouldn't happen but warn just in case */
1466 if (WARN_ON_ONCE(!is_first && !msdu_limit_err))
1467 return;
1468
1469 /* This probably shouldn't happen but warn just in case */
1470 if (WARN_ON_ONCE(!(is_first && is_last) && !msdu_limit_err))
1471 return;
1472
1473 skb_trim(msdu, msdu->len - FCS_LEN);
1474
1475 /* Push original 80211 header */
1476 if (unlikely(msdu_limit_err)) {
1477 hdr = (struct ieee80211_hdr *)first_hdr;
1478 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1479 crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
1480
1481 if (ieee80211_is_data_qos(hdr->frame_control)) {
1482 qos = ieee80211_get_qos_ctl(hdr);
1483 qos[0] |= IEEE80211_QOS_CTL_A_MSDU_PRESENT;
1484 }
1485
1486 if (crypto_len)
1487 memcpy(skb_push(msdu, crypto_len),
1488 (void *)hdr + round_up(hdr_len, bytes_aligned),
1489 crypto_len);
1490
1491 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
1492 }
1493
1494 /* In most cases this will be true for sniffed frames. It makes sense
1495 * to deliver them as-is without stripping the crypto param. This is
1496 * necessary for software based decryption.
1497 *
1498 * If there's no error then the frame is decrypted. At least that is
1499 * the case for frames that come in via fragmented rx indication.
1500 */
1501 if (!is_decrypted)
1502 return;
1503
1504 /* The payload is decrypted so strip crypto params. Start from tail
1505 * since hdr is used to compute some stuff.
1506 */
1507
1508 hdr = (void *)msdu->data;
1509
1510 /* Tail */
1511 if (status->flag & RX_FLAG_IV_STRIPPED) {
1512 skb_trim(msdu, msdu->len -
1513 ath10k_htt_rx_crypto_mic_len(ar, enctype));
1514
1515 skb_trim(msdu, msdu->len -
1516 ath10k_htt_rx_crypto_icv_len(ar, enctype));
1517 } else {
1518 /* MIC */
1519 if (status->flag & RX_FLAG_MIC_STRIPPED)
1520 skb_trim(msdu, msdu->len -
1521 ath10k_htt_rx_crypto_mic_len(ar, enctype));
1522
1523 /* ICV */
1524 if (status->flag & RX_FLAG_ICV_STRIPPED)
1525 skb_trim(msdu, msdu->len -
1526 ath10k_htt_rx_crypto_icv_len(ar, enctype));
1527 }
1528
1529 /* MMIC */
1530 if ((status->flag & RX_FLAG_MMIC_STRIPPED) &&
1531 !ieee80211_has_morefrags(hdr->frame_control) &&
1532 enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA)
1533 skb_trim(msdu, msdu->len - MICHAEL_MIC_LEN);
1534
1535 /* Head */
1536 if (status->flag & RX_FLAG_IV_STRIPPED) {
1537 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1538 crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
1539
1540 memmove((void *)msdu->data + crypto_len,
1541 (void *)msdu->data, hdr_len);
1542 skb_pull(msdu, crypto_len);
1543 }
1544 }
1545
ath10k_htt_rx_h_undecap_nwifi(struct ath10k * ar,struct sk_buff * msdu,struct ieee80211_rx_status * status,const u8 first_hdr[64],enum htt_rx_mpdu_encrypt_type enctype)1546 static void ath10k_htt_rx_h_undecap_nwifi(struct ath10k *ar,
1547 struct sk_buff *msdu,
1548 struct ieee80211_rx_status *status,
1549 const u8 first_hdr[64],
1550 enum htt_rx_mpdu_encrypt_type enctype)
1551 {
1552 struct ath10k_hw_params *hw = &ar->hw_params;
1553 struct ieee80211_hdr *hdr;
1554 struct htt_rx_desc *rxd;
1555 size_t hdr_len;
1556 u8 da[ETH_ALEN];
1557 u8 sa[ETH_ALEN];
1558 int l3_pad_bytes;
1559 int bytes_aligned = ar->hw_params.decap_align_bytes;
1560
1561 /* Delivered decapped frame:
1562 * [nwifi 802.11 header] <-- replaced with 802.11 hdr
1563 * [rfc1042/llc]
1564 *
1565 * Note: The nwifi header doesn't have QoS Control and is
1566 * (always?) a 3addr frame.
1567 *
1568 * Note2: There's no A-MSDU subframe header. Even if it's part
1569 * of an A-MSDU.
1570 */
1571
1572 /* pull decapped header and copy SA & DA */
1573 rxd = HTT_RX_BUF_TO_RX_DESC(hw, (void *)msdu->data -
1574 hw->rx_desc_ops->rx_desc_size);
1575
1576 l3_pad_bytes = ath10k_htt_rx_desc_get_l3_pad_bytes(&ar->hw_params, rxd);
1577 skb_put(msdu, l3_pad_bytes);
1578
1579 hdr = (struct ieee80211_hdr *)(msdu->data + l3_pad_bytes);
1580
1581 hdr_len = ath10k_htt_rx_nwifi_hdrlen(ar, hdr);
1582 ether_addr_copy(da, ieee80211_get_DA(hdr));
1583 ether_addr_copy(sa, ieee80211_get_SA(hdr));
1584 skb_pull(msdu, hdr_len);
1585
1586 /* push original 802.11 header */
1587 hdr = (struct ieee80211_hdr *)first_hdr;
1588 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1589
1590 if (!(status->flag & RX_FLAG_IV_STRIPPED)) {
1591 memcpy(skb_push(msdu,
1592 ath10k_htt_rx_crypto_param_len(ar, enctype)),
1593 (void *)hdr + round_up(hdr_len, bytes_aligned),
1594 ath10k_htt_rx_crypto_param_len(ar, enctype));
1595 }
1596
1597 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
1598
1599 /* original 802.11 header has a different DA and in
1600 * case of 4addr it may also have different SA
1601 */
1602 hdr = (struct ieee80211_hdr *)msdu->data;
1603 ether_addr_copy(ieee80211_get_DA(hdr), da);
1604 ether_addr_copy(ieee80211_get_SA(hdr), sa);
1605 }
1606
ath10k_htt_rx_h_find_rfc1042(struct ath10k * ar,struct sk_buff * msdu,enum htt_rx_mpdu_encrypt_type enctype)1607 static void *ath10k_htt_rx_h_find_rfc1042(struct ath10k *ar,
1608 struct sk_buff *msdu,
1609 enum htt_rx_mpdu_encrypt_type enctype)
1610 {
1611 struct ieee80211_hdr *hdr;
1612 struct ath10k_hw_params *hw = &ar->hw_params;
1613 struct htt_rx_desc *rxd;
1614 struct rx_msdu_end_common *rxd_msdu_end_common;
1615 u8 *rxd_rx_hdr_status;
1616 size_t hdr_len, crypto_len;
1617 void *rfc1042;
1618 bool is_first, is_last, is_amsdu;
1619 int bytes_aligned = ar->hw_params.decap_align_bytes;
1620
1621 rxd = HTT_RX_BUF_TO_RX_DESC(hw,
1622 (void *)msdu->data - hw->rx_desc_ops->rx_desc_size);
1623
1624 rxd_msdu_end_common = ath10k_htt_rx_desc_get_msdu_end(hw, rxd);
1625 rxd_rx_hdr_status = ath10k_htt_rx_desc_get_rx_hdr_status(hw, rxd);
1626 hdr = (void *)rxd_rx_hdr_status;
1627
1628 is_first = !!(rxd_msdu_end_common->info0 &
1629 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU));
1630 is_last = !!(rxd_msdu_end_common->info0 &
1631 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU));
1632 is_amsdu = !(is_first && is_last);
1633
1634 rfc1042 = hdr;
1635
1636 if (is_first) {
1637 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1638 crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
1639
1640 rfc1042 += round_up(hdr_len, bytes_aligned) +
1641 round_up(crypto_len, bytes_aligned);
1642 }
1643
1644 if (is_amsdu)
1645 rfc1042 += sizeof(struct amsdu_subframe_hdr);
1646
1647 return rfc1042;
1648 }
1649
ath10k_htt_rx_h_undecap_eth(struct ath10k * ar,struct sk_buff * msdu,struct ieee80211_rx_status * status,const u8 first_hdr[64],enum htt_rx_mpdu_encrypt_type enctype)1650 static void ath10k_htt_rx_h_undecap_eth(struct ath10k *ar,
1651 struct sk_buff *msdu,
1652 struct ieee80211_rx_status *status,
1653 const u8 first_hdr[64],
1654 enum htt_rx_mpdu_encrypt_type enctype)
1655 {
1656 struct ath10k_hw_params *hw = &ar->hw_params;
1657 struct ieee80211_hdr *hdr;
1658 struct ethhdr *eth;
1659 size_t hdr_len;
1660 void *rfc1042;
1661 u8 da[ETH_ALEN];
1662 u8 sa[ETH_ALEN];
1663 int l3_pad_bytes;
1664 struct htt_rx_desc *rxd;
1665 int bytes_aligned = ar->hw_params.decap_align_bytes;
1666
1667 /* Delivered decapped frame:
1668 * [eth header] <-- replaced with 802.11 hdr & rfc1042/llc
1669 * [payload]
1670 */
1671
1672 rfc1042 = ath10k_htt_rx_h_find_rfc1042(ar, msdu, enctype);
1673 if (WARN_ON_ONCE(!rfc1042))
1674 return;
1675
1676 rxd = HTT_RX_BUF_TO_RX_DESC(hw,
1677 (void *)msdu->data - hw->rx_desc_ops->rx_desc_size);
1678
1679 l3_pad_bytes = ath10k_htt_rx_desc_get_l3_pad_bytes(&ar->hw_params, rxd);
1680 skb_put(msdu, l3_pad_bytes);
1681 skb_pull(msdu, l3_pad_bytes);
1682
1683 /* pull decapped header and copy SA & DA */
1684 eth = (struct ethhdr *)msdu->data;
1685 ether_addr_copy(da, eth->h_dest);
1686 ether_addr_copy(sa, eth->h_source);
1687 skb_pull(msdu, sizeof(struct ethhdr));
1688
1689 /* push rfc1042/llc/snap */
1690 memcpy(skb_push(msdu, sizeof(struct rfc1042_hdr)), rfc1042,
1691 sizeof(struct rfc1042_hdr));
1692
1693 /* push original 802.11 header */
1694 hdr = (struct ieee80211_hdr *)first_hdr;
1695 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1696
1697 if (!(status->flag & RX_FLAG_IV_STRIPPED)) {
1698 memcpy(skb_push(msdu,
1699 ath10k_htt_rx_crypto_param_len(ar, enctype)),
1700 (void *)hdr + round_up(hdr_len, bytes_aligned),
1701 ath10k_htt_rx_crypto_param_len(ar, enctype));
1702 }
1703
1704 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
1705
1706 /* original 802.11 header has a different DA and in
1707 * case of 4addr it may also have different SA
1708 */
1709 hdr = (struct ieee80211_hdr *)msdu->data;
1710 ether_addr_copy(ieee80211_get_DA(hdr), da);
1711 ether_addr_copy(ieee80211_get_SA(hdr), sa);
1712 }
1713
ath10k_htt_rx_h_undecap_snap(struct ath10k * ar,struct sk_buff * msdu,struct ieee80211_rx_status * status,const u8 first_hdr[64],enum htt_rx_mpdu_encrypt_type enctype)1714 static void ath10k_htt_rx_h_undecap_snap(struct ath10k *ar,
1715 struct sk_buff *msdu,
1716 struct ieee80211_rx_status *status,
1717 const u8 first_hdr[64],
1718 enum htt_rx_mpdu_encrypt_type enctype)
1719 {
1720 struct ath10k_hw_params *hw = &ar->hw_params;
1721 struct ieee80211_hdr *hdr;
1722 size_t hdr_len;
1723 int l3_pad_bytes;
1724 struct htt_rx_desc *rxd;
1725 int bytes_aligned = ar->hw_params.decap_align_bytes;
1726
1727 /* Delivered decapped frame:
1728 * [amsdu header] <-- replaced with 802.11 hdr
1729 * [rfc1042/llc]
1730 * [payload]
1731 */
1732
1733 rxd = HTT_RX_BUF_TO_RX_DESC(hw,
1734 (void *)msdu->data - hw->rx_desc_ops->rx_desc_size);
1735
1736 l3_pad_bytes = ath10k_htt_rx_desc_get_l3_pad_bytes(&ar->hw_params, rxd);
1737
1738 skb_put(msdu, l3_pad_bytes);
1739 skb_pull(msdu, sizeof(struct amsdu_subframe_hdr) + l3_pad_bytes);
1740
1741 hdr = (struct ieee80211_hdr *)first_hdr;
1742 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1743
1744 if (!(status->flag & RX_FLAG_IV_STRIPPED)) {
1745 memcpy(skb_push(msdu,
1746 ath10k_htt_rx_crypto_param_len(ar, enctype)),
1747 (void *)hdr + round_up(hdr_len, bytes_aligned),
1748 ath10k_htt_rx_crypto_param_len(ar, enctype));
1749 }
1750
1751 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
1752 }
1753
ath10k_htt_rx_h_undecap(struct ath10k * ar,struct sk_buff * msdu,struct ieee80211_rx_status * status,u8 first_hdr[64],enum htt_rx_mpdu_encrypt_type enctype,bool is_decrypted)1754 static void ath10k_htt_rx_h_undecap(struct ath10k *ar,
1755 struct sk_buff *msdu,
1756 struct ieee80211_rx_status *status,
1757 u8 first_hdr[64],
1758 enum htt_rx_mpdu_encrypt_type enctype,
1759 bool is_decrypted)
1760 {
1761 struct ath10k_hw_params *hw = &ar->hw_params;
1762 struct htt_rx_desc *rxd;
1763 struct rx_msdu_start_common *rxd_msdu_start_common;
1764 enum rx_msdu_decap_format decap;
1765
1766 /* First msdu's decapped header:
1767 * [802.11 header] <-- padded to 4 bytes long
1768 * [crypto param] <-- padded to 4 bytes long
1769 * [amsdu header] <-- only if A-MSDU
1770 * [rfc1042/llc]
1771 *
1772 * Other (2nd, 3rd, ..) msdu's decapped header:
1773 * [amsdu header] <-- only if A-MSDU
1774 * [rfc1042/llc]
1775 */
1776
1777 rxd = HTT_RX_BUF_TO_RX_DESC(hw,
1778 (void *)msdu->data - hw->rx_desc_ops->rx_desc_size);
1779
1780 rxd_msdu_start_common = ath10k_htt_rx_desc_get_msdu_start(hw, rxd);
1781 decap = MS(__le32_to_cpu(rxd_msdu_start_common->info1),
1782 RX_MSDU_START_INFO1_DECAP_FORMAT);
1783
1784 switch (decap) {
1785 case RX_MSDU_DECAP_RAW:
1786 ath10k_htt_rx_h_undecap_raw(ar, msdu, status, enctype,
1787 is_decrypted, first_hdr);
1788 break;
1789 case RX_MSDU_DECAP_NATIVE_WIFI:
1790 ath10k_htt_rx_h_undecap_nwifi(ar, msdu, status, first_hdr,
1791 enctype);
1792 break;
1793 case RX_MSDU_DECAP_ETHERNET2_DIX:
1794 ath10k_htt_rx_h_undecap_eth(ar, msdu, status, first_hdr, enctype);
1795 break;
1796 case RX_MSDU_DECAP_8023_SNAP_LLC:
1797 ath10k_htt_rx_h_undecap_snap(ar, msdu, status, first_hdr,
1798 enctype);
1799 break;
1800 }
1801 }
1802
ath10k_htt_rx_get_csum_state(struct ath10k_hw_params * hw,struct sk_buff * skb)1803 static int ath10k_htt_rx_get_csum_state(struct ath10k_hw_params *hw, struct sk_buff *skb)
1804 {
1805 struct htt_rx_desc *rxd;
1806 struct rx_attention *rxd_attention;
1807 struct rx_msdu_start_common *rxd_msdu_start_common;
1808 u32 flags, info;
1809 bool is_ip4, is_ip6;
1810 bool is_tcp, is_udp;
1811 bool ip_csum_ok, tcpudp_csum_ok;
1812
1813 rxd = HTT_RX_BUF_TO_RX_DESC(hw,
1814 (void *)skb->data - hw->rx_desc_ops->rx_desc_size);
1815
1816 rxd_attention = ath10k_htt_rx_desc_get_attention(hw, rxd);
1817 rxd_msdu_start_common = ath10k_htt_rx_desc_get_msdu_start(hw, rxd);
1818 flags = __le32_to_cpu(rxd_attention->flags);
1819 info = __le32_to_cpu(rxd_msdu_start_common->info1);
1820
1821 is_ip4 = !!(info & RX_MSDU_START_INFO1_IPV4_PROTO);
1822 is_ip6 = !!(info & RX_MSDU_START_INFO1_IPV6_PROTO);
1823 is_tcp = !!(info & RX_MSDU_START_INFO1_TCP_PROTO);
1824 is_udp = !!(info & RX_MSDU_START_INFO1_UDP_PROTO);
1825 ip_csum_ok = !(flags & RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL);
1826 tcpudp_csum_ok = !(flags & RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL);
1827
1828 if (!is_ip4 && !is_ip6)
1829 return CHECKSUM_NONE;
1830 if (!is_tcp && !is_udp)
1831 return CHECKSUM_NONE;
1832 if (!ip_csum_ok)
1833 return CHECKSUM_NONE;
1834 if (!tcpudp_csum_ok)
1835 return CHECKSUM_NONE;
1836
1837 return CHECKSUM_UNNECESSARY;
1838 }
1839
ath10k_htt_rx_h_csum_offload(struct ath10k_hw_params * hw,struct sk_buff * msdu)1840 static void ath10k_htt_rx_h_csum_offload(struct ath10k_hw_params *hw,
1841 struct sk_buff *msdu)
1842 {
1843 msdu->ip_summed = ath10k_htt_rx_get_csum_state(hw, msdu);
1844 }
1845
ath10k_htt_rx_h_get_pn(struct ath10k * ar,struct sk_buff * skb,u16 offset,enum htt_rx_mpdu_encrypt_type enctype)1846 static u64 ath10k_htt_rx_h_get_pn(struct ath10k *ar, struct sk_buff *skb,
1847 u16 offset,
1848 enum htt_rx_mpdu_encrypt_type enctype)
1849 {
1850 struct ieee80211_hdr *hdr;
1851 u64 pn = 0;
1852 u8 *ehdr;
1853
1854 hdr = (struct ieee80211_hdr *)(skb->data + offset);
1855 ehdr = skb->data + offset + ieee80211_hdrlen(hdr->frame_control);
1856
1857 if (enctype == HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2) {
1858 pn = ehdr[0];
1859 pn |= (u64)ehdr[1] << 8;
1860 pn |= (u64)ehdr[4] << 16;
1861 pn |= (u64)ehdr[5] << 24;
1862 pn |= (u64)ehdr[6] << 32;
1863 pn |= (u64)ehdr[7] << 40;
1864 }
1865 return pn;
1866 }
1867
ath10k_htt_rx_h_frag_multicast_check(struct ath10k * ar,struct sk_buff * skb,u16 offset)1868 static bool ath10k_htt_rx_h_frag_multicast_check(struct ath10k *ar,
1869 struct sk_buff *skb,
1870 u16 offset)
1871 {
1872 struct ieee80211_hdr *hdr;
1873
1874 hdr = (struct ieee80211_hdr *)(skb->data + offset);
1875 return !is_multicast_ether_addr(hdr->addr1);
1876 }
1877
ath10k_htt_rx_h_frag_pn_check(struct ath10k * ar,struct sk_buff * skb,u16 peer_id,u16 offset,enum htt_rx_mpdu_encrypt_type enctype)1878 static bool ath10k_htt_rx_h_frag_pn_check(struct ath10k *ar,
1879 struct sk_buff *skb,
1880 u16 peer_id,
1881 u16 offset,
1882 enum htt_rx_mpdu_encrypt_type enctype)
1883 {
1884 struct ath10k_peer *peer;
1885 union htt_rx_pn_t *last_pn, new_pn = {0};
1886 struct ieee80211_hdr *hdr;
1887 u8 tid, frag_number;
1888 u32 seq;
1889
1890 peer = ath10k_peer_find_by_id(ar, peer_id);
1891 if (!peer) {
1892 ath10k_dbg(ar, ATH10K_DBG_HTT, "invalid peer for frag pn check\n");
1893 return false;
1894 }
1895
1896 hdr = (struct ieee80211_hdr *)(skb->data + offset);
1897 if (ieee80211_is_data_qos(hdr->frame_control))
1898 tid = ieee80211_get_tid(hdr);
1899 else
1900 tid = ATH10K_TXRX_NON_QOS_TID;
1901
1902 last_pn = &peer->frag_tids_last_pn[tid];
1903 new_pn.pn48 = ath10k_htt_rx_h_get_pn(ar, skb, offset, enctype);
1904 frag_number = le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_FRAG;
1905 seq = (__le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
1906
1907 if (frag_number == 0) {
1908 last_pn->pn48 = new_pn.pn48;
1909 peer->frag_tids_seq[tid] = seq;
1910 } else {
1911 if (seq != peer->frag_tids_seq[tid])
1912 return false;
1913
1914 if (new_pn.pn48 != last_pn->pn48 + 1)
1915 return false;
1916
1917 last_pn->pn48 = new_pn.pn48;
1918 }
1919
1920 return true;
1921 }
1922
ath10k_htt_rx_h_mpdu(struct ath10k * ar,struct sk_buff_head * amsdu,struct ieee80211_rx_status * status,bool fill_crypt_header,u8 * rx_hdr,enum ath10k_pkt_rx_err * err,u16 peer_id,bool frag)1923 static void ath10k_htt_rx_h_mpdu(struct ath10k *ar,
1924 struct sk_buff_head *amsdu,
1925 struct ieee80211_rx_status *status,
1926 bool fill_crypt_header,
1927 u8 *rx_hdr,
1928 enum ath10k_pkt_rx_err *err,
1929 u16 peer_id,
1930 bool frag)
1931 {
1932 struct sk_buff *first;
1933 struct sk_buff *last;
1934 struct sk_buff *msdu, *temp;
1935 struct ath10k_hw_params *hw = &ar->hw_params;
1936 struct htt_rx_desc *rxd;
1937 struct rx_attention *rxd_attention;
1938 struct rx_mpdu_start *rxd_mpdu_start;
1939
1940 struct ieee80211_hdr *hdr;
1941 enum htt_rx_mpdu_encrypt_type enctype;
1942 u8 first_hdr[64];
1943 u8 *qos;
1944 bool has_fcs_err;
1945 bool has_crypto_err;
1946 bool has_tkip_err;
1947 bool has_peer_idx_invalid;
1948 bool is_decrypted;
1949 bool is_mgmt;
1950 u32 attention;
1951 bool frag_pn_check = true, multicast_check = true;
1952
1953 if (skb_queue_empty(amsdu))
1954 return;
1955
1956 first = skb_peek(amsdu);
1957 rxd = HTT_RX_BUF_TO_RX_DESC(hw,
1958 (void *)first->data - hw->rx_desc_ops->rx_desc_size);
1959
1960 rxd_attention = ath10k_htt_rx_desc_get_attention(hw, rxd);
1961 rxd_mpdu_start = ath10k_htt_rx_desc_get_mpdu_start(hw, rxd);
1962
1963 is_mgmt = !!(rxd_attention->flags &
1964 __cpu_to_le32(RX_ATTENTION_FLAGS_MGMT_TYPE));
1965
1966 enctype = MS(__le32_to_cpu(rxd_mpdu_start->info0),
1967 RX_MPDU_START_INFO0_ENCRYPT_TYPE);
1968
1969 /* First MSDU's Rx descriptor in an A-MSDU contains full 802.11
1970 * decapped header. It'll be used for undecapping of each MSDU.
1971 */
1972 hdr = (void *)ath10k_htt_rx_desc_get_rx_hdr_status(hw, rxd);
1973 memcpy(first_hdr, hdr, RX_HTT_HDR_STATUS_LEN);
1974
1975 if (rx_hdr)
1976 memcpy(rx_hdr, hdr, RX_HTT_HDR_STATUS_LEN);
1977
1978 /* Each A-MSDU subframe will use the original header as the base and be
1979 * reported as a separate MSDU so strip the A-MSDU bit from QoS Ctl.
1980 */
1981 hdr = (void *)first_hdr;
1982
1983 if (ieee80211_is_data_qos(hdr->frame_control)) {
1984 qos = ieee80211_get_qos_ctl(hdr);
1985 qos[0] &= ~IEEE80211_QOS_CTL_A_MSDU_PRESENT;
1986 }
1987
1988 /* Some attention flags are valid only in the last MSDU. */
1989 last = skb_peek_tail(amsdu);
1990 rxd = HTT_RX_BUF_TO_RX_DESC(hw,
1991 (void *)last->data - hw->rx_desc_ops->rx_desc_size);
1992
1993 rxd_attention = ath10k_htt_rx_desc_get_attention(hw, rxd);
1994 attention = __le32_to_cpu(rxd_attention->flags);
1995
1996 has_fcs_err = !!(attention & RX_ATTENTION_FLAGS_FCS_ERR);
1997 has_crypto_err = !!(attention & RX_ATTENTION_FLAGS_DECRYPT_ERR);
1998 has_tkip_err = !!(attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR);
1999 has_peer_idx_invalid = !!(attention & RX_ATTENTION_FLAGS_PEER_IDX_INVALID);
2000
2001 /* Note: If hardware captures an encrypted frame that it can't decrypt,
2002 * e.g. due to fcs error, missing peer or invalid key data it will
2003 * report the frame as raw.
2004 */
2005 is_decrypted = (enctype != HTT_RX_MPDU_ENCRYPT_NONE &&
2006 !has_fcs_err &&
2007 !has_crypto_err &&
2008 !has_peer_idx_invalid);
2009
2010 /* Clear per-MPDU flags while leaving per-PPDU flags intact. */
2011 status->flag &= ~(RX_FLAG_FAILED_FCS_CRC |
2012 RX_FLAG_MMIC_ERROR |
2013 RX_FLAG_DECRYPTED |
2014 RX_FLAG_IV_STRIPPED |
2015 RX_FLAG_ONLY_MONITOR |
2016 RX_FLAG_MMIC_STRIPPED);
2017
2018 if (has_fcs_err)
2019 status->flag |= RX_FLAG_FAILED_FCS_CRC;
2020
2021 if (has_tkip_err)
2022 status->flag |= RX_FLAG_MMIC_ERROR;
2023
2024 if (err) {
2025 if (has_fcs_err)
2026 *err = ATH10K_PKT_RX_ERR_FCS;
2027 else if (has_tkip_err)
2028 *err = ATH10K_PKT_RX_ERR_TKIP;
2029 else if (has_crypto_err)
2030 *err = ATH10K_PKT_RX_ERR_CRYPT;
2031 else if (has_peer_idx_invalid)
2032 *err = ATH10K_PKT_RX_ERR_PEER_IDX_INVAL;
2033 }
2034
2035 /* Firmware reports all necessary management frames via WMI already.
2036 * They are not reported to monitor interfaces at all so pass the ones
2037 * coming via HTT to monitor interfaces instead. This simplifies
2038 * matters a lot.
2039 */
2040 if (is_mgmt)
2041 status->flag |= RX_FLAG_ONLY_MONITOR;
2042
2043 if (is_decrypted) {
2044 status->flag |= RX_FLAG_DECRYPTED;
2045
2046 if (likely(!is_mgmt))
2047 status->flag |= RX_FLAG_MMIC_STRIPPED;
2048
2049 if (fill_crypt_header)
2050 status->flag |= RX_FLAG_MIC_STRIPPED |
2051 RX_FLAG_ICV_STRIPPED;
2052 else
2053 status->flag |= RX_FLAG_IV_STRIPPED;
2054 }
2055
2056 skb_queue_walk(amsdu, msdu) {
2057 if (frag && !fill_crypt_header && is_decrypted &&
2058 enctype == HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2)
2059 frag_pn_check = ath10k_htt_rx_h_frag_pn_check(ar,
2060 msdu,
2061 peer_id,
2062 0,
2063 enctype);
2064
2065 if (frag)
2066 multicast_check = ath10k_htt_rx_h_frag_multicast_check(ar,
2067 msdu,
2068 0);
2069
2070 if (!frag_pn_check || !multicast_check) {
2071 /* Discard the fragment with invalid PN or multicast DA
2072 */
2073 temp = msdu->prev;
2074 __skb_unlink(msdu, amsdu);
2075 dev_kfree_skb_any(msdu);
2076 msdu = temp;
2077 frag_pn_check = true;
2078 multicast_check = true;
2079 continue;
2080 }
2081
2082 ath10k_htt_rx_h_csum_offload(&ar->hw_params, msdu);
2083
2084 if (frag && !fill_crypt_header &&
2085 enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA)
2086 status->flag &= ~RX_FLAG_MMIC_STRIPPED;
2087
2088 ath10k_htt_rx_h_undecap(ar, msdu, status, first_hdr, enctype,
2089 is_decrypted);
2090
2091 /* Undecapping involves copying the original 802.11 header back
2092 * to sk_buff. If frame is protected and hardware has decrypted
2093 * it then remove the protected bit.
2094 */
2095 if (!is_decrypted)
2096 continue;
2097 if (is_mgmt)
2098 continue;
2099
2100 if (fill_crypt_header)
2101 continue;
2102
2103 hdr = (void *)msdu->data;
2104 hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED);
2105
2106 if (frag && !fill_crypt_header &&
2107 enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA)
2108 status->flag &= ~RX_FLAG_IV_STRIPPED &
2109 ~RX_FLAG_MMIC_STRIPPED;
2110 }
2111 }
2112
ath10k_htt_rx_h_enqueue(struct ath10k * ar,struct sk_buff_head * amsdu,struct ieee80211_rx_status * status)2113 static void ath10k_htt_rx_h_enqueue(struct ath10k *ar,
2114 struct sk_buff_head *amsdu,
2115 struct ieee80211_rx_status *status)
2116 {
2117 struct sk_buff *msdu;
2118 struct sk_buff *first_subframe;
2119
2120 first_subframe = skb_peek(amsdu);
2121
2122 while ((msdu = __skb_dequeue(amsdu))) {
2123 /* Setup per-MSDU flags */
2124 if (skb_queue_empty(amsdu))
2125 status->flag &= ~RX_FLAG_AMSDU_MORE;
2126 else
2127 status->flag |= RX_FLAG_AMSDU_MORE;
2128
2129 if (msdu == first_subframe) {
2130 first_subframe = NULL;
2131 status->flag &= ~RX_FLAG_ALLOW_SAME_PN;
2132 } else {
2133 status->flag |= RX_FLAG_ALLOW_SAME_PN;
2134 }
2135
2136 ath10k_htt_rx_h_queue_msdu(ar, status, msdu);
2137 }
2138 }
2139
ath10k_unchain_msdu(struct sk_buff_head * amsdu,unsigned long * unchain_cnt)2140 static int ath10k_unchain_msdu(struct sk_buff_head *amsdu,
2141 unsigned long *unchain_cnt)
2142 {
2143 struct sk_buff *skb, *first;
2144 int space;
2145 int total_len = 0;
2146 int amsdu_len = skb_queue_len(amsdu);
2147
2148 /* TODO: Might could optimize this by using
2149 * skb_try_coalesce or similar method to
2150 * decrease copying, or maybe get mac80211 to
2151 * provide a way to just receive a list of
2152 * skb?
2153 */
2154
2155 first = __skb_dequeue(amsdu);
2156
2157 /* Allocate total length all at once. */
2158 skb_queue_walk(amsdu, skb)
2159 total_len += skb->len;
2160
2161 space = total_len - skb_tailroom(first);
2162 if ((space > 0) &&
2163 (pskb_expand_head(first, 0, space, GFP_ATOMIC) < 0)) {
2164 /* TODO: bump some rx-oom error stat */
2165 /* put it back together so we can free the
2166 * whole list at once.
2167 */
2168 __skb_queue_head(amsdu, first);
2169 return -1;
2170 }
2171
2172 /* Walk list again, copying contents into
2173 * msdu_head
2174 */
2175 while ((skb = __skb_dequeue(amsdu))) {
2176 skb_copy_from_linear_data(skb, skb_put(first, skb->len),
2177 skb->len);
2178 dev_kfree_skb_any(skb);
2179 }
2180
2181 __skb_queue_head(amsdu, first);
2182
2183 *unchain_cnt += amsdu_len - 1;
2184
2185 return 0;
2186 }
2187
ath10k_htt_rx_h_unchain(struct ath10k * ar,struct sk_buff_head * amsdu,unsigned long * drop_cnt,unsigned long * unchain_cnt)2188 static void ath10k_htt_rx_h_unchain(struct ath10k *ar,
2189 struct sk_buff_head *amsdu,
2190 unsigned long *drop_cnt,
2191 unsigned long *unchain_cnt)
2192 {
2193 struct sk_buff *first;
2194 struct ath10k_hw_params *hw = &ar->hw_params;
2195 struct htt_rx_desc *rxd;
2196 struct rx_msdu_start_common *rxd_msdu_start_common;
2197 struct rx_frag_info_common *rxd_frag_info;
2198 enum rx_msdu_decap_format decap;
2199
2200 first = skb_peek(amsdu);
2201 rxd = HTT_RX_BUF_TO_RX_DESC(hw,
2202 (void *)first->data - hw->rx_desc_ops->rx_desc_size);
2203
2204 rxd_msdu_start_common = ath10k_htt_rx_desc_get_msdu_start(hw, rxd);
2205 rxd_frag_info = ath10k_htt_rx_desc_get_frag_info(hw, rxd);
2206 decap = MS(__le32_to_cpu(rxd_msdu_start_common->info1),
2207 RX_MSDU_START_INFO1_DECAP_FORMAT);
2208
2209 /* FIXME: Current unchaining logic can only handle simple case of raw
2210 * msdu chaining. If decapping is other than raw the chaining may be
2211 * more complex and this isn't handled by the current code. Don't even
2212 * try re-constructing such frames - it'll be pretty much garbage.
2213 */
2214 if (decap != RX_MSDU_DECAP_RAW ||
2215 skb_queue_len(amsdu) != 1 + rxd_frag_info->ring2_more_count) {
2216 *drop_cnt += skb_queue_len(amsdu);
2217 __skb_queue_purge(amsdu);
2218 return;
2219 }
2220
2221 ath10k_unchain_msdu(amsdu, unchain_cnt);
2222 }
2223
ath10k_htt_rx_validate_amsdu(struct ath10k * ar,struct sk_buff_head * amsdu)2224 static bool ath10k_htt_rx_validate_amsdu(struct ath10k *ar,
2225 struct sk_buff_head *amsdu)
2226 {
2227 u8 *subframe_hdr;
2228 struct sk_buff *first;
2229 bool is_first, is_last;
2230 struct ath10k_hw_params *hw = &ar->hw_params;
2231 struct htt_rx_desc *rxd;
2232 struct rx_msdu_end_common *rxd_msdu_end_common;
2233 struct rx_mpdu_start *rxd_mpdu_start;
2234 struct ieee80211_hdr *hdr;
2235 size_t hdr_len, crypto_len;
2236 enum htt_rx_mpdu_encrypt_type enctype;
2237 int bytes_aligned = ar->hw_params.decap_align_bytes;
2238
2239 first = skb_peek(amsdu);
2240
2241 rxd = HTT_RX_BUF_TO_RX_DESC(hw,
2242 (void *)first->data - hw->rx_desc_ops->rx_desc_size);
2243
2244 rxd_msdu_end_common = ath10k_htt_rx_desc_get_msdu_end(hw, rxd);
2245 rxd_mpdu_start = ath10k_htt_rx_desc_get_mpdu_start(hw, rxd);
2246 hdr = (void *)ath10k_htt_rx_desc_get_rx_hdr_status(hw, rxd);
2247
2248 is_first = !!(rxd_msdu_end_common->info0 &
2249 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU));
2250 is_last = !!(rxd_msdu_end_common->info0 &
2251 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU));
2252
2253 /* Return in case of non-aggregated msdu */
2254 if (is_first && is_last)
2255 return true;
2256
2257 /* First msdu flag is not set for the first msdu of the list */
2258 if (!is_first)
2259 return false;
2260
2261 enctype = MS(__le32_to_cpu(rxd_mpdu_start->info0),
2262 RX_MPDU_START_INFO0_ENCRYPT_TYPE);
2263
2264 hdr_len = ieee80211_hdrlen(hdr->frame_control);
2265 crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
2266
2267 subframe_hdr = (u8 *)hdr + round_up(hdr_len, bytes_aligned) +
2268 crypto_len;
2269
2270 /* Validate if the amsdu has a proper first subframe.
2271 * There are chances a single msdu can be received as amsdu when
2272 * the unauthenticated amsdu flag of a QoS header
2273 * gets flipped in non-SPP AMSDU's, in such cases the first
2274 * subframe has llc/snap header in place of a valid da.
2275 * return false if the da matches rfc1042 pattern
2276 */
2277 if (ether_addr_equal(subframe_hdr, rfc1042_header))
2278 return false;
2279
2280 return true;
2281 }
2282
ath10k_htt_rx_amsdu_allowed(struct ath10k * ar,struct sk_buff_head * amsdu,struct ieee80211_rx_status * rx_status)2283 static bool ath10k_htt_rx_amsdu_allowed(struct ath10k *ar,
2284 struct sk_buff_head *amsdu,
2285 struct ieee80211_rx_status *rx_status)
2286 {
2287 if (!rx_status->freq) {
2288 ath10k_dbg(ar, ATH10K_DBG_HTT, "no channel configured; ignoring frame(s)!\n");
2289 return false;
2290 }
2291
2292 if (test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) {
2293 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx cac running\n");
2294 return false;
2295 }
2296
2297 if (!ath10k_htt_rx_validate_amsdu(ar, amsdu)) {
2298 ath10k_dbg(ar, ATH10K_DBG_HTT, "invalid amsdu received\n");
2299 return false;
2300 }
2301
2302 return true;
2303 }
2304
ath10k_htt_rx_h_filter(struct ath10k * ar,struct sk_buff_head * amsdu,struct ieee80211_rx_status * rx_status,unsigned long * drop_cnt)2305 static void ath10k_htt_rx_h_filter(struct ath10k *ar,
2306 struct sk_buff_head *amsdu,
2307 struct ieee80211_rx_status *rx_status,
2308 unsigned long *drop_cnt)
2309 {
2310 if (skb_queue_empty(amsdu))
2311 return;
2312
2313 if (ath10k_htt_rx_amsdu_allowed(ar, amsdu, rx_status))
2314 return;
2315
2316 if (drop_cnt)
2317 *drop_cnt += skb_queue_len(amsdu);
2318
2319 __skb_queue_purge(amsdu);
2320 }
2321
ath10k_htt_rx_handle_amsdu(struct ath10k_htt * htt)2322 static int ath10k_htt_rx_handle_amsdu(struct ath10k_htt *htt)
2323 {
2324 struct ath10k *ar = htt->ar;
2325 struct ieee80211_rx_status *rx_status = &htt->rx_status;
2326 struct sk_buff_head amsdu;
2327 int ret;
2328 unsigned long drop_cnt = 0;
2329 unsigned long unchain_cnt = 0;
2330 unsigned long drop_cnt_filter = 0;
2331 unsigned long msdus_to_queue, num_msdus;
2332 enum ath10k_pkt_rx_err err = ATH10K_PKT_RX_ERR_MAX;
2333 u8 first_hdr[RX_HTT_HDR_STATUS_LEN];
2334
2335 __skb_queue_head_init(&amsdu);
2336
2337 spin_lock_bh(&htt->rx_ring.lock);
2338 if (htt->rx_confused) {
2339 spin_unlock_bh(&htt->rx_ring.lock);
2340 return -EIO;
2341 }
2342 ret = ath10k_htt_rx_amsdu_pop(htt, &amsdu);
2343 spin_unlock_bh(&htt->rx_ring.lock);
2344
2345 if (ret < 0) {
2346 ath10k_warn(ar, "rx ring became corrupted: %d\n", ret);
2347 __skb_queue_purge(&amsdu);
2348 /* FIXME: It's probably a good idea to reboot the
2349 * device instead of leaving it inoperable.
2350 */
2351 htt->rx_confused = true;
2352 return ret;
2353 }
2354
2355 num_msdus = skb_queue_len(&amsdu);
2356
2357 ath10k_htt_rx_h_ppdu(ar, &amsdu, rx_status, 0xffff);
2358
2359 /* only for ret = 1 indicates chained msdus */
2360 if (ret > 0)
2361 ath10k_htt_rx_h_unchain(ar, &amsdu, &drop_cnt, &unchain_cnt);
2362
2363 ath10k_htt_rx_h_filter(ar, &amsdu, rx_status, &drop_cnt_filter);
2364 ath10k_htt_rx_h_mpdu(ar, &amsdu, rx_status, true, first_hdr, &err, 0,
2365 false);
2366 msdus_to_queue = skb_queue_len(&amsdu);
2367 ath10k_htt_rx_h_enqueue(ar, &amsdu, rx_status);
2368
2369 ath10k_sta_update_rx_tid_stats(ar, first_hdr, num_msdus, err,
2370 unchain_cnt, drop_cnt, drop_cnt_filter,
2371 msdus_to_queue);
2372
2373 return 0;
2374 }
2375
ath10k_htt_rx_mpdu_desc_pn_hl(struct htt_hl_rx_desc * rx_desc,union htt_rx_pn_t * pn,int pn_len_bits)2376 static void ath10k_htt_rx_mpdu_desc_pn_hl(struct htt_hl_rx_desc *rx_desc,
2377 union htt_rx_pn_t *pn,
2378 int pn_len_bits)
2379 {
2380 switch (pn_len_bits) {
2381 case 48:
2382 pn->pn48 = __le32_to_cpu(rx_desc->pn_31_0) +
2383 ((u64)(__le32_to_cpu(rx_desc->u0.pn_63_32) & 0xFFFF) << 32);
2384 break;
2385 case 24:
2386 pn->pn24 = __le32_to_cpu(rx_desc->pn_31_0);
2387 break;
2388 }
2389 }
2390
ath10k_htt_rx_pn_cmp48(union htt_rx_pn_t * new_pn,union htt_rx_pn_t * old_pn)2391 static bool ath10k_htt_rx_pn_cmp48(union htt_rx_pn_t *new_pn,
2392 union htt_rx_pn_t *old_pn)
2393 {
2394 return ((new_pn->pn48 & 0xffffffffffffULL) <=
2395 (old_pn->pn48 & 0xffffffffffffULL));
2396 }
2397
ath10k_htt_rx_pn_check_replay_hl(struct ath10k * ar,struct ath10k_peer * peer,struct htt_rx_indication_hl * rx)2398 static bool ath10k_htt_rx_pn_check_replay_hl(struct ath10k *ar,
2399 struct ath10k_peer *peer,
2400 struct htt_rx_indication_hl *rx)
2401 {
2402 bool last_pn_valid, pn_invalid = false;
2403 enum htt_txrx_sec_cast_type sec_index;
2404 enum htt_security_types sec_type;
2405 union htt_rx_pn_t new_pn = {0};
2406 struct htt_hl_rx_desc *rx_desc;
2407 union htt_rx_pn_t *last_pn;
2408 u32 rx_desc_info, tid;
2409 int num_mpdu_ranges;
2410
2411 lockdep_assert_held(&ar->data_lock);
2412
2413 if (!peer)
2414 return false;
2415
2416 if (!(rx->fw_desc.flags & FW_RX_DESC_FLAGS_FIRST_MSDU))
2417 return false;
2418
2419 num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1),
2420 HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES);
2421
2422 rx_desc = (struct htt_hl_rx_desc *)&rx->mpdu_ranges[num_mpdu_ranges];
2423 rx_desc_info = __le32_to_cpu(rx_desc->info);
2424
2425 if (!MS(rx_desc_info, HTT_RX_DESC_HL_INFO_ENCRYPTED))
2426 return false;
2427
2428 tid = MS(rx->hdr.info0, HTT_RX_INDICATION_INFO0_EXT_TID);
2429 last_pn_valid = peer->tids_last_pn_valid[tid];
2430 last_pn = &peer->tids_last_pn[tid];
2431
2432 if (MS(rx_desc_info, HTT_RX_DESC_HL_INFO_MCAST_BCAST))
2433 sec_index = HTT_TXRX_SEC_MCAST;
2434 else
2435 sec_index = HTT_TXRX_SEC_UCAST;
2436
2437 sec_type = peer->rx_pn[sec_index].sec_type;
2438 ath10k_htt_rx_mpdu_desc_pn_hl(rx_desc, &new_pn, peer->rx_pn[sec_index].pn_len);
2439
2440 if (sec_type != HTT_SECURITY_AES_CCMP &&
2441 sec_type != HTT_SECURITY_TKIP &&
2442 sec_type != HTT_SECURITY_TKIP_NOMIC)
2443 return false;
2444
2445 if (last_pn_valid)
2446 pn_invalid = ath10k_htt_rx_pn_cmp48(&new_pn, last_pn);
2447 else
2448 peer->tids_last_pn_valid[tid] = true;
2449
2450 if (!pn_invalid)
2451 last_pn->pn48 = new_pn.pn48;
2452
2453 return pn_invalid;
2454 }
2455
ath10k_htt_rx_proc_rx_ind_hl(struct ath10k_htt * htt,struct htt_rx_indication_hl * rx,struct sk_buff * skb,enum htt_rx_pn_check_type check_pn_type,enum htt_rx_tkip_demic_type tkip_mic_type)2456 static bool ath10k_htt_rx_proc_rx_ind_hl(struct ath10k_htt *htt,
2457 struct htt_rx_indication_hl *rx,
2458 struct sk_buff *skb,
2459 enum htt_rx_pn_check_type check_pn_type,
2460 enum htt_rx_tkip_demic_type tkip_mic_type)
2461 {
2462 struct ath10k *ar = htt->ar;
2463 struct ath10k_peer *peer;
2464 struct htt_rx_indication_mpdu_range *mpdu_ranges;
2465 struct fw_rx_desc_hl *fw_desc;
2466 enum htt_txrx_sec_cast_type sec_index;
2467 enum htt_security_types sec_type;
2468 union htt_rx_pn_t new_pn = {0};
2469 struct htt_hl_rx_desc *rx_desc;
2470 struct ieee80211_hdr *hdr;
2471 struct ieee80211_rx_status *rx_status;
2472 u16 peer_id;
2473 u8 rx_desc_len;
2474 int num_mpdu_ranges;
2475 size_t tot_hdr_len;
2476 struct ieee80211_channel *ch;
2477 bool pn_invalid, qos, first_msdu;
2478 u32 tid, rx_desc_info;
2479
2480 peer_id = __le16_to_cpu(rx->hdr.peer_id);
2481 tid = MS(rx->hdr.info0, HTT_RX_INDICATION_INFO0_EXT_TID);
2482
2483 spin_lock_bh(&ar->data_lock);
2484 peer = ath10k_peer_find_by_id(ar, peer_id);
2485 spin_unlock_bh(&ar->data_lock);
2486 if (!peer && peer_id != HTT_INVALID_PEERID)
2487 ath10k_warn(ar, "Got RX ind from invalid peer: %u\n", peer_id);
2488
2489 if (!peer)
2490 return true;
2491
2492 num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1),
2493 HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES);
2494 mpdu_ranges = htt_rx_ind_get_mpdu_ranges_hl(rx);
2495 fw_desc = &rx->fw_desc;
2496 rx_desc_len = fw_desc->len;
2497
2498 if (fw_desc->u.bits.discard) {
2499 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt discard mpdu\n");
2500 goto err;
2501 }
2502
2503 /* I have not yet seen any case where num_mpdu_ranges > 1.
2504 * qcacld does not seem handle that case either, so we introduce the
2505 * same limitation here as well.
2506 */
2507 if (num_mpdu_ranges > 1)
2508 ath10k_warn(ar,
2509 "Unsupported number of MPDU ranges: %d, ignoring all but the first\n",
2510 num_mpdu_ranges);
2511
2512 if (mpdu_ranges->mpdu_range_status !=
2513 HTT_RX_IND_MPDU_STATUS_OK &&
2514 mpdu_ranges->mpdu_range_status !=
2515 HTT_RX_IND_MPDU_STATUS_TKIP_MIC_ERR) {
2516 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt mpdu_range_status %d\n",
2517 mpdu_ranges->mpdu_range_status);
2518 goto err;
2519 }
2520
2521 rx_desc = (struct htt_hl_rx_desc *)&rx->mpdu_ranges[num_mpdu_ranges];
2522 rx_desc_info = __le32_to_cpu(rx_desc->info);
2523
2524 if (MS(rx_desc_info, HTT_RX_DESC_HL_INFO_MCAST_BCAST))
2525 sec_index = HTT_TXRX_SEC_MCAST;
2526 else
2527 sec_index = HTT_TXRX_SEC_UCAST;
2528
2529 sec_type = peer->rx_pn[sec_index].sec_type;
2530 first_msdu = rx->fw_desc.flags & FW_RX_DESC_FLAGS_FIRST_MSDU;
2531
2532 ath10k_htt_rx_mpdu_desc_pn_hl(rx_desc, &new_pn, peer->rx_pn[sec_index].pn_len);
2533
2534 if (check_pn_type == HTT_RX_PN_CHECK && tid >= IEEE80211_NUM_TIDS) {
2535 spin_lock_bh(&ar->data_lock);
2536 pn_invalid = ath10k_htt_rx_pn_check_replay_hl(ar, peer, rx);
2537 spin_unlock_bh(&ar->data_lock);
2538
2539 if (pn_invalid)
2540 goto err;
2541 }
2542
2543 /* Strip off all headers before the MAC header before delivery to
2544 * mac80211
2545 */
2546 tot_hdr_len = sizeof(struct htt_resp_hdr) + sizeof(rx->hdr) +
2547 sizeof(rx->ppdu) + sizeof(rx->prefix) +
2548 sizeof(rx->fw_desc) +
2549 sizeof(*mpdu_ranges) * num_mpdu_ranges + rx_desc_len;
2550
2551 skb_pull(skb, tot_hdr_len);
2552
2553 hdr = (struct ieee80211_hdr *)skb->data;
2554 qos = ieee80211_is_data_qos(hdr->frame_control);
2555
2556 rx_status = IEEE80211_SKB_RXCB(skb);
2557 memset(rx_status, 0, sizeof(*rx_status));
2558
2559 if (rx->ppdu.combined_rssi == 0) {
2560 /* SDIO firmware does not provide signal */
2561 rx_status->signal = 0;
2562 rx_status->flag |= RX_FLAG_NO_SIGNAL_VAL;
2563 } else {
2564 rx_status->signal = ATH10K_DEFAULT_NOISE_FLOOR +
2565 rx->ppdu.combined_rssi;
2566 rx_status->flag &= ~RX_FLAG_NO_SIGNAL_VAL;
2567 }
2568
2569 spin_lock_bh(&ar->data_lock);
2570 ch = ar->scan_channel;
2571 if (!ch)
2572 ch = ar->rx_channel;
2573 if (!ch)
2574 ch = ath10k_htt_rx_h_any_channel(ar);
2575 if (!ch)
2576 ch = ar->tgt_oper_chan;
2577 spin_unlock_bh(&ar->data_lock);
2578
2579 if (ch) {
2580 rx_status->band = ch->band;
2581 rx_status->freq = ch->center_freq;
2582 }
2583 if (rx->fw_desc.flags & FW_RX_DESC_FLAGS_LAST_MSDU)
2584 rx_status->flag &= ~RX_FLAG_AMSDU_MORE;
2585 else
2586 rx_status->flag |= RX_FLAG_AMSDU_MORE;
2587
2588 /* Not entirely sure about this, but all frames from the chipset has
2589 * the protected flag set even though they have already been decrypted.
2590 * Unmasking this flag is necessary in order for mac80211 not to drop
2591 * the frame.
2592 * TODO: Verify this is always the case or find out a way to check
2593 * if there has been hw decryption.
2594 */
2595 if (ieee80211_has_protected(hdr->frame_control)) {
2596 hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED);
2597 rx_status->flag |= RX_FLAG_DECRYPTED |
2598 RX_FLAG_IV_STRIPPED |
2599 RX_FLAG_MMIC_STRIPPED;
2600
2601 if (tid < IEEE80211_NUM_TIDS &&
2602 first_msdu &&
2603 check_pn_type == HTT_RX_PN_CHECK &&
2604 (sec_type == HTT_SECURITY_AES_CCMP ||
2605 sec_type == HTT_SECURITY_TKIP ||
2606 sec_type == HTT_SECURITY_TKIP_NOMIC)) {
2607 u8 offset, *ivp, i;
2608 s8 keyidx = 0;
2609 __le64 pn48 = cpu_to_le64(new_pn.pn48);
2610
2611 hdr = (struct ieee80211_hdr *)skb->data;
2612 offset = ieee80211_hdrlen(hdr->frame_control);
2613 hdr->frame_control |= __cpu_to_le16(IEEE80211_FCTL_PROTECTED);
2614 rx_status->flag &= ~RX_FLAG_IV_STRIPPED;
2615
2616 memmove(skb->data - IEEE80211_CCMP_HDR_LEN,
2617 skb->data, offset);
2618 skb_push(skb, IEEE80211_CCMP_HDR_LEN);
2619 ivp = skb->data + offset;
2620 memset(skb->data + offset, 0, IEEE80211_CCMP_HDR_LEN);
2621 /* Ext IV */
2622 ivp[IEEE80211_WEP_IV_LEN - 1] |= ATH10K_IEEE80211_EXTIV;
2623
2624 for (i = 0; i < ARRAY_SIZE(peer->keys); i++) {
2625 if (peer->keys[i] &&
2626 peer->keys[i]->flags & IEEE80211_KEY_FLAG_PAIRWISE)
2627 keyidx = peer->keys[i]->keyidx;
2628 }
2629
2630 /* Key ID */
2631 ivp[IEEE80211_WEP_IV_LEN - 1] |= keyidx << 6;
2632
2633 if (sec_type == HTT_SECURITY_AES_CCMP) {
2634 rx_status->flag |= RX_FLAG_MIC_STRIPPED;
2635 /* pn 0, pn 1 */
2636 memcpy(skb->data + offset, &pn48, 2);
2637 /* pn 1, pn 3 , pn 34 , pn 5 */
2638 memcpy(skb->data + offset + 4, ((u8 *)&pn48) + 2, 4);
2639 } else {
2640 rx_status->flag |= RX_FLAG_ICV_STRIPPED;
2641 /* TSC 0 */
2642 memcpy(skb->data + offset + 2, &pn48, 1);
2643 /* TSC 1 */
2644 memcpy(skb->data + offset, ((u8 *)&pn48) + 1, 1);
2645 /* TSC 2 , TSC 3 , TSC 4 , TSC 5*/
2646 memcpy(skb->data + offset + 4, ((u8 *)&pn48) + 2, 4);
2647 }
2648 }
2649 }
2650
2651 if (tkip_mic_type == HTT_RX_TKIP_MIC)
2652 rx_status->flag &= ~RX_FLAG_IV_STRIPPED &
2653 ~RX_FLAG_MMIC_STRIPPED;
2654
2655 if (mpdu_ranges->mpdu_range_status == HTT_RX_IND_MPDU_STATUS_TKIP_MIC_ERR)
2656 rx_status->flag |= RX_FLAG_MMIC_ERROR;
2657
2658 if (!qos && tid < IEEE80211_NUM_TIDS) {
2659 u8 offset;
2660 __le16 qos_ctrl = 0;
2661
2662 hdr = (struct ieee80211_hdr *)skb->data;
2663 offset = ieee80211_hdrlen(hdr->frame_control);
2664
2665 hdr->frame_control |= cpu_to_le16(IEEE80211_STYPE_QOS_DATA);
2666 memmove(skb->data - IEEE80211_QOS_CTL_LEN, skb->data, offset);
2667 skb_push(skb, IEEE80211_QOS_CTL_LEN);
2668 qos_ctrl = cpu_to_le16(tid);
2669 memcpy(skb->data + offset, &qos_ctrl, IEEE80211_QOS_CTL_LEN);
2670 }
2671
2672 if (ar->napi.dev)
2673 ieee80211_rx_napi(ar->hw, NULL, skb, &ar->napi);
2674 else
2675 ieee80211_rx_ni(ar->hw, skb);
2676
2677 /* We have delivered the skb to the upper layers (mac80211) so we
2678 * must not free it.
2679 */
2680 return false;
2681 err:
2682 /* Tell the caller that it must free the skb since we have not
2683 * consumed it
2684 */
2685 return true;
2686 }
2687
ath10k_htt_rx_frag_tkip_decap_nomic(struct sk_buff * skb,u16 head_len,u16 hdr_len)2688 static int ath10k_htt_rx_frag_tkip_decap_nomic(struct sk_buff *skb,
2689 u16 head_len,
2690 u16 hdr_len)
2691 {
2692 u8 *ivp, *orig_hdr;
2693
2694 orig_hdr = skb->data;
2695 ivp = orig_hdr + hdr_len + head_len;
2696
2697 /* the ExtIV bit is always set to 1 for TKIP */
2698 if (!(ivp[IEEE80211_WEP_IV_LEN - 1] & ATH10K_IEEE80211_EXTIV))
2699 return -EINVAL;
2700
2701 memmove(orig_hdr + IEEE80211_TKIP_IV_LEN, orig_hdr, head_len + hdr_len);
2702 skb_pull(skb, IEEE80211_TKIP_IV_LEN);
2703 skb_trim(skb, skb->len - ATH10K_IEEE80211_TKIP_MICLEN);
2704 return 0;
2705 }
2706
ath10k_htt_rx_frag_tkip_decap_withmic(struct sk_buff * skb,u16 head_len,u16 hdr_len)2707 static int ath10k_htt_rx_frag_tkip_decap_withmic(struct sk_buff *skb,
2708 u16 head_len,
2709 u16 hdr_len)
2710 {
2711 u8 *ivp, *orig_hdr;
2712
2713 orig_hdr = skb->data;
2714 ivp = orig_hdr + hdr_len + head_len;
2715
2716 /* the ExtIV bit is always set to 1 for TKIP */
2717 if (!(ivp[IEEE80211_WEP_IV_LEN - 1] & ATH10K_IEEE80211_EXTIV))
2718 return -EINVAL;
2719
2720 memmove(orig_hdr + IEEE80211_TKIP_IV_LEN, orig_hdr, head_len + hdr_len);
2721 skb_pull(skb, IEEE80211_TKIP_IV_LEN);
2722 skb_trim(skb, skb->len - IEEE80211_TKIP_ICV_LEN);
2723 return 0;
2724 }
2725
ath10k_htt_rx_frag_ccmp_decap(struct sk_buff * skb,u16 head_len,u16 hdr_len)2726 static int ath10k_htt_rx_frag_ccmp_decap(struct sk_buff *skb,
2727 u16 head_len,
2728 u16 hdr_len)
2729 {
2730 u8 *ivp, *orig_hdr;
2731
2732 orig_hdr = skb->data;
2733 ivp = orig_hdr + hdr_len + head_len;
2734
2735 /* the ExtIV bit is always set to 1 for CCMP */
2736 if (!(ivp[IEEE80211_WEP_IV_LEN - 1] & ATH10K_IEEE80211_EXTIV))
2737 return -EINVAL;
2738
2739 skb_trim(skb, skb->len - IEEE80211_CCMP_MIC_LEN);
2740 memmove(orig_hdr + IEEE80211_CCMP_HDR_LEN, orig_hdr, head_len + hdr_len);
2741 skb_pull(skb, IEEE80211_CCMP_HDR_LEN);
2742 return 0;
2743 }
2744
ath10k_htt_rx_frag_wep_decap(struct sk_buff * skb,u16 head_len,u16 hdr_len)2745 static int ath10k_htt_rx_frag_wep_decap(struct sk_buff *skb,
2746 u16 head_len,
2747 u16 hdr_len)
2748 {
2749 u8 *orig_hdr;
2750
2751 orig_hdr = skb->data;
2752
2753 memmove(orig_hdr + IEEE80211_WEP_IV_LEN,
2754 orig_hdr, head_len + hdr_len);
2755 skb_pull(skb, IEEE80211_WEP_IV_LEN);
2756 skb_trim(skb, skb->len - IEEE80211_WEP_ICV_LEN);
2757 return 0;
2758 }
2759
ath10k_htt_rx_proc_rx_frag_ind_hl(struct ath10k_htt * htt,struct htt_rx_fragment_indication * rx,struct sk_buff * skb)2760 static bool ath10k_htt_rx_proc_rx_frag_ind_hl(struct ath10k_htt *htt,
2761 struct htt_rx_fragment_indication *rx,
2762 struct sk_buff *skb)
2763 {
2764 struct ath10k *ar = htt->ar;
2765 enum htt_rx_tkip_demic_type tkip_mic = HTT_RX_NON_TKIP_MIC;
2766 enum htt_txrx_sec_cast_type sec_index;
2767 struct htt_rx_indication_hl *rx_hl;
2768 enum htt_security_types sec_type;
2769 u32 tid, frag, seq, rx_desc_info;
2770 union htt_rx_pn_t new_pn = {0};
2771 struct htt_hl_rx_desc *rx_desc;
2772 u16 peer_id, sc, hdr_space;
2773 union htt_rx_pn_t *last_pn;
2774 struct ieee80211_hdr *hdr;
2775 int ret, num_mpdu_ranges;
2776 struct ath10k_peer *peer;
2777 struct htt_resp *resp;
2778 size_t tot_hdr_len;
2779
2780 resp = (struct htt_resp *)(skb->data + HTT_RX_FRAG_IND_INFO0_HEADER_LEN);
2781 skb_pull(skb, HTT_RX_FRAG_IND_INFO0_HEADER_LEN);
2782 skb_trim(skb, skb->len - FCS_LEN);
2783
2784 peer_id = __le16_to_cpu(rx->peer_id);
2785 rx_hl = (struct htt_rx_indication_hl *)(&resp->rx_ind_hl);
2786
2787 spin_lock_bh(&ar->data_lock);
2788 peer = ath10k_peer_find_by_id(ar, peer_id);
2789 if (!peer) {
2790 ath10k_dbg(ar, ATH10K_DBG_HTT, "invalid peer: %u\n", peer_id);
2791 goto err;
2792 }
2793
2794 num_mpdu_ranges = MS(__le32_to_cpu(rx_hl->hdr.info1),
2795 HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES);
2796
2797 tot_hdr_len = sizeof(struct htt_resp_hdr) +
2798 sizeof(rx_hl->hdr) +
2799 sizeof(rx_hl->ppdu) +
2800 sizeof(rx_hl->prefix) +
2801 sizeof(rx_hl->fw_desc) +
2802 sizeof(struct htt_rx_indication_mpdu_range) * num_mpdu_ranges;
2803
2804 tid = MS(rx_hl->hdr.info0, HTT_RX_INDICATION_INFO0_EXT_TID);
2805 rx_desc = (struct htt_hl_rx_desc *)(skb->data + tot_hdr_len);
2806 rx_desc_info = __le32_to_cpu(rx_desc->info);
2807
2808 hdr = (struct ieee80211_hdr *)((u8 *)rx_desc + rx_hl->fw_desc.len);
2809
2810 if (is_multicast_ether_addr(hdr->addr1)) {
2811 /* Discard the fragment with multicast DA */
2812 goto err;
2813 }
2814
2815 if (!MS(rx_desc_info, HTT_RX_DESC_HL_INFO_ENCRYPTED)) {
2816 spin_unlock_bh(&ar->data_lock);
2817 return ath10k_htt_rx_proc_rx_ind_hl(htt, &resp->rx_ind_hl, skb,
2818 HTT_RX_NON_PN_CHECK,
2819 HTT_RX_NON_TKIP_MIC);
2820 }
2821
2822 if (ieee80211_has_retry(hdr->frame_control))
2823 goto err;
2824
2825 hdr_space = ieee80211_hdrlen(hdr->frame_control);
2826 sc = __le16_to_cpu(hdr->seq_ctrl);
2827 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
2828 frag = sc & IEEE80211_SCTL_FRAG;
2829
2830 sec_index = MS(rx_desc_info, HTT_RX_DESC_HL_INFO_MCAST_BCAST) ?
2831 HTT_TXRX_SEC_MCAST : HTT_TXRX_SEC_UCAST;
2832 sec_type = peer->rx_pn[sec_index].sec_type;
2833 ath10k_htt_rx_mpdu_desc_pn_hl(rx_desc, &new_pn, peer->rx_pn[sec_index].pn_len);
2834
2835 switch (sec_type) {
2836 case HTT_SECURITY_TKIP:
2837 tkip_mic = HTT_RX_TKIP_MIC;
2838 ret = ath10k_htt_rx_frag_tkip_decap_withmic(skb,
2839 tot_hdr_len +
2840 rx_hl->fw_desc.len,
2841 hdr_space);
2842 if (ret)
2843 goto err;
2844 break;
2845 case HTT_SECURITY_TKIP_NOMIC:
2846 ret = ath10k_htt_rx_frag_tkip_decap_nomic(skb,
2847 tot_hdr_len +
2848 rx_hl->fw_desc.len,
2849 hdr_space);
2850 if (ret)
2851 goto err;
2852 break;
2853 case HTT_SECURITY_AES_CCMP:
2854 ret = ath10k_htt_rx_frag_ccmp_decap(skb,
2855 tot_hdr_len + rx_hl->fw_desc.len,
2856 hdr_space);
2857 if (ret)
2858 goto err;
2859 break;
2860 case HTT_SECURITY_WEP128:
2861 case HTT_SECURITY_WEP104:
2862 case HTT_SECURITY_WEP40:
2863 ret = ath10k_htt_rx_frag_wep_decap(skb,
2864 tot_hdr_len + rx_hl->fw_desc.len,
2865 hdr_space);
2866 if (ret)
2867 goto err;
2868 break;
2869 default:
2870 break;
2871 }
2872
2873 resp = (struct htt_resp *)(skb->data);
2874
2875 if (sec_type != HTT_SECURITY_AES_CCMP &&
2876 sec_type != HTT_SECURITY_TKIP &&
2877 sec_type != HTT_SECURITY_TKIP_NOMIC) {
2878 spin_unlock_bh(&ar->data_lock);
2879 return ath10k_htt_rx_proc_rx_ind_hl(htt, &resp->rx_ind_hl, skb,
2880 HTT_RX_NON_PN_CHECK,
2881 HTT_RX_NON_TKIP_MIC);
2882 }
2883
2884 last_pn = &peer->frag_tids_last_pn[tid];
2885
2886 if (frag == 0) {
2887 if (ath10k_htt_rx_pn_check_replay_hl(ar, peer, &resp->rx_ind_hl))
2888 goto err;
2889
2890 last_pn->pn48 = new_pn.pn48;
2891 peer->frag_tids_seq[tid] = seq;
2892 } else if (sec_type == HTT_SECURITY_AES_CCMP) {
2893 if (seq != peer->frag_tids_seq[tid])
2894 goto err;
2895
2896 if (new_pn.pn48 != last_pn->pn48 + 1)
2897 goto err;
2898
2899 last_pn->pn48 = new_pn.pn48;
2900 last_pn = &peer->tids_last_pn[tid];
2901 last_pn->pn48 = new_pn.pn48;
2902 }
2903
2904 spin_unlock_bh(&ar->data_lock);
2905
2906 return ath10k_htt_rx_proc_rx_ind_hl(htt, &resp->rx_ind_hl, skb,
2907 HTT_RX_NON_PN_CHECK, tkip_mic);
2908
2909 err:
2910 spin_unlock_bh(&ar->data_lock);
2911
2912 /* Tell the caller that it must free the skb since we have not
2913 * consumed it
2914 */
2915 return true;
2916 }
2917
ath10k_htt_rx_proc_rx_ind_ll(struct ath10k_htt * htt,struct htt_rx_indication * rx)2918 static void ath10k_htt_rx_proc_rx_ind_ll(struct ath10k_htt *htt,
2919 struct htt_rx_indication *rx)
2920 {
2921 struct ath10k *ar = htt->ar;
2922 struct htt_rx_indication_mpdu_range *mpdu_ranges;
2923 int num_mpdu_ranges;
2924 int i, mpdu_count = 0;
2925 u16 peer_id;
2926 u8 tid;
2927
2928 num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1),
2929 HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES);
2930 peer_id = __le16_to_cpu(rx->hdr.peer_id);
2931 tid = MS(rx->hdr.info0, HTT_RX_INDICATION_INFO0_EXT_TID);
2932
2933 mpdu_ranges = htt_rx_ind_get_mpdu_ranges(rx);
2934
2935 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx ind: ",
2936 rx, struct_size(rx, mpdu_ranges, num_mpdu_ranges));
2937
2938 for (i = 0; i < num_mpdu_ranges; i++)
2939 mpdu_count += mpdu_ranges[i].mpdu_count;
2940
2941 atomic_add(mpdu_count, &htt->num_mpdus_ready);
2942
2943 ath10k_sta_update_rx_tid_stats_ampdu(ar, peer_id, tid, mpdu_ranges,
2944 num_mpdu_ranges);
2945 }
2946
ath10k_htt_rx_tx_compl_ind(struct ath10k * ar,struct sk_buff * skb)2947 static void ath10k_htt_rx_tx_compl_ind(struct ath10k *ar,
2948 struct sk_buff *skb)
2949 {
2950 struct ath10k_htt *htt = &ar->htt;
2951 struct htt_resp *resp = (struct htt_resp *)skb->data;
2952 struct htt_tx_done tx_done = {};
2953 int status = MS(resp->data_tx_completion.flags, HTT_DATA_TX_STATUS);
2954 __le16 msdu_id, *msdus;
2955 bool rssi_enabled = false;
2956 u8 msdu_count = 0, num_airtime_records, tid;
2957 int i, htt_pad = 0;
2958 struct htt_data_tx_compl_ppdu_dur *ppdu_info;
2959 struct ath10k_peer *peer;
2960 u16 ppdu_info_offset = 0, peer_id;
2961 u32 tx_duration;
2962
2963 switch (status) {
2964 case HTT_DATA_TX_STATUS_NO_ACK:
2965 tx_done.status = HTT_TX_COMPL_STATE_NOACK;
2966 break;
2967 case HTT_DATA_TX_STATUS_OK:
2968 tx_done.status = HTT_TX_COMPL_STATE_ACK;
2969 break;
2970 case HTT_DATA_TX_STATUS_DISCARD:
2971 case HTT_DATA_TX_STATUS_POSTPONE:
2972 case HTT_DATA_TX_STATUS_DOWNLOAD_FAIL:
2973 tx_done.status = HTT_TX_COMPL_STATE_DISCARD;
2974 break;
2975 default:
2976 ath10k_warn(ar, "unhandled tx completion status %d\n", status);
2977 tx_done.status = HTT_TX_COMPL_STATE_DISCARD;
2978 break;
2979 }
2980
2981 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx completion num_msdus %d\n",
2982 resp->data_tx_completion.num_msdus);
2983
2984 msdu_count = resp->data_tx_completion.num_msdus;
2985 msdus = resp->data_tx_completion.msdus;
2986 rssi_enabled = ath10k_is_rssi_enable(&ar->hw_params, resp);
2987
2988 if (rssi_enabled)
2989 htt_pad = ath10k_tx_data_rssi_get_pad_bytes(&ar->hw_params,
2990 resp);
2991
2992 for (i = 0; i < msdu_count; i++) {
2993 msdu_id = msdus[i];
2994 tx_done.msdu_id = __le16_to_cpu(msdu_id);
2995
2996 if (rssi_enabled) {
2997 /* Total no of MSDUs should be even,
2998 * if odd MSDUs are sent firmware fills
2999 * last msdu id with 0xffff
3000 */
3001 if (msdu_count & 0x01) {
3002 msdu_id = msdus[msdu_count + i + 1 + htt_pad];
3003 tx_done.ack_rssi = __le16_to_cpu(msdu_id);
3004 } else {
3005 msdu_id = msdus[msdu_count + i + htt_pad];
3006 tx_done.ack_rssi = __le16_to_cpu(msdu_id);
3007 }
3008 }
3009
3010 /* kfifo_put: In practice firmware shouldn't fire off per-CE
3011 * interrupt and main interrupt (MSI/-X range case) for the same
3012 * HTC service so it should be safe to use kfifo_put w/o lock.
3013 *
3014 * From kfifo_put() documentation:
3015 * Note that with only one concurrent reader and one concurrent
3016 * writer, you don't need extra locking to use these macro.
3017 */
3018 if (ar->bus_param.dev_type == ATH10K_DEV_TYPE_HL) {
3019 ath10k_txrx_tx_unref(htt, &tx_done);
3020 } else if (!kfifo_put(&htt->txdone_fifo, tx_done)) {
3021 ath10k_warn(ar, "txdone fifo overrun, msdu_id %d status %d\n",
3022 tx_done.msdu_id, tx_done.status);
3023 ath10k_txrx_tx_unref(htt, &tx_done);
3024 }
3025 }
3026
3027 if (!(resp->data_tx_completion.flags2 & HTT_TX_CMPL_FLAG_PPDU_DURATION_PRESENT))
3028 return;
3029
3030 ppdu_info_offset = (msdu_count & 0x01) ? msdu_count + 1 : msdu_count;
3031
3032 if (rssi_enabled)
3033 ppdu_info_offset += ppdu_info_offset;
3034
3035 if (resp->data_tx_completion.flags2 &
3036 (HTT_TX_CMPL_FLAG_PPID_PRESENT | HTT_TX_CMPL_FLAG_PA_PRESENT))
3037 ppdu_info_offset += 2;
3038
3039 ppdu_info = (struct htt_data_tx_compl_ppdu_dur *)&msdus[ppdu_info_offset];
3040 num_airtime_records = FIELD_GET(HTT_TX_COMPL_PPDU_DUR_INFO0_NUM_ENTRIES_MASK,
3041 __le32_to_cpu(ppdu_info->info0));
3042
3043 for (i = 0; i < num_airtime_records; i++) {
3044 struct htt_data_tx_ppdu_dur *ppdu_dur;
3045 u32 info0;
3046
3047 ppdu_dur = &ppdu_info->ppdu_dur[i];
3048 info0 = __le32_to_cpu(ppdu_dur->info0);
3049
3050 peer_id = FIELD_GET(HTT_TX_PPDU_DUR_INFO0_PEER_ID_MASK,
3051 info0);
3052 rcu_read_lock();
3053 spin_lock_bh(&ar->data_lock);
3054
3055 peer = ath10k_peer_find_by_id(ar, peer_id);
3056 if (!peer || !peer->sta) {
3057 spin_unlock_bh(&ar->data_lock);
3058 rcu_read_unlock();
3059 continue;
3060 }
3061
3062 tid = FIELD_GET(HTT_TX_PPDU_DUR_INFO0_TID_MASK, info0) &
3063 IEEE80211_QOS_CTL_TID_MASK;
3064 tx_duration = __le32_to_cpu(ppdu_dur->tx_duration);
3065
3066 ieee80211_sta_register_airtime(peer->sta, tid, tx_duration, 0);
3067
3068 spin_unlock_bh(&ar->data_lock);
3069 rcu_read_unlock();
3070 }
3071 }
3072
ath10k_htt_rx_addba(struct ath10k * ar,struct htt_resp * resp)3073 static void ath10k_htt_rx_addba(struct ath10k *ar, struct htt_resp *resp)
3074 {
3075 struct htt_rx_addba *ev = &resp->rx_addba;
3076 struct ath10k_peer *peer;
3077 struct ath10k_vif *arvif;
3078 u16 info0, tid, peer_id;
3079
3080 info0 = __le16_to_cpu(ev->info0);
3081 tid = MS(info0, HTT_RX_BA_INFO0_TID);
3082 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
3083
3084 ath10k_dbg(ar, ATH10K_DBG_HTT,
3085 "htt rx addba tid %u peer_id %u size %u\n",
3086 tid, peer_id, ev->window_size);
3087
3088 spin_lock_bh(&ar->data_lock);
3089 peer = ath10k_peer_find_by_id(ar, peer_id);
3090 if (!peer) {
3091 ath10k_warn(ar, "received addba event for invalid peer_id: %u\n",
3092 peer_id);
3093 spin_unlock_bh(&ar->data_lock);
3094 return;
3095 }
3096
3097 arvif = ath10k_get_arvif(ar, peer->vdev_id);
3098 if (!arvif) {
3099 ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
3100 peer->vdev_id);
3101 spin_unlock_bh(&ar->data_lock);
3102 return;
3103 }
3104
3105 ath10k_dbg(ar, ATH10K_DBG_HTT,
3106 "htt rx start rx ba session sta %pM tid %u size %u\n",
3107 peer->addr, tid, ev->window_size);
3108
3109 ieee80211_start_rx_ba_session_offl(arvif->vif, peer->addr, tid);
3110 spin_unlock_bh(&ar->data_lock);
3111 }
3112
ath10k_htt_rx_delba(struct ath10k * ar,struct htt_resp * resp)3113 static void ath10k_htt_rx_delba(struct ath10k *ar, struct htt_resp *resp)
3114 {
3115 struct htt_rx_delba *ev = &resp->rx_delba;
3116 struct ath10k_peer *peer;
3117 struct ath10k_vif *arvif;
3118 u16 info0, tid, peer_id;
3119
3120 info0 = __le16_to_cpu(ev->info0);
3121 tid = MS(info0, HTT_RX_BA_INFO0_TID);
3122 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
3123
3124 ath10k_dbg(ar, ATH10K_DBG_HTT,
3125 "htt rx delba tid %u peer_id %u\n",
3126 tid, peer_id);
3127
3128 spin_lock_bh(&ar->data_lock);
3129 peer = ath10k_peer_find_by_id(ar, peer_id);
3130 if (!peer) {
3131 ath10k_warn(ar, "received addba event for invalid peer_id: %u\n",
3132 peer_id);
3133 spin_unlock_bh(&ar->data_lock);
3134 return;
3135 }
3136
3137 arvif = ath10k_get_arvif(ar, peer->vdev_id);
3138 if (!arvif) {
3139 ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
3140 peer->vdev_id);
3141 spin_unlock_bh(&ar->data_lock);
3142 return;
3143 }
3144
3145 ath10k_dbg(ar, ATH10K_DBG_HTT,
3146 "htt rx stop rx ba session sta %pM tid %u\n",
3147 peer->addr, tid);
3148
3149 ieee80211_stop_rx_ba_session_offl(arvif->vif, peer->addr, tid);
3150 spin_unlock_bh(&ar->data_lock);
3151 }
3152
ath10k_htt_rx_extract_amsdu(struct ath10k_hw_params * hw,struct sk_buff_head * list,struct sk_buff_head * amsdu)3153 static int ath10k_htt_rx_extract_amsdu(struct ath10k_hw_params *hw,
3154 struct sk_buff_head *list,
3155 struct sk_buff_head *amsdu)
3156 {
3157 struct sk_buff *msdu;
3158 struct htt_rx_desc *rxd;
3159 struct rx_msdu_end_common *rxd_msdu_end_common;
3160
3161 if (skb_queue_empty(list))
3162 return -ENOBUFS;
3163
3164 if (WARN_ON(!skb_queue_empty(amsdu)))
3165 return -EINVAL;
3166
3167 while ((msdu = __skb_dequeue(list))) {
3168 __skb_queue_tail(amsdu, msdu);
3169
3170 rxd = HTT_RX_BUF_TO_RX_DESC(hw,
3171 (void *)msdu->data -
3172 hw->rx_desc_ops->rx_desc_size);
3173
3174 rxd_msdu_end_common = ath10k_htt_rx_desc_get_msdu_end(hw, rxd);
3175 if (rxd_msdu_end_common->info0 &
3176 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU))
3177 break;
3178 }
3179
3180 msdu = skb_peek_tail(amsdu);
3181 rxd = HTT_RX_BUF_TO_RX_DESC(hw,
3182 (void *)msdu->data - hw->rx_desc_ops->rx_desc_size);
3183
3184 rxd_msdu_end_common = ath10k_htt_rx_desc_get_msdu_end(hw, rxd);
3185 if (!(rxd_msdu_end_common->info0 &
3186 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU))) {
3187 skb_queue_splice_init(amsdu, list);
3188 return -EAGAIN;
3189 }
3190
3191 return 0;
3192 }
3193
ath10k_htt_rx_h_rx_offload_prot(struct ieee80211_rx_status * status,struct sk_buff * skb)3194 static void ath10k_htt_rx_h_rx_offload_prot(struct ieee80211_rx_status *status,
3195 struct sk_buff *skb)
3196 {
3197 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
3198
3199 if (!ieee80211_has_protected(hdr->frame_control))
3200 return;
3201
3202 /* Offloaded frames are already decrypted but firmware insists they are
3203 * protected in the 802.11 header. Strip the flag. Otherwise mac80211
3204 * will drop the frame.
3205 */
3206
3207 hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED);
3208 status->flag |= RX_FLAG_DECRYPTED |
3209 RX_FLAG_IV_STRIPPED |
3210 RX_FLAG_MMIC_STRIPPED;
3211 }
3212
ath10k_htt_rx_h_rx_offload(struct ath10k * ar,struct sk_buff_head * list)3213 static void ath10k_htt_rx_h_rx_offload(struct ath10k *ar,
3214 struct sk_buff_head *list)
3215 {
3216 struct ath10k_htt *htt = &ar->htt;
3217 struct ieee80211_rx_status *status = &htt->rx_status;
3218 struct htt_rx_offload_msdu *rx;
3219 struct sk_buff *msdu;
3220 size_t offset;
3221
3222 while ((msdu = __skb_dequeue(list))) {
3223 /* Offloaded frames don't have Rx descriptor. Instead they have
3224 * a short meta information header.
3225 */
3226
3227 rx = (void *)msdu->data;
3228
3229 skb_put(msdu, sizeof(*rx));
3230 skb_pull(msdu, sizeof(*rx));
3231
3232 if (skb_tailroom(msdu) < __le16_to_cpu(rx->msdu_len)) {
3233 ath10k_warn(ar, "dropping frame: offloaded rx msdu is too long!\n");
3234 dev_kfree_skb_any(msdu);
3235 continue;
3236 }
3237
3238 skb_put(msdu, __le16_to_cpu(rx->msdu_len));
3239
3240 /* Offloaded rx header length isn't multiple of 2 nor 4 so the
3241 * actual payload is unaligned. Align the frame. Otherwise
3242 * mac80211 complains. This shouldn't reduce performance much
3243 * because these offloaded frames are rare.
3244 */
3245 offset = 4 - ((unsigned long)msdu->data & 3);
3246 skb_put(msdu, offset);
3247 memmove(msdu->data + offset, msdu->data, msdu->len);
3248 skb_pull(msdu, offset);
3249
3250 /* FIXME: The frame is NWifi. Re-construct QoS Control
3251 * if possible later.
3252 */
3253
3254 memset(status, 0, sizeof(*status));
3255 status->flag |= RX_FLAG_NO_SIGNAL_VAL;
3256
3257 ath10k_htt_rx_h_rx_offload_prot(status, msdu);
3258 ath10k_htt_rx_h_channel(ar, status, NULL, rx->vdev_id);
3259 ath10k_htt_rx_h_queue_msdu(ar, status, msdu);
3260 }
3261 }
3262
ath10k_htt_rx_in_ord_ind(struct ath10k * ar,struct sk_buff * skb)3263 static int ath10k_htt_rx_in_ord_ind(struct ath10k *ar, struct sk_buff *skb)
3264 {
3265 struct ath10k_htt *htt = &ar->htt;
3266 struct htt_resp *resp = (void *)skb->data;
3267 struct ieee80211_rx_status *status = &htt->rx_status;
3268 struct sk_buff_head list;
3269 struct sk_buff_head amsdu;
3270 u16 peer_id;
3271 u16 msdu_count;
3272 u8 vdev_id;
3273 u8 tid;
3274 bool offload;
3275 bool frag;
3276 int ret;
3277
3278 lockdep_assert_held(&htt->rx_ring.lock);
3279
3280 if (htt->rx_confused)
3281 return -EIO;
3282
3283 skb_pull(skb, sizeof(resp->hdr));
3284 skb_pull(skb, sizeof(resp->rx_in_ord_ind));
3285
3286 peer_id = __le16_to_cpu(resp->rx_in_ord_ind.peer_id);
3287 msdu_count = __le16_to_cpu(resp->rx_in_ord_ind.msdu_count);
3288 vdev_id = resp->rx_in_ord_ind.vdev_id;
3289 tid = SM(resp->rx_in_ord_ind.info, HTT_RX_IN_ORD_IND_INFO_TID);
3290 offload = !!(resp->rx_in_ord_ind.info &
3291 HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK);
3292 frag = !!(resp->rx_in_ord_ind.info & HTT_RX_IN_ORD_IND_INFO_FRAG_MASK);
3293
3294 ath10k_dbg(ar, ATH10K_DBG_HTT,
3295 "htt rx in ord vdev %i peer %i tid %i offload %i frag %i msdu count %i\n",
3296 vdev_id, peer_id, tid, offload, frag, msdu_count);
3297
3298 if (skb->len < msdu_count * sizeof(*resp->rx_in_ord_ind.msdu_descs32)) {
3299 ath10k_warn(ar, "dropping invalid in order rx indication\n");
3300 return -EINVAL;
3301 }
3302
3303 /* The event can deliver more than 1 A-MSDU. Each A-MSDU is later
3304 * extracted and processed.
3305 */
3306 __skb_queue_head_init(&list);
3307 if (ar->hw_params.target_64bit)
3308 ret = ath10k_htt_rx_pop_paddr64_list(htt, &resp->rx_in_ord_ind,
3309 &list);
3310 else
3311 ret = ath10k_htt_rx_pop_paddr32_list(htt, &resp->rx_in_ord_ind,
3312 &list);
3313
3314 if (ret < 0) {
3315 ath10k_warn(ar, "failed to pop paddr list: %d\n", ret);
3316 htt->rx_confused = true;
3317 return -EIO;
3318 }
3319
3320 /* Offloaded frames are very different and need to be handled
3321 * separately.
3322 */
3323 if (offload)
3324 ath10k_htt_rx_h_rx_offload(ar, &list);
3325
3326 while (!skb_queue_empty(&list)) {
3327 __skb_queue_head_init(&amsdu);
3328 ret = ath10k_htt_rx_extract_amsdu(&ar->hw_params, &list, &amsdu);
3329 switch (ret) {
3330 case 0:
3331 /* Note: The in-order indication may report interleaved
3332 * frames from different PPDUs meaning reported rx rate
3333 * to mac80211 isn't accurate/reliable. It's still
3334 * better to report something than nothing though. This
3335 * should still give an idea about rx rate to the user.
3336 */
3337 ath10k_htt_rx_h_ppdu(ar, &amsdu, status, vdev_id);
3338 ath10k_htt_rx_h_filter(ar, &amsdu, status, NULL);
3339 ath10k_htt_rx_h_mpdu(ar, &amsdu, status, false, NULL,
3340 NULL, peer_id, frag);
3341 ath10k_htt_rx_h_enqueue(ar, &amsdu, status);
3342 break;
3343 case -EAGAIN:
3344 fallthrough;
3345 default:
3346 /* Should not happen. */
3347 ath10k_warn(ar, "failed to extract amsdu: %d\n", ret);
3348 htt->rx_confused = true;
3349 __skb_queue_purge(&list);
3350 return -EIO;
3351 }
3352 }
3353 return ret;
3354 }
3355
ath10k_htt_rx_tx_fetch_resp_id_confirm(struct ath10k * ar,const __le32 * resp_ids,int num_resp_ids)3356 static void ath10k_htt_rx_tx_fetch_resp_id_confirm(struct ath10k *ar,
3357 const __le32 *resp_ids,
3358 int num_resp_ids)
3359 {
3360 int i;
3361 u32 resp_id;
3362
3363 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm num_resp_ids %d\n",
3364 num_resp_ids);
3365
3366 for (i = 0; i < num_resp_ids; i++) {
3367 resp_id = le32_to_cpu(resp_ids[i]);
3368
3369 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm resp_id %u\n",
3370 resp_id);
3371
3372 /* TODO: free resp_id */
3373 }
3374 }
3375
ath10k_htt_rx_tx_fetch_ind(struct ath10k * ar,struct sk_buff * skb)3376 static void ath10k_htt_rx_tx_fetch_ind(struct ath10k *ar, struct sk_buff *skb)
3377 {
3378 struct ieee80211_hw *hw = ar->hw;
3379 struct ieee80211_txq *txq;
3380 struct htt_resp *resp = (struct htt_resp *)skb->data;
3381 struct htt_tx_fetch_record *record;
3382 size_t len;
3383 size_t max_num_bytes;
3384 size_t max_num_msdus;
3385 size_t num_bytes;
3386 size_t num_msdus;
3387 const __le32 *resp_ids;
3388 u16 num_records;
3389 u16 num_resp_ids;
3390 u16 peer_id;
3391 u8 tid;
3392 int ret;
3393 int i;
3394 bool may_tx;
3395
3396 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch ind\n");
3397
3398 len = sizeof(resp->hdr) + sizeof(resp->tx_fetch_ind);
3399 if (unlikely(skb->len < len)) {
3400 ath10k_warn(ar, "received corrupted tx_fetch_ind event: buffer too short\n");
3401 return;
3402 }
3403
3404 num_records = le16_to_cpu(resp->tx_fetch_ind.num_records);
3405 num_resp_ids = le16_to_cpu(resp->tx_fetch_ind.num_resp_ids);
3406
3407 len += sizeof(resp->tx_fetch_ind.records[0]) * num_records;
3408 len += sizeof(resp->tx_fetch_ind.resp_ids[0]) * num_resp_ids;
3409
3410 if (unlikely(skb->len < len)) {
3411 ath10k_warn(ar, "received corrupted tx_fetch_ind event: too many records/resp_ids\n");
3412 return;
3413 }
3414
3415 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch ind num records %u num resps %u seq %u\n",
3416 num_records, num_resp_ids,
3417 le16_to_cpu(resp->tx_fetch_ind.fetch_seq_num));
3418
3419 if (!ar->htt.tx_q_state.enabled) {
3420 ath10k_warn(ar, "received unexpected tx_fetch_ind event: not enabled\n");
3421 return;
3422 }
3423
3424 if (ar->htt.tx_q_state.mode == HTT_TX_MODE_SWITCH_PUSH) {
3425 ath10k_warn(ar, "received unexpected tx_fetch_ind event: in push mode\n");
3426 return;
3427 }
3428
3429 rcu_read_lock();
3430
3431 for (i = 0; i < num_records; i++) {
3432 record = &resp->tx_fetch_ind.records[i];
3433 peer_id = MS(le16_to_cpu(record->info),
3434 HTT_TX_FETCH_RECORD_INFO_PEER_ID);
3435 tid = MS(le16_to_cpu(record->info),
3436 HTT_TX_FETCH_RECORD_INFO_TID);
3437 max_num_msdus = le16_to_cpu(record->num_msdus);
3438 max_num_bytes = le32_to_cpu(record->num_bytes);
3439
3440 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch record %i peer_id %u tid %u msdus %zu bytes %zu\n",
3441 i, peer_id, tid, max_num_msdus, max_num_bytes);
3442
3443 if (unlikely(peer_id >= ar->htt.tx_q_state.num_peers) ||
3444 unlikely(tid >= ar->htt.tx_q_state.num_tids)) {
3445 ath10k_warn(ar, "received out of range peer_id %u tid %u\n",
3446 peer_id, tid);
3447 continue;
3448 }
3449
3450 spin_lock_bh(&ar->data_lock);
3451 txq = ath10k_mac_txq_lookup(ar, peer_id, tid);
3452 spin_unlock_bh(&ar->data_lock);
3453
3454 /* It is okay to release the lock and use txq because RCU read
3455 * lock is held.
3456 */
3457
3458 if (unlikely(!txq)) {
3459 ath10k_warn(ar, "failed to lookup txq for peer_id %u tid %u\n",
3460 peer_id, tid);
3461 continue;
3462 }
3463
3464 num_msdus = 0;
3465 num_bytes = 0;
3466
3467 ieee80211_txq_schedule_start(hw, txq->ac);
3468 may_tx = ieee80211_txq_may_transmit(hw, txq);
3469 while (num_msdus < max_num_msdus &&
3470 num_bytes < max_num_bytes) {
3471 if (!may_tx)
3472 break;
3473
3474 ret = ath10k_mac_tx_push_txq(hw, txq);
3475 if (ret < 0)
3476 break;
3477
3478 num_msdus++;
3479 num_bytes += ret;
3480 }
3481 ieee80211_return_txq(hw, txq, false);
3482 ieee80211_txq_schedule_end(hw, txq->ac);
3483
3484 record->num_msdus = cpu_to_le16(num_msdus);
3485 record->num_bytes = cpu_to_le32(num_bytes);
3486
3487 ath10k_htt_tx_txq_recalc(hw, txq);
3488 }
3489
3490 rcu_read_unlock();
3491
3492 resp_ids = ath10k_htt_get_tx_fetch_ind_resp_ids(&resp->tx_fetch_ind);
3493 ath10k_htt_rx_tx_fetch_resp_id_confirm(ar, resp_ids, num_resp_ids);
3494
3495 ret = ath10k_htt_tx_fetch_resp(ar,
3496 resp->tx_fetch_ind.token,
3497 resp->tx_fetch_ind.fetch_seq_num,
3498 resp->tx_fetch_ind.records,
3499 num_records);
3500 if (unlikely(ret)) {
3501 ath10k_warn(ar, "failed to submit tx fetch resp for token 0x%08x: %d\n",
3502 le32_to_cpu(resp->tx_fetch_ind.token), ret);
3503 /* FIXME: request fw restart */
3504 }
3505
3506 ath10k_htt_tx_txq_sync(ar);
3507 }
3508
ath10k_htt_rx_tx_fetch_confirm(struct ath10k * ar,struct sk_buff * skb)3509 static void ath10k_htt_rx_tx_fetch_confirm(struct ath10k *ar,
3510 struct sk_buff *skb)
3511 {
3512 const struct htt_resp *resp = (void *)skb->data;
3513 size_t len;
3514 int num_resp_ids;
3515
3516 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm\n");
3517
3518 len = sizeof(resp->hdr) + sizeof(resp->tx_fetch_confirm);
3519 if (unlikely(skb->len < len)) {
3520 ath10k_warn(ar, "received corrupted tx_fetch_confirm event: buffer too short\n");
3521 return;
3522 }
3523
3524 num_resp_ids = le16_to_cpu(resp->tx_fetch_confirm.num_resp_ids);
3525 len += sizeof(resp->tx_fetch_confirm.resp_ids[0]) * num_resp_ids;
3526
3527 if (unlikely(skb->len < len)) {
3528 ath10k_warn(ar, "received corrupted tx_fetch_confirm event: resp_ids buffer overflow\n");
3529 return;
3530 }
3531
3532 ath10k_htt_rx_tx_fetch_resp_id_confirm(ar,
3533 resp->tx_fetch_confirm.resp_ids,
3534 num_resp_ids);
3535 }
3536
ath10k_htt_rx_tx_mode_switch_ind(struct ath10k * ar,struct sk_buff * skb)3537 static void ath10k_htt_rx_tx_mode_switch_ind(struct ath10k *ar,
3538 struct sk_buff *skb)
3539 {
3540 const struct htt_resp *resp = (void *)skb->data;
3541 const struct htt_tx_mode_switch_record *record;
3542 struct ieee80211_txq *txq;
3543 struct ath10k_txq *artxq;
3544 size_t len;
3545 size_t num_records;
3546 enum htt_tx_mode_switch_mode mode;
3547 bool enable;
3548 u16 info0;
3549 u16 info1;
3550 u16 threshold;
3551 u16 peer_id;
3552 u8 tid;
3553 int i;
3554
3555 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx mode switch ind\n");
3556
3557 len = sizeof(resp->hdr) + sizeof(resp->tx_mode_switch_ind);
3558 if (unlikely(skb->len < len)) {
3559 ath10k_warn(ar, "received corrupted tx_mode_switch_ind event: buffer too short\n");
3560 return;
3561 }
3562
3563 info0 = le16_to_cpu(resp->tx_mode_switch_ind.info0);
3564 info1 = le16_to_cpu(resp->tx_mode_switch_ind.info1);
3565
3566 enable = !!(info0 & HTT_TX_MODE_SWITCH_IND_INFO0_ENABLE);
3567 num_records = MS(info0, HTT_TX_MODE_SWITCH_IND_INFO1_THRESHOLD);
3568 mode = MS(info1, HTT_TX_MODE_SWITCH_IND_INFO1_MODE);
3569 threshold = MS(info1, HTT_TX_MODE_SWITCH_IND_INFO1_THRESHOLD);
3570
3571 ath10k_dbg(ar, ATH10K_DBG_HTT,
3572 "htt rx tx mode switch ind info0 0x%04x info1 0x%04x enable %d num records %zd mode %d threshold %u\n",
3573 info0, info1, enable, num_records, mode, threshold);
3574
3575 len += sizeof(resp->tx_mode_switch_ind.records[0]) * num_records;
3576
3577 if (unlikely(skb->len < len)) {
3578 ath10k_warn(ar, "received corrupted tx_mode_switch_mode_ind event: too many records\n");
3579 return;
3580 }
3581
3582 switch (mode) {
3583 case HTT_TX_MODE_SWITCH_PUSH:
3584 case HTT_TX_MODE_SWITCH_PUSH_PULL:
3585 break;
3586 default:
3587 ath10k_warn(ar, "received invalid tx_mode_switch_mode_ind mode %d, ignoring\n",
3588 mode);
3589 return;
3590 }
3591
3592 if (!enable)
3593 return;
3594
3595 ar->htt.tx_q_state.enabled = enable;
3596 ar->htt.tx_q_state.mode = mode;
3597 ar->htt.tx_q_state.num_push_allowed = threshold;
3598
3599 rcu_read_lock();
3600
3601 for (i = 0; i < num_records; i++) {
3602 record = &resp->tx_mode_switch_ind.records[i];
3603 info0 = le16_to_cpu(record->info0);
3604 peer_id = MS(info0, HTT_TX_MODE_SWITCH_RECORD_INFO0_PEER_ID);
3605 tid = MS(info0, HTT_TX_MODE_SWITCH_RECORD_INFO0_TID);
3606
3607 if (unlikely(peer_id >= ar->htt.tx_q_state.num_peers) ||
3608 unlikely(tid >= ar->htt.tx_q_state.num_tids)) {
3609 ath10k_warn(ar, "received out of range peer_id %u tid %u\n",
3610 peer_id, tid);
3611 continue;
3612 }
3613
3614 spin_lock_bh(&ar->data_lock);
3615 txq = ath10k_mac_txq_lookup(ar, peer_id, tid);
3616 spin_unlock_bh(&ar->data_lock);
3617
3618 /* It is okay to release the lock and use txq because RCU read
3619 * lock is held.
3620 */
3621
3622 if (unlikely(!txq)) {
3623 ath10k_warn(ar, "failed to lookup txq for peer_id %u tid %u\n",
3624 peer_id, tid);
3625 continue;
3626 }
3627
3628 spin_lock_bh(&ar->htt.tx_lock);
3629 artxq = (void *)txq->drv_priv;
3630 artxq->num_push_allowed = le16_to_cpu(record->num_max_msdus);
3631 spin_unlock_bh(&ar->htt.tx_lock);
3632 }
3633
3634 rcu_read_unlock();
3635
3636 ath10k_mac_tx_push_pending(ar);
3637 }
3638
ath10k_htt_htc_t2h_msg_handler(struct ath10k * ar,struct sk_buff * skb)3639 void ath10k_htt_htc_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
3640 {
3641 bool release;
3642
3643 release = ath10k_htt_t2h_msg_handler(ar, skb);
3644
3645 /* Free the indication buffer */
3646 if (release)
3647 dev_kfree_skb_any(skb);
3648 }
3649
ath10k_get_legacy_rate_idx(struct ath10k * ar,u8 rate)3650 static inline s8 ath10k_get_legacy_rate_idx(struct ath10k *ar, u8 rate)
3651 {
3652 static const u8 legacy_rates[] = {1, 2, 5, 11, 6, 9, 12,
3653 18, 24, 36, 48, 54};
3654 int i;
3655
3656 for (i = 0; i < ARRAY_SIZE(legacy_rates); i++) {
3657 if (rate == legacy_rates[i])
3658 return i;
3659 }
3660
3661 ath10k_warn(ar, "Invalid legacy rate %d peer stats", rate);
3662 return -EINVAL;
3663 }
3664
3665 static void
ath10k_accumulate_per_peer_tx_stats(struct ath10k * ar,struct ath10k_sta * arsta,struct ath10k_per_peer_tx_stats * pstats,s8 legacy_rate_idx)3666 ath10k_accumulate_per_peer_tx_stats(struct ath10k *ar,
3667 struct ath10k_sta *arsta,
3668 struct ath10k_per_peer_tx_stats *pstats,
3669 s8 legacy_rate_idx)
3670 {
3671 struct rate_info *txrate = &arsta->txrate;
3672 struct ath10k_htt_tx_stats *tx_stats;
3673 int idx, ht_idx, gi, mcs, bw, nss;
3674 unsigned long flags;
3675
3676 if (!arsta->tx_stats)
3677 return;
3678
3679 tx_stats = arsta->tx_stats;
3680 flags = txrate->flags;
3681 gi = test_bit(ATH10K_RATE_INFO_FLAGS_SGI_BIT, &flags);
3682 mcs = ATH10K_HW_MCS_RATE(pstats->ratecode);
3683 bw = txrate->bw;
3684 nss = txrate->nss;
3685 ht_idx = mcs + (nss - 1) * 8;
3686 idx = mcs * 8 + 8 * 10 * (nss - 1);
3687 idx += bw * 2 + gi;
3688
3689 #define STATS_OP_FMT(name) tx_stats->stats[ATH10K_STATS_TYPE_##name]
3690
3691 if (txrate->flags & RATE_INFO_FLAGS_VHT_MCS) {
3692 STATS_OP_FMT(SUCC).vht[0][mcs] += pstats->succ_bytes;
3693 STATS_OP_FMT(SUCC).vht[1][mcs] += pstats->succ_pkts;
3694 STATS_OP_FMT(FAIL).vht[0][mcs] += pstats->failed_bytes;
3695 STATS_OP_FMT(FAIL).vht[1][mcs] += pstats->failed_pkts;
3696 STATS_OP_FMT(RETRY).vht[0][mcs] += pstats->retry_bytes;
3697 STATS_OP_FMT(RETRY).vht[1][mcs] += pstats->retry_pkts;
3698 } else if (txrate->flags & RATE_INFO_FLAGS_MCS) {
3699 STATS_OP_FMT(SUCC).ht[0][ht_idx] += pstats->succ_bytes;
3700 STATS_OP_FMT(SUCC).ht[1][ht_idx] += pstats->succ_pkts;
3701 STATS_OP_FMT(FAIL).ht[0][ht_idx] += pstats->failed_bytes;
3702 STATS_OP_FMT(FAIL).ht[1][ht_idx] += pstats->failed_pkts;
3703 STATS_OP_FMT(RETRY).ht[0][ht_idx] += pstats->retry_bytes;
3704 STATS_OP_FMT(RETRY).ht[1][ht_idx] += pstats->retry_pkts;
3705 } else {
3706 mcs = legacy_rate_idx;
3707
3708 STATS_OP_FMT(SUCC).legacy[0][mcs] += pstats->succ_bytes;
3709 STATS_OP_FMT(SUCC).legacy[1][mcs] += pstats->succ_pkts;
3710 STATS_OP_FMT(FAIL).legacy[0][mcs] += pstats->failed_bytes;
3711 STATS_OP_FMT(FAIL).legacy[1][mcs] += pstats->failed_pkts;
3712 STATS_OP_FMT(RETRY).legacy[0][mcs] += pstats->retry_bytes;
3713 STATS_OP_FMT(RETRY).legacy[1][mcs] += pstats->retry_pkts;
3714 }
3715
3716 if (ATH10K_HW_AMPDU(pstats->flags)) {
3717 tx_stats->ba_fails += ATH10K_HW_BA_FAIL(pstats->flags);
3718
3719 if (txrate->flags & RATE_INFO_FLAGS_MCS) {
3720 STATS_OP_FMT(AMPDU).ht[0][ht_idx] +=
3721 pstats->succ_bytes + pstats->retry_bytes;
3722 STATS_OP_FMT(AMPDU).ht[1][ht_idx] +=
3723 pstats->succ_pkts + pstats->retry_pkts;
3724 } else {
3725 STATS_OP_FMT(AMPDU).vht[0][mcs] +=
3726 pstats->succ_bytes + pstats->retry_bytes;
3727 STATS_OP_FMT(AMPDU).vht[1][mcs] +=
3728 pstats->succ_pkts + pstats->retry_pkts;
3729 }
3730 STATS_OP_FMT(AMPDU).bw[0][bw] +=
3731 pstats->succ_bytes + pstats->retry_bytes;
3732 STATS_OP_FMT(AMPDU).nss[0][nss - 1] +=
3733 pstats->succ_bytes + pstats->retry_bytes;
3734 STATS_OP_FMT(AMPDU).gi[0][gi] +=
3735 pstats->succ_bytes + pstats->retry_bytes;
3736 STATS_OP_FMT(AMPDU).rate_table[0][idx] +=
3737 pstats->succ_bytes + pstats->retry_bytes;
3738 STATS_OP_FMT(AMPDU).bw[1][bw] +=
3739 pstats->succ_pkts + pstats->retry_pkts;
3740 STATS_OP_FMT(AMPDU).nss[1][nss - 1] +=
3741 pstats->succ_pkts + pstats->retry_pkts;
3742 STATS_OP_FMT(AMPDU).gi[1][gi] +=
3743 pstats->succ_pkts + pstats->retry_pkts;
3744 STATS_OP_FMT(AMPDU).rate_table[1][idx] +=
3745 pstats->succ_pkts + pstats->retry_pkts;
3746 } else {
3747 tx_stats->ack_fails +=
3748 ATH10K_HW_BA_FAIL(pstats->flags);
3749 }
3750
3751 STATS_OP_FMT(SUCC).bw[0][bw] += pstats->succ_bytes;
3752 STATS_OP_FMT(SUCC).nss[0][nss - 1] += pstats->succ_bytes;
3753 STATS_OP_FMT(SUCC).gi[0][gi] += pstats->succ_bytes;
3754
3755 STATS_OP_FMT(SUCC).bw[1][bw] += pstats->succ_pkts;
3756 STATS_OP_FMT(SUCC).nss[1][nss - 1] += pstats->succ_pkts;
3757 STATS_OP_FMT(SUCC).gi[1][gi] += pstats->succ_pkts;
3758
3759 STATS_OP_FMT(FAIL).bw[0][bw] += pstats->failed_bytes;
3760 STATS_OP_FMT(FAIL).nss[0][nss - 1] += pstats->failed_bytes;
3761 STATS_OP_FMT(FAIL).gi[0][gi] += pstats->failed_bytes;
3762
3763 STATS_OP_FMT(FAIL).bw[1][bw] += pstats->failed_pkts;
3764 STATS_OP_FMT(FAIL).nss[1][nss - 1] += pstats->failed_pkts;
3765 STATS_OP_FMT(FAIL).gi[1][gi] += pstats->failed_pkts;
3766
3767 STATS_OP_FMT(RETRY).bw[0][bw] += pstats->retry_bytes;
3768 STATS_OP_FMT(RETRY).nss[0][nss - 1] += pstats->retry_bytes;
3769 STATS_OP_FMT(RETRY).gi[0][gi] += pstats->retry_bytes;
3770
3771 STATS_OP_FMT(RETRY).bw[1][bw] += pstats->retry_pkts;
3772 STATS_OP_FMT(RETRY).nss[1][nss - 1] += pstats->retry_pkts;
3773 STATS_OP_FMT(RETRY).gi[1][gi] += pstats->retry_pkts;
3774
3775 if (txrate->flags >= RATE_INFO_FLAGS_MCS) {
3776 STATS_OP_FMT(SUCC).rate_table[0][idx] += pstats->succ_bytes;
3777 STATS_OP_FMT(SUCC).rate_table[1][idx] += pstats->succ_pkts;
3778 STATS_OP_FMT(FAIL).rate_table[0][idx] += pstats->failed_bytes;
3779 STATS_OP_FMT(FAIL).rate_table[1][idx] += pstats->failed_pkts;
3780 STATS_OP_FMT(RETRY).rate_table[0][idx] += pstats->retry_bytes;
3781 STATS_OP_FMT(RETRY).rate_table[1][idx] += pstats->retry_pkts;
3782 }
3783
3784 tx_stats->tx_duration += pstats->duration;
3785 }
3786
3787 static void
ath10k_update_per_peer_tx_stats(struct ath10k * ar,struct ieee80211_sta * sta,struct ath10k_per_peer_tx_stats * peer_stats)3788 ath10k_update_per_peer_tx_stats(struct ath10k *ar,
3789 struct ieee80211_sta *sta,
3790 struct ath10k_per_peer_tx_stats *peer_stats)
3791 {
3792 struct ath10k_sta *arsta = (struct ath10k_sta *)sta->drv_priv;
3793 struct ieee80211_chanctx_conf *conf = NULL;
3794 u8 rate = 0, sgi;
3795 s8 rate_idx = 0;
3796 bool skip_auto_rate;
3797 struct rate_info txrate;
3798
3799 lockdep_assert_held(&ar->data_lock);
3800
3801 txrate.flags = ATH10K_HW_PREAMBLE(peer_stats->ratecode);
3802 txrate.bw = ATH10K_HW_BW(peer_stats->flags);
3803 txrate.nss = ATH10K_HW_NSS(peer_stats->ratecode);
3804 txrate.mcs = ATH10K_HW_MCS_RATE(peer_stats->ratecode);
3805 sgi = ATH10K_HW_GI(peer_stats->flags);
3806 skip_auto_rate = ATH10K_FW_SKIPPED_RATE_CTRL(peer_stats->flags);
3807
3808 /* Firmware's rate control skips broadcast/management frames,
3809 * if host has configure fixed rates and in some other special cases.
3810 */
3811 if (skip_auto_rate)
3812 return;
3813
3814 if (txrate.flags == WMI_RATE_PREAMBLE_VHT && txrate.mcs > 9) {
3815 ath10k_warn(ar, "Invalid VHT mcs %d peer stats", txrate.mcs);
3816 return;
3817 }
3818
3819 if (txrate.flags == WMI_RATE_PREAMBLE_HT &&
3820 (txrate.mcs > 7 || txrate.nss < 1)) {
3821 ath10k_warn(ar, "Invalid HT mcs %d nss %d peer stats",
3822 txrate.mcs, txrate.nss);
3823 return;
3824 }
3825
3826 memset(&arsta->txrate, 0, sizeof(arsta->txrate));
3827 memset(&arsta->tx_info.status, 0, sizeof(arsta->tx_info.status));
3828 if (txrate.flags == WMI_RATE_PREAMBLE_CCK ||
3829 txrate.flags == WMI_RATE_PREAMBLE_OFDM) {
3830 rate = ATH10K_HW_LEGACY_RATE(peer_stats->ratecode);
3831 /* This is hacky, FW sends CCK rate 5.5Mbps as 6 */
3832 if (rate == 6 && txrate.flags == WMI_RATE_PREAMBLE_CCK)
3833 rate = 5;
3834 rate_idx = ath10k_get_legacy_rate_idx(ar, rate);
3835 if (rate_idx < 0)
3836 return;
3837 arsta->txrate.legacy = rate;
3838 } else if (txrate.flags == WMI_RATE_PREAMBLE_HT) {
3839 arsta->txrate.flags = RATE_INFO_FLAGS_MCS;
3840 arsta->txrate.mcs = txrate.mcs + 8 * (txrate.nss - 1);
3841 } else {
3842 arsta->txrate.flags = RATE_INFO_FLAGS_VHT_MCS;
3843 arsta->txrate.mcs = txrate.mcs;
3844 }
3845
3846 switch (txrate.flags) {
3847 case WMI_RATE_PREAMBLE_OFDM:
3848 if (arsta->arvif && arsta->arvif->vif)
3849 conf = rcu_dereference(arsta->arvif->vif->bss_conf.chanctx_conf);
3850 if (conf && conf->def.chan->band == NL80211_BAND_5GHZ)
3851 arsta->tx_info.status.rates[0].idx = rate_idx - 4;
3852 break;
3853 case WMI_RATE_PREAMBLE_CCK:
3854 arsta->tx_info.status.rates[0].idx = rate_idx;
3855 if (sgi)
3856 arsta->tx_info.status.rates[0].flags |=
3857 (IEEE80211_TX_RC_USE_SHORT_PREAMBLE |
3858 IEEE80211_TX_RC_SHORT_GI);
3859 break;
3860 case WMI_RATE_PREAMBLE_HT:
3861 arsta->tx_info.status.rates[0].idx =
3862 txrate.mcs + ((txrate.nss - 1) * 8);
3863 if (sgi)
3864 arsta->tx_info.status.rates[0].flags |=
3865 IEEE80211_TX_RC_SHORT_GI;
3866 arsta->tx_info.status.rates[0].flags |= IEEE80211_TX_RC_MCS;
3867 break;
3868 case WMI_RATE_PREAMBLE_VHT:
3869 ieee80211_rate_set_vht(&arsta->tx_info.status.rates[0],
3870 txrate.mcs, txrate.nss);
3871 if (sgi)
3872 arsta->tx_info.status.rates[0].flags |=
3873 IEEE80211_TX_RC_SHORT_GI;
3874 arsta->tx_info.status.rates[0].flags |= IEEE80211_TX_RC_VHT_MCS;
3875 break;
3876 }
3877
3878 arsta->txrate.nss = txrate.nss;
3879 arsta->txrate.bw = ath10k_bw_to_mac80211_bw(txrate.bw);
3880 arsta->last_tx_bitrate = cfg80211_calculate_bitrate(&arsta->txrate);
3881 if (sgi)
3882 arsta->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI;
3883
3884 switch (arsta->txrate.bw) {
3885 case RATE_INFO_BW_40:
3886 arsta->tx_info.status.rates[0].flags |=
3887 IEEE80211_TX_RC_40_MHZ_WIDTH;
3888 break;
3889 case RATE_INFO_BW_80:
3890 arsta->tx_info.status.rates[0].flags |=
3891 IEEE80211_TX_RC_80_MHZ_WIDTH;
3892 break;
3893 case RATE_INFO_BW_160:
3894 arsta->tx_info.status.rates[0].flags |=
3895 IEEE80211_TX_RC_160_MHZ_WIDTH;
3896 break;
3897 }
3898
3899 if (peer_stats->succ_pkts) {
3900 arsta->tx_info.flags = IEEE80211_TX_STAT_ACK;
3901 arsta->tx_info.status.rates[0].count = 1;
3902 ieee80211_tx_rate_update(ar->hw, sta, &arsta->tx_info);
3903 }
3904
3905 if (ar->htt.disable_tx_comp) {
3906 arsta->tx_failed += peer_stats->failed_pkts;
3907 ath10k_dbg(ar, ATH10K_DBG_HTT, "tx failed %d\n",
3908 arsta->tx_failed);
3909 }
3910
3911 arsta->tx_retries += peer_stats->retry_pkts;
3912 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx retries %d", arsta->tx_retries);
3913
3914 if (ath10k_debug_is_extd_tx_stats_enabled(ar))
3915 ath10k_accumulate_per_peer_tx_stats(ar, arsta, peer_stats,
3916 rate_idx);
3917 }
3918
ath10k_htt_fetch_peer_stats(struct ath10k * ar,struct sk_buff * skb)3919 static void ath10k_htt_fetch_peer_stats(struct ath10k *ar,
3920 struct sk_buff *skb)
3921 {
3922 struct htt_resp *resp = (struct htt_resp *)skb->data;
3923 struct ath10k_per_peer_tx_stats *p_tx_stats = &ar->peer_tx_stats;
3924 struct htt_per_peer_tx_stats_ind *tx_stats;
3925 struct ieee80211_sta *sta;
3926 struct ath10k_peer *peer;
3927 int peer_id, i;
3928 u8 ppdu_len, num_ppdu;
3929
3930 num_ppdu = resp->peer_tx_stats.num_ppdu;
3931 ppdu_len = resp->peer_tx_stats.ppdu_len * sizeof(__le32);
3932
3933 if (skb->len < sizeof(struct htt_resp_hdr) + num_ppdu * ppdu_len) {
3934 ath10k_warn(ar, "Invalid peer stats buf length %d\n", skb->len);
3935 return;
3936 }
3937
3938 tx_stats = (struct htt_per_peer_tx_stats_ind *)
3939 (resp->peer_tx_stats.payload);
3940 peer_id = __le16_to_cpu(tx_stats->peer_id);
3941
3942 rcu_read_lock();
3943 spin_lock_bh(&ar->data_lock);
3944 peer = ath10k_peer_find_by_id(ar, peer_id);
3945 if (!peer || !peer->sta) {
3946 ath10k_warn(ar, "Invalid peer id %d peer stats buffer\n",
3947 peer_id);
3948 goto out;
3949 }
3950
3951 sta = peer->sta;
3952 for (i = 0; i < num_ppdu; i++) {
3953 tx_stats = (struct htt_per_peer_tx_stats_ind *)
3954 (resp->peer_tx_stats.payload + i * ppdu_len);
3955
3956 p_tx_stats->succ_bytes = __le32_to_cpu(tx_stats->succ_bytes);
3957 p_tx_stats->retry_bytes = __le32_to_cpu(tx_stats->retry_bytes);
3958 p_tx_stats->failed_bytes =
3959 __le32_to_cpu(tx_stats->failed_bytes);
3960 p_tx_stats->ratecode = tx_stats->ratecode;
3961 p_tx_stats->flags = tx_stats->flags;
3962 p_tx_stats->succ_pkts = __le16_to_cpu(tx_stats->succ_pkts);
3963 p_tx_stats->retry_pkts = __le16_to_cpu(tx_stats->retry_pkts);
3964 p_tx_stats->failed_pkts = __le16_to_cpu(tx_stats->failed_pkts);
3965 p_tx_stats->duration = __le16_to_cpu(tx_stats->tx_duration);
3966
3967 ath10k_update_per_peer_tx_stats(ar, sta, p_tx_stats);
3968 }
3969
3970 out:
3971 spin_unlock_bh(&ar->data_lock);
3972 rcu_read_unlock();
3973 }
3974
ath10k_fetch_10_2_tx_stats(struct ath10k * ar,u8 * data)3975 static void ath10k_fetch_10_2_tx_stats(struct ath10k *ar, u8 *data)
3976 {
3977 struct ath10k_pktlog_hdr *hdr = (struct ath10k_pktlog_hdr *)data;
3978 struct ath10k_per_peer_tx_stats *p_tx_stats = &ar->peer_tx_stats;
3979 struct ath10k_10_2_peer_tx_stats *tx_stats;
3980 struct ieee80211_sta *sta;
3981 struct ath10k_peer *peer;
3982 u16 log_type = __le16_to_cpu(hdr->log_type);
3983 u32 peer_id = 0, i;
3984
3985 if (log_type != ATH_PKTLOG_TYPE_TX_STAT)
3986 return;
3987
3988 tx_stats = (struct ath10k_10_2_peer_tx_stats *)((hdr->payload) +
3989 ATH10K_10_2_TX_STATS_OFFSET);
3990
3991 if (!tx_stats->tx_ppdu_cnt)
3992 return;
3993
3994 peer_id = tx_stats->peer_id;
3995
3996 rcu_read_lock();
3997 spin_lock_bh(&ar->data_lock);
3998 peer = ath10k_peer_find_by_id(ar, peer_id);
3999 if (!peer || !peer->sta) {
4000 ath10k_warn(ar, "Invalid peer id %d in peer stats buffer\n",
4001 peer_id);
4002 goto out;
4003 }
4004
4005 sta = peer->sta;
4006 for (i = 0; i < tx_stats->tx_ppdu_cnt; i++) {
4007 p_tx_stats->succ_bytes =
4008 __le16_to_cpu(tx_stats->success_bytes[i]);
4009 p_tx_stats->retry_bytes =
4010 __le16_to_cpu(tx_stats->retry_bytes[i]);
4011 p_tx_stats->failed_bytes =
4012 __le16_to_cpu(tx_stats->failed_bytes[i]);
4013 p_tx_stats->ratecode = tx_stats->ratecode[i];
4014 p_tx_stats->flags = tx_stats->flags[i];
4015 p_tx_stats->succ_pkts = tx_stats->success_pkts[i];
4016 p_tx_stats->retry_pkts = tx_stats->retry_pkts[i];
4017 p_tx_stats->failed_pkts = tx_stats->failed_pkts[i];
4018
4019 ath10k_update_per_peer_tx_stats(ar, sta, p_tx_stats);
4020 }
4021 spin_unlock_bh(&ar->data_lock);
4022 rcu_read_unlock();
4023
4024 return;
4025
4026 out:
4027 spin_unlock_bh(&ar->data_lock);
4028 rcu_read_unlock();
4029 }
4030
ath10k_htt_rx_pn_len(enum htt_security_types sec_type)4031 static int ath10k_htt_rx_pn_len(enum htt_security_types sec_type)
4032 {
4033 switch (sec_type) {
4034 case HTT_SECURITY_TKIP:
4035 case HTT_SECURITY_TKIP_NOMIC:
4036 case HTT_SECURITY_AES_CCMP:
4037 return 48;
4038 default:
4039 return 0;
4040 }
4041 }
4042
ath10k_htt_rx_sec_ind_handler(struct ath10k * ar,struct htt_security_indication * ev)4043 static void ath10k_htt_rx_sec_ind_handler(struct ath10k *ar,
4044 struct htt_security_indication *ev)
4045 {
4046 enum htt_txrx_sec_cast_type sec_index;
4047 enum htt_security_types sec_type;
4048 struct ath10k_peer *peer;
4049
4050 spin_lock_bh(&ar->data_lock);
4051
4052 peer = ath10k_peer_find_by_id(ar, __le16_to_cpu(ev->peer_id));
4053 if (!peer) {
4054 ath10k_warn(ar, "failed to find peer id %d for security indication",
4055 __le16_to_cpu(ev->peer_id));
4056 goto out;
4057 }
4058
4059 sec_type = MS(ev->flags, HTT_SECURITY_TYPE);
4060
4061 if (ev->flags & HTT_SECURITY_IS_UNICAST)
4062 sec_index = HTT_TXRX_SEC_UCAST;
4063 else
4064 sec_index = HTT_TXRX_SEC_MCAST;
4065
4066 peer->rx_pn[sec_index].sec_type = sec_type;
4067 peer->rx_pn[sec_index].pn_len = ath10k_htt_rx_pn_len(sec_type);
4068
4069 memset(peer->tids_last_pn_valid, 0, sizeof(peer->tids_last_pn_valid));
4070 memset(peer->tids_last_pn, 0, sizeof(peer->tids_last_pn));
4071
4072 out:
4073 spin_unlock_bh(&ar->data_lock);
4074 }
4075
ath10k_htt_t2h_msg_handler(struct ath10k * ar,struct sk_buff * skb)4076 bool ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
4077 {
4078 struct ath10k_htt *htt = &ar->htt;
4079 struct htt_resp *resp = (struct htt_resp *)skb->data;
4080 enum htt_t2h_msg_type type;
4081
4082 /* confirm alignment */
4083 if (!IS_ALIGNED((unsigned long)skb->data, 4))
4084 ath10k_warn(ar, "unaligned htt message, expect trouble\n");
4085
4086 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, msg_type: 0x%0X\n",
4087 resp->hdr.msg_type);
4088
4089 if (resp->hdr.msg_type >= ar->htt.t2h_msg_types_max) {
4090 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, unsupported msg_type: 0x%0X\n max: 0x%0X",
4091 resp->hdr.msg_type, ar->htt.t2h_msg_types_max);
4092 return true;
4093 }
4094 type = ar->htt.t2h_msg_types[resp->hdr.msg_type];
4095
4096 switch (type) {
4097 case HTT_T2H_MSG_TYPE_VERSION_CONF: {
4098 htt->target_version_major = resp->ver_resp.major;
4099 htt->target_version_minor = resp->ver_resp.minor;
4100 complete(&htt->target_version_received);
4101 break;
4102 }
4103 case HTT_T2H_MSG_TYPE_RX_IND:
4104 if (ar->bus_param.dev_type != ATH10K_DEV_TYPE_HL) {
4105 ath10k_htt_rx_proc_rx_ind_ll(htt, &resp->rx_ind);
4106 } else {
4107 skb_queue_tail(&htt->rx_indication_head, skb);
4108 return false;
4109 }
4110 break;
4111 case HTT_T2H_MSG_TYPE_PEER_MAP: {
4112 struct htt_peer_map_event ev = {
4113 .vdev_id = resp->peer_map.vdev_id,
4114 .peer_id = __le16_to_cpu(resp->peer_map.peer_id),
4115 };
4116 memcpy(ev.addr, resp->peer_map.addr, sizeof(ev.addr));
4117 ath10k_peer_map_event(htt, &ev);
4118 break;
4119 }
4120 case HTT_T2H_MSG_TYPE_PEER_UNMAP: {
4121 struct htt_peer_unmap_event ev = {
4122 .peer_id = __le16_to_cpu(resp->peer_unmap.peer_id),
4123 };
4124 ath10k_peer_unmap_event(htt, &ev);
4125 break;
4126 }
4127 case HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION: {
4128 struct htt_tx_done tx_done = {};
4129 struct ath10k_htt *htt = &ar->htt;
4130 struct ath10k_htc *htc = &ar->htc;
4131 struct ath10k_htc_ep *ep = &ar->htc.endpoint[htt->eid];
4132 int status = __le32_to_cpu(resp->mgmt_tx_completion.status);
4133 int info = __le32_to_cpu(resp->mgmt_tx_completion.info);
4134
4135 tx_done.msdu_id = __le32_to_cpu(resp->mgmt_tx_completion.desc_id);
4136
4137 switch (status) {
4138 case HTT_MGMT_TX_STATUS_OK:
4139 tx_done.status = HTT_TX_COMPL_STATE_ACK;
4140 if (test_bit(WMI_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS,
4141 ar->wmi.svc_map) &&
4142 (resp->mgmt_tx_completion.flags &
4143 HTT_MGMT_TX_CMPL_FLAG_ACK_RSSI)) {
4144 tx_done.ack_rssi =
4145 FIELD_GET(HTT_MGMT_TX_CMPL_INFO_ACK_RSSI_MASK,
4146 info);
4147 }
4148 break;
4149 case HTT_MGMT_TX_STATUS_RETRY:
4150 tx_done.status = HTT_TX_COMPL_STATE_NOACK;
4151 break;
4152 case HTT_MGMT_TX_STATUS_DROP:
4153 tx_done.status = HTT_TX_COMPL_STATE_DISCARD;
4154 break;
4155 }
4156
4157 if (htt->disable_tx_comp) {
4158 spin_lock_bh(&htc->tx_lock);
4159 ep->tx_credits++;
4160 spin_unlock_bh(&htc->tx_lock);
4161 }
4162
4163 status = ath10k_txrx_tx_unref(htt, &tx_done);
4164 if (!status) {
4165 spin_lock_bh(&htt->tx_lock);
4166 ath10k_htt_tx_mgmt_dec_pending(htt);
4167 spin_unlock_bh(&htt->tx_lock);
4168 }
4169 break;
4170 }
4171 case HTT_T2H_MSG_TYPE_TX_COMPL_IND:
4172 ath10k_htt_rx_tx_compl_ind(htt->ar, skb);
4173 break;
4174 case HTT_T2H_MSG_TYPE_SEC_IND: {
4175 struct ath10k *ar = htt->ar;
4176 struct htt_security_indication *ev = &resp->security_indication;
4177
4178 ath10k_htt_rx_sec_ind_handler(ar, ev);
4179 ath10k_dbg(ar, ATH10K_DBG_HTT,
4180 "sec ind peer_id %d unicast %d type %d\n",
4181 __le16_to_cpu(ev->peer_id),
4182 !!(ev->flags & HTT_SECURITY_IS_UNICAST),
4183 MS(ev->flags, HTT_SECURITY_TYPE));
4184 complete(&ar->install_key_done);
4185 break;
4186 }
4187 case HTT_T2H_MSG_TYPE_RX_FRAG_IND: {
4188 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
4189 skb->data, skb->len);
4190 atomic_inc(&htt->num_mpdus_ready);
4191
4192 return ath10k_htt_rx_proc_rx_frag_ind(htt,
4193 &resp->rx_frag_ind,
4194 skb);
4195 }
4196 case HTT_T2H_MSG_TYPE_TEST:
4197 break;
4198 case HTT_T2H_MSG_TYPE_STATS_CONF:
4199 trace_ath10k_htt_stats(ar, skb->data, skb->len);
4200 break;
4201 case HTT_T2H_MSG_TYPE_TX_INSPECT_IND:
4202 /* Firmware can return tx frames if it's unable to fully
4203 * process them and suspects host may be able to fix it. ath10k
4204 * sends all tx frames as already inspected so this shouldn't
4205 * happen unless fw has a bug.
4206 */
4207 ath10k_warn(ar, "received an unexpected htt tx inspect event\n");
4208 break;
4209 case HTT_T2H_MSG_TYPE_RX_ADDBA:
4210 ath10k_htt_rx_addba(ar, resp);
4211 break;
4212 case HTT_T2H_MSG_TYPE_RX_DELBA:
4213 ath10k_htt_rx_delba(ar, resp);
4214 break;
4215 case HTT_T2H_MSG_TYPE_PKTLOG: {
4216 trace_ath10k_htt_pktlog(ar, resp->pktlog_msg.payload,
4217 skb->len -
4218 offsetof(struct htt_resp,
4219 pktlog_msg.payload));
4220
4221 if (ath10k_peer_stats_enabled(ar))
4222 ath10k_fetch_10_2_tx_stats(ar,
4223 resp->pktlog_msg.payload);
4224 break;
4225 }
4226 case HTT_T2H_MSG_TYPE_RX_FLUSH: {
4227 /* Ignore this event because mac80211 takes care of Rx
4228 * aggregation reordering.
4229 */
4230 break;
4231 }
4232 case HTT_T2H_MSG_TYPE_RX_IN_ORD_PADDR_IND: {
4233 skb_queue_tail(&htt->rx_in_ord_compl_q, skb);
4234 return false;
4235 }
4236 case HTT_T2H_MSG_TYPE_TX_CREDIT_UPDATE_IND: {
4237 struct ath10k_htt *htt = &ar->htt;
4238 struct ath10k_htc *htc = &ar->htc;
4239 struct ath10k_htc_ep *ep = &ar->htc.endpoint[htt->eid];
4240 u32 msg_word = __le32_to_cpu(*(__le32 *)resp);
4241 int htt_credit_delta;
4242
4243 htt_credit_delta = HTT_TX_CREDIT_DELTA_ABS_GET(msg_word);
4244 if (HTT_TX_CREDIT_SIGN_BIT_GET(msg_word))
4245 htt_credit_delta = -htt_credit_delta;
4246
4247 ath10k_dbg(ar, ATH10K_DBG_HTT,
4248 "htt credit update delta %d\n",
4249 htt_credit_delta);
4250
4251 if (htt->disable_tx_comp) {
4252 spin_lock_bh(&htc->tx_lock);
4253 ep->tx_credits += htt_credit_delta;
4254 spin_unlock_bh(&htc->tx_lock);
4255 ath10k_dbg(ar, ATH10K_DBG_HTT,
4256 "htt credit total %d\n",
4257 ep->tx_credits);
4258 ep->ep_ops.ep_tx_credits(htc->ar);
4259 }
4260 break;
4261 }
4262 case HTT_T2H_MSG_TYPE_CHAN_CHANGE: {
4263 u32 phymode = __le32_to_cpu(resp->chan_change.phymode);
4264 u32 freq = __le32_to_cpu(resp->chan_change.freq);
4265
4266 ar->tgt_oper_chan = ieee80211_get_channel(ar->hw->wiphy, freq);
4267 ath10k_dbg(ar, ATH10K_DBG_HTT,
4268 "htt chan change freq %u phymode %s\n",
4269 freq, ath10k_wmi_phymode_str(phymode));
4270 break;
4271 }
4272 case HTT_T2H_MSG_TYPE_AGGR_CONF:
4273 break;
4274 case HTT_T2H_MSG_TYPE_TX_FETCH_IND: {
4275 struct sk_buff *tx_fetch_ind = skb_copy(skb, GFP_ATOMIC);
4276
4277 if (!tx_fetch_ind) {
4278 ath10k_warn(ar, "failed to copy htt tx fetch ind\n");
4279 break;
4280 }
4281 skb_queue_tail(&htt->tx_fetch_ind_q, tx_fetch_ind);
4282 break;
4283 }
4284 case HTT_T2H_MSG_TYPE_TX_FETCH_CONFIRM:
4285 ath10k_htt_rx_tx_fetch_confirm(ar, skb);
4286 break;
4287 case HTT_T2H_MSG_TYPE_TX_MODE_SWITCH_IND:
4288 ath10k_htt_rx_tx_mode_switch_ind(ar, skb);
4289 break;
4290 case HTT_T2H_MSG_TYPE_PEER_STATS:
4291 ath10k_htt_fetch_peer_stats(ar, skb);
4292 break;
4293 case HTT_T2H_MSG_TYPE_EN_STATS:
4294 default:
4295 ath10k_warn(ar, "htt event (%d) not handled\n",
4296 resp->hdr.msg_type);
4297 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
4298 skb->data, skb->len);
4299 break;
4300 }
4301 return true;
4302 }
4303 EXPORT_SYMBOL(ath10k_htt_t2h_msg_handler);
4304
ath10k_htt_rx_pktlog_completion_handler(struct ath10k * ar,struct sk_buff * skb)4305 void ath10k_htt_rx_pktlog_completion_handler(struct ath10k *ar,
4306 struct sk_buff *skb)
4307 {
4308 trace_ath10k_htt_pktlog(ar, skb->data, skb->len);
4309 dev_kfree_skb_any(skb);
4310 }
4311 EXPORT_SYMBOL(ath10k_htt_rx_pktlog_completion_handler);
4312
ath10k_htt_rx_deliver_msdu(struct ath10k * ar,int quota,int budget)4313 static int ath10k_htt_rx_deliver_msdu(struct ath10k *ar, int quota, int budget)
4314 {
4315 struct sk_buff *skb;
4316
4317 while (quota < budget) {
4318 if (skb_queue_empty(&ar->htt.rx_msdus_q))
4319 break;
4320
4321 skb = skb_dequeue(&ar->htt.rx_msdus_q);
4322 if (!skb)
4323 break;
4324 ath10k_process_rx(ar, skb);
4325 quota++;
4326 }
4327
4328 return quota;
4329 }
4330
ath10k_htt_rx_hl_indication(struct ath10k * ar,int budget)4331 int ath10k_htt_rx_hl_indication(struct ath10k *ar, int budget)
4332 {
4333 struct htt_resp *resp;
4334 struct ath10k_htt *htt = &ar->htt;
4335 struct sk_buff *skb;
4336 bool release;
4337 int quota;
4338
4339 for (quota = 0; quota < budget; quota++) {
4340 skb = skb_dequeue(&htt->rx_indication_head);
4341 if (!skb)
4342 break;
4343
4344 resp = (struct htt_resp *)skb->data;
4345
4346 release = ath10k_htt_rx_proc_rx_ind_hl(htt,
4347 &resp->rx_ind_hl,
4348 skb,
4349 HTT_RX_PN_CHECK,
4350 HTT_RX_NON_TKIP_MIC);
4351
4352 if (release)
4353 dev_kfree_skb_any(skb);
4354
4355 ath10k_dbg(ar, ATH10K_DBG_HTT, "rx indication poll pending count:%d\n",
4356 skb_queue_len(&htt->rx_indication_head));
4357 }
4358 return quota;
4359 }
4360 EXPORT_SYMBOL(ath10k_htt_rx_hl_indication);
4361
ath10k_htt_txrx_compl_task(struct ath10k * ar,int budget)4362 int ath10k_htt_txrx_compl_task(struct ath10k *ar, int budget)
4363 {
4364 struct ath10k_htt *htt = &ar->htt;
4365 struct htt_tx_done tx_done = {};
4366 struct sk_buff_head tx_ind_q;
4367 struct sk_buff *skb;
4368 unsigned long flags;
4369 int quota = 0, done, ret;
4370 bool resched_napi = false;
4371
4372 __skb_queue_head_init(&tx_ind_q);
4373
4374 /* Process pending frames before dequeuing more data
4375 * from hardware.
4376 */
4377 quota = ath10k_htt_rx_deliver_msdu(ar, quota, budget);
4378 if (quota == budget) {
4379 resched_napi = true;
4380 goto exit;
4381 }
4382
4383 while ((skb = skb_dequeue(&htt->rx_in_ord_compl_q))) {
4384 spin_lock_bh(&htt->rx_ring.lock);
4385 ret = ath10k_htt_rx_in_ord_ind(ar, skb);
4386 spin_unlock_bh(&htt->rx_ring.lock);
4387
4388 dev_kfree_skb_any(skb);
4389 if (ret == -EIO) {
4390 resched_napi = true;
4391 goto exit;
4392 }
4393 }
4394
4395 while (atomic_read(&htt->num_mpdus_ready)) {
4396 ret = ath10k_htt_rx_handle_amsdu(htt);
4397 if (ret == -EIO) {
4398 resched_napi = true;
4399 goto exit;
4400 }
4401 atomic_dec(&htt->num_mpdus_ready);
4402 }
4403
4404 /* Deliver received data after processing data from hardware */
4405 quota = ath10k_htt_rx_deliver_msdu(ar, quota, budget);
4406
4407 /* From NAPI documentation:
4408 * The napi poll() function may also process TX completions, in which
4409 * case if it processes the entire TX ring then it should count that
4410 * work as the rest of the budget.
4411 */
4412 if ((quota < budget) && !kfifo_is_empty(&htt->txdone_fifo))
4413 quota = budget;
4414
4415 /* kfifo_get: called only within txrx_tasklet so it's neatly serialized.
4416 * From kfifo_get() documentation:
4417 * Note that with only one concurrent reader and one concurrent writer,
4418 * you don't need extra locking to use these macro.
4419 */
4420 while (kfifo_get(&htt->txdone_fifo, &tx_done))
4421 ath10k_txrx_tx_unref(htt, &tx_done);
4422
4423 ath10k_mac_tx_push_pending(ar);
4424
4425 spin_lock_irqsave(&htt->tx_fetch_ind_q.lock, flags);
4426 skb_queue_splice_init(&htt->tx_fetch_ind_q, &tx_ind_q);
4427 spin_unlock_irqrestore(&htt->tx_fetch_ind_q.lock, flags);
4428
4429 while ((skb = __skb_dequeue(&tx_ind_q))) {
4430 ath10k_htt_rx_tx_fetch_ind(ar, skb);
4431 dev_kfree_skb_any(skb);
4432 }
4433
4434 exit:
4435 ath10k_htt_rx_msdu_buff_replenish(htt);
4436 /* In case of rx failure or more data to read, report budget
4437 * to reschedule NAPI poll
4438 */
4439 done = resched_napi ? budget : quota;
4440
4441 return done;
4442 }
4443 EXPORT_SYMBOL(ath10k_htt_txrx_compl_task);
4444
4445 static const struct ath10k_htt_rx_ops htt_rx_ops_32 = {
4446 .htt_get_rx_ring_size = ath10k_htt_get_rx_ring_size_32,
4447 .htt_config_paddrs_ring = ath10k_htt_config_paddrs_ring_32,
4448 .htt_set_paddrs_ring = ath10k_htt_set_paddrs_ring_32,
4449 .htt_get_vaddr_ring = ath10k_htt_get_vaddr_ring_32,
4450 .htt_reset_paddrs_ring = ath10k_htt_reset_paddrs_ring_32,
4451 };
4452
4453 static const struct ath10k_htt_rx_ops htt_rx_ops_64 = {
4454 .htt_get_rx_ring_size = ath10k_htt_get_rx_ring_size_64,
4455 .htt_config_paddrs_ring = ath10k_htt_config_paddrs_ring_64,
4456 .htt_set_paddrs_ring = ath10k_htt_set_paddrs_ring_64,
4457 .htt_get_vaddr_ring = ath10k_htt_get_vaddr_ring_64,
4458 .htt_reset_paddrs_ring = ath10k_htt_reset_paddrs_ring_64,
4459 };
4460
4461 static const struct ath10k_htt_rx_ops htt_rx_ops_hl = {
4462 .htt_rx_proc_rx_frag_ind = ath10k_htt_rx_proc_rx_frag_ind_hl,
4463 };
4464
ath10k_htt_set_rx_ops(struct ath10k_htt * htt)4465 void ath10k_htt_set_rx_ops(struct ath10k_htt *htt)
4466 {
4467 struct ath10k *ar = htt->ar;
4468
4469 if (ar->bus_param.dev_type == ATH10K_DEV_TYPE_HL)
4470 htt->rx_ops = &htt_rx_ops_hl;
4471 else if (ar->hw_params.target_64bit)
4472 htt->rx_ops = &htt_rx_ops_64;
4473 else
4474 htt->rx_ops = &htt_rx_ops_32;
4475 }
4476