1 #ifndef _ASM_X86_ALTERNATIVE_H
2 #define _ASM_X86_ALTERNATIVE_H
3
4 #include <linux/types.h>
5 #include <linux/stddef.h>
6 #include <linux/stringify.h>
7 #include <linux/jump_label.h>
8 #include <asm/asm.h>
9
10 /*
11 * Alternative inline assembly for SMP.
12 *
13 * The LOCK_PREFIX macro defined here replaces the LOCK and
14 * LOCK_PREFIX macros used everywhere in the source tree.
15 *
16 * SMP alternatives use the same data structures as the other
17 * alternatives and the X86_FEATURE_UP flag to indicate the case of a
18 * UP system running a SMP kernel. The existing apply_alternatives()
19 * works fine for patching a SMP kernel for UP.
20 *
21 * The SMP alternative tables can be kept after boot and contain both
22 * UP and SMP versions of the instructions to allow switching back to
23 * SMP at runtime, when hotplugging in a new CPU, which is especially
24 * useful in virtualized environments.
25 *
26 * The very common lock prefix is handled as special case in a
27 * separate table which is a pure address list without replacement ptr
28 * and size information. That keeps the table sizes small.
29 */
30
31 #ifdef CONFIG_SMP
32 #define LOCK_PREFIX_HERE \
33 ".section .smp_locks,\"a\"\n" \
34 ".balign 4\n" \
35 ".long 671f - .\n" /* offset */ \
36 ".previous\n" \
37 "671:"
38
39 #define LOCK_PREFIX LOCK_PREFIX_HERE "\n\tlock; "
40
41 #else /* ! CONFIG_SMP */
42 #define LOCK_PREFIX_HERE ""
43 #define LOCK_PREFIX ""
44 #endif
45
46 struct alt_instr {
47 u8 *instr; /* original instruction */
48 u8 *replacement;
49 u16 cpuid; /* cpuid bit set for replacement */
50 u8 instrlen; /* length of original instruction */
51 u8 replacementlen; /* length of new instruction, <= instrlen */
52 #ifdef CONFIG_X86_64
53 u32 pad2;
54 #endif
55 };
56
57 extern void alternative_instructions(void);
58 extern void apply_alternatives(struct alt_instr *start, struct alt_instr *end);
59
60 struct module;
61
62 #ifdef CONFIG_SMP
63 extern void alternatives_smp_module_add(struct module *mod, char *name,
64 void *locks, void *locks_end,
65 void *text, void *text_end);
66 extern void alternatives_smp_module_del(struct module *mod);
67 extern void alternatives_smp_switch(int smp);
68 extern int alternatives_text_reserved(void *start, void *end);
69 extern bool skip_smp_alternatives;
70 #else
alternatives_smp_module_add(struct module * mod,char * name,void * locks,void * locks_end,void * text,void * text_end)71 static inline void alternatives_smp_module_add(struct module *mod, char *name,
72 void *locks, void *locks_end,
73 void *text, void *text_end) {}
alternatives_smp_module_del(struct module * mod)74 static inline void alternatives_smp_module_del(struct module *mod) {}
alternatives_smp_switch(int smp)75 static inline void alternatives_smp_switch(int smp) {}
alternatives_text_reserved(void * start,void * end)76 static inline int alternatives_text_reserved(void *start, void *end)
77 {
78 return 0;
79 }
80 #endif /* CONFIG_SMP */
81
82 /* alternative assembly primitive: */
83 #define ALTERNATIVE(oldinstr, newinstr, feature) \
84 \
85 "661:\n\t" oldinstr "\n662:\n" \
86 ".section .altinstructions,\"a\"\n" \
87 _ASM_ALIGN "\n" \
88 _ASM_PTR "661b\n" /* label */ \
89 _ASM_PTR "663f\n" /* new instruction */ \
90 " .word " __stringify(feature) "\n" /* feature bit */ \
91 " .byte 662b-661b\n" /* sourcelen */ \
92 " .byte 664f-663f\n" /* replacementlen */ \
93 ".previous\n" \
94 ".section .discard,\"aw\",@progbits\n" \
95 " .byte 0xff + (664f-663f) - (662b-661b)\n" /* rlen <= slen */ \
96 ".previous\n" \
97 ".section .altinstr_replacement, \"ax\"\n" \
98 "663:\n\t" newinstr "\n664:\n" /* replacement */ \
99 ".previous"
100
101 /*
102 * This must be included *after* the definition of ALTERNATIVE due to
103 * <asm/arch_hweight.h>
104 */
105 #include <asm/cpufeature.h>
106
107 /*
108 * Alternative instructions for different CPU types or capabilities.
109 *
110 * This allows to use optimized instructions even on generic binary
111 * kernels.
112 *
113 * length of oldinstr must be longer or equal the length of newinstr
114 * It can be padded with nops as needed.
115 *
116 * For non barrier like inlines please define new variants
117 * without volatile and memory clobber.
118 */
119 #define alternative(oldinstr, newinstr, feature) \
120 asm volatile (ALTERNATIVE(oldinstr, newinstr, feature) : : : "memory")
121
122 /*
123 * Alternative inline assembly with input.
124 *
125 * Pecularities:
126 * No memory clobber here.
127 * Argument numbers start with 1.
128 * Best is to use constraints that are fixed size (like (%1) ... "r")
129 * If you use variable sized constraints like "m" or "g" in the
130 * replacement make sure to pad to the worst case length.
131 * Leaving an unused argument 0 to keep API compatibility.
132 */
133 #define alternative_input(oldinstr, newinstr, feature, input...) \
134 asm volatile (ALTERNATIVE(oldinstr, newinstr, feature) \
135 : : "i" (0), ## input)
136
137 /* Like alternative_input, but with a single output argument */
138 #define alternative_io(oldinstr, newinstr, feature, output, input...) \
139 asm volatile (ALTERNATIVE(oldinstr, newinstr, feature) \
140 : output : "i" (0), ## input)
141
142 /* Like alternative_io, but for replacing a direct call with another one. */
143 #define alternative_call(oldfunc, newfunc, feature, output, input...) \
144 asm volatile (ALTERNATIVE("call %P[old]", "call %P[new]", feature) \
145 : output : [old] "i" (oldfunc), [new] "i" (newfunc), ## input)
146
147 /*
148 * use this macro(s) if you need more than one output parameter
149 * in alternative_io
150 */
151 #define ASM_OUTPUT2(a...) a
152
153 struct paravirt_patch_site;
154 #ifdef CONFIG_PARAVIRT
155 void apply_paravirt(struct paravirt_patch_site *start,
156 struct paravirt_patch_site *end);
157 #else
apply_paravirt(struct paravirt_patch_site * start,struct paravirt_patch_site * end)158 static inline void apply_paravirt(struct paravirt_patch_site *start,
159 struct paravirt_patch_site *end)
160 {}
161 #define __parainstructions NULL
162 #define __parainstructions_end NULL
163 #endif
164
165 extern void *text_poke_early(void *addr, const void *opcode, size_t len);
166
167 /*
168 * Clear and restore the kernel write-protection flag on the local CPU.
169 * Allows the kernel to edit read-only pages.
170 * Side-effect: any interrupt handler running between save and restore will have
171 * the ability to write to read-only pages.
172 *
173 * Warning:
174 * Code patching in the UP case is safe if NMIs and MCE handlers are stopped and
175 * no thread can be preempted in the instructions being modified (no iret to an
176 * invalid instruction possible) or if the instructions are changed from a
177 * consistent state to another consistent state atomically.
178 * More care must be taken when modifying code in the SMP case because of
179 * Intel's errata. text_poke_smp() takes care that errata, but still
180 * doesn't support NMI/MCE handler code modifying.
181 * On the local CPU you need to be protected again NMI or MCE handlers seeing an
182 * inconsistent instruction while you patch.
183 */
184 struct text_poke_param {
185 void *addr;
186 const void *opcode;
187 size_t len;
188 };
189
190 extern void *text_poke(void *addr, const void *opcode, size_t len);
191 extern void *text_poke_smp(void *addr, const void *opcode, size_t len);
192 extern void text_poke_smp_batch(struct text_poke_param *params, int n);
193
194 #if defined(CONFIG_DYNAMIC_FTRACE) || defined(HAVE_JUMP_LABEL)
195 #define IDEAL_NOP_SIZE_5 5
196 extern unsigned char ideal_nop5[IDEAL_NOP_SIZE_5];
197 extern void arch_init_ideal_nop5(void);
198 #else
arch_init_ideal_nop5(void)199 static inline void arch_init_ideal_nop5(void) {}
200 #endif
201
202 #endif /* _ASM_X86_ALTERNATIVE_H */
203