1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
2 //
3 // This file is provided under a dual BSD/GPLv2 license. When using or
4 // redistributing this file, you may do so under either license.
5 //
6 // Copyright(c) 2022 Advanced Micro Devices, Inc.
7 //
8 // Authors: Ajit Kumar Pandey <AjitKumar.Pandey@amd.com>
9 // Vijendar Mukunda <Vijendar.Mukunda@amd.com>
10 //
11
12 /*
13 * Generic Hardware interface for ACP Audio PDM controller
14 */
15
16 #include <linux/err.h>
17 #include <linux/io.h>
18 #include <linux/module.h>
19 #include <linux/platform_device.h>
20 #include <sound/pcm_params.h>
21 #include <sound/soc.h>
22 #include <sound/soc-dai.h>
23
24 #include "amd.h"
25
26 #define DRV_NAME "acp-pdm"
27
28 #define PDM_DMA_STAT 0x10
29 #define PDM_DMA_INTR_MASK 0x10000
30 #define PDM_DEC_64 0x2
31 #define PDM_CLK_FREQ_MASK 0x07
32 #define PDM_MISC_CTRL_MASK 0x10
33 #define PDM_ENABLE 0x01
34 #define PDM_DISABLE 0x00
35 #define DMA_EN_MASK 0x02
36 #define DELAY_US 5
37 #define PDM_TIMEOUT 1000
38 #define ACP_REGION2_OFFSET 0x02000000
39
acp_dmic_prepare(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)40 static int acp_dmic_prepare(struct snd_pcm_substream *substream,
41 struct snd_soc_dai *dai)
42 {
43 struct acp_stream *stream = substream->runtime->private_data;
44 struct device *dev = dai->component->dev;
45 struct acp_dev_data *adata = dev_get_drvdata(dev);
46 u32 physical_addr, size_dmic, period_bytes;
47 unsigned int dmic_ctrl;
48
49 /* Enable default DMIC clk */
50 writel(PDM_CLK_FREQ_MASK, adata->acp_base + ACP_WOV_CLK_CTRL);
51 dmic_ctrl = readl(adata->acp_base + ACP_WOV_MISC_CTRL);
52 dmic_ctrl |= PDM_MISC_CTRL_MASK;
53 writel(dmic_ctrl, adata->acp_base + ACP_WOV_MISC_CTRL);
54
55 period_bytes = frames_to_bytes(substream->runtime,
56 substream->runtime->period_size);
57 size_dmic = frames_to_bytes(substream->runtime,
58 substream->runtime->buffer_size);
59
60 physical_addr = stream->reg_offset + MEM_WINDOW_START;
61
62 /* Init DMIC Ring buffer */
63 writel(physical_addr, adata->acp_base + ACP_WOV_RX_RINGBUFADDR);
64 writel(size_dmic, adata->acp_base + ACP_WOV_RX_RINGBUFSIZE);
65 writel(period_bytes, adata->acp_base + ACP_WOV_RX_INTR_WATERMARK_SIZE);
66 writel(0x01, adata->acp_base + ACPAXI2AXI_ATU_CTRL);
67
68 return 0;
69 }
70
acp_dmic_dai_trigger(struct snd_pcm_substream * substream,int cmd,struct snd_soc_dai * dai)71 static int acp_dmic_dai_trigger(struct snd_pcm_substream *substream,
72 int cmd, struct snd_soc_dai *dai)
73 {
74 struct device *dev = dai->component->dev;
75 struct acp_dev_data *adata = dev_get_drvdata(dev);
76 unsigned int dma_enable;
77 int ret = 0;
78
79 switch (cmd) {
80 case SNDRV_PCM_TRIGGER_START:
81 case SNDRV_PCM_TRIGGER_RESUME:
82 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
83 dma_enable = readl(adata->acp_base + ACP_WOV_PDM_DMA_ENABLE);
84 if (!(dma_enable & DMA_EN_MASK)) {
85 writel(PDM_ENABLE, adata->acp_base + ACP_WOV_PDM_ENABLE);
86 writel(PDM_ENABLE, adata->acp_base + ACP_WOV_PDM_DMA_ENABLE);
87 }
88
89 ret = readl_poll_timeout_atomic(adata->acp_base + ACP_WOV_PDM_DMA_ENABLE,
90 dma_enable, (dma_enable & DMA_EN_MASK),
91 DELAY_US, PDM_TIMEOUT);
92 break;
93 case SNDRV_PCM_TRIGGER_STOP:
94 case SNDRV_PCM_TRIGGER_SUSPEND:
95 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
96 dma_enable = readl(adata->acp_base + ACP_WOV_PDM_DMA_ENABLE);
97 if ((dma_enable & DMA_EN_MASK)) {
98 writel(PDM_DISABLE, adata->acp_base + ACP_WOV_PDM_ENABLE);
99 writel(PDM_DISABLE, adata->acp_base + ACP_WOV_PDM_DMA_ENABLE);
100
101 }
102
103 ret = readl_poll_timeout_atomic(adata->acp_base + ACP_WOV_PDM_DMA_ENABLE,
104 dma_enable, !(dma_enable & DMA_EN_MASK),
105 DELAY_US, PDM_TIMEOUT);
106 break;
107 default:
108 ret = -EINVAL;
109 break;
110 }
111
112 return ret;
113 }
114
acp_dmic_hwparams(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * hwparams,struct snd_soc_dai * dai)115 static int acp_dmic_hwparams(struct snd_pcm_substream *substream,
116 struct snd_pcm_hw_params *hwparams, struct snd_soc_dai *dai)
117 {
118 struct device *dev = dai->component->dev;
119 struct acp_dev_data *adata = dev_get_drvdata(dev);
120 unsigned int channels, ch_mask;
121
122 channels = params_channels(hwparams);
123 switch (channels) {
124 case 2:
125 ch_mask = 0;
126 break;
127 case 4:
128 ch_mask = 1;
129 break;
130 case 6:
131 ch_mask = 2;
132 break;
133 default:
134 dev_err(dev, "Invalid channels %d\n", channels);
135 return -EINVAL;
136 }
137
138 if (params_format(hwparams) != SNDRV_PCM_FORMAT_S32_LE) {
139 dev_err(dai->dev, "Invalid format:%d\n", params_format(hwparams));
140 return -EINVAL;
141 }
142
143 writel(ch_mask, adata->acp_base + ACP_WOV_PDM_NO_OF_CHANNELS);
144 writel(PDM_DEC_64, adata->acp_base + ACP_WOV_PDM_DECIMATION_FACTOR);
145
146 return 0;
147 }
148
acp_dmic_dai_startup(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)149 static int acp_dmic_dai_startup(struct snd_pcm_substream *substream,
150 struct snd_soc_dai *dai)
151 {
152 struct acp_stream *stream = substream->runtime->private_data;
153 struct device *dev = dai->component->dev;
154 struct acp_dev_data *adata = dev_get_drvdata(dev);
155 u32 ext_int_ctrl;
156
157 stream->dai_id = DMIC_INSTANCE;
158 stream->irq_bit = BIT(PDM_DMA_STAT);
159 stream->pte_offset = ACP_SRAM_PDM_PTE_OFFSET;
160 stream->reg_offset = ACP_REGION2_OFFSET;
161
162 /* Enable DMIC Interrupts */
163 ext_int_ctrl = readl(adata->acp_base + ACP_EXTERNAL_INTR_CNTL);
164 ext_int_ctrl |= PDM_DMA_INTR_MASK;
165 writel(ext_int_ctrl, adata->acp_base + ACP_EXTERNAL_INTR_CNTL);
166
167 return 0;
168 }
169
acp_dmic_dai_shutdown(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)170 static void acp_dmic_dai_shutdown(struct snd_pcm_substream *substream,
171 struct snd_soc_dai *dai)
172 {
173 struct device *dev = dai->component->dev;
174 struct acp_dev_data *adata = dev_get_drvdata(dev);
175 u32 ext_int_ctrl;
176
177 /* Disable DMIC interrrupts */
178 ext_int_ctrl = readl(adata->acp_base + ACP_EXTERNAL_INTR_CNTL);
179 ext_int_ctrl |= ~PDM_DMA_INTR_MASK;
180 writel(ext_int_ctrl, adata->acp_base + ACP_EXTERNAL_INTR_CNTL);
181 }
182
183 const struct snd_soc_dai_ops acp_dmic_dai_ops = {
184 .prepare = acp_dmic_prepare,
185 .hw_params = acp_dmic_hwparams,
186 .trigger = acp_dmic_dai_trigger,
187 .startup = acp_dmic_dai_startup,
188 .shutdown = acp_dmic_dai_shutdown,
189 };
190 EXPORT_SYMBOL_NS_GPL(acp_dmic_dai_ops, SND_SOC_ACP_COMMON);
191
192 MODULE_LICENSE("Dual BSD/GPL");
193 MODULE_ALIAS(DRV_NAME);
194