1 /*
2 * Copyright (c) 2008-2009 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17 #ifndef DEBUG_H
18 #define DEBUG_H
19
20 #include "hw.h"
21 #include "rc.h"
22
23 struct ath_txq;
24 struct ath_buf;
25
26 #ifdef CONFIG_ATH9K_DEBUGFS
27 #define TX_STAT_INC(q, c) sc->debug.stats.txstats[q].c++
28 #else
29 #define TX_STAT_INC(q, c) do { } while (0)
30 #endif
31
32 #ifdef CONFIG_ATH9K_DEBUGFS
33
34 /**
35 * struct ath_interrupt_stats - Contains statistics about interrupts
36 * @total: Total no. of interrupts generated so far
37 * @rxok: RX with no errors
38 * @rxlp: RX with low priority RX
39 * @rxhp: RX with high priority, uapsd only
40 * @rxeol: RX with no more RXDESC available
41 * @rxorn: RX FIFO overrun
42 * @txok: TX completed at the requested rate
43 * @txurn: TX FIFO underrun
44 * @mib: MIB regs reaching its threshold
45 * @rxphyerr: RX with phy errors
46 * @rx_keycache_miss: RX with key cache misses
47 * @swba: Software Beacon Alert
48 * @bmiss: Beacon Miss
49 * @bnr: Beacon Not Ready
50 * @cst: Carrier Sense TImeout
51 * @gtt: Global TX Timeout
52 * @tim: RX beacon TIM occurrence
53 * @cabend: RX End of CAB traffic
54 * @dtimsync: DTIM sync lossage
55 * @dtim: RX Beacon with DTIM
56 * @bb_watchdog: Baseband watchdog
57 */
58 struct ath_interrupt_stats {
59 u32 total;
60 u32 rxok;
61 u32 rxlp;
62 u32 rxhp;
63 u32 rxeol;
64 u32 rxorn;
65 u32 txok;
66 u32 txeol;
67 u32 txurn;
68 u32 mib;
69 u32 rxphyerr;
70 u32 rx_keycache_miss;
71 u32 swba;
72 u32 bmiss;
73 u32 bnr;
74 u32 cst;
75 u32 gtt;
76 u32 tim;
77 u32 cabend;
78 u32 dtimsync;
79 u32 dtim;
80 u32 bb_watchdog;
81 };
82
83 /**
84 * struct ath_tx_stats - Statistics about TX
85 * @tx_pkts_all: No. of total frames transmitted, including ones that
86 may have had errors.
87 * @tx_bytes_all: No. of total bytes transmitted, including ones that
88 may have had errors.
89 * @queued: Total MPDUs (non-aggr) queued
90 * @completed: Total MPDUs (non-aggr) completed
91 * @a_aggr: Total no. of aggregates queued
92 * @a_queued_hw: Total AMPDUs queued to hardware
93 * @a_queued_sw: Total AMPDUs queued to software queues
94 * @a_completed: Total AMPDUs completed
95 * @a_retries: No. of AMPDUs retried (SW)
96 * @a_xretries: No. of AMPDUs dropped due to xretries
97 * @fifo_underrun: FIFO underrun occurrences
98 Valid only for:
99 - non-aggregate condition.
100 - first packet of aggregate.
101 * @xtxop: No. of frames filtered because of TXOP limit
102 * @timer_exp: Transmit timer expiry
103 * @desc_cfg_err: Descriptor configuration errors
104 * @data_urn: TX data underrun errors
105 * @delim_urn: TX delimiter underrun errors
106 * @puttxbuf: Number of times hardware was given txbuf to write.
107 * @txstart: Number of times hardware was told to start tx.
108 * @txprocdesc: Number of times tx descriptor was processed
109 */
110 struct ath_tx_stats {
111 u32 tx_pkts_all;
112 u32 tx_bytes_all;
113 u32 queued;
114 u32 completed;
115 u32 a_aggr;
116 u32 a_queued_hw;
117 u32 a_queued_sw;
118 u32 a_completed;
119 u32 a_retries;
120 u32 a_xretries;
121 u32 fifo_underrun;
122 u32 xtxop;
123 u32 timer_exp;
124 u32 desc_cfg_err;
125 u32 data_underrun;
126 u32 delim_underrun;
127 u32 puttxbuf;
128 u32 txstart;
129 u32 txprocdesc;
130 };
131
132 /**
133 * struct ath_rx_stats - RX Statistics
134 * @rx_pkts_all: No. of total frames received, including ones that
135 may have had errors.
136 * @rx_bytes_all: No. of total bytes received, including ones that
137 may have had errors.
138 * @crc_err: No. of frames with incorrect CRC value
139 * @decrypt_crc_err: No. of frames whose CRC check failed after
140 decryption process completed
141 * @phy_err: No. of frames whose reception failed because the PHY
142 encountered an error
143 * @mic_err: No. of frames with incorrect TKIP MIC verification failure
144 * @pre_delim_crc_err: Pre-Frame delimiter CRC error detections
145 * @post_delim_crc_err: Post-Frame delimiter CRC error detections
146 * @decrypt_busy_err: Decryption interruptions counter
147 * @phy_err_stats: Individual PHY error statistics
148 */
149 struct ath_rx_stats {
150 u32 rx_pkts_all;
151 u32 rx_bytes_all;
152 u32 crc_err;
153 u32 decrypt_crc_err;
154 u32 phy_err;
155 u32 mic_err;
156 u32 pre_delim_crc_err;
157 u32 post_delim_crc_err;
158 u32 decrypt_busy_err;
159 u32 phy_err_stats[ATH9K_PHYERR_MAX];
160 };
161
162 struct ath_stats {
163 struct ath_interrupt_stats istats;
164 struct ath_tx_stats txstats[ATH9K_NUM_TX_QUEUES];
165 struct ath_rx_stats rxstats;
166 };
167
168 struct ath9k_debug {
169 struct dentry *debugfs_phy;
170 u32 regidx;
171 struct ath_stats stats;
172 };
173
174 int ath9k_init_debug(struct ath_hw *ah);
175
176 void ath_debug_stat_interrupt(struct ath_softc *sc, enum ath9k_int status);
177 void ath_debug_stat_tx(struct ath_softc *sc, struct ath_buf *bf,
178 struct ath_tx_status *ts, struct ath_txq *txq);
179 void ath_debug_stat_rx(struct ath_softc *sc, struct ath_rx_status *rs);
180
181 #else
182
ath9k_init_debug(struct ath_hw * ah)183 static inline int ath9k_init_debug(struct ath_hw *ah)
184 {
185 return 0;
186 }
187
ath_debug_stat_interrupt(struct ath_softc * sc,enum ath9k_int status)188 static inline void ath_debug_stat_interrupt(struct ath_softc *sc,
189 enum ath9k_int status)
190 {
191 }
192
ath_debug_stat_tx(struct ath_softc * sc,struct ath_buf * bf,struct ath_tx_status * ts,struct ath_txq * txq)193 static inline void ath_debug_stat_tx(struct ath_softc *sc,
194 struct ath_buf *bf,
195 struct ath_tx_status *ts,
196 struct ath_txq *txq)
197 {
198 }
199
ath_debug_stat_rx(struct ath_softc * sc,struct ath_rx_status * rs)200 static inline void ath_debug_stat_rx(struct ath_softc *sc,
201 struct ath_rx_status *rs)
202 {
203 }
204
205 #endif /* CONFIG_ATH9K_DEBUGFS */
206
207 #endif /* DEBUG_H */
208