1 /* 2 * Copyright 2004-2008 Analog Devices Inc. 3 * 4 * Licensed under the GPL-2 or later. 5 */ 6 7 #ifndef _BFIN_PTRACE_H 8 #define _BFIN_PTRACE_H 9 10 /* 11 * GCC defines register number like this: 12 * ----------------------------- 13 * 0 - 7 are data registers R0-R7 14 * 8 - 15 are address registers P0-P7 15 * 16 - 31 dsp registers I/B/L0 -- I/B/L3 & M0--M3 16 * 32 - 33 A registers A0 & A1 17 * 34 - status register 18 * ----------------------------- 19 * 20 * We follows above, except: 21 * 32-33 --- Low 32-bit of A0&1 22 * 34-35 --- High 8-bit of A0&1 23 */ 24 25 #ifndef __ASSEMBLY__ 26 27 struct task_struct; 28 29 /* this struct defines the way the registers are stored on the 30 stack during a system call. */ 31 32 struct pt_regs { 33 long orig_pc; 34 long ipend; 35 long seqstat; 36 long rete; 37 long retn; 38 long retx; 39 long pc; /* PC == RETI */ 40 long rets; 41 long reserved; /* Used as scratch during system calls */ 42 long astat; 43 long lb1; 44 long lb0; 45 long lt1; 46 long lt0; 47 long lc1; 48 long lc0; 49 long a1w; 50 long a1x; 51 long a0w; 52 long a0x; 53 long b3; 54 long b2; 55 long b1; 56 long b0; 57 long l3; 58 long l2; 59 long l1; 60 long l0; 61 long m3; 62 long m2; 63 long m1; 64 long m0; 65 long i3; 66 long i2; 67 long i1; 68 long i0; 69 long usp; 70 long fp; 71 long p5; 72 long p4; 73 long p3; 74 long p2; 75 long p1; 76 long p0; 77 long r7; 78 long r6; 79 long r5; 80 long r4; 81 long r3; 82 long r2; 83 long r1; 84 long r0; 85 long orig_r0; 86 long orig_p0; 87 long syscfg; 88 }; 89 90 /* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */ 91 #define PTRACE_GETREGS 12 92 #define PTRACE_SETREGS 13 /* ptrace signal */ 93 94 #define PTRACE_GETFDPIC 31 /* get the ELF fdpic loadmap address */ 95 #define PTRACE_GETFDPIC_EXEC 0 /* [addr] request the executable loadmap */ 96 #define PTRACE_GETFDPIC_INTERP 1 /* [addr] request the interpreter loadmap */ 97 98 #define PS_S (0x0002) 99 100 #ifdef __KERNEL__ 101 102 /* user_mode returns true if only one bit is set in IPEND, other than the 103 master interrupt enable. */ 104 #define user_mode(regs) (!(((regs)->ipend & ~0x10) & (((regs)->ipend & ~0x10) - 1))) 105 #define instruction_pointer(regs) ((regs)->pc) 106 #define user_stack_pointer(regs) ((regs)->usp) 107 #define profile_pc(regs) instruction_pointer(regs) 108 extern void show_regs(struct pt_regs *); 109 110 #define arch_has_single_step() (1) 111 extern void user_enable_single_step(struct task_struct *child); 112 extern void user_disable_single_step(struct task_struct *child); 113 /* common code demands this function */ 114 #define ptrace_disable(child) user_disable_single_step(child) 115 116 extern int is_user_addr_valid(struct task_struct *child, 117 unsigned long start, unsigned long len); 118 119 /* 120 * Get the address of the live pt_regs for the specified task. 121 * These are saved onto the top kernel stack when the process 122 * is not running. 123 * 124 * Note: if a user thread is execve'd from kernel space, the 125 * kernel stack will not be empty on entry to the kernel, so 126 * ptracing these tasks will fail. 127 */ 128 #define task_pt_regs(task) \ 129 (struct pt_regs *) \ 130 ((unsigned long)task_stack_page(task) + \ 131 (THREAD_SIZE - sizeof(struct pt_regs))) 132 133 #endif /* __KERNEL__ */ 134 135 #endif /* __ASSEMBLY__ */ 136 137 /* 138 * Offsets used by 'ptrace' system call interface. 139 */ 140 141 #define PT_R0 204 142 #define PT_R1 200 143 #define PT_R2 196 144 #define PT_R3 192 145 #define PT_R4 188 146 #define PT_R5 184 147 #define PT_R6 180 148 #define PT_R7 176 149 #define PT_P0 172 150 #define PT_P1 168 151 #define PT_P2 164 152 #define PT_P3 160 153 #define PT_P4 156 154 #define PT_P5 152 155 #define PT_FP 148 156 #define PT_USP 144 157 #define PT_I0 140 158 #define PT_I1 136 159 #define PT_I2 132 160 #define PT_I3 128 161 #define PT_M0 124 162 #define PT_M1 120 163 #define PT_M2 116 164 #define PT_M3 112 165 #define PT_L0 108 166 #define PT_L1 104 167 #define PT_L2 100 168 #define PT_L3 96 169 #define PT_B0 92 170 #define PT_B1 88 171 #define PT_B2 84 172 #define PT_B3 80 173 #define PT_A0X 76 174 #define PT_A0W 72 175 #define PT_A1X 68 176 #define PT_A1W 64 177 #define PT_LC0 60 178 #define PT_LC1 56 179 #define PT_LT0 52 180 #define PT_LT1 48 181 #define PT_LB0 44 182 #define PT_LB1 40 183 #define PT_ASTAT 36 184 #define PT_RESERVED 32 185 #define PT_RETS 28 186 #define PT_PC 24 187 #define PT_RETX 20 188 #define PT_RETN 16 189 #define PT_RETE 12 190 #define PT_SEQSTAT 8 191 #define PT_IPEND 4 192 193 #define PT_ORIG_R0 208 194 #define PT_ORIG_P0 212 195 #define PT_SYSCFG 216 196 #define PT_TEXT_ADDR 220 197 #define PT_TEXT_END_ADDR 224 198 #define PT_DATA_ADDR 228 199 #define PT_FDPIC_EXEC 232 200 #define PT_FDPIC_INTERP 236 201 202 #define PT_LAST_PSEUDO PT_FDPIC_INTERP 203 204 #endif /* _BFIN_PTRACE_H */ 205