/linux-6.1.9/drivers/clk/sunxi-ng/ |
D | ccu_mp.h | 34 #define SUNXI_CCU_MP_WITH_MUX_GATE_POSTDIV(_struct, _name, _parents, _reg, \ argument 55 #define SUNXI_CCU_MP_WITH_MUX_GATE(_struct, _name, _parents, _reg, \ argument 74 #define SUNXI_CCU_MP_WITH_MUX(_struct, _name, _parents, _reg, \ argument 85 #define SUNXI_CCU_MP_DATA_WITH_MUX_GATE(_struct, _name, _parents, _reg, \ argument 104 #define SUNXI_CCU_MP_DATA_WITH_MUX(_struct, _name, _parents, _reg, \ argument 115 #define SUNXI_CCU_MP_HW_WITH_MUX_GATE(_struct, _name, _parents, _reg, \ argument 152 #define SUNXI_CCU_MP_MMC_WITH_MUX_GATE(_struct, _name, _parents, _reg, \ argument
|
D | ccu_mux.h | 49 #define SUNXI_CCU_MUX_TABLE_WITH_GATE(_struct, _name, _parents, _table, \ argument 64 #define SUNXI_CCU_MUX_WITH_GATE(_struct, _name, _parents, _reg, \ argument 70 #define SUNXI_CCU_MUX(_struct, _name, _parents, _reg, _shift, _width, \ argument 75 #define SUNXI_CCU_MUX_DATA_WITH_GATE(_struct, _name, _parents, _reg, \ argument 89 #define SUNXI_CCU_MUX_DATA(_struct, _name, _parents, _reg, \ argument 94 #define SUNXI_CCU_MUX_HW_WITH_GATE(_struct, _name, _parents, _reg, \ argument
|
D | ccu_div.h | 128 _parents, _table, \ argument 146 #define SUNXI_CCU_M_WITH_MUX_GATE(_struct, _name, _parents, _reg, \ argument 155 #define SUNXI_CCU_M_WITH_MUX(_struct, _name, _parents, _reg, \ argument 185 #define SUNXI_CCU_M_DATA_WITH_MUX_GATE(_struct, _name, _parents, _reg, \ argument 202 #define SUNXI_CCU_M_DATA_WITH_MUX(_struct, _name, _parents, _reg, \ argument 211 #define SUNXI_CCU_M_HW_WITH_MUX_GATE(_struct, _name, _parents, _reg, \ argument
|
D | ccu_nkm.h | 34 #define SUNXI_CCU_NKM_WITH_MUX_GATE_LOCK(_struct, _name, _parents, _reg, \ argument
|
/linux-6.1.9/drivers/clk/sprd/ |
D | mux.h | 39 #define SPRD_MUX_CLK_HW_INIT_FN(_struct, _name, _parents, _table, \ argument 51 #define SPRD_MUX_CLK_TABLE(_struct, _name, _parents, _table, \ argument 57 #define SPRD_MUX_CLK(_struct, _name, _parents, _reg, \ argument 62 #define SPRD_MUX_CLK_DATA_TABLE(_struct, _name, _parents, _table, \ argument 68 #define SPRD_MUX_CLK_DATA(_struct, _name, _parents, _reg, \ argument
|
/linux-6.1.9/drivers/clk/tegra/ |
D | clk-tegra-periph.c | 132 #define MUX(_name, _parents, _offset, \ argument 139 #define MUX_FLAGS(_name, _parents, _offset,\ argument 146 #define MUX8(_name, _parents, _offset, \ argument 153 #define MUX8_NOGATE_LOCK(_name, _parents, _offset, _clk_id, _lock) \ argument 159 #define MUX8_NOGATE(_name, _parents, _offset, _clk_id) \ argument 165 #define INT(_name, _parents, _offset, \ argument 172 #define INT_FLAGS(_name, _parents, _offset,\ argument 179 #define INT8(_name, _parents, _offset,\ argument 186 #define UART(_name, _parents, _offset,\ argument 193 #define UART8(_name, _parents, _offset,\ argument [all …]
|
D | clk-tegra30.c | 158 #define TEGRA_INIT_DATA_MUX(_name, _parents, _offset, \ argument 164 #define TEGRA_INIT_DATA_MUX8(_name, _parents, _offset, \ argument 170 #define TEGRA_INIT_DATA_INT(_name, _parents, _offset, \ argument 177 #define TEGRA_INIT_DATA_NODIV(_name, _parents, _offset, \ argument
|
D | clk-tegra20.c | 136 #define TEGRA_INIT_DATA_MUX(_name, _parents, _offset, \ argument 143 #define TEGRA_INIT_DATA_DIV16(_name, _parents, _offset, \ argument 150 #define TEGRA_INIT_DATA_NODIV(_name, _parents, _offset, \ argument
|
D | clk-tegra124.c | 97 #define MUX8_NOGATE_LOCK(_name, _parents, _offset, _clk_id, _lock) \ argument 103 #define NODIV(_name, _parents, _offset, \ argument
|
D | clk-tegra114.c | 115 #define MUX8(_name, _parents, _offset, \ argument
|
/linux-6.1.9/drivers/clk/mediatek/ |
D | clk-mux.h | 40 #define GATE_CLR_SET_UPD_FLAGS(_id, _name, _parents, _mux_ofs, \ argument 62 #define MUX_GATE_CLR_SET_UPD_FLAGS(_id, _name, _parents, _mux_ofs, \ argument 70 #define MUX_GATE_CLR_SET_UPD(_id, _name, _parents, _mux_ofs, \ argument 78 #define MUX_CLR_SET_UPD(_id, _name, _parents, _mux_ofs, \ argument
|
D | clk-mtk.h | 88 #define MUX_GATE_FLAGS_2(_id, _name, _parents, _reg, _shift, \ argument 108 #define MUX_GATE_FLAGS(_id, _name, _parents, _reg, _shift, _width, \ argument 117 #define MUX_GATE(_id, _name, _parents, _reg, _shift, _width, _gate) \ argument 121 #define MUX(_id, _name, _parents, _reg, _shift, _width) \ argument 125 #define MUX_FLAGS(_id, _name, _parents, _reg, _shift, _width, _flags) { \ argument
|
D | clk-mt6795-topckgen.c | 21 #define TOP_MUX_GATE_NOSR(_id, _name, _parents, _reg, _shift, _width, _gate, _flags) \ argument 26 #define TOP_MUX_GATE(_id, _name, _parents, _reg, _shift, _width, _gate, _flags) \ argument
|
/linux-6.1.9/drivers/clk/actions/ |
D | owl-mux.h | 34 #define OWL_MUX(_struct, _name, _parents, _reg, \ argument
|
/linux-6.1.9/drivers/clk/microchip/ |
D | clk-mpfs-ccc.c | 101 #define CLK_CCC_PLL(_id, _parents, _shift, _width, _flags, _offset) { \ argument 188 #define CLK_HW_INIT_PARENTS_DATA_FIXED_SIZE(_name, _parents, _ops, _flags) \ argument
|
/linux-6.1.9/drivers/clk/ |
D | clk-oxnas.c | 89 #define OXNAS_GATE(_name, _bit, _parents) \ argument
|
D | clk-stm32h7.c | 567 #define M_MCLOCF(_name, _parents, _mux_offset, _mux_shift, _mux_width, _flags)\ argument 578 #define M_MCLOC(_name, _parents, _mux_offset, _mux_shift, _mux_width)\ argument 1178 #define M_MCO_F(_name, _parents, _mux_offset, _mux_shift, _mux_width,\ argument
|
D | clk-stm32mp1.c | 1214 #define MUX(_id, _name, _parents, _flags, _offset, _shift, _width, _mux_flags)\ argument 1230 #define PLL(_id, _name, _parents, _flags, _offset_p, _offset_mux)\ argument 1364 #define COMPOSITE(_id, _name, _parents, _flags, _gate, _mux, _div)\ argument 1385 #define KCLK(_id, _name, _parents, _flags, _mgate, _mmux)\ argument
|
D | clk-bm1880.c | 160 #define GATE_MUX(_id, _name, _parents, _gate_reg, _gate_shift, \ argument
|
/linux-6.1.9/include/linux/ |
D | sh_clk.h | 175 #define SH_CLK_DIV6_EXT(_reg, _flags, _parents, \ argument
|
D | clk-provider.h | 1421 #define CLK_HW_INIT_PARENTS(_name, _parents, _ops, _flags) \ argument 1430 #define CLK_HW_INIT_PARENTS_HW(_name, _parents, _ops, _flags) \ argument 1439 #define CLK_HW_INIT_PARENTS_DATA(_name, _parents, _ops, _flags) \ argument
|
/linux-6.1.9/drivers/clk/meson/ |
D | axg-audio.c | 319 #define AUD_TDM_PAD_CTRL(_name, _reg, _shift, _parents) \ argument
|