1 /*
2  *  arch/ppc/kernel/irq.c
3  *
4  *  Derived from arch/i386/kernel/irq.c
5  *    Copyright (C) 1992 Linus Torvalds
6  *  Adapted from arch/i386 by Gary Thomas
7  *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
8  *  Updated and modified by Cort Dougan (cort@cs.nmt.edu)
9  *    Copyright (C) 1996 Cort Dougan
10  *  Adapted for Power Macintosh by Paul Mackerras
11  *    Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au)
12  *  Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
13  *
14  * This program is free software; you can redistribute it and/or
15  * modify it under the terms of the GNU General Public License
16  * as published by the Free Software Foundation; either version
17  * 2 of the License, or (at your option) any later version.
18  *
19  * This file contains the code used by various IRQ handling routines:
20  * asking for different IRQ's should be done through these routines
21  * instead of just grabbing them. Thus setups with different IRQ numbers
22  * shouldn't result in any weird surprises, and installing new handlers
23  * should be easier.
24  */
25 
26 #include <linux/ptrace.h>
27 #include <linux/errno.h>
28 #include <linux/threads.h>
29 #include <linux/kernel_stat.h>
30 #include <linux/signal.h>
31 #include <linux/sched.h>
32 #include <linux/ioport.h>
33 #include <linux/interrupt.h>
34 #include <linux/timex.h>
35 #include <linux/config.h>
36 #include <linux/init.h>
37 #include <linux/slab.h>
38 #include <linux/pci.h>
39 #include <linux/delay.h>
40 #include <linux/irq.h>
41 #include <linux/proc_fs.h>
42 #include <linux/seq_file.h>
43 #include <linux/random.h>
44 #include <linux/bootmem.h>
45 
46 #include <asm/uaccess.h>
47 #include <asm/bitops.h>
48 #include <asm/system.h>
49 #include <asm/io.h>
50 #include <asm/pgtable.h>
51 #include <asm/irq.h>
52 #include <asm/cache.h>
53 #include <asm/prom.h>
54 #include <asm/ptrace.h>
55 #include <asm/iSeries/LparData.h>
56 #include <asm/machdep.h>
57 #include <asm/paca.h>
58 #include <asm/perfmon.h>
59 
60 /*
61  * Because the name space for interrupts is so large on ppc64 systems we
62  * avoid declaring a single array of "NR_IRQ" interrupts and instead build
63  * a three level tree leading to the irq_desc_t (similar to page tables).
64  *
65  * Currently we cover 24-bit irq values:
66  *    10-bits:  the "base" dir (2-pages)
67  *     9-bits:  the "middle" dir (1-page)
68  *     5-bits:  the "bottom" page (1-page) holding 128byte irq_desc's.
69  *
70  * We pack a hw_irq_stat struct directly after the irq_desc in the otherwise
71  * wasted space of the cacheline.
72  *
73  * MAX_IRQS is the max this implementation will support.
74  * It is much larger than NR_IRQS which is bogus on this arch and often used
75  * to declare arrays.
76  *
77  * Note that all "undefined" mid table and bottom table pointers will point
78  * to dummy tables.  Therefore, we don't need to check for NULL on spurious
79  * interrupts.
80  */
81 
82 #define IRQ_BASE_INDEX_SIZE  10
83 #define IRQ_MID_INDEX_SIZE  9
84 #define IRQ_BOT_DESC_SIZE 5
85 
86 #define IRQ_BASE_PTRS	(1 << IRQ_BASE_INDEX_SIZE)
87 #define IRQ_MID_PTRS	(1 << IRQ_MID_INDEX_SIZE)
88 #define IRQ_BOT_DESCS (1 << IRQ_BOT_DESC_SIZE)
89 
90 #define IRQ_BASE_IDX_SHIFT (IRQ_MID_INDEX_SIZE + IRQ_BOT_DESC_SIZE)
91 #define IRQ_MID_IDX_SHIFT (IRQ_BOT_DESC_SIZE)
92 
93 #define IRQ_MID_IDX_MASK  ((1 << IRQ_MID_INDEX_SIZE) - 1)
94 #define IRQ_BOT_IDX_MASK  ((1 << IRQ_BOT_DESC_SIZE) - 1)
95 
96 irq_desc_t **irq_desc_base_dir[IRQ_BASE_PTRS] __page_aligned = {0};
97 irq_desc_t **irq_desc_mid_null;
98 irq_desc_t *irq_desc_bot_null;
99 
100 unsigned int _next_irq(unsigned int irq);
101 atomic_t ipi_recv;
102 atomic_t ipi_sent;
103 void enable_irq(unsigned int irq_nr);
104 void disable_irq(unsigned int irq_nr);
105 
106 #ifdef CONFIG_SMP
107 extern void iSeries_smp_message_recv( struct pt_regs * );
108 #endif
109 
110 volatile unsigned char *chrp_int_ack_special;
111 static void register_irq_proc (unsigned int irq);
112 
113 irq_desc_t irq_desc[NR_IRQS] __cacheline_aligned =
114 	{ [0 ... NR_IRQS-1] = { 0, NULL, NULL, 0, SPIN_LOCK_UNLOCKED}};
115 
116 static irq_desc_t *add_irq_desc(unsigned int irq);
117 
118 int ppc_spurious_interrupts = 0;
119 unsigned long lpEvent_count = 0;
120 #ifdef CONFIG_XMON
121 extern void xmon(struct pt_regs *regs);
122 extern int xmon_bpt(struct pt_regs *regs);
123 extern int xmon_sstep(struct pt_regs *regs);
124 extern int xmon_iabr_match(struct pt_regs *regs);
125 extern int xmon_dabr_match(struct pt_regs *regs);
126 extern void (*xmon_fault_handler)(struct pt_regs *regs);
127 #endif
128 #ifdef CONFIG_XMON
129 extern void (*debugger)(struct pt_regs *regs);
130 extern int (*debugger_bpt)(struct pt_regs *regs);
131 extern int (*debugger_sstep)(struct pt_regs *regs);
132 extern int (*debugger_iabr_match)(struct pt_regs *regs);
133 extern int (*debugger_dabr_match)(struct pt_regs *regs);
134 extern void (*debugger_fault_handler)(struct pt_regs *regs);
135 #endif
136 
137 #define IRQ_KMALLOC_ENTRIES 16
138 static int cache_bitmask = 0;
139 static struct irqaction malloc_cache[IRQ_KMALLOC_ENTRIES];
140 extern int mem_init_done;
141 
142 /* The hw_irq_stat struct is stored directly after the irq_desc_t
143  * in the same cacheline.  We need to use care to make sure we don't
144  * overrun the size of the cacheline.
145  *
146  * Currently sizeof(irq_desc_t) is 40 bytes or less and this hw_irq_stat
147  * fills the rest of the cache line.
148  */
149 struct hw_irq_stat {
150 	unsigned long irqs;		/* statistic per irq */
151 	unsigned long *per_cpu_stats;
152 	struct proc_dir_entry *irq_dir, *smp_affinity;
153 	unsigned long irq_affinity;	/* ToDo: cpu bitmask */
154 };
155 
get_irq_stat(irq_desc_t * desc)156 static inline struct hw_irq_stat *get_irq_stat(irq_desc_t *desc)
157 {
158 	/* WARNING: this assumes lock is the last field! */
159 	return (struct hw_irq_stat *)(&desc->lock+1);
160 }
161 
get_irq_per_cpu(struct hw_irq_stat * hw)162 static inline unsigned long *get_irq_per_cpu(struct hw_irq_stat *hw)
163 {
164 	return hw->per_cpu_stats;
165 }
166 
get_irq_mid_table(unsigned int irq)167 static inline irq_desc_t **get_irq_mid_table(unsigned int irq)
168 {
169 	/* Assume irq < MAX_IRQS so we won't index off the end. */
170 	return irq_desc_base_dir[irq >> IRQ_BASE_IDX_SHIFT];
171 }
172 
get_irq_bot_table(unsigned int irq,irq_desc_t ** mid_ptr)173 static inline irq_desc_t *get_irq_bot_table(unsigned int irq,
174 					    irq_desc_t **mid_ptr)
175 {
176 	return mid_ptr[(irq >> IRQ_MID_IDX_SHIFT) & IRQ_MID_IDX_MASK];
177 }
178 
179 /* This should be inline. */
_irqdesc(unsigned int irq)180 void *_irqdesc(unsigned int irq)
181 {
182 	irq_desc_t **mid_table, *bot_table, *desc;
183 
184 	mid_table = get_irq_mid_table(irq);
185 	bot_table = get_irq_bot_table(irq, mid_table);
186 
187 	desc = bot_table + (irq & IRQ_BOT_IDX_MASK);
188 	return desc;
189 }
190 
191 /*
192  * This is used by the for_each_irq(i) macro to iterate quickly over
193  * all interrupts.  It optimizes by skipping over ptrs to the null tables
194  * when possible, but it may produce false positives.
195  */
_next_irq(unsigned int irq)196 unsigned int _next_irq(unsigned int irq)
197 {
198 	irq_desc_t **mid_table, *bot_table;
199 
200 	irq++;
201 	/* Easy case first...staying on the current bot_table. */
202 	if (irq & IRQ_BOT_IDX_MASK)
203 		return irq;
204 
205 	/* Now skip empty mid tables */
206 	while (irq < MAX_IRQS &&
207 	       (mid_table = get_irq_mid_table(irq)) == irq_desc_mid_null) {
208 		/* index to the next base index (i.e. the next mid table) */
209 		irq = (irq & ~(IRQ_BASE_IDX_SHIFT-1)) + IRQ_BASE_IDX_SHIFT;
210 	}
211 	/* And skip empty bot tables */
212 	while (irq < MAX_IRQS &&
213 	       (bot_table = get_irq_bot_table(irq, mid_table)) == irq_desc_bot_null) {
214 		/* index to the next mid index (i.e. the next bot table) */
215 		irq = (irq & ~(IRQ_MID_IDX_SHIFT-1)) + IRQ_MID_IDX_SHIFT;
216 	}
217 	return irq;
218 }
219 
220 
221 /* Same as irqdesc(irq) except it will "fault in" a real desc as needed
222  * rather than return the null entry.
223  * This is used by code that is actually defining the irq.
224  *
225  * NULL may be returned on memory allocation failure.  In general, init code
226  * doesn't look for this, but setup_irq does.  In this failure case the desc
227  * is left pointing at the null pages so callers of irqdesc() should
228  * always return something.
229  */
_real_irqdesc(unsigned int irq)230 void *_real_irqdesc(unsigned int irq)
231 {
232 	irq_desc_t *desc = irqdesc(irq);
233 	if (((unsigned long)desc & PAGE_MASK) ==
234 	    (unsigned long)irq_desc_bot_null) {
235 		desc = add_irq_desc(irq);
236 	}
237 	return desc;
238 }
239 
240 /* Allocate an irq middle page and init entries to null page. */
alloc_irq_mid_page(void)241 static irq_desc_t **alloc_irq_mid_page(void)
242 {
243 	irq_desc_t **m, **ent;
244 
245 	if (mem_init_done)
246 		m = (irq_desc_t **)__get_free_page(GFP_KERNEL);
247 	else
248 		m = (irq_desc_t **)alloc_bootmem_pages(PAGE_SIZE);
249 	if (m) {
250 		for (ent = m; ent < m + IRQ_MID_PTRS; ent++) {
251 			*ent = irq_desc_bot_null;
252 		}
253 	}
254 	return m;
255 }
256 
257 /* Allocate an irq bottom page and init the entries. */
alloc_irq_bot_page(void)258 static irq_desc_t *alloc_irq_bot_page(void)
259 {
260 	irq_desc_t *b, *ent;
261 	if (mem_init_done)
262 		b = (irq_desc_t *)get_zeroed_page(GFP_KERNEL);
263 	else
264 		b = (irq_desc_t *)alloc_bootmem_pages(PAGE_SIZE);
265 	if (b) {
266 		for (ent = b; ent < b + IRQ_BOT_DESCS; ent++) {
267 			ent->lock = SPIN_LOCK_UNLOCKED;
268 		}
269 	}
270 	return b;
271 }
272 
273 /*
274  * The universe of interrupt numbers ranges from 0 to 2^24.
275  * Use a sparsely populated tree to map from the irq to the handler.
276  * Top level is 2 contiguous pages, covering the 10 most significant
277  * bits.  Mid level is 1 page, covering 9 bits.  Last page covering
278  * 5 bits is the irq_desc, each of which is 128B.
279  */
irq_desc_init(void)280 static void irq_desc_init(void) {
281 	irq_desc_t ***entry_p;
282 
283 	/*
284 	 * Now initialize the tables to point though the NULL tables for
285 	 * the default case of no interrupt handler (spurious).
286 	 */
287 	irq_desc_bot_null = alloc_irq_bot_page();
288 	irq_desc_mid_null = alloc_irq_mid_page();
289 	if (!irq_desc_bot_null || !irq_desc_mid_null)
290 		panic("irq_desc_init: could not allocate pages\n");
291 	for(entry_p = irq_desc_base_dir;
292 	    entry_p < irq_desc_base_dir + IRQ_BASE_PTRS;
293 	    entry_p++) {
294 		*entry_p = irq_desc_mid_null;
295 	}
296 }
297 
298 /*
299  * Add a new irq desc for the given irq if needed.
300  * This breaks any ptr to the "null" middle or "bottom" irq desc page.
301  * Note that we don't ever coalesce pages as the interrupts are released.
302  * This isn't worth the effort.  We add the cpu stats info when the
303  * interrupt is actually requested.
304  *
305  * May return NULL if memory could not be allocated.
306  */
add_irq_desc(unsigned int irq)307 static irq_desc_t *add_irq_desc(unsigned int irq)
308 {
309 	irq_desc_t **mid_table_p, *bot_table_p;
310 
311 	mid_table_p = get_irq_mid_table(irq);
312 	if(mid_table_p == irq_desc_mid_null) {
313 		/* No mid table for this IRQ - create it */
314 		mid_table_p = alloc_irq_mid_page();
315 		if (!mid_table_p) return NULL;
316 		irq_desc_base_dir[irq >> IRQ_BASE_IDX_SHIFT] = mid_table_p;
317 	}
318 
319 	bot_table_p = (irq_desc_t *)(*(mid_table_p + ((irq >> 5) & 0x1ff)));
320 
321 	if(bot_table_p == irq_desc_bot_null) {
322 		/* No bot table for this IRQ - create it */
323 		bot_table_p = alloc_irq_bot_page();
324 		if (!bot_table_p) return NULL;
325 		mid_table_p[(irq >> IRQ_MID_IDX_SHIFT) & IRQ_MID_IDX_MASK] = bot_table_p;
326 	}
327 
328 	return bot_table_p + (irq & IRQ_BOT_IDX_MASK);
329 }
330 
irq_kmalloc(size_t size,int pri)331 void *irq_kmalloc(size_t size, int pri)
332 {
333 	unsigned int i;
334 	if ( mem_init_done )
335 		return kmalloc(size,pri);
336 	for ( i = 0; i < IRQ_KMALLOC_ENTRIES ; i++ )
337 		if ( ! ( cache_bitmask & (1<<i) ) ) {
338 			cache_bitmask |= (1<<i);
339 			return (void *)(&malloc_cache[i]);
340 		}
341 	return 0;
342 }
343 
irq_kfree(void * ptr)344 void irq_kfree(void *ptr)
345 {
346 	unsigned int i;
347 	for ( i = 0 ; i < IRQ_KMALLOC_ENTRIES ; i++ )
348 		if ( ptr == &malloc_cache[i] ) {
349 			cache_bitmask &= ~(1<<i);
350 			return;
351 		}
352 	kfree(ptr);
353 }
354 
allocate_per_cpu_stats(struct hw_irq_stat * hwstat)355 void allocate_per_cpu_stats(struct hw_irq_stat *hwstat)
356 {
357 	unsigned long *p;
358 
359 	if (mem_init_done) {
360 		p = (unsigned long *)kmalloc(sizeof(long)*NR_CPUS, GFP_KERNEL);
361 		if (p) memset(p, 0, sizeof(long)*NR_CPUS);
362 	} else
363 		p = (unsigned long *)alloc_bootmem(sizeof(long)*NR_CPUS);
364 	hwstat->per_cpu_stats = p;
365 }
366 
367 int
setup_irq(unsigned int irq,struct irqaction * new)368 setup_irq(unsigned int irq, struct irqaction * new)
369 {
370 	int shared = 0;
371 	unsigned long flags;
372 	struct irqaction *old, **p;
373 	irq_desc_t *desc = real_irqdesc(irq);
374 	struct hw_irq_stat *hwstat;
375 
376 	if (!desc)
377 		return -ENOMEM;
378 
379 	ppc_md.init_irq_desc(desc);
380 
381 	hwstat = get_irq_stat(desc);
382 
383 #ifdef CONFIG_IRQ_ALL_CPUS
384 	hwstat->irq_affinity = ~0;
385 #else
386 	hwstat->irq_affinity = 0;
387 #endif
388 
389 	/* Now is the time to add per-cpu kstat data to the desc
390 	 * since it appears we are actually going to use the irq.
391 	 */
392 	allocate_per_cpu_stats(hwstat);
393 
394 	/*
395 	 * Some drivers like serial.c use request_irq() heavily,
396 	 * so we have to be careful not to interfere with a
397 	 * running system.
398 	 */
399 	if (new->flags & SA_SAMPLE_RANDOM) {
400 		/*
401 		 * This function might sleep, we want to call it first,
402 		 * outside of the atomic block.
403 		 * Yes, this might clear the entropy pool if the wrong
404 		 * driver is attempted to be loaded, without actually
405 		 * installing a new handler, but is this really a problem,
406 		 * only the sysadmin is able to do this.
407 		 */
408 		rand_initialize_irq(irq);
409 	}
410 
411 	/*
412 	 * The following block of code has to be executed atomically
413 	 */
414 	spin_lock_irqsave(&desc->lock,flags);
415 	p = &desc->action;
416 	if ((old = *p) != NULL) {
417 		/* Can't share interrupts unless both agree to */
418 		if (!(old->flags & new->flags & SA_SHIRQ)) {
419 			spin_unlock_irqrestore(&desc->lock,flags);
420 			return -EBUSY;
421 		}
422 
423 		/* add new interrupt at end of irq queue */
424 		do {
425 			p = &old->next;
426 			old = *p;
427 		} while (old);
428 		shared = 1;
429 	}
430 
431 	*p = new;
432 
433 	if (!shared) {
434 		desc->depth = 0;
435 		desc->status &= ~(IRQ_DISABLED | IRQ_AUTODETECT | IRQ_WAITING);
436 		unmask_irq(irq);
437 	}
438 	spin_unlock_irqrestore(&desc->lock,flags);
439 
440 	register_irq_proc(irq);
441 	return 0;
442 }
443 
444 /* This could be promoted to a real free_irq() ... */
445 static int
do_free_irq(int irq,void * dev_id)446 do_free_irq(int irq, void* dev_id)
447 {
448 	irq_desc_t *desc = irqdesc(irq);
449 	struct irqaction **p;
450 	unsigned long flags;
451 
452 	spin_lock_irqsave(&desc->lock,flags);
453 	p = &desc->action;
454 	for (;;) {
455 		struct irqaction * action = *p;
456 		if (action) {
457 			struct irqaction **pp = p;
458 			p = &action->next;
459 			if (action->dev_id != dev_id)
460 				continue;
461 
462 			/* Found it - now remove it from the list of entries */
463 			*pp = action->next;
464 			if (!desc->action) {
465 				desc->status |= IRQ_DISABLED;
466 				mask_irq(irq);
467 			}
468 			spin_unlock_irqrestore(&desc->lock,flags);
469 
470 #ifdef CONFIG_SMP
471 			/* Wait to make sure it's not being used on another CPU */
472 			while (desc->status & IRQ_INPROGRESS)
473 				barrier();
474 #endif
475 			irq_kfree(action);
476 			return 0;
477 		}
478 		printk("Trying to free free IRQ%d\n",irq);
479 		spin_unlock_irqrestore(&desc->lock,flags);
480 		break;
481 	}
482 	return -ENOENT;
483 }
484 
request_irq(unsigned int irq,void (* handler)(int,void *,struct pt_regs *),unsigned long irqflags,const char * devname,void * dev_id)485 int request_irq(unsigned int irq, void (*handler)(int, void *, struct pt_regs *),
486 	unsigned long irqflags, const char * devname, void *dev_id)
487 {
488 	struct irqaction *action;
489 	int retval;
490 
491 	if (irq >= MAX_IRQS)
492 		return -EINVAL;
493 
494 	if (!handler)
495 		/* We could implement really free_irq() instead of that... */
496 		return do_free_irq(irq, dev_id);
497 
498 	action = (struct irqaction *)
499 		irq_kmalloc(sizeof(struct irqaction), GFP_KERNEL);
500 	if (!action) {
501 		printk(KERN_ERR "irq_kmalloc() failed for irq %d !\n", irq);
502 		return -ENOMEM;
503 	}
504 
505 	action->handler = handler;
506 	action->flags = irqflags;
507 	action->mask = 0;
508 	action->name = devname;
509 	action->dev_id = dev_id;
510 	action->next = NULL;
511 
512 	retval = setup_irq(irq, action);
513 	if (retval)
514 		kfree(action);
515 
516 	return 0;
517 }
518 
free_irq(unsigned int irq,void * dev_id)519 void free_irq(unsigned int irq, void *dev_id)
520 {
521 	request_irq(irq, NULL, 0, NULL, dev_id);
522 }
523 
524 /*
525  * Generic enable/disable code: this just calls
526  * down into the PIC-specific version for the actual
527  * hardware disable after having gotten the irq
528  * controller lock.
529  */
530 
531 /**
532  *	disable_irq_nosync - disable an irq without waiting
533  *	@irq: Interrupt to disable
534  *
535  *	Disable the selected interrupt line. Disables of an interrupt
536  *	stack. Unlike disable_irq(), this function does not ensure existing
537  *	instances of the IRQ handler have completed before returning.
538  *
539  *	This function may be called from IRQ context.
540  */
541 
disable_irq_nosync(unsigned int irq)542  void disable_irq_nosync(unsigned int irq)
543 {
544 	irq_desc_t *desc = irqdesc(irq);
545 	unsigned long flags;
546 
547 	spin_lock_irqsave(&desc->lock, flags);
548 	if (!desc->depth++) {
549 		if (!(desc->status & IRQ_PER_CPU))
550 			desc->status |= IRQ_DISABLED;
551 		mask_irq(irq);
552 	}
553 	spin_unlock_irqrestore(&desc->lock, flags);
554 }
555 
556 /**
557  *	disable_irq - disable an irq and wait for completion
558  *	@irq: Interrupt to disable
559  *
560  *	Disable the selected interrupt line. Disables of an interrupt
561  *	stack. That is for two disables you need two enables. This
562  *	function waits for any pending IRQ handlers for this interrupt
563  *	to complete before returning. If you use this function while
564  *	holding a resource the IRQ handler may need you will deadlock.
565  *
566  *	This function may be called - with care - from IRQ context.
567  */
568 
disable_irq(unsigned int irq)569 void disable_irq(unsigned int irq)
570 {
571 	disable_irq_nosync(irq);
572 
573 	if (!local_irq_count(smp_processor_id())) {
574 		do {
575 			barrier();
576 		} while (irqdesc(irq)->status & IRQ_INPROGRESS);
577 	}
578 }
579 
580 /**
581  *	enable_irq - enable interrupt handling on an irq
582  *	@irq: Interrupt to enable
583  *
584  *	Re-enables the processing of interrupts on this IRQ line
585  *	providing no disable_irq calls are now in effect.
586  *
587  *	This function may be called from IRQ context.
588  */
589 
enable_irq(unsigned int irq)590 void enable_irq(unsigned int irq)
591 {
592 	irq_desc_t *desc = irqdesc(irq);
593 	unsigned long flags;
594 
595 	spin_lock_irqsave(&desc->lock, flags);
596 	switch (desc->depth) {
597 	case 1: {
598 		unsigned int status = desc->status & ~IRQ_DISABLED;
599 		desc->status = status;
600 		if ((status & (IRQ_PENDING | IRQ_REPLAY)) == IRQ_PENDING) {
601 			desc->status = status | IRQ_REPLAY;
602 			hw_resend_irq(desc->handler,irq);
603 		}
604 		unmask_irq(irq);
605 		/* fall-through */
606 	}
607 	default:
608 		desc->depth--;
609 		break;
610 	case 0:
611 		printk("enable_irq(%u) unbalanced\n", irq);
612 	}
613 	spin_unlock_irqrestore(&desc->lock, flags);
614 }
615 
616 /* This function as implemented was a potential source of data
617  * corruption.  I pulled it for now, until it can be properly
618  * implemented. DRENG
619  */
get_irq_list(char * buf)620 int get_irq_list(char *buf)
621 {
622 	return(0);
623 }
624 
show_interrupts(struct seq_file * p,void * v)625 int show_interrupts(struct seq_file *p, void *v)
626 {
627 	int i, j;
628 	struct irqaction * action;
629 	irq_desc_t *desc;
630 	struct hw_irq_stat *hwstat;
631 	unsigned long *per_cpus;
632 	unsigned long flags;
633 
634 	seq_printf(p, "           ");
635 	for (j=0; j<smp_num_cpus; j++)
636 		seq_printf(p, "CPU%d       ",j);
637 	seq_putc(p, '\n');
638 
639 	for_each_irq(i) {
640 		desc = irqdesc(i);
641 		spin_lock_irqsave(&desc->lock, flags);
642 		action = desc->action;
643 
644 		if (!action || !action->handler)
645 			goto skip;
646 		seq_printf(p, "%3d: ", i);
647 		hwstat = get_irq_stat(desc);
648 		per_cpus = get_irq_per_cpu(hwstat);
649 		if (per_cpus) {
650 		for (j = 0; j < smp_num_cpus; j++)
651 				seq_printf(p, "%10lu ", per_cpus[j]);
652 		} else {
653 			seq_printf(p, "%10lu ", hwstat->irqs);
654 		}
655 
656 		if (irqdesc(i)->handler)
657 			seq_printf(p, " %s ", irqdesc(i)->handler->typename );
658 		else
659 			seq_printf(p, "  None      ");
660 		seq_printf(p, "%s", (irqdesc(i)->status & IRQ_LEVEL) ? "Level " : "Edge  ");
661 		seq_printf(p, "    %s",action->name);
662 		for (action=action->next; action; action = action->next)
663 			seq_printf(p, ", %s", action->name);
664 		seq_putc(p, '\n');
665 skip:
666 		spin_unlock_irqrestore(&desc->lock, flags);
667 	}
668 #ifdef CONFIG_SMP
669 	/* should this be per processor send/receive? */
670 	seq_printf(p, "IPI (recv/sent): %10u/%u\n",
671 		       atomic_read(&ipi_recv), atomic_read(&ipi_sent));
672 #endif
673 	seq_printf(p, "BAD: %10u\n", ppc_spurious_interrupts);
674 	return 0;
675 }
676 
677 static inline void
handle_irq_event(int irq,struct pt_regs * regs,struct irqaction * action)678 handle_irq_event(int irq, struct pt_regs *regs, struct irqaction *action)
679 {
680 	int status = 0;
681 
682 	if (!(action->flags & SA_INTERRUPT))
683 		__sti();
684 
685 	do {
686 		status |= action->flags;
687 		action->handler(irq, action->dev_id, regs);
688 		action = action->next;
689 	} while (action);
690 	if (status & SA_SAMPLE_RANDOM)
691 		add_interrupt_randomness(irq);
692 	__cli();
693 }
694 
695 /*
696  * Eventually, this should take an array of interrupts and an array size
697  * so it can dispatch multiple interrupts.
698  */
ppc_irq_dispatch_handler(struct pt_regs * regs,int irq)699 void ppc_irq_dispatch_handler(struct pt_regs *regs, int irq)
700 {
701 	int status;
702 	struct irqaction *action;
703 	int cpu = smp_processor_id();
704 	irq_desc_t *desc = irqdesc(irq);
705 	struct hw_irq_stat *hwstat;
706 	unsigned long *per_cpus;
707 
708 	/* Statistics. */
709 	hwstat = get_irq_stat(desc);	/* same cache line as desc */
710 	hwstat->irqs++;
711 	per_cpus = get_irq_per_cpu(hwstat); /* same cache line for < 8 cpus */
712 	if (per_cpus)
713 		per_cpus[cpu]++;
714 
715 	if(irq < NR_IRQS) {
716 	kstat.irqs[cpu][irq]++;
717 	} else {
718 		kstat.irqs[cpu][NR_IRQS-1]++;
719 	}
720 
721 
722 	spin_lock(&desc->lock);
723 	ack_irq(irq);
724 	/*
725 	   REPLAY is when Linux resends an IRQ that was dropped earlier
726 	   WAITING is used by probe to mark irqs that are being tested
727 	   */
728 	status = desc->status & ~(IRQ_REPLAY | IRQ_WAITING);
729 	if (!(status & IRQ_PER_CPU))
730 		status |= IRQ_PENDING; /* we _want_ to handle it */
731 
732 	/*
733 	 * If the IRQ is disabled for whatever reason, we cannot
734 	 * use the action we have.
735 	 */
736 	action = NULL;
737 	if (!(status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
738 		action = desc->action;
739 		if (!action || !action->handler) {
740 			ppc_spurious_interrupts++;
741 			printk(KERN_DEBUG "Unhandled interrupt %x, disabled\n", irq);
742 			/* We can't call disable_irq here, it would deadlock */
743 			if (!desc->depth)
744 				desc->depth = 1;
745 			desc->status |= IRQ_DISABLED;
746 			/* This is not a real spurrious interrupt, we
747 			 * have to eoi it, so we jump to out
748 			 */
749 			mask_irq(irq);
750 			goto out;
751 		}
752 		status &= ~IRQ_PENDING; /* we commit to handling */
753 		if (!(status & IRQ_PER_CPU))
754 			status |= IRQ_INPROGRESS; /* we are handling it */
755 	}
756 	desc->status = status;
757 
758 	/*
759 	 * If there is no IRQ handler or it was disabled, exit early.
760 	   Since we set PENDING, if another processor is handling
761 	   a different instance of this same irq, the other processor
762 	   will take care of it.
763 	 */
764 	if (!action)
765 		goto out;
766 
767 
768 	/*
769 	 * Edge triggered interrupts need to remember
770 	 * pending events.
771 	 * This applies to any hw interrupts that allow a second
772 	 * instance of the same irq to arrive while we are in do_IRQ
773 	 * or in the handler. But the code here only handles the _second_
774 	 * instance of the irq, not the third or fourth. So it is mostly
775 	 * useful for irq hardware that does not mask cleanly in an
776 	 * SMP environment.
777 	 */
778 	for (;;) {
779 		spin_unlock(&desc->lock);
780 		handle_irq_event(irq, regs, action);
781 		spin_lock(&desc->lock);
782 
783 		if (!(desc->status & IRQ_PENDING))
784 			break;
785 		desc->status &= ~IRQ_PENDING;
786 	}
787 	desc->status &= ~IRQ_INPROGRESS;
788 out:
789 	/*
790 	 * The ->end() handler has to deal with interrupts which got
791 	 * disabled while the handler was running.
792 	 */
793 	if (desc->handler) {
794 		if (desc->handler->end)
795 			desc->handler->end(irq);
796 		else if (desc->handler->enable)
797 			desc->handler->enable(irq);
798 	}
799 	spin_unlock(&desc->lock);
800 }
801 
do_IRQ(struct pt_regs * regs)802 int do_IRQ(struct pt_regs *regs)
803 {
804 	int cpu = smp_processor_id();
805 	int irq, first = 1;
806 #ifdef CONFIG_PPC_ISERIES
807 	struct paca_struct *lpaca;
808 	struct ItLpQueue *lpq;
809 #endif
810 
811 	irq_enter(cpu);
812 
813 #ifdef CONFIG_PPC_ISERIES
814 	lpaca = get_paca();
815 #ifdef CONFIG_SMP
816 	if (lpaca->xLpPaca.xIntDword.xFields.xIpiCnt) {
817 		lpaca->xLpPaca.xIntDword.xFields.xIpiCnt = 0;
818 		iSeries_smp_message_recv(regs);
819 	}
820 #endif /* CONFIG_SMP */
821 	lpq = lpaca->lpQueuePtr;
822 	if (lpq && ItLpQueue_isLpIntPending(lpq))
823 		lpEvent_count += ItLpQueue_process(lpq, regs);
824 #else
825 	/*
826 	 * Every arch is required to implement ppc_md.get_irq.
827 	 * This function will either return an irq number or -1 to
828 	 * indicate there are no more pending.  But the first time
829 	 * through the loop this means there wasn't an IRQ pending.
830 	 * The value -2 is for buggy hardware and means that this IRQ
831 	 * has already been handled. -- Tom
832 	 */
833 	while ((irq = ppc_md.get_irq(regs)) >= 0) {
834 		ppc_irq_dispatch_handler(regs, irq);
835 		first = 0;
836 	}
837 	if (irq != -2 && first)
838 		/* That's not SMP safe ... but who cares ? */
839 		ppc_spurious_interrupts++;
840 #endif
841 
842         irq_exit(cpu);
843 
844 #ifdef CONFIG_PPC_ISERIES
845 	if (lpaca->xLpPaca.xIntDword.xFields.xDecrInt) {
846 		lpaca->xLpPaca.xIntDword.xFields.xDecrInt = 0;
847 		/* Signal a fake decrementer interrupt */
848 		timer_interrupt(regs);
849 	}
850 
851 	if (lpaca->xLpPaca.xIntDword.xFields.xPdcInt) {
852 		lpaca->xLpPaca.xIntDword.xFields.xPdcInt = 0;
853 		/* Signal a fake PMC interrupt */
854 		PerformanceMonitorException();
855 	}
856 #endif
857 
858 	if (softirq_pending(cpu))
859 		do_softirq();
860 
861 	return 1; /* lets ret_from_int know we can do checks */
862 }
863 
probe_irq_on(void)864 unsigned long probe_irq_on (void)
865 {
866 	return 0;
867 }
868 
probe_irq_off(unsigned long irqs)869 int probe_irq_off (unsigned long irqs)
870 {
871 	return 0;
872 }
873 
probe_irq_mask(unsigned long irqs)874 unsigned int probe_irq_mask(unsigned long irqs)
875 {
876 	return 0;
877 }
878 
init_IRQ(void)879 void __init init_IRQ(void)
880 {
881 	static int once = 0;
882 
883 	if ( once )
884 		return;
885 	else
886 		once++;
887 
888 	/* Initialize the irq tree */
889 	irq_desc_init();
890 
891 	ppc_md.init_IRQ();
892 	if(ppc_md.init_ras_IRQ) ppc_md.init_ras_IRQ();
893 }
894 
895 #ifdef CONFIG_SMP
896 unsigned char global_irq_holder = NO_PROC_ID;
897 
show(char * str)898 static void show(char * str)
899 {
900 	int cpu = smp_processor_id();
901 	int i;
902 
903 	printk("\n%s, CPU %d:\n", str, cpu);
904 	printk("irq:  %d [ ", irqs_running());
905 	for (i = 0; i < smp_num_cpus; i++)
906 		printk("%u ", __brlock_array[i][BR_GLOBALIRQ_LOCK]);
907 	printk("]\nbh:   %d [ ",
908 		(spin_is_locked(&global_bh_lock) ? 1 : 0));
909 	for (i = 0; i < smp_num_cpus; i++)
910 		printk("%u ", local_bh_count(i));
911 	printk("]\n");
912 }
913 
914 #define MAXCOUNT 10000000
915 
synchronize_irq(void)916 void synchronize_irq(void)
917 {
918 	if (irqs_running()) {
919 		cli();
920 		sti();
921 	}
922 }
923 
get_irqlock(int cpu)924 static inline void get_irqlock(int cpu)
925 {
926         int count;
927 
928         if ((unsigned char)cpu == global_irq_holder)
929                 return;
930 
931         count = MAXCOUNT;
932 again:
933         br_write_lock(BR_GLOBALIRQ_LOCK);
934         for (;;) {
935                 spinlock_t *lock;
936 
937                 if (!irqs_running() &&
938                     (local_bh_count(smp_processor_id()) || !spin_is_locked(&global_bh_lock)))
939                         break;
940 
941                 br_write_unlock(BR_GLOBALIRQ_LOCK);
942                 lock = &__br_write_locks[BR_GLOBALIRQ_LOCK].lock;
943                 while (irqs_running() ||
944                        spin_is_locked(lock) ||
945                        (!local_bh_count(smp_processor_id()) && spin_is_locked(&global_bh_lock))) {
946                         if (!--count) {
947                                 show("get_irqlock");
948                                 count = (~0 >> 1);
949                         }
950                         __sti();
951                         barrier();
952                         __cli();
953                 }
954                 goto again;
955         }
956 
957         global_irq_holder = cpu;
958 }
959 
960 /*
961  * A global "cli()" while in an interrupt context
962  * turns into just a local cli(). Interrupts
963  * should use spinlocks for the (very unlikely)
964  * case that they ever want to protect against
965  * each other.
966  *
967  * If we already have local interrupts disabled,
968  * this will not turn a local disable into a
969  * global one (problems with spinlocks: this makes
970  * save_flags+cli+sti usable inside a spinlock).
971  */
__global_cli(void)972 void __global_cli(void)
973 {
974 	unsigned long flags;
975 
976 	__save_flags(flags);
977 	if (flags & (1UL << 15)) {
978 		int cpu = smp_processor_id();
979 		__cli();
980 		if (!local_irq_count(cpu))
981 			get_irqlock(cpu);
982 	}
983 }
984 
__global_sti(void)985 void __global_sti(void)
986 {
987 	int cpu = smp_processor_id();
988 
989 	if (!local_irq_count(cpu))
990 		release_irqlock(cpu);
991 	__sti();
992 }
993 
994 /*
995  * SMP flags value to restore to:
996  * 0 - global cli
997  * 1 - global sti
998  * 2 - local cli
999  * 3 - local sti
1000  */
__global_save_flags(void)1001 unsigned long __global_save_flags(void)
1002 {
1003 	int retval;
1004 	int local_enabled;
1005 	unsigned long flags;
1006 
1007 	__save_flags(flags);
1008 	local_enabled = (flags >> 15) & 1;
1009 	/* default to local */
1010 	retval = 2 + local_enabled;
1011 
1012 	/* check for global flags if we're not in an interrupt */
1013 	if (!local_irq_count(smp_processor_id())) {
1014 		if (local_enabled)
1015 			retval = 1;
1016 		if (global_irq_holder == (unsigned char) smp_processor_id())
1017 			retval = 0;
1018 	}
1019 	return retval;
1020 }
1021 
__global_restore_flags(unsigned long flags)1022 void __global_restore_flags(unsigned long flags)
1023 {
1024 	switch (flags) {
1025 	case 0:
1026 		__global_cli();
1027 		break;
1028 	case 1:
1029 		__global_sti();
1030 		break;
1031 	case 2:
1032 		__cli();
1033 		break;
1034 	case 3:
1035 		__sti();
1036 		break;
1037 	default:
1038 		printk("global_restore_flags: %016lx caller %p\n",
1039 			flags, __builtin_return_address(0));
1040 	}
1041 }
1042 
1043 #endif /* CONFIG_SMP */
1044 
1045 static struct proc_dir_entry * root_irq_dir;
1046 #if 0
1047 static struct proc_dir_entry * irq_dir [NR_IRQS];
1048 static struct proc_dir_entry * smp_affinity_entry [NR_IRQS];
1049 
1050 #ifdef CONFIG_IRQ_ALL_CPUS
1051 unsigned int irq_affinity [NR_IRQS] = { [0 ... NR_IRQS-1] = 0xffffffff};
1052 #else  /* CONFIG_IRQ_ALL_CPUS */
1053 unsigned int irq_affinity [NR_IRQS] = { [0 ... NR_IRQS-1] = 0x00000000};
1054 #endif /* CONFIG_IRQ_ALL_CPUS */
1055 #endif
1056 
1057 #define HEX_DIGITS 8
1058 
irq_affinity_read_proc(char * page,char ** start,off_t off,int count,int * eof,void * data)1059 static int irq_affinity_read_proc (char *page, char **start, off_t off,
1060 			int count, int *eof, void *data)
1061 {
1062 	irq_desc_t *desc = irqdesc((long)data);
1063 	struct hw_irq_stat *hwstat = get_irq_stat(desc);
1064 
1065 	if (count < HEX_DIGITS+1)
1066 		return -EINVAL;
1067 	return sprintf(page, "%16lx\n", hwstat->irq_affinity);
1068 }
1069 
parse_hex_value(const char * buffer,unsigned long count,unsigned long * ret)1070 static unsigned int parse_hex_value (const char *buffer,
1071 		unsigned long count, unsigned long *ret)
1072 {
1073 	unsigned char hexnum [HEX_DIGITS];
1074 	unsigned long value;
1075 	int i;
1076 
1077 	if (!count)
1078 		return -EINVAL;
1079 	if (count > HEX_DIGITS)
1080 		count = HEX_DIGITS;
1081 	if (copy_from_user(hexnum, buffer, count))
1082 		return -EFAULT;
1083 
1084 	/*
1085 	 * Parse the first 8 characters as a hex string, any non-hex char
1086 	 * is end-of-string. '00e1', 'e1', '00E1', 'E1' are all the same.
1087 	 */
1088 	value = 0;
1089 
1090 	for (i = 0; i < count; i++) {
1091 		unsigned int c = hexnum[i];
1092 
1093 		switch (c) {
1094 			case '0' ... '9': c -= '0'; break;
1095 			case 'a' ... 'f': c -= 'a'-10; break;
1096 			case 'A' ... 'F': c -= 'A'-10; break;
1097 		default:
1098 			goto out;
1099 		}
1100 		value = (value << 4) | c;
1101 	}
1102 out:
1103 	*ret = value;
1104 	return 0;
1105 }
1106 
irq_affinity_write_proc(struct file * file,const char * buffer,unsigned long count,void * data)1107 static int irq_affinity_write_proc (struct file *file, const char *buffer,
1108 					unsigned long count, void *data)
1109 {
1110 	unsigned int irq = (long)data;
1111 	irq_desc_t *desc = irqdesc(irq);
1112 	struct hw_irq_stat *hwstat = get_irq_stat(desc);
1113 	int full_count = count, err;
1114 	unsigned long new_value;
1115 
1116 	if (!desc->handler->set_affinity)
1117 		return -EIO;
1118 
1119 	err = parse_hex_value(buffer, count, &new_value);
1120 
1121 /* Why is this disabled ? --BenH */
1122 #if 0/*CONFIG_SMP*/
1123 	/*
1124 	 * Do not allow disabling IRQs completely - it's a too easy
1125 	 * way to make the system unusable accidentally :-) At least
1126 	 * one online CPU still has to be targeted.
1127 	 */
1128 	if (!(new_value & cpu_online_map))
1129 		return -EINVAL;
1130 #endif
1131 	hwstat->irq_affinity = new_value;
1132 	desc->handler->set_affinity(irq, new_value);
1133 	return full_count;
1134 }
1135 
prof_cpu_mask_read_proc(char * page,char ** start,off_t off,int count,int * eof,void * data)1136 static int prof_cpu_mask_read_proc (char *page, char **start, off_t off,
1137 			int count, int *eof, void *data)
1138 {
1139 	unsigned long *mask = (unsigned long *) data;
1140 	if (count < HEX_DIGITS+1)
1141 		return -EINVAL;
1142 	return sprintf (page, "%08lx\n", *mask);
1143 }
1144 
prof_cpu_mask_write_proc(struct file * file,const char * buffer,unsigned long count,void * data)1145 static int prof_cpu_mask_write_proc (struct file *file, const char *buffer,
1146 					unsigned long count, void *data)
1147 {
1148 	unsigned long *mask = (unsigned long *) data, full_count = count, err;
1149 	unsigned long new_value;
1150 
1151 	err = parse_hex_value(buffer, count, &new_value);
1152 	if (err)
1153 		return err;
1154 
1155 	*mask = new_value;
1156 
1157 #ifdef CONFIG_PPC_ISERIES
1158 	{
1159 		unsigned i;
1160 		for (i=0; i<MAX_PACAS; ++i) {
1161 			if ( paca[i].prof_buffer && (new_value & 1) )
1162 				paca[i].prof_mode = PMC_STATE_DECR_PROFILE;
1163 			else {
1164 				if(paca[i].prof_mode != PMC_STATE_INITIAL)
1165 					paca[i].prof_mode = PMC_STATE_READY;
1166 			}
1167 			new_value >>= 1;
1168 		}
1169 	}
1170 #endif
1171 
1172 	return full_count;
1173 }
1174 
1175 #define MAX_NAMELEN 10
1176 
register_irq_proc(unsigned int irq)1177 static void register_irq_proc (unsigned int irq)
1178 {
1179 	struct proc_dir_entry *entry;
1180 	char name [MAX_NAMELEN];
1181 	irq_desc_t *desc;
1182 	struct hw_irq_stat *hwstat;
1183 
1184 	desc = real_irqdesc(irq);
1185 	if (!root_irq_dir || !desc || !desc->handler)
1186 		return;
1187 	hwstat = get_irq_stat(desc);
1188 	if (hwstat->irq_dir)
1189 		return;
1190 
1191 	memset(name, 0, MAX_NAMELEN);
1192 	sprintf(name, "%d", irq);
1193 
1194 	/* create /proc/irq/1234 */
1195 	hwstat->irq_dir = proc_mkdir(name, root_irq_dir);
1196 	if(hwstat->irq_dir == NULL) {
1197 		printk(KERN_ERR "register_irq_proc: proc_mkdir failed.\n");
1198 		return;
1199 	}
1200 
1201 	/* create /proc/irq/1234/smp_affinity */
1202 	entry = create_proc_entry("smp_affinity", 0600, hwstat->irq_dir);
1203 
1204 	if(entry) {
1205 		entry->nlink = 1;
1206 		entry->data = (void *)(long)irq;
1207 		entry->read_proc = irq_affinity_read_proc;
1208 		entry->write_proc = irq_affinity_write_proc;
1209 	} else {
1210 		printk(KERN_ERR "register_irq_proc: create_proc_entry failed.\n");
1211 	}
1212 
1213 	hwstat->smp_affinity = entry;
1214 }
1215 
1216 unsigned long prof_cpu_mask = -1;
1217 
init_irq_proc(void)1218 void init_irq_proc (void)
1219 {
1220 	struct proc_dir_entry *entry;
1221 	int i;
1222 
1223 	/* create /proc/irq */
1224 	root_irq_dir = proc_mkdir("irq", 0);
1225 	if(root_irq_dir == NULL) {
1226 		printk(KERN_ERR "init_irq_proc: proc_mkdir failed.\n");
1227 	}
1228 
1229 	/* create /proc/irq/prof_cpu_mask */
1230 	entry = create_proc_entry("prof_cpu_mask", 0600, root_irq_dir);
1231 
1232 	if(entry) {
1233 		entry->nlink = 1;
1234 		entry->data = (void *)&prof_cpu_mask;
1235 		entry->read_proc = prof_cpu_mask_read_proc;
1236 		entry->write_proc = prof_cpu_mask_write_proc;
1237 	} else {
1238 		printk(KERN_ERR "init_irq_proc: create_proc_entry failed.\n");
1239 	}
1240 
1241 	/*
1242 	 * Create entries for all existing IRQs.
1243 	 */
1244 	for_each_irq(i) {
1245 		if (irqdesc(i)->handler == NULL)
1246 			continue;
1247 		register_irq_proc(i);
1248 	}
1249 }
1250 
no_action(int irq,void * dev,struct pt_regs * regs)1251 void no_action(int irq, void *dev, struct pt_regs *regs)
1252 {
1253 }
1254