1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Based on arch/arm/include/asm/memory.h
4 *
5 * Copyright (C) 2000-2002 Russell King
6 * Copyright (C) 2012 ARM Ltd.
7 *
8 * Note: this file should not be included by non-asm/.h files
9 */
10 #ifndef __ASM_MEMORY_H
11 #define __ASM_MEMORY_H
12
13 #include <linux/const.h>
14 #include <linux/sizes.h>
15 #include <asm/page-def.h>
16
17 /*
18 * Size of the PCI I/O space. This must remain a power of two so that
19 * IO_SPACE_LIMIT acts as a mask for the low bits of I/O addresses.
20 */
21 #define PCI_IO_SIZE SZ_16M
22
23 /*
24 * VMEMMAP_SIZE - allows the whole linear region to be covered by
25 * a struct page array
26 *
27 * If we are configured with a 52-bit kernel VA then our VMEMMAP_SIZE
28 * needs to cover the memory region from the beginning of the 52-bit
29 * PAGE_OFFSET all the way to PAGE_END for 48-bit. This allows us to
30 * keep a constant PAGE_OFFSET and "fallback" to using the higher end
31 * of the VMEMMAP where 52-bit support is not available in hardware.
32 */
33 #define VMEMMAP_SHIFT (PAGE_SHIFT - STRUCT_PAGE_MAX_SHIFT)
34 #define VMEMMAP_SIZE ((_PAGE_END(VA_BITS_MIN) - PAGE_OFFSET) >> VMEMMAP_SHIFT)
35
36 /*
37 * PAGE_OFFSET - the virtual address of the start of the linear map, at the
38 * start of the TTBR1 address space.
39 * PAGE_END - the end of the linear map, where all other kernel mappings begin.
40 * KIMAGE_VADDR - the virtual address of the start of the kernel image.
41 * VA_BITS - the maximum number of bits for virtual addresses.
42 */
43 #define VA_BITS (CONFIG_ARM64_VA_BITS)
44 #define _PAGE_OFFSET(va) (-(UL(1) << (va)))
45 #define PAGE_OFFSET (_PAGE_OFFSET(VA_BITS))
46 #define KIMAGE_VADDR (MODULES_END)
47 #define MODULES_END (MODULES_VADDR + MODULES_VSIZE)
48 #define MODULES_VADDR (_PAGE_END(VA_BITS_MIN))
49 #define MODULES_VSIZE (SZ_128M)
50 #define VMEMMAP_START (-(UL(1) << (VA_BITS - VMEMMAP_SHIFT)))
51 #define VMEMMAP_END (VMEMMAP_START + VMEMMAP_SIZE)
52 #define PCI_IO_END (VMEMMAP_START - SZ_8M)
53 #define PCI_IO_START (PCI_IO_END - PCI_IO_SIZE)
54 #define FIXADDR_TOP (VMEMMAP_START - SZ_32M)
55
56 #if VA_BITS > 48
57 #define VA_BITS_MIN (48)
58 #else
59 #define VA_BITS_MIN (VA_BITS)
60 #endif
61
62 #define _PAGE_END(va) (-(UL(1) << ((va) - 1)))
63
64 #define KERNEL_START _text
65 #define KERNEL_END _end
66
67 /*
68 * Generic and tag-based KASAN require 1/8th and 1/16th of the kernel virtual
69 * address space for the shadow region respectively. They can bloat the stack
70 * significantly, so double the (minimum) stack size when they are in use.
71 */
72 #if defined(CONFIG_KASAN_GENERIC) || defined(CONFIG_KASAN_SW_TAGS)
73 #define KASAN_SHADOW_OFFSET _AC(CONFIG_KASAN_SHADOW_OFFSET, UL)
74 #define KASAN_SHADOW_END ((UL(1) << (64 - KASAN_SHADOW_SCALE_SHIFT)) \
75 + KASAN_SHADOW_OFFSET)
76 #define PAGE_END (KASAN_SHADOW_END - (1UL << (vabits_actual - KASAN_SHADOW_SCALE_SHIFT)))
77 #define KASAN_THREAD_SHIFT 1
78 #else
79 #define KASAN_THREAD_SHIFT 0
80 #define PAGE_END (_PAGE_END(VA_BITS_MIN))
81 #endif /* CONFIG_KASAN */
82
83 #define MIN_THREAD_SHIFT (14 + KASAN_THREAD_SHIFT)
84
85 /*
86 * VMAP'd stacks are allocated at page granularity, so we must ensure that such
87 * stacks are a multiple of page size.
88 */
89 #if defined(CONFIG_VMAP_STACK) && (MIN_THREAD_SHIFT < PAGE_SHIFT)
90 #define THREAD_SHIFT PAGE_SHIFT
91 #else
92 #define THREAD_SHIFT MIN_THREAD_SHIFT
93 #endif
94
95 #if THREAD_SHIFT >= PAGE_SHIFT
96 #define THREAD_SIZE_ORDER (THREAD_SHIFT - PAGE_SHIFT)
97 #endif
98
99 #define THREAD_SIZE (UL(1) << THREAD_SHIFT)
100
101 /*
102 * By aligning VMAP'd stacks to 2 * THREAD_SIZE, we can detect overflow by
103 * checking sp & (1 << THREAD_SHIFT), which we can do cheaply in the entry
104 * assembly.
105 */
106 #ifdef CONFIG_VMAP_STACK
107 #define THREAD_ALIGN (2 * THREAD_SIZE)
108 #else
109 #define THREAD_ALIGN THREAD_SIZE
110 #endif
111
112 #define IRQ_STACK_SIZE THREAD_SIZE
113
114 #define OVERFLOW_STACK_SIZE SZ_4K
115
116 /*
117 * Alignment of kernel segments (e.g. .text, .data).
118 *
119 * 4 KB granule: 16 level 3 entries, with contiguous bit
120 * 16 KB granule: 4 level 3 entries, without contiguous bit
121 * 64 KB granule: 1 level 3 entry
122 */
123 #define SEGMENT_ALIGN SZ_64K
124
125 /*
126 * Memory types available.
127 *
128 * IMPORTANT: MT_NORMAL must be index 0 since vm_get_page_prot() may 'or' in
129 * the MT_NORMAL_TAGGED memory type for PROT_MTE mappings. Note
130 * that protection_map[] only contains MT_NORMAL attributes.
131 */
132 #define MT_NORMAL 0
133 #define MT_NORMAL_TAGGED 1
134 #define MT_NORMAL_NC 2
135 #define MT_DEVICE_nGnRnE 3
136 #define MT_DEVICE_nGnRE 4
137
138 /*
139 * Memory types for Stage-2 translation
140 */
141 #define MT_S2_NORMAL 0xf
142 #define MT_S2_DEVICE_nGnRE 0x1
143
144 /*
145 * Memory types for Stage-2 translation when ID_AA64MMFR2_EL1.FWB is 0001
146 * Stage-2 enforces Normal-WB and Device-nGnRE
147 */
148 #define MT_S2_FWB_NORMAL 6
149 #define MT_S2_FWB_DEVICE_nGnRE 1
150
151 #ifdef CONFIG_ARM64_4K_PAGES
152 #define IOREMAP_MAX_ORDER (PUD_SHIFT)
153 #else
154 #define IOREMAP_MAX_ORDER (PMD_SHIFT)
155 #endif
156
157 /*
158 * Open-coded (swapper_pg_dir - reserved_pg_dir) as this cannot be calculated
159 * until link time.
160 */
161 #define RESERVED_SWAPPER_OFFSET (PAGE_SIZE)
162
163 /*
164 * Open-coded (swapper_pg_dir - tramp_pg_dir) as this cannot be calculated
165 * until link time.
166 */
167 #define TRAMP_SWAPPER_OFFSET (2 * PAGE_SIZE)
168
169 #ifndef __ASSEMBLY__
170
171 #include <linux/bitops.h>
172 #include <linux/compiler.h>
173 #include <linux/mmdebug.h>
174 #include <linux/types.h>
175 #include <asm/bug.h>
176
177 extern u64 vabits_actual;
178
179 extern s64 memstart_addr;
180 /* PHYS_OFFSET - the physical address of the start of memory. */
181 #define PHYS_OFFSET ({ VM_BUG_ON(memstart_addr & 1); memstart_addr; })
182
183 /* the virtual base of the kernel image */
184 extern u64 kimage_vaddr;
185
186 /* the offset between the kernel virtual and physical mappings */
187 extern u64 kimage_voffset;
188
kaslr_offset(void)189 static inline unsigned long kaslr_offset(void)
190 {
191 return kimage_vaddr - KIMAGE_VADDR;
192 }
193
194 /*
195 * Allow all memory at the discovery stage. We will clip it later.
196 */
197 #define MIN_MEMBLOCK_ADDR 0
198 #define MAX_MEMBLOCK_ADDR U64_MAX
199
200 /*
201 * PFNs are used to describe any physical page; this means
202 * PFN 0 == physical address 0.
203 *
204 * This is the PFN of the first RAM page in the kernel
205 * direct-mapped view. We assume this is the first page
206 * of RAM in the mem_map as well.
207 */
208 #define PHYS_PFN_OFFSET (PHYS_OFFSET >> PAGE_SHIFT)
209
210 /*
211 * When dealing with data aborts, watchpoints, or instruction traps we may end
212 * up with a tagged userland pointer. Clear the tag to get a sane pointer to
213 * pass on to access_ok(), for instance.
214 */
215 #define __untagged_addr(addr) \
216 ((__force __typeof__(addr))sign_extend64((__force u64)(addr), 55))
217
218 #define untagged_addr(addr) ({ \
219 u64 __addr = (__force u64)(addr); \
220 __addr &= __untagged_addr(__addr); \
221 (__force __typeof__(addr))__addr; \
222 })
223
224 #if defined(CONFIG_KASAN_SW_TAGS) || defined(CONFIG_KASAN_HW_TAGS)
225 #define __tag_shifted(tag) ((u64)(tag) << 56)
226 #define __tag_reset(addr) __untagged_addr(addr)
227 #define __tag_get(addr) (__u8)((u64)(addr) >> 56)
228 #else
229 #define __tag_shifted(tag) 0UL
230 #define __tag_reset(addr) (addr)
231 #define __tag_get(addr) 0
232 #endif /* CONFIG_KASAN_SW_TAGS || CONFIG_KASAN_HW_TAGS */
233
__tag_set(const void * addr,u8 tag)234 static inline const void *__tag_set(const void *addr, u8 tag)
235 {
236 u64 __addr = (u64)addr & ~__tag_shifted(0xff);
237 return (const void *)(__addr | __tag_shifted(tag));
238 }
239
240 #ifdef CONFIG_KASAN_HW_TAGS
241 #define arch_enable_tagging_sync() mte_enable_kernel_sync()
242 #define arch_enable_tagging_async() mte_enable_kernel_async()
243 #define arch_enable_tagging_asymm() mte_enable_kernel_asymm()
244 #define arch_force_async_tag_fault() mte_check_tfsr_exit()
245 #define arch_get_random_tag() mte_get_random_tag()
246 #define arch_get_mem_tag(addr) mte_get_mem_tag(addr)
247 #define arch_set_mem_tag_range(addr, size, tag, init) \
248 mte_set_mem_tag_range((addr), (size), (tag), (init))
249 #endif /* CONFIG_KASAN_HW_TAGS */
250
251 /*
252 * Physical vs virtual RAM address space conversion. These are
253 * private definitions which should NOT be used outside memory.h
254 * files. Use virt_to_phys/phys_to_virt/__pa/__va instead.
255 */
256
257
258 /*
259 * Check whether an arbitrary address is within the linear map, which
260 * lives in the [PAGE_OFFSET, PAGE_END) interval at the bottom of the
261 * kernel's TTBR1 address range.
262 */
263 #define __is_lm_address(addr) (((u64)(addr) - PAGE_OFFSET) < (PAGE_END - PAGE_OFFSET))
264
265 #define __lm_to_phys(addr) (((addr) - PAGE_OFFSET) + PHYS_OFFSET)
266 #define __kimg_to_phys(addr) ((addr) - kimage_voffset)
267
268 #define __virt_to_phys_nodebug(x) ({ \
269 phys_addr_t __x = (phys_addr_t)(__tag_reset(x)); \
270 __is_lm_address(__x) ? __lm_to_phys(__x) : __kimg_to_phys(__x); \
271 })
272
273 #define __pa_symbol_nodebug(x) __kimg_to_phys((phys_addr_t)(x))
274
275 #ifdef CONFIG_DEBUG_VIRTUAL
276 extern phys_addr_t __virt_to_phys(unsigned long x);
277 extern phys_addr_t __phys_addr_symbol(unsigned long x);
278 #else
279 #define __virt_to_phys(x) __virt_to_phys_nodebug(x)
280 #define __phys_addr_symbol(x) __pa_symbol_nodebug(x)
281 #endif /* CONFIG_DEBUG_VIRTUAL */
282
283 #define __phys_to_virt(x) ((unsigned long)((x) - PHYS_OFFSET) | PAGE_OFFSET)
284 #define __phys_to_kimg(x) ((unsigned long)((x) + kimage_voffset))
285
286 /*
287 * Convert a page to/from a physical address
288 */
289 #define page_to_phys(page) (__pfn_to_phys(page_to_pfn(page)))
290 #define phys_to_page(phys) (pfn_to_page(__phys_to_pfn(phys)))
291
292 /*
293 * Note: Drivers should NOT use these. They are the wrong
294 * translation for translating DMA addresses. Use the driver
295 * DMA support - see dma-mapping.h.
296 */
297 #define virt_to_phys virt_to_phys
virt_to_phys(const volatile void * x)298 static inline phys_addr_t virt_to_phys(const volatile void *x)
299 {
300 return __virt_to_phys((unsigned long)(x));
301 }
302
303 #define phys_to_virt phys_to_virt
phys_to_virt(phys_addr_t x)304 static inline void *phys_to_virt(phys_addr_t x)
305 {
306 return (void *)(__phys_to_virt(x));
307 }
308
309 /*
310 * Drivers should NOT use these either.
311 */
312 #define __pa(x) __virt_to_phys((unsigned long)(x))
313 #define __pa_symbol(x) __phys_addr_symbol(RELOC_HIDE((unsigned long)(x), 0))
314 #define __pa_nodebug(x) __virt_to_phys_nodebug((unsigned long)(x))
315 #define __va(x) ((void *)__phys_to_virt((phys_addr_t)(x)))
316 #define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
317 #define virt_to_pfn(x) __phys_to_pfn(__virt_to_phys((unsigned long)(x)))
318 #define sym_to_pfn(x) __phys_to_pfn(__pa_symbol(x))
319
320 /*
321 * virt_to_page(x) convert a _valid_ virtual address to struct page *
322 * virt_addr_valid(x) indicates whether a virtual address is valid
323 */
324 #define ARCH_PFN_OFFSET ((unsigned long)PHYS_PFN_OFFSET)
325
326 #if defined(CONFIG_DEBUG_VIRTUAL)
327 #define page_to_virt(x) ({ \
328 __typeof__(x) __page = x; \
329 void *__addr = __va(page_to_phys(__page)); \
330 (void *)__tag_set((const void *)__addr, page_kasan_tag(__page));\
331 })
332 #define virt_to_page(x) pfn_to_page(virt_to_pfn(x))
333 #else
334 #define page_to_virt(x) ({ \
335 __typeof__(x) __page = x; \
336 u64 __idx = ((u64)__page - VMEMMAP_START) / sizeof(struct page);\
337 u64 __addr = PAGE_OFFSET + (__idx * PAGE_SIZE); \
338 (void *)__tag_set((const void *)__addr, page_kasan_tag(__page));\
339 })
340
341 #define virt_to_page(x) ({ \
342 u64 __idx = (__tag_reset((u64)x) - PAGE_OFFSET) / PAGE_SIZE; \
343 u64 __addr = VMEMMAP_START + (__idx * sizeof(struct page)); \
344 (struct page *)__addr; \
345 })
346 #endif /* CONFIG_DEBUG_VIRTUAL */
347
348 #define virt_addr_valid(addr) ({ \
349 __typeof__(addr) __addr = __tag_reset(addr); \
350 __is_lm_address(__addr) && pfn_is_map_memory(virt_to_pfn(__addr)); \
351 })
352
353 void dump_mem_limit(void);
354 #endif /* !ASSEMBLY */
355
356 /*
357 * Given that the GIC architecture permits ITS implementations that can only be
358 * configured with a LPI table address once, GICv3 systems with many CPUs may
359 * end up reserving a lot of different regions after a kexec for their LPI
360 * tables (one per CPU), as we are forced to reuse the same memory after kexec
361 * (and thus reserve it persistently with EFI beforehand)
362 */
363 #if defined(CONFIG_EFI) && defined(CONFIG_ARM_GIC_V3_ITS)
364 # define INIT_MEMBLOCK_RESERVED_REGIONS (INIT_MEMBLOCK_REGIONS + NR_CPUS + 1)
365 #endif
366
367 #include <asm-generic/memory_model.h>
368
369 #endif /* __ASM_MEMORY_H */
370