1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * ld script for the x86 kernel 4 * 5 * Historic 32-bit version written by Martin Mares <mj@atrey.karlin.mff.cuni.cz> 6 * 7 * Modernisation, unification and other changes and fixes: 8 * Copyright (C) 2007-2009 Sam Ravnborg <sam@ravnborg.org> 9 * 10 * 11 * Don't define absolute symbols until and unless you know that symbol 12 * value is should remain constant even if kernel image is relocated 13 * at run time. Absolute symbols are not relocated. If symbol value should 14 * change if kernel is relocated, make the symbol section relative and 15 * put it inside the section definition. 16 */ 17 18#ifdef CONFIG_X86_32 19#define LOAD_OFFSET __PAGE_OFFSET 20#else 21#define LOAD_OFFSET __START_KERNEL_map 22#endif 23 24#define RUNTIME_DISCARD_EXIT 25#define EMITS_PT_NOTE 26#define RO_EXCEPTION_TABLE_ALIGN 16 27 28#include <asm-generic/vmlinux.lds.h> 29#include <asm/asm-offsets.h> 30#include <asm/thread_info.h> 31#include <asm/page_types.h> 32#include <asm/orc_lookup.h> 33#include <asm/cache.h> 34#include <asm/boot.h> 35 36#undef i386 /* in case the preprocessor is a 32bit one */ 37 38OUTPUT_FORMAT(CONFIG_OUTPUT_FORMAT) 39 40#ifdef CONFIG_X86_32 41OUTPUT_ARCH(i386) 42ENTRY(phys_startup_32) 43#else 44OUTPUT_ARCH(i386:x86-64) 45ENTRY(phys_startup_64) 46#endif 47 48jiffies = jiffies_64; 49 50#if defined(CONFIG_X86_64) 51/* 52 * On 64-bit, align RODATA to 2MB so we retain large page mappings for 53 * boundaries spanning kernel text, rodata and data sections. 54 * 55 * However, kernel identity mappings will have different RWX permissions 56 * to the pages mapping to text and to the pages padding (which are freed) the 57 * text section. Hence kernel identity mappings will be broken to smaller 58 * pages. For 64-bit, kernel text and kernel identity mappings are different, 59 * so we can enable protection checks as well as retain 2MB large page 60 * mappings for kernel text. 61 */ 62#define X86_ALIGN_RODATA_BEGIN . = ALIGN(HPAGE_SIZE); 63 64#define X86_ALIGN_RODATA_END \ 65 . = ALIGN(HPAGE_SIZE); \ 66 __end_rodata_hpage_align = .; \ 67 __end_rodata_aligned = .; 68 69#define ALIGN_ENTRY_TEXT_BEGIN . = ALIGN(PMD_SIZE); 70#define ALIGN_ENTRY_TEXT_END . = ALIGN(PMD_SIZE); 71 72/* 73 * This section contains data which will be mapped as decrypted. Memory 74 * encryption operates on a page basis. Make this section PMD-aligned 75 * to avoid splitting the pages while mapping the section early. 76 * 77 * Note: We use a separate section so that only this section gets 78 * decrypted to avoid exposing more than we wish. 79 */ 80#define BSS_DECRYPTED \ 81 . = ALIGN(PMD_SIZE); \ 82 __start_bss_decrypted = .; \ 83 *(.bss..decrypted); \ 84 . = ALIGN(PAGE_SIZE); \ 85 __start_bss_decrypted_unused = .; \ 86 . = ALIGN(PMD_SIZE); \ 87 __end_bss_decrypted = .; \ 88 89#else 90 91#define X86_ALIGN_RODATA_BEGIN 92#define X86_ALIGN_RODATA_END \ 93 . = ALIGN(PAGE_SIZE); \ 94 __end_rodata_aligned = .; 95 96#define ALIGN_ENTRY_TEXT_BEGIN 97#define ALIGN_ENTRY_TEXT_END 98#define BSS_DECRYPTED 99 100#endif 101 102PHDRS { 103 text PT_LOAD FLAGS(5); /* R_E */ 104 data PT_LOAD FLAGS(6); /* RW_ */ 105#ifdef CONFIG_X86_64 106#ifdef CONFIG_SMP 107 percpu PT_LOAD FLAGS(6); /* RW_ */ 108#endif 109 init PT_LOAD FLAGS(7); /* RWE */ 110#endif 111 note PT_NOTE FLAGS(0); /* ___ */ 112} 113 114SECTIONS 115{ 116#ifdef CONFIG_X86_32 117 . = LOAD_OFFSET + LOAD_PHYSICAL_ADDR; 118 phys_startup_32 = ABSOLUTE(startup_32 - LOAD_OFFSET); 119#else 120 . = __START_KERNEL; 121 phys_startup_64 = ABSOLUTE(startup_64 - LOAD_OFFSET); 122#endif 123 124 /* Text and read-only data */ 125 .text : AT(ADDR(.text) - LOAD_OFFSET) { 126 _text = .; 127 _stext = .; 128 /* bootstrapping code */ 129 HEAD_TEXT 130 TEXT_TEXT 131 SCHED_TEXT 132 LOCK_TEXT 133 KPROBES_TEXT 134 SOFTIRQENTRY_TEXT 135#ifdef CONFIG_RETPOLINE 136 *(.text..__x86.indirect_thunk) 137 *(.text..__x86.return_thunk) 138#endif 139 STATIC_CALL_TEXT 140 141 ALIGN_ENTRY_TEXT_BEGIN 142#ifdef CONFIG_CPU_SRSO 143 *(.text..__x86.rethunk_untrain) 144#endif 145 146 ENTRY_TEXT 147 148#ifdef CONFIG_CPU_SRSO 149 /* 150 * See the comment above srso_alias_untrain_ret()'s 151 * definition. 152 */ 153 . = srso_alias_untrain_ret | (1 << 2) | (1 << 8) | (1 << 14) | (1 << 20); 154 *(.text..__x86.rethunk_safe) 155#endif 156 ALIGN_ENTRY_TEXT_END 157 *(.gnu.warning) 158 159 } :text = 0xcccccccc 160 161 /* End of text section, which should occupy whole number of pages */ 162 _etext = .; 163 . = ALIGN(PAGE_SIZE); 164 165 X86_ALIGN_RODATA_BEGIN 166 RO_DATA(PAGE_SIZE) 167 X86_ALIGN_RODATA_END 168 169 /* Data */ 170 .data : AT(ADDR(.data) - LOAD_OFFSET) { 171 /* Start of data section */ 172 _sdata = .; 173 174 /* init_task */ 175 INIT_TASK_DATA(THREAD_SIZE) 176 177#ifdef CONFIG_X86_32 178 /* 32 bit has nosave before _edata */ 179 NOSAVE_DATA 180#endif 181 182 PAGE_ALIGNED_DATA(PAGE_SIZE) 183 184 CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES) 185 186 DATA_DATA 187 CONSTRUCTORS 188 189 /* rarely changed data like cpu maps */ 190 READ_MOSTLY_DATA(INTERNODE_CACHE_BYTES) 191 192 /* End of data section */ 193 _edata = .; 194 } :data 195 196 BUG_TABLE 197 198 ORC_UNWIND_TABLE 199 200 . = ALIGN(PAGE_SIZE); 201 __vvar_page = .; 202 203 .vvar : AT(ADDR(.vvar) - LOAD_OFFSET) { 204 /* work around gold bug 13023 */ 205 __vvar_beginning_hack = .; 206 207 /* Place all vvars at the offsets in asm/vvar.h. */ 208#define EMIT_VVAR(name, offset) \ 209 . = __vvar_beginning_hack + offset; \ 210 *(.vvar_ ## name) 211#include <asm/vvar.h> 212#undef EMIT_VVAR 213 214 /* 215 * Pad the rest of the page with zeros. Otherwise the loader 216 * can leave garbage here. 217 */ 218 . = __vvar_beginning_hack + PAGE_SIZE; 219 } :data 220 221 . = ALIGN(__vvar_page + PAGE_SIZE, PAGE_SIZE); 222 223 /* Init code and data - will be freed after init */ 224 . = ALIGN(PAGE_SIZE); 225 .init.begin : AT(ADDR(.init.begin) - LOAD_OFFSET) { 226 __init_begin = .; /* paired with __init_end */ 227 } 228 229#if defined(CONFIG_X86_64) && defined(CONFIG_SMP) 230 /* 231 * percpu offsets are zero-based on SMP. PERCPU_VADDR() changes the 232 * output PHDR, so the next output section - .init.text - should 233 * start another segment - init. 234 */ 235 PERCPU_VADDR(INTERNODE_CACHE_BYTES, 0, :percpu) 236 ASSERT(SIZEOF(.data..percpu) < CONFIG_PHYSICAL_START, 237 "per-CPU data too large - increase CONFIG_PHYSICAL_START") 238#endif 239 240 INIT_TEXT_SECTION(PAGE_SIZE) 241#ifdef CONFIG_X86_64 242 :init 243#endif 244 245 /* 246 * Section for code used exclusively before alternatives are run. All 247 * references to such code must be patched out by alternatives, normally 248 * by using X86_FEATURE_ALWAYS CPU feature bit. 249 * 250 * See static_cpu_has() for an example. 251 */ 252 .altinstr_aux : AT(ADDR(.altinstr_aux) - LOAD_OFFSET) { 253 *(.altinstr_aux) 254 } 255 256 INIT_DATA_SECTION(16) 257 258 .x86_cpu_dev.init : AT(ADDR(.x86_cpu_dev.init) - LOAD_OFFSET) { 259 __x86_cpu_dev_start = .; 260 *(.x86_cpu_dev.init) 261 __x86_cpu_dev_end = .; 262 } 263 264#ifdef CONFIG_X86_INTEL_MID 265 .x86_intel_mid_dev.init : AT(ADDR(.x86_intel_mid_dev.init) - \ 266 LOAD_OFFSET) { 267 __x86_intel_mid_dev_start = .; 268 *(.x86_intel_mid_dev.init) 269 __x86_intel_mid_dev_end = .; 270 } 271#endif 272 273 /* 274 * start address and size of operations which during runtime 275 * can be patched with virtualization friendly instructions or 276 * baremetal native ones. Think page table operations. 277 * Details in paravirt_types.h 278 */ 279 . = ALIGN(8); 280 .parainstructions : AT(ADDR(.parainstructions) - LOAD_OFFSET) { 281 __parainstructions = .; 282 *(.parainstructions) 283 __parainstructions_end = .; 284 } 285 286#ifdef CONFIG_RETPOLINE 287 /* 288 * List of instructions that call/jmp/jcc to retpoline thunks 289 * __x86_indirect_thunk_*(). These instructions can be patched along 290 * with alternatives, after which the section can be freed. 291 */ 292 . = ALIGN(8); 293 .retpoline_sites : AT(ADDR(.retpoline_sites) - LOAD_OFFSET) { 294 __retpoline_sites = .; 295 *(.retpoline_sites) 296 __retpoline_sites_end = .; 297 } 298 299 . = ALIGN(8); 300 .return_sites : AT(ADDR(.return_sites) - LOAD_OFFSET) { 301 __return_sites = .; 302 *(.return_sites) 303 __return_sites_end = .; 304 } 305 306 . = ALIGN(8); 307 .call_sites : AT(ADDR(.call_sites) - LOAD_OFFSET) { 308 __call_sites = .; 309 *(.call_sites) 310 __call_sites_end = .; 311 } 312#endif 313 314#ifdef CONFIG_X86_KERNEL_IBT 315 . = ALIGN(8); 316 .ibt_endbr_seal : AT(ADDR(.ibt_endbr_seal) - LOAD_OFFSET) { 317 __ibt_endbr_seal = .; 318 *(.ibt_endbr_seal) 319 __ibt_endbr_seal_end = .; 320 } 321#endif 322 323#ifdef CONFIG_FINEIBT 324 . = ALIGN(8); 325 .cfi_sites : AT(ADDR(.cfi_sites) - LOAD_OFFSET) { 326 __cfi_sites = .; 327 *(.cfi_sites) 328 __cfi_sites_end = .; 329 } 330#endif 331 332 /* 333 * struct alt_inst entries. From the header (alternative.h): 334 * "Alternative instructions for different CPU types or capabilities" 335 * Think locking instructions on spinlocks. 336 */ 337 . = ALIGN(8); 338 .altinstructions : AT(ADDR(.altinstructions) - LOAD_OFFSET) { 339 __alt_instructions = .; 340 *(.altinstructions) 341 __alt_instructions_end = .; 342 } 343 344 /* 345 * And here are the replacement instructions. The linker sticks 346 * them as binary blobs. The .altinstructions has enough data to 347 * get the address and the length of them to patch the kernel safely. 348 */ 349 .altinstr_replacement : AT(ADDR(.altinstr_replacement) - LOAD_OFFSET) { 350 *(.altinstr_replacement) 351 } 352 353 . = ALIGN(8); 354 .apicdrivers : AT(ADDR(.apicdrivers) - LOAD_OFFSET) { 355 __apicdrivers = .; 356 *(.apicdrivers); 357 __apicdrivers_end = .; 358 } 359 360 . = ALIGN(8); 361 /* 362 * .exit.text is discarded at runtime, not link time, to deal with 363 * references from .altinstructions 364 */ 365 .exit.text : AT(ADDR(.exit.text) - LOAD_OFFSET) { 366 EXIT_TEXT 367 } 368 369 .exit.data : AT(ADDR(.exit.data) - LOAD_OFFSET) { 370 EXIT_DATA 371 } 372 373#if !defined(CONFIG_X86_64) || !defined(CONFIG_SMP) 374 PERCPU_SECTION(INTERNODE_CACHE_BYTES) 375#endif 376 377 . = ALIGN(PAGE_SIZE); 378 379 /* freed after init ends here */ 380 .init.end : AT(ADDR(.init.end) - LOAD_OFFSET) { 381 __init_end = .; 382 } 383 384 /* 385 * smp_locks might be freed after init 386 * start/end must be page aligned 387 */ 388 . = ALIGN(PAGE_SIZE); 389 .smp_locks : AT(ADDR(.smp_locks) - LOAD_OFFSET) { 390 __smp_locks = .; 391 *(.smp_locks) 392 . = ALIGN(PAGE_SIZE); 393 __smp_locks_end = .; 394 } 395 396#ifdef CONFIG_X86_64 397 .data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) { 398 NOSAVE_DATA 399 } 400#endif 401 402 /* BSS */ 403 . = ALIGN(PAGE_SIZE); 404 .bss : AT(ADDR(.bss) - LOAD_OFFSET) { 405 __bss_start = .; 406 *(.bss..page_aligned) 407 . = ALIGN(PAGE_SIZE); 408 *(BSS_MAIN) 409 BSS_DECRYPTED 410 . = ALIGN(PAGE_SIZE); 411 __bss_stop = .; 412 } 413 414 /* 415 * The memory occupied from _text to here, __end_of_kernel_reserve, is 416 * automatically reserved in setup_arch(). Anything after here must be 417 * explicitly reserved using memblock_reserve() or it will be discarded 418 * and treated as available memory. 419 */ 420 __end_of_kernel_reserve = .; 421 422 . = ALIGN(PAGE_SIZE); 423 .brk : AT(ADDR(.brk) - LOAD_OFFSET) { 424 __brk_base = .; 425 . += 64 * 1024; /* 64k alignment slop space */ 426 *(.bss..brk) /* areas brk users have reserved */ 427 __brk_limit = .; 428 } 429 430 . = ALIGN(PAGE_SIZE); /* keep VO_INIT_SIZE page aligned */ 431 _end = .; 432 433#ifdef CONFIG_AMD_MEM_ENCRYPT 434 /* 435 * Early scratch/workarea section: Lives outside of the kernel proper 436 * (_text - _end). 437 * 438 * Resides after _end because even though the .brk section is after 439 * __end_of_kernel_reserve, the .brk section is later reserved as a 440 * part of the kernel. Since it is located after __end_of_kernel_reserve 441 * it will be discarded and become part of the available memory. As 442 * such, it can only be used by very early boot code and must not be 443 * needed afterwards. 444 * 445 * Currently used by SME for performing in-place encryption of the 446 * kernel during boot. Resides on a 2MB boundary to simplify the 447 * pagetable setup used for SME in-place encryption. 448 */ 449 . = ALIGN(HPAGE_SIZE); 450 .init.scratch : AT(ADDR(.init.scratch) - LOAD_OFFSET) { 451 __init_scratch_begin = .; 452 *(.init.scratch) 453 . = ALIGN(HPAGE_SIZE); 454 __init_scratch_end = .; 455 } 456#endif 457 458 STABS_DEBUG 459 DWARF_DEBUG 460 ELF_DETAILS 461 462 DISCARDS 463 464 /* 465 * Make sure that the .got.plt is either completely empty or it 466 * contains only the lazy dispatch entries. 467 */ 468 .got.plt (INFO) : { *(.got.plt) } 469 ASSERT(SIZEOF(.got.plt) == 0 || 470#ifdef CONFIG_X86_64 471 SIZEOF(.got.plt) == 0x18, 472#else 473 SIZEOF(.got.plt) == 0xc, 474#endif 475 "Unexpected GOT/PLT entries detected!") 476 477 /* 478 * Sections that should stay zero sized, which is safer to 479 * explicitly check instead of blindly discarding. 480 */ 481 .got : { 482 *(.got) *(.igot.*) 483 } 484 ASSERT(SIZEOF(.got) == 0, "Unexpected GOT entries detected!") 485 486 .plt : { 487 *(.plt) *(.plt.*) *(.iplt) 488 } 489 ASSERT(SIZEOF(.plt) == 0, "Unexpected run-time procedure linkages detected!") 490 491 .rel.dyn : { 492 *(.rel.*) *(.rel_*) 493 } 494 ASSERT(SIZEOF(.rel.dyn) == 0, "Unexpected run-time relocations (.rel) detected!") 495 496 .rela.dyn : { 497 *(.rela.*) *(.rela_*) 498 } 499 ASSERT(SIZEOF(.rela.dyn) == 0, "Unexpected run-time relocations (.rela) detected!") 500} 501 502/* 503 * The ASSERT() sink to . is intentional, for binutils 2.14 compatibility: 504 */ 505. = ASSERT((_end - LOAD_OFFSET <= KERNEL_IMAGE_SIZE), 506 "kernel image bigger than KERNEL_IMAGE_SIZE"); 507 508#ifdef CONFIG_X86_64 509/* 510 * Per-cpu symbols which need to be offset from __per_cpu_load 511 * for the boot processor. 512 */ 513#define INIT_PER_CPU(x) init_per_cpu__##x = ABSOLUTE(x) + __per_cpu_load 514INIT_PER_CPU(gdt_page); 515INIT_PER_CPU(fixed_percpu_data); 516INIT_PER_CPU(irq_stack_backing_store); 517 518#ifdef CONFIG_SMP 519. = ASSERT((fixed_percpu_data == 0), 520 "fixed_percpu_data is not at start of per-cpu area"); 521#endif 522 523#ifdef CONFIG_RETHUNK 524. = ASSERT((retbleed_return_thunk & 0x3f) == 0, "retbleed_return_thunk not cacheline-aligned"); 525. = ASSERT((srso_safe_ret & 0x3f) == 0, "srso_safe_ret not cacheline-aligned"); 526#endif 527 528#ifdef CONFIG_CPU_SRSO 529/* 530 * GNU ld cannot do XOR until 2.41. 531 * https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=f6f78318fca803c4907fb8d7f6ded8295f1947b1 532 * 533 * LLVM lld cannot do XOR until lld-17. 534 * https://github.com/llvm/llvm-project/commit/fae96104d4378166cbe5c875ef8ed808a356f3fb 535 * 536 * Instead do: (A | B) - (A & B) in order to compute the XOR 537 * of the two function addresses: 538 */ 539. = ASSERT(((ABSOLUTE(srso_alias_untrain_ret) | srso_alias_safe_ret) - 540 (ABSOLUTE(srso_alias_untrain_ret) & srso_alias_safe_ret)) == ((1 << 2) | (1 << 8) | (1 << 14) | (1 << 20)), 541 "SRSO function pair won't alias"); 542#endif 543 544#endif /* CONFIG_X86_64 */ 545