1 /*
2 * include/asm-s390/pgtable.h
3 *
4 * S390 version
5 * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 * Author(s): Hartmut Penner (hp@de.ibm.com)
7 * Ulrich Weigand (weigand@de.ibm.com)
8 * Martin Schwidefsky (schwidefsky@de.ibm.com)
9 *
10 * Derived from "include/asm-i386/pgtable.h"
11 */
12
13 #ifndef _ASM_S390_PGTABLE_H
14 #define _ASM_S390_PGTABLE_H
15
16 /*
17 * The Linux memory management assumes a three-level page table setup. For
18 * s390 31 bit we "fold" the mid level into the top-level page table, so
19 * that we physically have the same two-level page table as the s390 mmu
20 * expects in 31 bit mode. For s390 64 bit we use three of the five levels
21 * the hardware provides (region first and region second tables are not
22 * used).
23 *
24 * The "pgd_xxx()" functions are trivial for a folded two-level
25 * setup: the pgd is never bad, and a pmd always exists (as it's folded
26 * into the pgd entry)
27 *
28 * This file contains the functions and defines necessary to modify and use
29 * the S390 page table tree.
30 */
31 #ifndef __ASSEMBLY__
32 #include <linux/sched.h>
33 #include <linux/mm_types.h>
34 #include <asm/bug.h>
35 #include <asm/page.h>
36
37 extern pgd_t swapper_pg_dir[] __attribute__ ((aligned (4096)));
38 extern void paging_init(void);
39 extern void vmem_map_init(void);
40 extern void fault_init(void);
41
42 /*
43 * The S390 doesn't have any external MMU info: the kernel page
44 * tables contain all the necessary information.
45 */
46 #define update_mmu_cache(vma, address, ptep) do { } while (0)
47
48 /*
49 * ZERO_PAGE is a global shared page that is always zero; used
50 * for zero-mapped memory areas etc..
51 */
52
53 extern unsigned long empty_zero_page;
54 extern unsigned long zero_page_mask;
55
56 #define ZERO_PAGE(vaddr) \
57 (virt_to_page((void *)(empty_zero_page + \
58 (((unsigned long)(vaddr)) &zero_page_mask))))
59
60 #define is_zero_pfn is_zero_pfn
is_zero_pfn(unsigned long pfn)61 static inline int is_zero_pfn(unsigned long pfn)
62 {
63 extern unsigned long zero_pfn;
64 unsigned long offset_from_zero_pfn = pfn - zero_pfn;
65 return offset_from_zero_pfn <= (zero_page_mask >> PAGE_SHIFT);
66 }
67
68 #define my_zero_pfn(addr) page_to_pfn(ZERO_PAGE(addr))
69
70 /* TODO: s390 cannot support io_remap_pfn_range... */
71 #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
72 remap_pfn_range(vma, vaddr, pfn, size, prot)
73
74 #endif /* !__ASSEMBLY__ */
75
76 /*
77 * PMD_SHIFT determines the size of the area a second-level page
78 * table can map
79 * PGDIR_SHIFT determines what a third-level page table entry can map
80 */
81 #ifndef __s390x__
82 # define PMD_SHIFT 20
83 # define PUD_SHIFT 20
84 # define PGDIR_SHIFT 20
85 #else /* __s390x__ */
86 # define PMD_SHIFT 20
87 # define PUD_SHIFT 31
88 # define PGDIR_SHIFT 42
89 #endif /* __s390x__ */
90
91 #define PMD_SIZE (1UL << PMD_SHIFT)
92 #define PMD_MASK (~(PMD_SIZE-1))
93 #define PUD_SIZE (1UL << PUD_SHIFT)
94 #define PUD_MASK (~(PUD_SIZE-1))
95 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
96 #define PGDIR_MASK (~(PGDIR_SIZE-1))
97
98 /*
99 * entries per page directory level: the S390 is two-level, so
100 * we don't really have any PMD directory physically.
101 * for S390 segment-table entries are combined to one PGD
102 * that leads to 1024 pte per pgd
103 */
104 #define PTRS_PER_PTE 256
105 #ifndef __s390x__
106 #define PTRS_PER_PMD 1
107 #define PTRS_PER_PUD 1
108 #else /* __s390x__ */
109 #define PTRS_PER_PMD 2048
110 #define PTRS_PER_PUD 2048
111 #endif /* __s390x__ */
112 #define PTRS_PER_PGD 2048
113
114 #define FIRST_USER_ADDRESS 0
115
116 #define pte_ERROR(e) \
117 printk("%s:%d: bad pte %p.\n", __FILE__, __LINE__, (void *) pte_val(e))
118 #define pmd_ERROR(e) \
119 printk("%s:%d: bad pmd %p.\n", __FILE__, __LINE__, (void *) pmd_val(e))
120 #define pud_ERROR(e) \
121 printk("%s:%d: bad pud %p.\n", __FILE__, __LINE__, (void *) pud_val(e))
122 #define pgd_ERROR(e) \
123 printk("%s:%d: bad pgd %p.\n", __FILE__, __LINE__, (void *) pgd_val(e))
124
125 #ifndef __ASSEMBLY__
126 /*
127 * The vmalloc area will always be on the topmost area of the kernel
128 * mapping. We reserve 96MB (31bit) / 128GB (64bit) for vmalloc,
129 * which should be enough for any sane case.
130 * By putting vmalloc at the top, we maximise the gap between physical
131 * memory and vmalloc to catch misplaced memory accesses. As a side
132 * effect, this also makes sure that 64 bit module code cannot be used
133 * as system call address.
134 */
135 extern unsigned long VMALLOC_START;
136 extern unsigned long VMALLOC_END;
137 extern struct page *vmemmap;
138
139 #define VMEM_MAX_PHYS ((unsigned long) vmemmap)
140
141 /*
142 * A 31 bit pagetable entry of S390 has following format:
143 * | PFRA | | OS |
144 * 0 0IP0
145 * 00000000001111111111222222222233
146 * 01234567890123456789012345678901
147 *
148 * I Page-Invalid Bit: Page is not available for address-translation
149 * P Page-Protection Bit: Store access not possible for page
150 *
151 * A 31 bit segmenttable entry of S390 has following format:
152 * | P-table origin | |PTL
153 * 0 IC
154 * 00000000001111111111222222222233
155 * 01234567890123456789012345678901
156 *
157 * I Segment-Invalid Bit: Segment is not available for address-translation
158 * C Common-Segment Bit: Segment is not private (PoP 3-30)
159 * PTL Page-Table-Length: Page-table length (PTL+1*16 entries -> up to 256)
160 *
161 * The 31 bit segmenttable origin of S390 has following format:
162 *
163 * |S-table origin | | STL |
164 * X **GPS
165 * 00000000001111111111222222222233
166 * 01234567890123456789012345678901
167 *
168 * X Space-Switch event:
169 * G Segment-Invalid Bit: *
170 * P Private-Space Bit: Segment is not private (PoP 3-30)
171 * S Storage-Alteration:
172 * STL Segment-Table-Length: Segment-table length (STL+1*16 entries -> up to 2048)
173 *
174 * A 64 bit pagetable entry of S390 has following format:
175 * | PFRA |0IPC| OS |
176 * 0000000000111111111122222222223333333333444444444455555555556666
177 * 0123456789012345678901234567890123456789012345678901234567890123
178 *
179 * I Page-Invalid Bit: Page is not available for address-translation
180 * P Page-Protection Bit: Store access not possible for page
181 * C Change-bit override: HW is not required to set change bit
182 *
183 * A 64 bit segmenttable entry of S390 has following format:
184 * | P-table origin | TT
185 * 0000000000111111111122222222223333333333444444444455555555556666
186 * 0123456789012345678901234567890123456789012345678901234567890123
187 *
188 * I Segment-Invalid Bit: Segment is not available for address-translation
189 * C Common-Segment Bit: Segment is not private (PoP 3-30)
190 * P Page-Protection Bit: Store access not possible for page
191 * TT Type 00
192 *
193 * A 64 bit region table entry of S390 has following format:
194 * | S-table origin | TF TTTL
195 * 0000000000111111111122222222223333333333444444444455555555556666
196 * 0123456789012345678901234567890123456789012345678901234567890123
197 *
198 * I Segment-Invalid Bit: Segment is not available for address-translation
199 * TT Type 01
200 * TF
201 * TL Table length
202 *
203 * The 64 bit regiontable origin of S390 has following format:
204 * | region table origon | DTTL
205 * 0000000000111111111122222222223333333333444444444455555555556666
206 * 0123456789012345678901234567890123456789012345678901234567890123
207 *
208 * X Space-Switch event:
209 * G Segment-Invalid Bit:
210 * P Private-Space Bit:
211 * S Storage-Alteration:
212 * R Real space
213 * TL Table-Length:
214 *
215 * A storage key has the following format:
216 * | ACC |F|R|C|0|
217 * 0 3 4 5 6 7
218 * ACC: access key
219 * F : fetch protection bit
220 * R : referenced bit
221 * C : changed bit
222 */
223
224 /* Hardware bits in the page table entry */
225 #define _PAGE_CO 0x100 /* HW Change-bit override */
226 #define _PAGE_RO 0x200 /* HW read-only bit */
227 #define _PAGE_INVALID 0x400 /* HW invalid bit */
228
229 /* Software bits in the page table entry */
230 #define _PAGE_SWT 0x001 /* SW pte type bit t */
231 #define _PAGE_SWX 0x002 /* SW pte type bit x */
232 #define _PAGE_SWC 0x004 /* SW pte changed bit (for KVM) */
233 #define _PAGE_SWR 0x008 /* SW pte referenced bit (for KVM) */
234 #define _PAGE_SPECIAL 0x010 /* SW associated with special page */
235 #define __HAVE_ARCH_PTE_SPECIAL
236
237 /* Set of bits not changed in pte_modify */
238 #define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_SPECIAL | _PAGE_SWC | _PAGE_SWR)
239
240 /* Six different types of pages. */
241 #define _PAGE_TYPE_EMPTY 0x400
242 #define _PAGE_TYPE_NONE 0x401
243 #define _PAGE_TYPE_SWAP 0x403
244 #define _PAGE_TYPE_FILE 0x601 /* bit 0x002 is used for offset !! */
245 #define _PAGE_TYPE_RO 0x200
246 #define _PAGE_TYPE_RW 0x000
247
248 /*
249 * Only four types for huge pages, using the invalid bit and protection bit
250 * of a segment table entry.
251 */
252 #define _HPAGE_TYPE_EMPTY 0x020 /* _SEGMENT_ENTRY_INV */
253 #define _HPAGE_TYPE_NONE 0x220
254 #define _HPAGE_TYPE_RO 0x200 /* _SEGMENT_ENTRY_RO */
255 #define _HPAGE_TYPE_RW 0x000
256
257 /*
258 * PTE type bits are rather complicated. handle_pte_fault uses pte_present,
259 * pte_none and pte_file to find out the pte type WITHOUT holding the page
260 * table lock. ptep_clear_flush on the other hand uses ptep_clear_flush to
261 * invalidate a given pte. ipte sets the hw invalid bit and clears all tlbs
262 * for the page. The page table entry is set to _PAGE_TYPE_EMPTY afterwards.
263 * This change is done while holding the lock, but the intermediate step
264 * of a previously valid pte with the hw invalid bit set can be observed by
265 * handle_pte_fault. That makes it necessary that all valid pte types with
266 * the hw invalid bit set must be distinguishable from the four pte types
267 * empty, none, swap and file.
268 *
269 * irxt ipte irxt
270 * _PAGE_TYPE_EMPTY 1000 -> 1000
271 * _PAGE_TYPE_NONE 1001 -> 1001
272 * _PAGE_TYPE_SWAP 1011 -> 1011
273 * _PAGE_TYPE_FILE 11?1 -> 11?1
274 * _PAGE_TYPE_RO 0100 -> 1100
275 * _PAGE_TYPE_RW 0000 -> 1000
276 *
277 * pte_none is true for bits combinations 1000, 1010, 1100, 1110
278 * pte_present is true for bits combinations 0000, 0010, 0100, 0110, 1001
279 * pte_file is true for bits combinations 1101, 1111
280 * swap pte is 1011 and 0001, 0011, 0101, 0111 are invalid.
281 */
282
283 #ifndef __s390x__
284
285 /* Bits in the segment table address-space-control-element */
286 #define _ASCE_SPACE_SWITCH 0x80000000UL /* space switch event */
287 #define _ASCE_ORIGIN_MASK 0x7ffff000UL /* segment table origin */
288 #define _ASCE_PRIVATE_SPACE 0x100 /* private space control */
289 #define _ASCE_ALT_EVENT 0x80 /* storage alteration event control */
290 #define _ASCE_TABLE_LENGTH 0x7f /* 128 x 64 entries = 8k */
291
292 /* Bits in the segment table entry */
293 #define _SEGMENT_ENTRY_ORIGIN 0x7fffffc0UL /* page table origin */
294 #define _SEGMENT_ENTRY_RO 0x200 /* page protection bit */
295 #define _SEGMENT_ENTRY_INV 0x20 /* invalid segment table entry */
296 #define _SEGMENT_ENTRY_COMMON 0x10 /* common segment bit */
297 #define _SEGMENT_ENTRY_PTL 0x0f /* page table length */
298
299 #define _SEGMENT_ENTRY (_SEGMENT_ENTRY_PTL)
300 #define _SEGMENT_ENTRY_EMPTY (_SEGMENT_ENTRY_INV)
301
302 /* Page status table bits for virtualization */
303 #define RCP_ACC_BITS 0xf0000000UL
304 #define RCP_FP_BIT 0x08000000UL
305 #define RCP_PCL_BIT 0x00800000UL
306 #define RCP_HR_BIT 0x00400000UL
307 #define RCP_HC_BIT 0x00200000UL
308 #define RCP_GR_BIT 0x00040000UL
309 #define RCP_GC_BIT 0x00020000UL
310
311 /* User dirty / referenced bit for KVM's migration feature */
312 #define KVM_UR_BIT 0x00008000UL
313 #define KVM_UC_BIT 0x00004000UL
314
315 #else /* __s390x__ */
316
317 /* Bits in the segment/region table address-space-control-element */
318 #define _ASCE_ORIGIN ~0xfffUL/* segment table origin */
319 #define _ASCE_PRIVATE_SPACE 0x100 /* private space control */
320 #define _ASCE_ALT_EVENT 0x80 /* storage alteration event control */
321 #define _ASCE_SPACE_SWITCH 0x40 /* space switch event */
322 #define _ASCE_REAL_SPACE 0x20 /* real space control */
323 #define _ASCE_TYPE_MASK 0x0c /* asce table type mask */
324 #define _ASCE_TYPE_REGION1 0x0c /* region first table type */
325 #define _ASCE_TYPE_REGION2 0x08 /* region second table type */
326 #define _ASCE_TYPE_REGION3 0x04 /* region third table type */
327 #define _ASCE_TYPE_SEGMENT 0x00 /* segment table type */
328 #define _ASCE_TABLE_LENGTH 0x03 /* region table length */
329
330 /* Bits in the region table entry */
331 #define _REGION_ENTRY_ORIGIN ~0xfffUL/* region/segment table origin */
332 #define _REGION_ENTRY_INV 0x20 /* invalid region table entry */
333 #define _REGION_ENTRY_TYPE_MASK 0x0c /* region/segment table type mask */
334 #define _REGION_ENTRY_TYPE_R1 0x0c /* region first table type */
335 #define _REGION_ENTRY_TYPE_R2 0x08 /* region second table type */
336 #define _REGION_ENTRY_TYPE_R3 0x04 /* region third table type */
337 #define _REGION_ENTRY_LENGTH 0x03 /* region third length */
338
339 #define _REGION1_ENTRY (_REGION_ENTRY_TYPE_R1 | _REGION_ENTRY_LENGTH)
340 #define _REGION1_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R1 | _REGION_ENTRY_INV)
341 #define _REGION2_ENTRY (_REGION_ENTRY_TYPE_R2 | _REGION_ENTRY_LENGTH)
342 #define _REGION2_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R2 | _REGION_ENTRY_INV)
343 #define _REGION3_ENTRY (_REGION_ENTRY_TYPE_R3 | _REGION_ENTRY_LENGTH)
344 #define _REGION3_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R3 | _REGION_ENTRY_INV)
345
346 /* Bits in the segment table entry */
347 #define _SEGMENT_ENTRY_ORIGIN ~0x7ffUL/* segment table origin */
348 #define _SEGMENT_ENTRY_RO 0x200 /* page protection bit */
349 #define _SEGMENT_ENTRY_INV 0x20 /* invalid segment table entry */
350
351 #define _SEGMENT_ENTRY (0)
352 #define _SEGMENT_ENTRY_EMPTY (_SEGMENT_ENTRY_INV)
353
354 #define _SEGMENT_ENTRY_LARGE 0x400 /* STE-format control, large page */
355 #define _SEGMENT_ENTRY_CO 0x100 /* change-recording override */
356
357 /* Page status table bits for virtualization */
358 #define RCP_ACC_BITS 0xf000000000000000UL
359 #define RCP_FP_BIT 0x0800000000000000UL
360 #define RCP_PCL_BIT 0x0080000000000000UL
361 #define RCP_HR_BIT 0x0040000000000000UL
362 #define RCP_HC_BIT 0x0020000000000000UL
363 #define RCP_GR_BIT 0x0004000000000000UL
364 #define RCP_GC_BIT 0x0002000000000000UL
365
366 /* User dirty / referenced bit for KVM's migration feature */
367 #define KVM_UR_BIT 0x0000800000000000UL
368 #define KVM_UC_BIT 0x0000400000000000UL
369
370 #endif /* __s390x__ */
371
372 /*
373 * A user page table pointer has the space-switch-event bit, the
374 * private-space-control bit and the storage-alteration-event-control
375 * bit set. A kernel page table pointer doesn't need them.
376 */
377 #define _ASCE_USER_BITS (_ASCE_SPACE_SWITCH | _ASCE_PRIVATE_SPACE | \
378 _ASCE_ALT_EVENT)
379
380 /*
381 * Page protection definitions.
382 */
383 #define PAGE_NONE __pgprot(_PAGE_TYPE_NONE)
384 #define PAGE_RO __pgprot(_PAGE_TYPE_RO)
385 #define PAGE_RW __pgprot(_PAGE_TYPE_RW)
386
387 #define PAGE_KERNEL PAGE_RW
388 #define PAGE_COPY PAGE_RO
389
390 /*
391 * On s390 the page table entry has an invalid bit and a read-only bit.
392 * Read permission implies execute permission and write permission
393 * implies read permission.
394 */
395 /*xwr*/
396 #define __P000 PAGE_NONE
397 #define __P001 PAGE_RO
398 #define __P010 PAGE_RO
399 #define __P011 PAGE_RO
400 #define __P100 PAGE_RO
401 #define __P101 PAGE_RO
402 #define __P110 PAGE_RO
403 #define __P111 PAGE_RO
404
405 #define __S000 PAGE_NONE
406 #define __S001 PAGE_RO
407 #define __S010 PAGE_RW
408 #define __S011 PAGE_RW
409 #define __S100 PAGE_RO
410 #define __S101 PAGE_RO
411 #define __S110 PAGE_RW
412 #define __S111 PAGE_RW
413
mm_exclusive(struct mm_struct * mm)414 static inline int mm_exclusive(struct mm_struct *mm)
415 {
416 return likely(mm == current->active_mm &&
417 atomic_read(&mm->context.attach_count) <= 1);
418 }
419
mm_has_pgste(struct mm_struct * mm)420 static inline int mm_has_pgste(struct mm_struct *mm)
421 {
422 #ifdef CONFIG_PGSTE
423 if (unlikely(mm->context.has_pgste))
424 return 1;
425 #endif
426 return 0;
427 }
428 /*
429 * pgd/pmd/pte query functions
430 */
431 #ifndef __s390x__
432
pgd_present(pgd_t pgd)433 static inline int pgd_present(pgd_t pgd) { return 1; }
pgd_none(pgd_t pgd)434 static inline int pgd_none(pgd_t pgd) { return 0; }
pgd_bad(pgd_t pgd)435 static inline int pgd_bad(pgd_t pgd) { return 0; }
436
pud_present(pud_t pud)437 static inline int pud_present(pud_t pud) { return 1; }
pud_none(pud_t pud)438 static inline int pud_none(pud_t pud) { return 0; }
pud_bad(pud_t pud)439 static inline int pud_bad(pud_t pud) { return 0; }
440
441 #else /* __s390x__ */
442
pgd_present(pgd_t pgd)443 static inline int pgd_present(pgd_t pgd)
444 {
445 if ((pgd_val(pgd) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R2)
446 return 1;
447 return (pgd_val(pgd) & _REGION_ENTRY_ORIGIN) != 0UL;
448 }
449
pgd_none(pgd_t pgd)450 static inline int pgd_none(pgd_t pgd)
451 {
452 if ((pgd_val(pgd) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R2)
453 return 0;
454 return (pgd_val(pgd) & _REGION_ENTRY_INV) != 0UL;
455 }
456
pgd_bad(pgd_t pgd)457 static inline int pgd_bad(pgd_t pgd)
458 {
459 /*
460 * With dynamic page table levels the pgd can be a region table
461 * entry or a segment table entry. Check for the bit that are
462 * invalid for either table entry.
463 */
464 unsigned long mask =
465 ~_SEGMENT_ENTRY_ORIGIN & ~_REGION_ENTRY_INV &
466 ~_REGION_ENTRY_TYPE_MASK & ~_REGION_ENTRY_LENGTH;
467 return (pgd_val(pgd) & mask) != 0;
468 }
469
pud_present(pud_t pud)470 static inline int pud_present(pud_t pud)
471 {
472 if ((pud_val(pud) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R3)
473 return 1;
474 return (pud_val(pud) & _REGION_ENTRY_ORIGIN) != 0UL;
475 }
476
pud_none(pud_t pud)477 static inline int pud_none(pud_t pud)
478 {
479 if ((pud_val(pud) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R3)
480 return 0;
481 return (pud_val(pud) & _REGION_ENTRY_INV) != 0UL;
482 }
483
pud_bad(pud_t pud)484 static inline int pud_bad(pud_t pud)
485 {
486 /*
487 * With dynamic page table levels the pud can be a region table
488 * entry or a segment table entry. Check for the bit that are
489 * invalid for either table entry.
490 */
491 unsigned long mask =
492 ~_SEGMENT_ENTRY_ORIGIN & ~_REGION_ENTRY_INV &
493 ~_REGION_ENTRY_TYPE_MASK & ~_REGION_ENTRY_LENGTH;
494 return (pud_val(pud) & mask) != 0;
495 }
496
497 #endif /* __s390x__ */
498
pmd_present(pmd_t pmd)499 static inline int pmd_present(pmd_t pmd)
500 {
501 return (pmd_val(pmd) & _SEGMENT_ENTRY_ORIGIN) != 0UL;
502 }
503
pmd_none(pmd_t pmd)504 static inline int pmd_none(pmd_t pmd)
505 {
506 return (pmd_val(pmd) & _SEGMENT_ENTRY_INV) != 0UL;
507 }
508
pmd_bad(pmd_t pmd)509 static inline int pmd_bad(pmd_t pmd)
510 {
511 unsigned long mask = ~_SEGMENT_ENTRY_ORIGIN & ~_SEGMENT_ENTRY_INV;
512 return (pmd_val(pmd) & mask) != _SEGMENT_ENTRY;
513 }
514
pte_none(pte_t pte)515 static inline int pte_none(pte_t pte)
516 {
517 return (pte_val(pte) & _PAGE_INVALID) && !(pte_val(pte) & _PAGE_SWT);
518 }
519
pte_present(pte_t pte)520 static inline int pte_present(pte_t pte)
521 {
522 unsigned long mask = _PAGE_RO | _PAGE_INVALID | _PAGE_SWT | _PAGE_SWX;
523 return (pte_val(pte) & mask) == _PAGE_TYPE_NONE ||
524 (!(pte_val(pte) & _PAGE_INVALID) &&
525 !(pte_val(pte) & _PAGE_SWT));
526 }
527
pte_file(pte_t pte)528 static inline int pte_file(pte_t pte)
529 {
530 unsigned long mask = _PAGE_RO | _PAGE_INVALID | _PAGE_SWT;
531 return (pte_val(pte) & mask) == _PAGE_TYPE_FILE;
532 }
533
pte_special(pte_t pte)534 static inline int pte_special(pte_t pte)
535 {
536 return (pte_val(pte) & _PAGE_SPECIAL);
537 }
538
539 #define __HAVE_ARCH_PTE_SAME
pte_same(pte_t a,pte_t b)540 static inline int pte_same(pte_t a, pte_t b)
541 {
542 return pte_val(a) == pte_val(b);
543 }
544
pgste_get_lock(pte_t * ptep)545 static inline pgste_t pgste_get_lock(pte_t *ptep)
546 {
547 unsigned long new = 0;
548 #ifdef CONFIG_PGSTE
549 unsigned long old;
550
551 preempt_disable();
552 asm(
553 " lg %0,%2\n"
554 "0: lgr %1,%0\n"
555 " nihh %0,0xff7f\n" /* clear RCP_PCL_BIT in old */
556 " oihh %1,0x0080\n" /* set RCP_PCL_BIT in new */
557 " csg %0,%1,%2\n"
558 " jl 0b\n"
559 : "=&d" (old), "=&d" (new), "=Q" (ptep[PTRS_PER_PTE])
560 : "Q" (ptep[PTRS_PER_PTE]) : "cc");
561 #endif
562 return __pgste(new);
563 }
564
pgste_set_unlock(pte_t * ptep,pgste_t pgste)565 static inline void pgste_set_unlock(pte_t *ptep, pgste_t pgste)
566 {
567 #ifdef CONFIG_PGSTE
568 asm(
569 " nihh %1,0xff7f\n" /* clear RCP_PCL_BIT */
570 " stg %1,%0\n"
571 : "=Q" (ptep[PTRS_PER_PTE])
572 : "d" (pgste_val(pgste)), "Q" (ptep[PTRS_PER_PTE]) : "cc");
573 preempt_enable();
574 #endif
575 }
576
pgste_update_all(pte_t * ptep,pgste_t pgste)577 static inline pgste_t pgste_update_all(pte_t *ptep, pgste_t pgste)
578 {
579 #ifdef CONFIG_PGSTE
580 unsigned long address, bits;
581 unsigned char skey;
582
583 if (!pte_present(*ptep))
584 return pgste;
585 address = pte_val(*ptep) & PAGE_MASK;
586 skey = page_get_storage_key(address);
587 bits = skey & (_PAGE_CHANGED | _PAGE_REFERENCED);
588 /* Clear page changed & referenced bit in the storage key */
589 if (bits & _PAGE_CHANGED)
590 page_set_storage_key(address, skey ^ bits, 1);
591 else if (bits)
592 page_reset_referenced(address);
593 /* Transfer page changed & referenced bit to guest bits in pgste */
594 pgste_val(pgste) |= bits << 48; /* RCP_GR_BIT & RCP_GC_BIT */
595 /* Get host changed & referenced bits from pgste */
596 bits |= (pgste_val(pgste) & (RCP_HR_BIT | RCP_HC_BIT)) >> 52;
597 /* Clear host bits in pgste. */
598 pgste_val(pgste) &= ~(RCP_HR_BIT | RCP_HC_BIT);
599 pgste_val(pgste) &= ~(RCP_ACC_BITS | RCP_FP_BIT);
600 /* Copy page access key and fetch protection bit to pgste */
601 pgste_val(pgste) |=
602 (unsigned long) (skey & (_PAGE_ACC_BITS | _PAGE_FP_BIT)) << 56;
603 /* Transfer changed and referenced to kvm user bits */
604 pgste_val(pgste) |= bits << 45; /* KVM_UR_BIT & KVM_UC_BIT */
605 /* Transfer changed & referenced to pte sofware bits */
606 pte_val(*ptep) |= bits << 1; /* _PAGE_SWR & _PAGE_SWC */
607 #endif
608 return pgste;
609
610 }
611
pgste_update_young(pte_t * ptep,pgste_t pgste)612 static inline pgste_t pgste_update_young(pte_t *ptep, pgste_t pgste)
613 {
614 #ifdef CONFIG_PGSTE
615 int young;
616
617 if (!pte_present(*ptep))
618 return pgste;
619 young = page_reset_referenced(pte_val(*ptep) & PAGE_MASK);
620 /* Transfer page referenced bit to pte software bit (host view) */
621 if (young || (pgste_val(pgste) & RCP_HR_BIT))
622 pte_val(*ptep) |= _PAGE_SWR;
623 /* Clear host referenced bit in pgste. */
624 pgste_val(pgste) &= ~RCP_HR_BIT;
625 /* Transfer page referenced bit to guest bit in pgste */
626 pgste_val(pgste) |= (unsigned long) young << 50; /* set RCP_GR_BIT */
627 #endif
628 return pgste;
629
630 }
631
pgste_set_pte(pte_t * ptep,pgste_t pgste,pte_t entry)632 static inline void pgste_set_pte(pte_t *ptep, pgste_t pgste, pte_t entry)
633 {
634 #ifdef CONFIG_PGSTE
635 unsigned long address;
636 unsigned long okey, nkey;
637
638 if (!pte_present(entry))
639 return;
640 address = pte_val(entry) & PAGE_MASK;
641 okey = nkey = page_get_storage_key(address);
642 nkey &= ~(_PAGE_ACC_BITS | _PAGE_FP_BIT);
643 /* Set page access key and fetch protection bit from pgste */
644 nkey |= (pgste_val(pgste) & (RCP_ACC_BITS | RCP_FP_BIT)) >> 56;
645 if (okey != nkey)
646 page_set_storage_key(address, nkey, 1);
647 #endif
648 }
649
650 /**
651 * struct gmap_struct - guest address space
652 * @mm: pointer to the parent mm_struct
653 * @table: pointer to the page directory
654 * @asce: address space control element for gmap page table
655 * @crst_list: list of all crst tables used in the guest address space
656 */
657 struct gmap {
658 struct list_head list;
659 struct mm_struct *mm;
660 unsigned long *table;
661 unsigned long asce;
662 struct list_head crst_list;
663 };
664
665 /**
666 * struct gmap_rmap - reverse mapping for segment table entries
667 * @next: pointer to the next gmap_rmap structure in the list
668 * @entry: pointer to a segment table entry
669 */
670 struct gmap_rmap {
671 struct list_head list;
672 unsigned long *entry;
673 };
674
675 /**
676 * struct gmap_pgtable - gmap information attached to a page table
677 * @vmaddr: address of the 1MB segment in the process virtual memory
678 * @mapper: list of segment table entries maping a page table
679 */
680 struct gmap_pgtable {
681 unsigned long vmaddr;
682 struct list_head mapper;
683 };
684
685 struct gmap *gmap_alloc(struct mm_struct *mm);
686 void gmap_free(struct gmap *gmap);
687 void gmap_enable(struct gmap *gmap);
688 void gmap_disable(struct gmap *gmap);
689 int gmap_map_segment(struct gmap *gmap, unsigned long from,
690 unsigned long to, unsigned long length);
691 int gmap_unmap_segment(struct gmap *gmap, unsigned long to, unsigned long len);
692 unsigned long __gmap_fault(unsigned long address, struct gmap *);
693 unsigned long gmap_fault(unsigned long address, struct gmap *);
694 void gmap_discard(unsigned long from, unsigned long to, struct gmap *);
695
696 /*
697 * Certain architectures need to do special things when PTEs
698 * within a page table are directly modified. Thus, the following
699 * hook is made available.
700 */
set_pte_at(struct mm_struct * mm,unsigned long addr,pte_t * ptep,pte_t entry)701 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
702 pte_t *ptep, pte_t entry)
703 {
704 pgste_t pgste;
705
706 if (mm_has_pgste(mm)) {
707 pgste = pgste_get_lock(ptep);
708 pgste_set_pte(ptep, pgste, entry);
709 *ptep = entry;
710 pgste_set_unlock(ptep, pgste);
711 } else
712 *ptep = entry;
713 }
714
715 /*
716 * query functions pte_write/pte_dirty/pte_young only work if
717 * pte_present() is true. Undefined behaviour if not..
718 */
pte_write(pte_t pte)719 static inline int pte_write(pte_t pte)
720 {
721 return (pte_val(pte) & _PAGE_RO) == 0;
722 }
723
pte_dirty(pte_t pte)724 static inline int pte_dirty(pte_t pte)
725 {
726 #ifdef CONFIG_PGSTE
727 if (pte_val(pte) & _PAGE_SWC)
728 return 1;
729 #endif
730 return 0;
731 }
732
pte_young(pte_t pte)733 static inline int pte_young(pte_t pte)
734 {
735 #ifdef CONFIG_PGSTE
736 if (pte_val(pte) & _PAGE_SWR)
737 return 1;
738 #endif
739 return 0;
740 }
741
742 /*
743 * pgd/pmd/pte modification functions
744 */
745
pgd_clear(pgd_t * pgd)746 static inline void pgd_clear(pgd_t *pgd)
747 {
748 #ifdef __s390x__
749 if ((pgd_val(*pgd) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R2)
750 pgd_val(*pgd) = _REGION2_ENTRY_EMPTY;
751 #endif
752 }
753
pud_clear(pud_t * pud)754 static inline void pud_clear(pud_t *pud)
755 {
756 #ifdef __s390x__
757 if ((pud_val(*pud) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R3)
758 pud_val(*pud) = _REGION3_ENTRY_EMPTY;
759 #endif
760 }
761
pmd_clear(pmd_t * pmdp)762 static inline void pmd_clear(pmd_t *pmdp)
763 {
764 pmd_val(*pmdp) = _SEGMENT_ENTRY_EMPTY;
765 }
766
pte_clear(struct mm_struct * mm,unsigned long addr,pte_t * ptep)767 static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
768 {
769 pte_val(*ptep) = _PAGE_TYPE_EMPTY;
770 }
771
772 /*
773 * The following pte modification functions only work if
774 * pte_present() is true. Undefined behaviour if not..
775 */
pte_modify(pte_t pte,pgprot_t newprot)776 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
777 {
778 pte_val(pte) &= _PAGE_CHG_MASK;
779 pte_val(pte) |= pgprot_val(newprot);
780 return pte;
781 }
782
pte_wrprotect(pte_t pte)783 static inline pte_t pte_wrprotect(pte_t pte)
784 {
785 /* Do not clobber _PAGE_TYPE_NONE pages! */
786 if (!(pte_val(pte) & _PAGE_INVALID))
787 pte_val(pte) |= _PAGE_RO;
788 return pte;
789 }
790
pte_mkwrite(pte_t pte)791 static inline pte_t pte_mkwrite(pte_t pte)
792 {
793 pte_val(pte) &= ~_PAGE_RO;
794 return pte;
795 }
796
pte_mkclean(pte_t pte)797 static inline pte_t pte_mkclean(pte_t pte)
798 {
799 #ifdef CONFIG_PGSTE
800 pte_val(pte) &= ~_PAGE_SWC;
801 #endif
802 return pte;
803 }
804
pte_mkdirty(pte_t pte)805 static inline pte_t pte_mkdirty(pte_t pte)
806 {
807 return pte;
808 }
809
pte_mkold(pte_t pte)810 static inline pte_t pte_mkold(pte_t pte)
811 {
812 #ifdef CONFIG_PGSTE
813 pte_val(pte) &= ~_PAGE_SWR;
814 #endif
815 return pte;
816 }
817
pte_mkyoung(pte_t pte)818 static inline pte_t pte_mkyoung(pte_t pte)
819 {
820 return pte;
821 }
822
pte_mkspecial(pte_t pte)823 static inline pte_t pte_mkspecial(pte_t pte)
824 {
825 pte_val(pte) |= _PAGE_SPECIAL;
826 return pte;
827 }
828
829 #ifdef CONFIG_HUGETLB_PAGE
pte_mkhuge(pte_t pte)830 static inline pte_t pte_mkhuge(pte_t pte)
831 {
832 /*
833 * PROT_NONE needs to be remapped from the pte type to the ste type.
834 * The HW invalid bit is also different for pte and ste. The pte
835 * invalid bit happens to be the same as the ste _SEGMENT_ENTRY_LARGE
836 * bit, so we don't have to clear it.
837 */
838 if (pte_val(pte) & _PAGE_INVALID) {
839 if (pte_val(pte) & _PAGE_SWT)
840 pte_val(pte) |= _HPAGE_TYPE_NONE;
841 pte_val(pte) |= _SEGMENT_ENTRY_INV;
842 }
843 /*
844 * Clear SW pte bits SWT and SWX, there are no SW bits in a segment
845 * table entry.
846 */
847 pte_val(pte) &= ~(_PAGE_SWT | _PAGE_SWX);
848 /*
849 * Also set the change-override bit because we don't need dirty bit
850 * tracking for hugetlbfs pages.
851 */
852 pte_val(pte) |= (_SEGMENT_ENTRY_LARGE | _SEGMENT_ENTRY_CO);
853 return pte;
854 }
855 #endif
856
857 /*
858 * Get (and clear) the user dirty bit for a pte.
859 */
ptep_test_and_clear_user_dirty(struct mm_struct * mm,pte_t * ptep)860 static inline int ptep_test_and_clear_user_dirty(struct mm_struct *mm,
861 pte_t *ptep)
862 {
863 pgste_t pgste;
864 int dirty = 0;
865
866 if (mm_has_pgste(mm)) {
867 pgste = pgste_get_lock(ptep);
868 pgste = pgste_update_all(ptep, pgste);
869 dirty = !!(pgste_val(pgste) & KVM_UC_BIT);
870 pgste_val(pgste) &= ~KVM_UC_BIT;
871 pgste_set_unlock(ptep, pgste);
872 return dirty;
873 }
874 return dirty;
875 }
876
877 /*
878 * Get (and clear) the user referenced bit for a pte.
879 */
ptep_test_and_clear_user_young(struct mm_struct * mm,pte_t * ptep)880 static inline int ptep_test_and_clear_user_young(struct mm_struct *mm,
881 pte_t *ptep)
882 {
883 pgste_t pgste;
884 int young = 0;
885
886 if (mm_has_pgste(mm)) {
887 pgste = pgste_get_lock(ptep);
888 pgste = pgste_update_young(ptep, pgste);
889 young = !!(pgste_val(pgste) & KVM_UR_BIT);
890 pgste_val(pgste) &= ~KVM_UR_BIT;
891 pgste_set_unlock(ptep, pgste);
892 }
893 return young;
894 }
895
896 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
ptep_test_and_clear_young(struct vm_area_struct * vma,unsigned long addr,pte_t * ptep)897 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
898 unsigned long addr, pte_t *ptep)
899 {
900 pgste_t pgste;
901 pte_t pte;
902
903 if (mm_has_pgste(vma->vm_mm)) {
904 pgste = pgste_get_lock(ptep);
905 pgste = pgste_update_young(ptep, pgste);
906 pte = *ptep;
907 *ptep = pte_mkold(pte);
908 pgste_set_unlock(ptep, pgste);
909 return pte_young(pte);
910 }
911 return 0;
912 }
913
914 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
ptep_clear_flush_young(struct vm_area_struct * vma,unsigned long address,pte_t * ptep)915 static inline int ptep_clear_flush_young(struct vm_area_struct *vma,
916 unsigned long address, pte_t *ptep)
917 {
918 /* No need to flush TLB
919 * On s390 reference bits are in storage key and never in TLB
920 * With virtualization we handle the reference bit, without we
921 * we can simply return */
922 return ptep_test_and_clear_young(vma, address, ptep);
923 }
924
__ptep_ipte(unsigned long address,pte_t * ptep)925 static inline void __ptep_ipte(unsigned long address, pte_t *ptep)
926 {
927 if (!(pte_val(*ptep) & _PAGE_INVALID)) {
928 #ifndef __s390x__
929 /* pto must point to the start of the segment table */
930 pte_t *pto = (pte_t *) (((unsigned long) ptep) & 0x7ffffc00);
931 #else
932 /* ipte in zarch mode can do the math */
933 pte_t *pto = ptep;
934 #endif
935 asm volatile(
936 " ipte %2,%3"
937 : "=m" (*ptep) : "m" (*ptep),
938 "a" (pto), "a" (address));
939 }
940 }
941
942 /*
943 * This is hard to understand. ptep_get_and_clear and ptep_clear_flush
944 * both clear the TLB for the unmapped pte. The reason is that
945 * ptep_get_and_clear is used in common code (e.g. change_pte_range)
946 * to modify an active pte. The sequence is
947 * 1) ptep_get_and_clear
948 * 2) set_pte_at
949 * 3) flush_tlb_range
950 * On s390 the tlb needs to get flushed with the modification of the pte
951 * if the pte is active. The only way how this can be implemented is to
952 * have ptep_get_and_clear do the tlb flush. In exchange flush_tlb_range
953 * is a nop.
954 */
955 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
ptep_get_and_clear(struct mm_struct * mm,unsigned long address,pte_t * ptep)956 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
957 unsigned long address, pte_t *ptep)
958 {
959 pgste_t pgste;
960 pte_t pte;
961
962 mm->context.flush_mm = 1;
963 if (mm_has_pgste(mm))
964 pgste = pgste_get_lock(ptep);
965
966 pte = *ptep;
967 if (!mm_exclusive(mm))
968 __ptep_ipte(address, ptep);
969 pte_val(*ptep) = _PAGE_TYPE_EMPTY;
970
971 if (mm_has_pgste(mm)) {
972 pgste = pgste_update_all(&pte, pgste);
973 pgste_set_unlock(ptep, pgste);
974 }
975 return pte;
976 }
977
978 #define __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
ptep_modify_prot_start(struct mm_struct * mm,unsigned long address,pte_t * ptep)979 static inline pte_t ptep_modify_prot_start(struct mm_struct *mm,
980 unsigned long address,
981 pte_t *ptep)
982 {
983 pte_t pte;
984
985 mm->context.flush_mm = 1;
986 if (mm_has_pgste(mm))
987 pgste_get_lock(ptep);
988
989 pte = *ptep;
990 if (!mm_exclusive(mm))
991 __ptep_ipte(address, ptep);
992 return pte;
993 }
994
ptep_modify_prot_commit(struct mm_struct * mm,unsigned long address,pte_t * ptep,pte_t pte)995 static inline void ptep_modify_prot_commit(struct mm_struct *mm,
996 unsigned long address,
997 pte_t *ptep, pte_t pte)
998 {
999 *ptep = pte;
1000 if (mm_has_pgste(mm))
1001 pgste_set_unlock(ptep, *(pgste_t *)(ptep + PTRS_PER_PTE));
1002 }
1003
1004 #define __HAVE_ARCH_PTEP_CLEAR_FLUSH
ptep_clear_flush(struct vm_area_struct * vma,unsigned long address,pte_t * ptep)1005 static inline pte_t ptep_clear_flush(struct vm_area_struct *vma,
1006 unsigned long address, pte_t *ptep)
1007 {
1008 pgste_t pgste;
1009 pte_t pte;
1010
1011 if (mm_has_pgste(vma->vm_mm))
1012 pgste = pgste_get_lock(ptep);
1013
1014 pte = *ptep;
1015 __ptep_ipte(address, ptep);
1016 pte_val(*ptep) = _PAGE_TYPE_EMPTY;
1017
1018 if (mm_has_pgste(vma->vm_mm)) {
1019 pgste = pgste_update_all(&pte, pgste);
1020 pgste_set_unlock(ptep, pgste);
1021 }
1022 return pte;
1023 }
1024
1025 /*
1026 * The batched pte unmap code uses ptep_get_and_clear_full to clear the
1027 * ptes. Here an optimization is possible. tlb_gather_mmu flushes all
1028 * tlbs of an mm if it can guarantee that the ptes of the mm_struct
1029 * cannot be accessed while the batched unmap is running. In this case
1030 * full==1 and a simple pte_clear is enough. See tlb.h.
1031 */
1032 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
ptep_get_and_clear_full(struct mm_struct * mm,unsigned long address,pte_t * ptep,int full)1033 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
1034 unsigned long address,
1035 pte_t *ptep, int full)
1036 {
1037 pgste_t pgste;
1038 pte_t pte;
1039
1040 if (mm_has_pgste(mm))
1041 pgste = pgste_get_lock(ptep);
1042
1043 pte = *ptep;
1044 if (!full)
1045 __ptep_ipte(address, ptep);
1046 pte_val(*ptep) = _PAGE_TYPE_EMPTY;
1047
1048 if (mm_has_pgste(mm)) {
1049 pgste = pgste_update_all(&pte, pgste);
1050 pgste_set_unlock(ptep, pgste);
1051 }
1052 return pte;
1053 }
1054
1055 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
ptep_set_wrprotect(struct mm_struct * mm,unsigned long address,pte_t * ptep)1056 static inline pte_t ptep_set_wrprotect(struct mm_struct *mm,
1057 unsigned long address, pte_t *ptep)
1058 {
1059 pgste_t pgste;
1060 pte_t pte = *ptep;
1061
1062 if (pte_write(pte)) {
1063 mm->context.flush_mm = 1;
1064 if (mm_has_pgste(mm))
1065 pgste = pgste_get_lock(ptep);
1066
1067 if (!mm_exclusive(mm))
1068 __ptep_ipte(address, ptep);
1069 *ptep = pte_wrprotect(pte);
1070
1071 if (mm_has_pgste(mm))
1072 pgste_set_unlock(ptep, pgste);
1073 }
1074 return pte;
1075 }
1076
1077 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
ptep_set_access_flags(struct vm_area_struct * vma,unsigned long address,pte_t * ptep,pte_t entry,int dirty)1078 static inline int ptep_set_access_flags(struct vm_area_struct *vma,
1079 unsigned long address, pte_t *ptep,
1080 pte_t entry, int dirty)
1081 {
1082 pgste_t pgste;
1083
1084 if (pte_same(*ptep, entry))
1085 return 0;
1086 if (mm_has_pgste(vma->vm_mm))
1087 pgste = pgste_get_lock(ptep);
1088
1089 __ptep_ipte(address, ptep);
1090 *ptep = entry;
1091
1092 if (mm_has_pgste(vma->vm_mm))
1093 pgste_set_unlock(ptep, pgste);
1094 return 1;
1095 }
1096
1097 /*
1098 * Conversion functions: convert a page and protection to a page entry,
1099 * and a page entry and page directory to the page they refer to.
1100 */
mk_pte_phys(unsigned long physpage,pgprot_t pgprot)1101 static inline pte_t mk_pte_phys(unsigned long physpage, pgprot_t pgprot)
1102 {
1103 pte_t __pte;
1104 pte_val(__pte) = physpage + pgprot_val(pgprot);
1105 return __pte;
1106 }
1107
mk_pte(struct page * page,pgprot_t pgprot)1108 static inline pte_t mk_pte(struct page *page, pgprot_t pgprot)
1109 {
1110 unsigned long physpage = page_to_phys(page);
1111
1112 return mk_pte_phys(physpage, pgprot);
1113 }
1114
1115 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
1116 #define pud_index(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
1117 #define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
1118 #define pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE-1))
1119
1120 #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
1121 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
1122
1123 #ifndef __s390x__
1124
1125 #define pmd_deref(pmd) (pmd_val(pmd) & _SEGMENT_ENTRY_ORIGIN)
1126 #define pud_deref(pmd) ({ BUG(); 0UL; })
1127 #define pgd_deref(pmd) ({ BUG(); 0UL; })
1128
1129 #define pud_offset(pgd, address) ((pud_t *) pgd)
1130 #define pmd_offset(pud, address) ((pmd_t *) pud + pmd_index(address))
1131
1132 #else /* __s390x__ */
1133
1134 #define pmd_deref(pmd) (pmd_val(pmd) & _SEGMENT_ENTRY_ORIGIN)
1135 #define pud_deref(pud) (pud_val(pud) & _REGION_ENTRY_ORIGIN)
1136 #define pgd_deref(pgd) (pgd_val(pgd) & _REGION_ENTRY_ORIGIN)
1137
pud_offset(pgd_t * pgd,unsigned long address)1138 static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address)
1139 {
1140 pud_t *pud = (pud_t *) pgd;
1141 if ((pgd_val(*pgd) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R2)
1142 pud = (pud_t *) pgd_deref(*pgd);
1143 return pud + pud_index(address);
1144 }
1145
pmd_offset(pud_t * pud,unsigned long address)1146 static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
1147 {
1148 pmd_t *pmd = (pmd_t *) pud;
1149 if ((pud_val(*pud) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R3)
1150 pmd = (pmd_t *) pud_deref(*pud);
1151 return pmd + pmd_index(address);
1152 }
1153
1154 #endif /* __s390x__ */
1155
1156 #define pfn_pte(pfn,pgprot) mk_pte_phys(__pa((pfn) << PAGE_SHIFT),(pgprot))
1157 #define pte_pfn(x) (pte_val(x) >> PAGE_SHIFT)
1158 #define pte_page(x) pfn_to_page(pte_pfn(x))
1159
1160 #define pmd_page(pmd) pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT)
1161
1162 /* Find an entry in the lowest level page table.. */
1163 #define pte_offset(pmd, addr) ((pte_t *) pmd_deref(*(pmd)) + pte_index(addr))
1164 #define pte_offset_kernel(pmd, address) pte_offset(pmd,address)
1165 #define pte_offset_map(pmd, address) pte_offset_kernel(pmd, address)
1166 #define pte_unmap(pte) do { } while (0)
1167
1168 /*
1169 * 31 bit swap entry format:
1170 * A page-table entry has some bits we have to treat in a special way.
1171 * Bits 0, 20 and bit 23 have to be zero, otherwise an specification
1172 * exception will occur instead of a page translation exception. The
1173 * specifiation exception has the bad habit not to store necessary
1174 * information in the lowcore.
1175 * Bit 21 and bit 22 are the page invalid bit and the page protection
1176 * bit. We set both to indicate a swapped page.
1177 * Bit 30 and 31 are used to distinguish the different page types. For
1178 * a swapped page these bits need to be zero.
1179 * This leaves the bits 1-19 and bits 24-29 to store type and offset.
1180 * We use the 5 bits from 25-29 for the type and the 20 bits from 1-19
1181 * plus 24 for the offset.
1182 * 0| offset |0110|o|type |00|
1183 * 0 0000000001111111111 2222 2 22222 33
1184 * 0 1234567890123456789 0123 4 56789 01
1185 *
1186 * 64 bit swap entry format:
1187 * A page-table entry has some bits we have to treat in a special way.
1188 * Bits 52 and bit 55 have to be zero, otherwise an specification
1189 * exception will occur instead of a page translation exception. The
1190 * specifiation exception has the bad habit not to store necessary
1191 * information in the lowcore.
1192 * Bit 53 and bit 54 are the page invalid bit and the page protection
1193 * bit. We set both to indicate a swapped page.
1194 * Bit 62 and 63 are used to distinguish the different page types. For
1195 * a swapped page these bits need to be zero.
1196 * This leaves the bits 0-51 and bits 56-61 to store type and offset.
1197 * We use the 5 bits from 57-61 for the type and the 53 bits from 0-51
1198 * plus 56 for the offset.
1199 * | offset |0110|o|type |00|
1200 * 0000000000111111111122222222223333333333444444444455 5555 5 55566 66
1201 * 0123456789012345678901234567890123456789012345678901 2345 6 78901 23
1202 */
1203 #ifndef __s390x__
1204 #define __SWP_OFFSET_MASK (~0UL >> 12)
1205 #else
1206 #define __SWP_OFFSET_MASK (~0UL >> 11)
1207 #endif
mk_swap_pte(unsigned long type,unsigned long offset)1208 static inline pte_t mk_swap_pte(unsigned long type, unsigned long offset)
1209 {
1210 pte_t pte;
1211 offset &= __SWP_OFFSET_MASK;
1212 pte_val(pte) = _PAGE_TYPE_SWAP | ((type & 0x1f) << 2) |
1213 ((offset & 1UL) << 7) | ((offset & ~1UL) << 11);
1214 return pte;
1215 }
1216
1217 #define __swp_type(entry) (((entry).val >> 2) & 0x1f)
1218 #define __swp_offset(entry) (((entry).val >> 11) | (((entry).val >> 7) & 1))
1219 #define __swp_entry(type,offset) ((swp_entry_t) { pte_val(mk_swap_pte((type),(offset))) })
1220
1221 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
1222 #define __swp_entry_to_pte(x) ((pte_t) { (x).val })
1223
1224 #ifndef __s390x__
1225 # define PTE_FILE_MAX_BITS 26
1226 #else /* __s390x__ */
1227 # define PTE_FILE_MAX_BITS 59
1228 #endif /* __s390x__ */
1229
1230 #define pte_to_pgoff(__pte) \
1231 ((((__pte).pte >> 12) << 7) + (((__pte).pte >> 1) & 0x7f))
1232
1233 #define pgoff_to_pte(__off) \
1234 ((pte_t) { ((((__off) & 0x7f) << 1) + (((__off) >> 7) << 12)) \
1235 | _PAGE_TYPE_FILE })
1236
1237 #endif /* !__ASSEMBLY__ */
1238
1239 #define kern_addr_valid(addr) (1)
1240
1241 extern int vmem_add_mapping(unsigned long start, unsigned long size);
1242 extern int vmem_remove_mapping(unsigned long start, unsigned long size);
1243 extern int s390_enable_sie(void);
1244
1245 /*
1246 * No page table caches to initialise
1247 */
1248 #define pgtable_cache_init() do { } while (0)
1249
1250 #include <asm-generic/pgtable.h>
1251
1252 #endif /* _S390_PAGE_H */
1253