1 /*
2 * include/asm-s390/pgtable.h
3 *
4 * S390 version
5 * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 * Author(s): Hartmut Penner (hp@de.ibm.com)
7 * Ulrich Weigand (weigand@de.ibm.com)
8 * Martin Schwidefsky (schwidefsky@de.ibm.com)
9 *
10 * Derived from "include/asm-i386/pgtable.h"
11 */
12
13 #ifndef _ASM_S390_PGTABLE_H
14 #define _ASM_S390_PGTABLE_H
15
16 /*
17 * The Linux memory management assumes a three-level page table setup. On
18 * the S390, we use that, but "fold" the mid level into the top-level page
19 * table, so that we physically have the same two-level page table as the
20 * S390 mmu expects.
21 *
22 * The "pgd_xxx()" functions are trivial for a folded two-level
23 * setup: the pgd is never bad, and a pmd always exists (as it's folded
24 * into the pgd entry)
25 *
26 * This file contains the functions and defines necessary to modify and use
27 * the S390 page table tree.
28 */
29 #ifndef __ASSEMBLY__
30 #include <asm/processor.h>
31 #include <linux/threads.h>
32
33 extern pgd_t swapper_pg_dir[] __attribute__ ((aligned (4096)));
34 extern void paging_init(void);
35
36 /* Caches aren't brain-dead on S390. */
37 #define flush_cache_all() do { } while (0)
38 #define flush_cache_mm(mm) do { } while (0)
39 #define flush_cache_range(mm, start, end) do { } while (0)
40 #define flush_cache_page(vma, vmaddr) do { } while (0)
41 #define flush_page_to_ram(page) do { } while (0)
42 #define flush_dcache_page(page) do { } while (0)
43 #define flush_icache_range(start, end) do { } while (0)
44 #define flush_icache_page(vma,pg) do { } while (0)
45 #define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
46
47 /*
48 * The S390 doesn't have any external MMU info: the kernel page
49 * tables contain all the necessary information.
50 */
51 #define update_mmu_cache(vma, address, pte) do { } while (0)
52
53 /*
54 * ZERO_PAGE is a global shared page that is always zero: used
55 * for zero-mapped memory areas etc..
56 */
57 extern char empty_zero_page[PAGE_SIZE];
58 #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
59 #endif /* !__ASSEMBLY__ */
60
61 /*
62 * PMD_SHIFT determines the size of the area a second-level page
63 * table can map
64 */
65 #define PMD_SHIFT 22
66 #define PMD_SIZE (1UL << PMD_SHIFT)
67 #define PMD_MASK (~(PMD_SIZE-1))
68
69 /* PGDIR_SHIFT determines what a third-level page table entry can map */
70 #define PGDIR_SHIFT 22
71 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
72 #define PGDIR_MASK (~(PGDIR_SIZE-1))
73
74 /*
75 * entries per page directory level: the S390 is two-level, so
76 * we don't really have any PMD directory physically.
77 * for S390 segment-table entries are combined to one PGD
78 * that leads to 1024 pte per pgd
79 */
80 #define PTRS_PER_PTE 1024
81 #define PTRS_PER_PMD 1
82 #define PTRS_PER_PGD 512
83
84 /*
85 * pgd entries used up by user/kernel:
86 */
87 #define USER_PTRS_PER_PGD 512
88 #define USER_PGD_PTRS 512
89 #define KERNEL_PGD_PTRS 512
90 #define FIRST_USER_PGD_NR 0
91
92 #define pte_ERROR(e) \
93 printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
94 #define pmd_ERROR(e) \
95 printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
96 #define pgd_ERROR(e) \
97 printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
98
99 #ifndef __ASSEMBLY__
100 /*
101 * Just any arbitrary offset to the start of the vmalloc VM area: the
102 * current 8MB value just means that there will be a 8MB "hole" after the
103 * physical memory until the kernel virtual memory starts. That means that
104 * any out-of-bounds memory accesses will hopefully be caught.
105 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
106 * area for the same reason. ;)
107 */
108 #define VMALLOC_OFFSET (8*1024*1024)
109 #define VMALLOC_START (((unsigned long) high_memory + VMALLOC_OFFSET) \
110 & ~(VMALLOC_OFFSET-1))
111 #define VMALLOC_VMADDR(x) ((unsigned long)(x))
112 #define VMALLOC_END (0x7fffffffL)
113
114
115 /*
116 * A pagetable entry of S390 has following format:
117 * | PFRA | | OS |
118 * 0 0IP0
119 * 00000000001111111111222222222233
120 * 01234567890123456789012345678901
121 *
122 * I Page-Invalid Bit: Page is not available for address-translation
123 * P Page-Protection Bit: Store access not possible for page
124 *
125 * A segmenttable entry of S390 has following format:
126 * | P-table origin | |PTL
127 * 0 IC
128 * 00000000001111111111222222222233
129 * 01234567890123456789012345678901
130 *
131 * I Segment-Invalid Bit: Segment is not available for address-translation
132 * C Common-Segment Bit: Segment is not private (PoP 3-30)
133 * PTL Page-Table-Length: Page-table length (PTL+1*16 entries -> up to 256)
134 *
135 * The segmenttable origin of S390 has following format:
136 *
137 * |S-table origin | | STL |
138 * X **GPS
139 * 00000000001111111111222222222233
140 * 01234567890123456789012345678901
141 *
142 * X Space-Switch event:
143 * G Segment-Invalid Bit: *
144 * P Private-Space Bit: Segment is not private (PoP 3-30)
145 * S Storage-Alteration:
146 * STL Segment-Table-Length: Segment-table length (STL+1*16 entries -> up to 2048)
147 *
148 * A storage key has the following format:
149 * | ACC |F|R|C|0|
150 * 0 3 4 5 6 7
151 * ACC: access key
152 * F : fetch protection bit
153 * R : referenced bit
154 * C : changed bit
155 */
156
157 /* Bits in the page table entry */
158 #define _PAGE_PRESENT 0x001 /* Software */
159 #define _PAGE_ISCLEAN 0x004 /* Software */
160 #define _PAGE_RO 0x200 /* HW read-only */
161 #define _PAGE_INVALID 0x400 /* HW invalid */
162
163 /* Bits in the segment table entry */
164 #define _PAGE_TABLE_LEN 0xf /* only full page-tables */
165 #define _PAGE_TABLE_COM 0x10 /* common page-table */
166 #define _PAGE_TABLE_INV 0x20 /* invalid page-table */
167 #define _SEG_PRESENT 0x001 /* Software (overlap with PTL) */
168
169 /* Bits int the storage key */
170 #define _PAGE_CHANGED 0x02 /* HW changed bit */
171 #define _PAGE_REFERENCED 0x04 /* HW referenced bit */
172
173 #define _USER_SEG_TABLE_LEN 0x7f /* user-segment-table up to 2 GB */
174 #define _KERNEL_SEG_TABLE_LEN 0x7f /* kernel-segment-table up to 2 GB */
175
176 /*
177 * User and Kernel pagetables are identical
178 */
179 #define _PAGE_TABLE (_PAGE_TABLE_LEN )
180 #define _KERNPG_TABLE (_PAGE_TABLE_LEN )
181
182 /*
183 * The Kernel segment-tables includes the User segment-table
184 */
185
186 #define _SEGMENT_TABLE (_USER_SEG_TABLE_LEN|0x80000000|0x100)
187 #define _KERNSEG_TABLE (_KERNEL_SEG_TABLE_LEN)
188
189 /*
190 * No mapping available
191 */
192 #define PAGE_INVALID __pgprot(_PAGE_INVALID)
193 #define PAGE_NONE_SHARED __pgprot(_PAGE_PRESENT|_PAGE_INVALID)
194 #define PAGE_NONE_PRIVATE __pgprot(_PAGE_PRESENT|_PAGE_INVALID|_PAGE_ISCLEAN)
195 #define PAGE_RO_SHARED __pgprot(_PAGE_PRESENT|_PAGE_RO)
196 #define PAGE_RO_PRIVATE __pgprot(_PAGE_PRESENT|_PAGE_RO|_PAGE_ISCLEAN)
197 #define PAGE_COPY __pgprot(_PAGE_PRESENT|_PAGE_RO|_PAGE_ISCLEAN)
198 #define PAGE_SHARED __pgprot(_PAGE_PRESENT)
199 #define PAGE_KERNEL __pgprot(_PAGE_PRESENT)
200
201 /*
202 * The S390 can't do page protection for execute, and considers that the
203 * same are read. Also, write permissions imply read permissions. This is
204 * the closest we can get..
205 */
206 /*xwr*/
207 #define __P000 PAGE_NONE_PRIVATE
208 #define __P001 PAGE_RO_PRIVATE
209 #define __P010 PAGE_COPY
210 #define __P011 PAGE_COPY
211 #define __P100 PAGE_RO_PRIVATE
212 #define __P101 PAGE_RO_PRIVATE
213 #define __P110 PAGE_COPY
214 #define __P111 PAGE_COPY
215
216 #define __S000 PAGE_NONE_SHARED
217 #define __S001 PAGE_RO_SHARED
218 #define __S010 PAGE_SHARED
219 #define __S011 PAGE_SHARED
220 #define __S100 PAGE_RO_SHARED
221 #define __S101 PAGE_RO_SHARED
222 #define __S110 PAGE_SHARED
223 #define __S111 PAGE_SHARED
224
225 /*
226 * Certain architectures need to do special things when PTEs
227 * within a page table are directly modified. Thus, the following
228 * hook is made available.
229 */
set_pte(pte_t * pteptr,pte_t pteval)230 extern inline void set_pte(pte_t *pteptr, pte_t pteval)
231 {
232 *pteptr = pteval;
233 }
234
235 #define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))
236
237 /*
238 * pgd/pmd/pte query functions
239 */
pgd_present(pgd_t pgd)240 extern inline int pgd_present(pgd_t pgd) { return 1; }
pgd_none(pgd_t pgd)241 extern inline int pgd_none(pgd_t pgd) { return 0; }
pgd_bad(pgd_t pgd)242 extern inline int pgd_bad(pgd_t pgd) { return 0; }
243
pmd_present(pmd_t pmd)244 extern inline int pmd_present(pmd_t pmd) { return pmd_val(pmd) & _SEG_PRESENT; }
pmd_none(pmd_t pmd)245 extern inline int pmd_none(pmd_t pmd) { return pmd_val(pmd) & _PAGE_TABLE_INV; }
pmd_bad(pmd_t pmd)246 extern inline int pmd_bad(pmd_t pmd)
247 {
248 return (pmd_val(pmd) & (~PAGE_MASK & ~_PAGE_TABLE_INV)) != _PAGE_TABLE;
249 }
250
pte_present(pte_t pte)251 extern inline int pte_present(pte_t pte) { return pte_val(pte) & _PAGE_PRESENT; }
pte_none(pte_t pte)252 extern inline int pte_none(pte_t pte)
253 {
254 return ((pte_val(pte) &
255 (_PAGE_INVALID | _PAGE_RO | _PAGE_PRESENT)) == _PAGE_INVALID);
256 }
257
258 #define pte_same(a,b) (pte_val(a) == pte_val(b))
259
260 /*
261 * query functions pte_write/pte_dirty/pte_young only work if
262 * pte_present() is true. Undefined behaviour if not..
263 */
pte_write(pte_t pte)264 extern inline int pte_write(pte_t pte)
265 {
266 return (pte_val(pte) & _PAGE_RO) == 0;
267 }
268
pte_dirty(pte_t pte)269 extern inline int pte_dirty(pte_t pte)
270 {
271 int skey;
272
273 if (pte_val(pte) & _PAGE_ISCLEAN)
274 return 0;
275 asm volatile ("iske %0,%1" : "=d" (skey) : "a" (pte_val(pte)));
276 return skey & _PAGE_CHANGED;
277 }
278
pte_young(pte_t pte)279 extern inline int pte_young(pte_t pte)
280 {
281 int skey;
282
283 asm volatile ("iske %0,%1" : "=d" (skey) : "a" (pte_val(pte)));
284 return skey & _PAGE_REFERENCED;
285 }
286
287 /*
288 * pgd/pmd/pte modification functions
289 */
pgd_clear(pgd_t * pgdp)290 extern inline void pgd_clear(pgd_t * pgdp) { }
291
pmd_clear(pmd_t * pmdp)292 extern inline void pmd_clear(pmd_t * pmdp)
293 {
294 pmd_val(pmdp[0]) = _PAGE_TABLE_INV;
295 pmd_val(pmdp[1]) = _PAGE_TABLE_INV;
296 pmd_val(pmdp[2]) = _PAGE_TABLE_INV;
297 pmd_val(pmdp[3]) = _PAGE_TABLE_INV;
298 }
299
pte_clear(pte_t * ptep)300 extern inline void pte_clear(pte_t *ptep)
301 {
302 pte_val(*ptep) = _PAGE_INVALID;
303 }
304
305 #define PTE_INIT(x) pte_clear(x)
306
307 /*
308 * The following pte modification functions only work if
309 * pte_present() is true. Undefined behaviour if not..
310 */
pte_modify(pte_t pte,pgprot_t newprot)311 extern inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
312 {
313 pte_val(pte) &= PAGE_MASK | _PAGE_ISCLEAN;
314 pte_val(pte) |= pgprot_val(newprot) & ~_PAGE_ISCLEAN;
315 return pte;
316 }
317
pte_wrprotect(pte_t pte)318 extern inline pte_t pte_wrprotect(pte_t pte)
319 {
320 pte_val(pte) |= _PAGE_RO;
321 return pte;
322 }
323
pte_mkwrite(pte_t pte)324 extern inline pte_t pte_mkwrite(pte_t pte)
325 {
326 pte_val(pte) &= ~(_PAGE_RO | _PAGE_ISCLEAN);
327 return pte;
328 }
329
pte_mkclean(pte_t pte)330 extern inline pte_t pte_mkclean(pte_t pte)
331 {
332 /* The only user of pte_mkclean is the fork() code.
333 We must *not* clear the *physical* page dirty bit
334 just because fork() wants to clear the dirty bit in
335 *one* of the page's mappings. So we just do nothing. */
336 return pte;
337 }
338
pte_mkdirty(pte_t pte)339 extern inline pte_t pte_mkdirty(pte_t pte)
340 {
341 /* We do not explicitly set the dirty bit because the
342 * sske instruction is slow. It is faster to let the
343 * next instruction set the dirty bit.
344 */
345 pte_val(pte) &= ~_PAGE_ISCLEAN;
346 return pte;
347 }
348
pte_mkold(pte_t pte)349 extern inline pte_t pte_mkold(pte_t pte)
350 {
351 asm volatile ("rrbe 0,%0" : : "a" (pte_val(pte)) : "cc" );
352 return pte;
353 }
354
pte_mkyoung(pte_t pte)355 extern inline pte_t pte_mkyoung(pte_t pte)
356 {
357 /* To set the referenced bit we read the first word from the real
358 * page with a special instruction: load using real address (lura).
359 * Isn't S/390 a nice architecture ?! */
360 asm volatile ("lura 0,%0" : : "a" (pte_val(pte) & PAGE_MASK) : "0" );
361 return pte;
362 }
363
ptep_test_and_clear_young(pte_t * ptep)364 static inline int ptep_test_and_clear_young(pte_t *ptep)
365 {
366 int ccode;
367
368 asm volatile ("rrbe 0,%1\n\t"
369 "ipm %0\n\t"
370 "srl %0,28\n\t"
371 : "=d" (ccode) : "a" (pte_val(*ptep)) : "cc" );
372 return ccode & 2;
373 }
374
ptep_test_and_clear_dirty(pte_t * ptep)375 static inline int ptep_test_and_clear_dirty(pte_t *ptep)
376 {
377 int skey;
378
379 if (pte_val(*ptep) & _PAGE_ISCLEAN)
380 return 0;
381 asm volatile ("iske %0,%1" : "=d" (skey) : "a" (*ptep));
382 if ((skey & _PAGE_CHANGED) == 0)
383 return 0;
384 /* We can't clear the changed bit atomically. For now we
385 * clear (!) the page referenced bit. */
386 asm volatile ("sske %0,%1"
387 : : "d" (get_storage_key()), "a" (*ptep));
388 return 1;
389 }
390
ptep_get_and_clear(pte_t * ptep)391 static inline pte_t ptep_get_and_clear(pte_t *ptep)
392 {
393 pte_t pte = *ptep;
394 pte_clear(ptep);
395 return pte;
396 }
397
ptep_set_wrprotect(pte_t * ptep)398 static inline void ptep_set_wrprotect(pte_t *ptep)
399 {
400 pte_t old_pte = *ptep;
401 set_pte(ptep, pte_wrprotect(old_pte));
402 }
403
ptep_mkdirty(pte_t * ptep)404 static inline void ptep_mkdirty(pte_t *ptep)
405 {
406 pte_mkdirty(*ptep);
407 }
408
409 /*
410 * Conversion functions: convert a page and protection to a page entry,
411 * and a page entry and page directory to the page they refer to.
412 */
mk_pte_phys(unsigned long physpage,pgprot_t pgprot)413 static inline pte_t mk_pte_phys(unsigned long physpage, pgprot_t pgprot)
414 {
415 pte_t __pte;
416 pte_val(__pte) = physpage + pgprot_val(pgprot);
417 return __pte;
418 }
419
420 #define mk_pte(pg, pgprot) \
421 ({ \
422 struct page *__page = (pg); \
423 pgprot_t __pgprot = (pgprot); \
424 unsigned long __physpage = __pa((__page-mem_map) << PAGE_SHIFT); \
425 pte_t __pte = mk_pte_phys(__physpage, __pgprot); \
426 __pte; \
427 })
428
429 #define SetPageUptodate(_page) \
430 do { \
431 struct page *__page = (_page); \
432 if (!test_and_set_bit(PG_uptodate, &__page->flags)) \
433 asm volatile ("sske %0,%1" \
434 : : "d" (get_storage_key()), \
435 "a" (__pa((__page-mem_map) << PAGE_SHIFT)));\
436 } while (0)
437
438 #define pte_page(x) (mem_map+(unsigned long)((pte_val(x) >> PAGE_SHIFT)))
439
440 #define pmd_page(pmd) \
441 ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
442
443 /* to find an entry in a page-table-directory */
444 #define pgd_index(address) ((address >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
445 #define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address))
446
447 /* to find an entry in a kernel page-table-directory */
448 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
449
450 /* Find an entry in the second-level page table.. */
pmd_offset(pgd_t * dir,unsigned long address)451 extern inline pmd_t * pmd_offset(pgd_t * dir, unsigned long address)
452 {
453 return (pmd_t *) dir;
454 }
455
456 /* Find an entry in the third-level page table.. */
457 #define pte_offset(pmd, address) \
458 ((pte_t *) (pmd_page(*pmd) + ((address>>10) & ((PTRS_PER_PTE-1)<<2))))
459
460 /*
461 * A page-table entry has some bits we have to treat in a special way.
462 * Bits 0, 20 and bit 23 have to be zero, otherwise an specification
463 * exception will occur instead of a page translation exception. The
464 * specifiation exception has the bad habit not to store necessary
465 * information in the lowcore.
466 * Bit 21 and bit 22 are the page invalid bit and the page protection
467 * bit. We set both to indicate a swapped page.
468 * Bit 31 is used as the software page present bit. If a page is
469 * swapped this obviously has to be zero.
470 * This leaves the bits 1-19 and bits 24-30 to store type and offset.
471 * We use the 7 bits from 24-30 for the type and the 19 bits from 1-19
472 * for the offset.
473 * 0| offset |0110|type |0
474 * 00000000001111111111222222222233
475 * 01234567890123456789012345678901
476 */
mk_swap_pte(unsigned long type,unsigned long offset)477 extern inline pte_t mk_swap_pte(unsigned long type, unsigned long offset)
478 {
479 pte_t pte;
480 pte_val(pte) = (type << 1) | (offset << 12) | _PAGE_INVALID | _PAGE_RO;
481 pte_val(pte) &= 0x7ffff6fe; /* better to be paranoid */
482 return pte;
483 }
484
485 #define SWP_TYPE(entry) (((entry).val >> 1) & 0x3f)
486 #define SWP_OFFSET(entry) (((entry).val >> 12) & 0x7FFFF )
487 #define SWP_ENTRY(type,offset) ((swp_entry_t) { pte_val(mk_swap_pte((type),(offset))) })
488
489 #define pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
490 #define swp_entry_to_pte(x) ((pte_t) { (x).val })
491
492 #endif /* !__ASSEMBLY__ */
493
494 /* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
495 #define PageSkip(page) (0)
496 #define kern_addr_valid(addr) (1)
497
498 /*
499 * No page table caches to initialise
500 */
501 #define pgtable_cache_init() do { } while (0)
502
503 #endif /* _S390_PAGE_H */
504
505