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Searched defs:_FPU_SETCW (Results 1 – 15 of 15) sorted by relevance

/glibc-2.36/sysdeps/sh/
Dfpu_control.h28 #define _FPU_SETCW(cw) (void) (cw) macro
64 #define _FPU_SETCW(cw) __set_fpscr ((cw)) macro
66 #define _FPU_SETCW(cw) __asm__ ("lds %0,fpscr" : : "r" (cw)) macro
/glibc-2.36/sysdeps/arm/
Dfpu_control.h28 #define _FPU_SETCW(cw) (void) (cw) macro
61 # define _FPU_SETCW(cw) \ macro
66 # define _FPU_SETCW(cw) \ macro
/glibc-2.36/sysdeps/mips/
Dfpu_control.h68 #define _FPU_SETCW(cw) (void) (cw) macro
121 # define _FPU_SETCW(cw) __mips_fpu_setcw (cw) macro
124 # define _FPU_SETCW(cw) __asm__ volatile ("ctc1 %0,$31" : : "r" (cw)) macro
/glibc-2.36/sysdeps/s390/fpu/
Dfpu_control.h36 #define _FPU_SETCW(cw) __asm__ __volatile__ ("sfpc %0,0" : : "d" (cw)) macro
/glibc-2.36/sysdeps/generic/
Dfpu_control.h33 #define _FPU_SETCW(cw) (void) (cw) macro
/glibc-2.36/sysdeps/sparc/fpu/
Dfpu_control.h62 # define _FPU_SETCW(cw) __asm__ __volatile__ ("ldx %0,%%fsr" : : "m" (*&cw)) macro
65 # define _FPU_SETCW(cw) __asm__ __volatile__ ("ld %0,%%fsr" : : "m" (*&cw)) macro
/glibc-2.36/sysdeps/arc/
Dfpu_control.h55 # define _FPU_SETCW(cw) (void) (cw) macro
81 # define _FPU_SETCW(cw) __asm__ volatile ("sr %0, [0x300]" : : "r" (cw)) macro
/glibc-2.36/sysdeps/csky/
Dfpu_control.h70 # define _FPU_SETCW(cw) (void) (cw) macro
116 # define _FPU_SETCW(cw) __asm__ volatile ("mtcr %0, cr<1, 2>" : : "a" (cw)) macro
125 # define _FPU_SETCW(cw) __asm__ volatile ("1: cprcr r7, cpcr2 \n" \ macro
/glibc-2.36/sysdeps/powerpc/
Dfpu_control.h32 # define _FPU_SETCW(cw) (void) (cw) macro
100 # define _FPU_SETCW(cw) \ macro
/glibc-2.36/sysdeps/aarch64/fpu/
Dfpu_control.h28 # define _FPU_SETCW(fpcr) __builtin_aarch64_set_fpcr (fpcr) macro
35 # define _FPU_SETCW(fpcr) \ macro
/glibc-2.36/sysdeps/m68k/
Dfpu_control.h61 # define _FPU_SETCW(cw) ((void) (cw)) macro
109 # define _FPU_SETCW(cw) __asm__ volatile ("fmove%.l %0, %!" : : "dm" (cw)) macro
/glibc-2.36/sysdeps/riscv/
Dfpu_control.h30 # define _FPU_SETCW(cw) do { } while (0) macro
44 # define _FPU_SETCW(cw) __asm__ volatile ("fssr %z0" : : "rJ" (cw)) macro
/glibc-2.36/sysdeps/hppa/fpu/
Dfpu_control.h57 #define _FPU_SETCW(cw) \ macro
/glibc-2.36/sysdeps/loongarch/
Dfpu_control.h84 #define _FPU_SETCW(cw) __asm__ volatile ("movgr2fcsr $r0,%0" : : "r"(cw)) macro
/glibc-2.36/sysdeps/x86/
Dfpu_control.h103 #define _FPU_SETCW(cw) __asm__ __volatile__ ("fldcw %0" : : "m" (*&cw)) macro