1 use bitfield_struct::bitfield; 2 3 #[allow(dead_code)] 4 #[derive(Debug)] 5 pub enum X86MsiData { 6 Normal(X86MsiDataNormal), 7 Dmar(X86MsiDataDmar), 8 } 9 10 #[bitfield(u32)] 11 pub struct X86MsiDataNormal { 12 #[bits(8)] 13 pub vector: u8, 14 #[bits(3)] 15 pub delivery_mode: u8, 16 #[bits(1)] 17 pub dest_mode_logical: bool, 18 #[bits(2)] 19 reserved: u8, 20 #[bits(1)] 21 pub active_low: bool, 22 #[bits(1)] 23 pub is_level_triggered: bool, 24 #[bits(16)] 25 reserved2: u16, 26 } 27 28 #[derive(Debug)] 29 #[allow(dead_code)] 30 pub struct X86MsiDataDmar { 31 pub dmar_subhandle: u32, 32 } 33 34 impl X86MsiDataDmar { 35 #[allow(dead_code)] new(dmar_subhandle: u32) -> Self36 pub const fn new(dmar_subhandle: u32) -> Self { 37 X86MsiDataDmar { dmar_subhandle } 38 } 39 } 40 41 pub const X86_MSI_BASE_ADDRESS_LOW: u32 = 0xfee00000 >> 20; 42 43 #[allow(dead_code)] 44 #[derive(Debug)] 45 pub enum X86MsiAddrLo { 46 Normal(X86MsiAddrLoNormal), 47 Dmar(X86MsiAddrLoDmar), 48 } 49 50 #[bitfield(u32)] 51 pub struct X86MsiAddrLoNormal { 52 #[bits(2)] 53 reserved_0: u32, 54 #[bits(1)] 55 pub dest_mode_logical: bool, 56 #[bits(1)] 57 pub redirecti_hint: bool, 58 #[bits(1)] 59 reserved_1: bool, 60 #[bits(7)] 61 pub virt_destid_8_14: u32, 62 #[bits(8)] 63 pub destid_0_7: u32, 64 #[bits(12)] 65 pub base_address: u32, 66 } 67 68 #[bitfield(u32)] 69 pub struct X86MsiAddrLoDmar { 70 #[bits(2)] 71 reserved_0: u32, 72 #[bits(1)] 73 pub index_15: bool, 74 #[bits(1)] 75 pub subhandle_valid: bool, 76 #[bits(1)] 77 pub format: bool, 78 #[bits(15)] 79 pub index_0_14: u32, 80 #[bits(12)] 81 pub base_address: u32, 82 } 83 84 #[bitfield(u32)] 85 pub struct X86MsiAddrHi { 86 #[bits(8)] 87 reserved: u32, 88 #[bits(24)] 89 pub destid_8_31: u32, 90 } 91