1 /*
2  * include/linux/mfd/wm831x/core.h -- Core interface for WM831x
3  *
4  * Copyright 2009 Wolfson Microelectronics PLC.
5  *
6  * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7  *
8  *  This program is free software; you can redistribute  it and/or modify it
9  *  under  the terms of  the GNU General  Public License as published by the
10  *  Free Software Foundation;  either version 2 of the  License, or (at your
11  *  option) any later version.
12  *
13  */
14 
15 #ifndef __MFD_WM831X_CORE_H__
16 #define __MFD_WM831X_CORE_H__
17 
18 #include <linux/completion.h>
19 #include <linux/interrupt.h>
20 #include <linux/list.h>
21 #include <linux/regmap.h>
22 
23 /*
24  * Register values.
25  */
26 #define WM831X_RESET_ID                         0x00
27 #define WM831X_REVISION                         0x01
28 #define WM831X_PARENT_ID                        0x4000
29 #define WM831X_SYSVDD_CONTROL                   0x4001
30 #define WM831X_THERMAL_MONITORING               0x4002
31 #define WM831X_POWER_STATE                      0x4003
32 #define WM831X_WATCHDOG                         0x4004
33 #define WM831X_ON_PIN_CONTROL                   0x4005
34 #define WM831X_RESET_CONTROL                    0x4006
35 #define WM831X_CONTROL_INTERFACE                0x4007
36 #define WM831X_SECURITY_KEY                     0x4008
37 #define WM831X_SOFTWARE_SCRATCH                 0x4009
38 #define WM831X_OTP_CONTROL                      0x400A
39 #define WM831X_GPIO_LEVEL                       0x400C
40 #define WM831X_SYSTEM_STATUS                    0x400D
41 #define WM831X_ON_SOURCE                        0x400E
42 #define WM831X_OFF_SOURCE                       0x400F
43 #define WM831X_SYSTEM_INTERRUPTS                0x4010
44 #define WM831X_INTERRUPT_STATUS_1               0x4011
45 #define WM831X_INTERRUPT_STATUS_2               0x4012
46 #define WM831X_INTERRUPT_STATUS_3               0x4013
47 #define WM831X_INTERRUPT_STATUS_4               0x4014
48 #define WM831X_INTERRUPT_STATUS_5               0x4015
49 #define WM831X_IRQ_CONFIG                       0x4017
50 #define WM831X_SYSTEM_INTERRUPTS_MASK           0x4018
51 #define WM831X_INTERRUPT_STATUS_1_MASK          0x4019
52 #define WM831X_INTERRUPT_STATUS_2_MASK          0x401A
53 #define WM831X_INTERRUPT_STATUS_3_MASK          0x401B
54 #define WM831X_INTERRUPT_STATUS_4_MASK          0x401C
55 #define WM831X_INTERRUPT_STATUS_5_MASK          0x401D
56 #define WM831X_RTC_WRITE_COUNTER                0x4020
57 #define WM831X_RTC_TIME_1                       0x4021
58 #define WM831X_RTC_TIME_2                       0x4022
59 #define WM831X_RTC_ALARM_1                      0x4023
60 #define WM831X_RTC_ALARM_2                      0x4024
61 #define WM831X_RTC_CONTROL                      0x4025
62 #define WM831X_RTC_TRIM                         0x4026
63 #define WM831X_TOUCH_CONTROL_1                  0x4028
64 #define WM831X_TOUCH_CONTROL_2                  0x4029
65 #define WM831X_TOUCH_DATA_X                     0x402A
66 #define WM831X_TOUCH_DATA_Y                     0x402B
67 #define WM831X_TOUCH_DATA_Z                     0x402C
68 #define WM831X_AUXADC_DATA                      0x402D
69 #define WM831X_AUXADC_CONTROL                   0x402E
70 #define WM831X_AUXADC_SOURCE                    0x402F
71 #define WM831X_COMPARATOR_CONTROL               0x4030
72 #define WM831X_COMPARATOR_1                     0x4031
73 #define WM831X_COMPARATOR_2                     0x4032
74 #define WM831X_COMPARATOR_3                     0x4033
75 #define WM831X_COMPARATOR_4                     0x4034
76 #define WM831X_GPIO1_CONTROL                    0x4038
77 #define WM831X_GPIO2_CONTROL                    0x4039
78 #define WM831X_GPIO3_CONTROL                    0x403A
79 #define WM831X_GPIO4_CONTROL                    0x403B
80 #define WM831X_GPIO5_CONTROL                    0x403C
81 #define WM831X_GPIO6_CONTROL                    0x403D
82 #define WM831X_GPIO7_CONTROL                    0x403E
83 #define WM831X_GPIO8_CONTROL                    0x403F
84 #define WM831X_GPIO9_CONTROL                    0x4040
85 #define WM831X_GPIO10_CONTROL                   0x4041
86 #define WM831X_GPIO11_CONTROL                   0x4042
87 #define WM831X_GPIO12_CONTROL                   0x4043
88 #define WM831X_GPIO13_CONTROL                   0x4044
89 #define WM831X_GPIO14_CONTROL                   0x4045
90 #define WM831X_GPIO15_CONTROL                   0x4046
91 #define WM831X_GPIO16_CONTROL                   0x4047
92 #define WM831X_CHARGER_CONTROL_1                0x4048
93 #define WM831X_CHARGER_CONTROL_2                0x4049
94 #define WM831X_CHARGER_STATUS                   0x404A
95 #define WM831X_BACKUP_CHARGER_CONTROL           0x404B
96 #define WM831X_STATUS_LED_1                     0x404C
97 #define WM831X_STATUS_LED_2                     0x404D
98 #define WM831X_CURRENT_SINK_1                   0x404E
99 #define WM831X_CURRENT_SINK_2                   0x404F
100 #define WM831X_DCDC_ENABLE                      0x4050
101 #define WM831X_LDO_ENABLE                       0x4051
102 #define WM831X_DCDC_STATUS                      0x4052
103 #define WM831X_LDO_STATUS                       0x4053
104 #define WM831X_DCDC_UV_STATUS                   0x4054
105 #define WM831X_LDO_UV_STATUS                    0x4055
106 #define WM831X_DC1_CONTROL_1                    0x4056
107 #define WM831X_DC1_CONTROL_2                    0x4057
108 #define WM831X_DC1_ON_CONFIG                    0x4058
109 #define WM831X_DC1_SLEEP_CONTROL                0x4059
110 #define WM831X_DC1_DVS_CONTROL                  0x405A
111 #define WM831X_DC2_CONTROL_1                    0x405B
112 #define WM831X_DC2_CONTROL_2                    0x405C
113 #define WM831X_DC2_ON_CONFIG                    0x405D
114 #define WM831X_DC2_SLEEP_CONTROL                0x405E
115 #define WM831X_DC2_DVS_CONTROL                  0x405F
116 #define WM831X_DC3_CONTROL_1                    0x4060
117 #define WM831X_DC3_CONTROL_2                    0x4061
118 #define WM831X_DC3_ON_CONFIG                    0x4062
119 #define WM831X_DC3_SLEEP_CONTROL                0x4063
120 #define WM831X_DC4_CONTROL                      0x4064
121 #define WM831X_DC4_SLEEP_CONTROL                0x4065
122 #define WM832X_DC4_SLEEP_CONTROL                0x4067
123 #define WM831X_EPE1_CONTROL                     0x4066
124 #define WM831X_EPE2_CONTROL                     0x4067
125 #define WM831X_LDO1_CONTROL                     0x4068
126 #define WM831X_LDO1_ON_CONTROL                  0x4069
127 #define WM831X_LDO1_SLEEP_CONTROL               0x406A
128 #define WM831X_LDO2_CONTROL                     0x406B
129 #define WM831X_LDO2_ON_CONTROL                  0x406C
130 #define WM831X_LDO2_SLEEP_CONTROL               0x406D
131 #define WM831X_LDO3_CONTROL                     0x406E
132 #define WM831X_LDO3_ON_CONTROL                  0x406F
133 #define WM831X_LDO3_SLEEP_CONTROL               0x4070
134 #define WM831X_LDO4_CONTROL                     0x4071
135 #define WM831X_LDO4_ON_CONTROL                  0x4072
136 #define WM831X_LDO4_SLEEP_CONTROL               0x4073
137 #define WM831X_LDO5_CONTROL                     0x4074
138 #define WM831X_LDO5_ON_CONTROL                  0x4075
139 #define WM831X_LDO5_SLEEP_CONTROL               0x4076
140 #define WM831X_LDO6_CONTROL                     0x4077
141 #define WM831X_LDO6_ON_CONTROL                  0x4078
142 #define WM831X_LDO6_SLEEP_CONTROL               0x4079
143 #define WM831X_LDO7_CONTROL                     0x407A
144 #define WM831X_LDO7_ON_CONTROL                  0x407B
145 #define WM831X_LDO7_SLEEP_CONTROL               0x407C
146 #define WM831X_LDO8_CONTROL                     0x407D
147 #define WM831X_LDO8_ON_CONTROL                  0x407E
148 #define WM831X_LDO8_SLEEP_CONTROL               0x407F
149 #define WM831X_LDO9_CONTROL                     0x4080
150 #define WM831X_LDO9_ON_CONTROL                  0x4081
151 #define WM831X_LDO9_SLEEP_CONTROL               0x4082
152 #define WM831X_LDO10_CONTROL                    0x4083
153 #define WM831X_LDO10_ON_CONTROL                 0x4084
154 #define WM831X_LDO10_SLEEP_CONTROL              0x4085
155 #define WM831X_LDO11_ON_CONTROL                 0x4087
156 #define WM831X_LDO11_SLEEP_CONTROL              0x4088
157 #define WM831X_POWER_GOOD_SOURCE_1              0x408E
158 #define WM831X_POWER_GOOD_SOURCE_2              0x408F
159 #define WM831X_CLOCK_CONTROL_1                  0x4090
160 #define WM831X_CLOCK_CONTROL_2                  0x4091
161 #define WM831X_FLL_CONTROL_1                    0x4092
162 #define WM831X_FLL_CONTROL_2                    0x4093
163 #define WM831X_FLL_CONTROL_3                    0x4094
164 #define WM831X_FLL_CONTROL_4                    0x4095
165 #define WM831X_FLL_CONTROL_5                    0x4096
166 #define WM831X_UNIQUE_ID_1                      0x7800
167 #define WM831X_UNIQUE_ID_2                      0x7801
168 #define WM831X_UNIQUE_ID_3                      0x7802
169 #define WM831X_UNIQUE_ID_4                      0x7803
170 #define WM831X_UNIQUE_ID_5                      0x7804
171 #define WM831X_UNIQUE_ID_6                      0x7805
172 #define WM831X_UNIQUE_ID_7                      0x7806
173 #define WM831X_UNIQUE_ID_8                      0x7807
174 #define WM831X_FACTORY_OTP_ID                   0x7808
175 #define WM831X_FACTORY_OTP_1                    0x7809
176 #define WM831X_FACTORY_OTP_2                    0x780A
177 #define WM831X_FACTORY_OTP_3                    0x780B
178 #define WM831X_FACTORY_OTP_4                    0x780C
179 #define WM831X_FACTORY_OTP_5                    0x780D
180 #define WM831X_CUSTOMER_OTP_ID                  0x7810
181 #define WM831X_DC1_OTP_CONTROL                  0x7811
182 #define WM831X_DC2_OTP_CONTROL                  0x7812
183 #define WM831X_DC3_OTP_CONTROL                  0x7813
184 #define WM831X_LDO1_2_OTP_CONTROL               0x7814
185 #define WM831X_LDO3_4_OTP_CONTROL               0x7815
186 #define WM831X_LDO5_6_OTP_CONTROL               0x7816
187 #define WM831X_LDO7_8_OTP_CONTROL               0x7817
188 #define WM831X_LDO9_10_OTP_CONTROL              0x7818
189 #define WM831X_LDO11_EPE_CONTROL                0x7819
190 #define WM831X_GPIO1_OTP_CONTROL                0x781A
191 #define WM831X_GPIO2_OTP_CONTROL                0x781B
192 #define WM831X_GPIO3_OTP_CONTROL                0x781C
193 #define WM831X_GPIO4_OTP_CONTROL                0x781D
194 #define WM831X_GPIO5_OTP_CONTROL                0x781E
195 #define WM831X_GPIO6_OTP_CONTROL                0x781F
196 #define WM831X_DBE_CHECK_DATA                   0x7827
197 
198 /*
199  * R0 (0x00) - Reset ID
200  */
201 #define WM831X_CHIP_ID_MASK                     0xFFFF  /* CHIP_ID - [15:0] */
202 #define WM831X_CHIP_ID_SHIFT                         0  /* CHIP_ID - [15:0] */
203 #define WM831X_CHIP_ID_WIDTH                        16  /* CHIP_ID - [15:0] */
204 
205 /*
206  * R1 (0x01) - Revision
207  */
208 #define WM831X_PARENT_REV_MASK                  0xFF00  /* PARENT_REV - [15:8] */
209 #define WM831X_PARENT_REV_SHIFT                      8  /* PARENT_REV - [15:8] */
210 #define WM831X_PARENT_REV_WIDTH                      8  /* PARENT_REV - [15:8] */
211 #define WM831X_CHILD_REV_MASK                   0x00FF  /* CHILD_REV - [7:0] */
212 #define WM831X_CHILD_REV_SHIFT                       0  /* CHILD_REV - [7:0] */
213 #define WM831X_CHILD_REV_WIDTH                       8  /* CHILD_REV - [7:0] */
214 
215 /*
216  * R16384 (0x4000) - Parent ID
217  */
218 #define WM831X_PARENT_ID_MASK                   0xFFFF  /* PARENT_ID - [15:0] */
219 #define WM831X_PARENT_ID_SHIFT                       0  /* PARENT_ID - [15:0] */
220 #define WM831X_PARENT_ID_WIDTH                      16  /* PARENT_ID - [15:0] */
221 
222 /*
223  * R16389 (0x4005) - ON Pin Control
224  */
225 #define WM831X_ON_PIN_SECACT_MASK               0x0300  /* ON_PIN_SECACT - [9:8] */
226 #define WM831X_ON_PIN_SECACT_SHIFT                   8  /* ON_PIN_SECACT - [9:8] */
227 #define WM831X_ON_PIN_SECACT_WIDTH                   2  /* ON_PIN_SECACT - [9:8] */
228 #define WM831X_ON_PIN_PRIMACT_MASK              0x0030  /* ON_PIN_PRIMACT - [5:4] */
229 #define WM831X_ON_PIN_PRIMACT_SHIFT                  4  /* ON_PIN_PRIMACT - [5:4] */
230 #define WM831X_ON_PIN_PRIMACT_WIDTH                  2  /* ON_PIN_PRIMACT - [5:4] */
231 #define WM831X_ON_PIN_STS                       0x0008  /* ON_PIN_STS */
232 #define WM831X_ON_PIN_STS_MASK                  0x0008  /* ON_PIN_STS */
233 #define WM831X_ON_PIN_STS_SHIFT                      3  /* ON_PIN_STS */
234 #define WM831X_ON_PIN_STS_WIDTH                      1  /* ON_PIN_STS */
235 #define WM831X_ON_PIN_TO_MASK                   0x0003  /* ON_PIN_TO - [1:0] */
236 #define WM831X_ON_PIN_TO_SHIFT                       0  /* ON_PIN_TO - [1:0] */
237 #define WM831X_ON_PIN_TO_WIDTH                       2  /* ON_PIN_TO - [1:0] */
238 
239 /*
240  * R16528 (0x4090) - Clock Control 1
241  */
242 #define WM831X_CLKOUT_ENA                       0x8000  /* CLKOUT_ENA */
243 #define WM831X_CLKOUT_ENA_MASK                  0x8000  /* CLKOUT_ENA */
244 #define WM831X_CLKOUT_ENA_SHIFT                     15  /* CLKOUT_ENA */
245 #define WM831X_CLKOUT_ENA_WIDTH                      1  /* CLKOUT_ENA */
246 #define WM831X_CLKOUT_OD                        0x2000  /* CLKOUT_OD */
247 #define WM831X_CLKOUT_OD_MASK                   0x2000  /* CLKOUT_OD */
248 #define WM831X_CLKOUT_OD_SHIFT                      13  /* CLKOUT_OD */
249 #define WM831X_CLKOUT_OD_WIDTH                       1  /* CLKOUT_OD */
250 #define WM831X_CLKOUT_SLOT_MASK                 0x0700  /* CLKOUT_SLOT - [10:8] */
251 #define WM831X_CLKOUT_SLOT_SHIFT                     8  /* CLKOUT_SLOT - [10:8] */
252 #define WM831X_CLKOUT_SLOT_WIDTH                     3  /* CLKOUT_SLOT - [10:8] */
253 #define WM831X_CLKOUT_SLPSLOT_MASK              0x0070  /* CLKOUT_SLPSLOT - [6:4] */
254 #define WM831X_CLKOUT_SLPSLOT_SHIFT                  4  /* CLKOUT_SLPSLOT - [6:4] */
255 #define WM831X_CLKOUT_SLPSLOT_WIDTH                  3  /* CLKOUT_SLPSLOT - [6:4] */
256 #define WM831X_CLKOUT_SRC                       0x0001  /* CLKOUT_SRC */
257 #define WM831X_CLKOUT_SRC_MASK                  0x0001  /* CLKOUT_SRC */
258 #define WM831X_CLKOUT_SRC_SHIFT                      0  /* CLKOUT_SRC */
259 #define WM831X_CLKOUT_SRC_WIDTH                      1  /* CLKOUT_SRC */
260 
261 /*
262  * R16529 (0x4091) - Clock Control 2
263  */
264 #define WM831X_XTAL_INH                         0x8000  /* XTAL_INH */
265 #define WM831X_XTAL_INH_MASK                    0x8000  /* XTAL_INH */
266 #define WM831X_XTAL_INH_SHIFT                       15  /* XTAL_INH */
267 #define WM831X_XTAL_INH_WIDTH                        1  /* XTAL_INH */
268 #define WM831X_XTAL_ENA                         0x2000  /* XTAL_ENA */
269 #define WM831X_XTAL_ENA_MASK                    0x2000  /* XTAL_ENA */
270 #define WM831X_XTAL_ENA_SHIFT                       13  /* XTAL_ENA */
271 #define WM831X_XTAL_ENA_WIDTH                        1  /* XTAL_ENA */
272 #define WM831X_XTAL_BKUPENA                     0x1000  /* XTAL_BKUPENA */
273 #define WM831X_XTAL_BKUPENA_MASK                0x1000  /* XTAL_BKUPENA */
274 #define WM831X_XTAL_BKUPENA_SHIFT                   12  /* XTAL_BKUPENA */
275 #define WM831X_XTAL_BKUPENA_WIDTH                    1  /* XTAL_BKUPENA */
276 #define WM831X_FLL_AUTO                         0x0080  /* FLL_AUTO */
277 #define WM831X_FLL_AUTO_MASK                    0x0080  /* FLL_AUTO */
278 #define WM831X_FLL_AUTO_SHIFT                        7  /* FLL_AUTO */
279 #define WM831X_FLL_AUTO_WIDTH                        1  /* FLL_AUTO */
280 #define WM831X_FLL_AUTO_FREQ_MASK               0x0007  /* FLL_AUTO_FREQ - [2:0] */
281 #define WM831X_FLL_AUTO_FREQ_SHIFT                   0  /* FLL_AUTO_FREQ - [2:0] */
282 #define WM831X_FLL_AUTO_FREQ_WIDTH                   3  /* FLL_AUTO_FREQ - [2:0] */
283 
284 /*
285  * R16530 (0x4092) - FLL Control 1
286  */
287 #define WM831X_FLL_FRAC                         0x0004  /* FLL_FRAC */
288 #define WM831X_FLL_FRAC_MASK                    0x0004  /* FLL_FRAC */
289 #define WM831X_FLL_FRAC_SHIFT                        2  /* FLL_FRAC */
290 #define WM831X_FLL_FRAC_WIDTH                        1  /* FLL_FRAC */
291 #define WM831X_FLL_OSC_ENA                      0x0002  /* FLL_OSC_ENA */
292 #define WM831X_FLL_OSC_ENA_MASK                 0x0002  /* FLL_OSC_ENA */
293 #define WM831X_FLL_OSC_ENA_SHIFT                     1  /* FLL_OSC_ENA */
294 #define WM831X_FLL_OSC_ENA_WIDTH                     1  /* FLL_OSC_ENA */
295 #define WM831X_FLL_ENA                          0x0001  /* FLL_ENA */
296 #define WM831X_FLL_ENA_MASK                     0x0001  /* FLL_ENA */
297 #define WM831X_FLL_ENA_SHIFT                         0  /* FLL_ENA */
298 #define WM831X_FLL_ENA_WIDTH                         1  /* FLL_ENA */
299 
300 /*
301  * R16531 (0x4093) - FLL Control 2
302  */
303 #define WM831X_FLL_OUTDIV_MASK                  0x3F00  /* FLL_OUTDIV - [13:8] */
304 #define WM831X_FLL_OUTDIV_SHIFT                      8  /* FLL_OUTDIV - [13:8] */
305 #define WM831X_FLL_OUTDIV_WIDTH                      6  /* FLL_OUTDIV - [13:8] */
306 #define WM831X_FLL_CTRL_RATE_MASK               0x0070  /* FLL_CTRL_RATE - [6:4] */
307 #define WM831X_FLL_CTRL_RATE_SHIFT                   4  /* FLL_CTRL_RATE - [6:4] */
308 #define WM831X_FLL_CTRL_RATE_WIDTH                   3  /* FLL_CTRL_RATE - [6:4] */
309 #define WM831X_FLL_FRATIO_MASK                  0x0007  /* FLL_FRATIO - [2:0] */
310 #define WM831X_FLL_FRATIO_SHIFT                      0  /* FLL_FRATIO - [2:0] */
311 #define WM831X_FLL_FRATIO_WIDTH                      3  /* FLL_FRATIO - [2:0] */
312 
313 /*
314  * R16532 (0x4094) - FLL Control 3
315  */
316 #define WM831X_FLL_K_MASK                       0xFFFF  /* FLL_K - [15:0] */
317 #define WM831X_FLL_K_SHIFT                           0  /* FLL_K - [15:0] */
318 #define WM831X_FLL_K_WIDTH                          16  /* FLL_K - [15:0] */
319 
320 /*
321  * R16533 (0x4095) - FLL Control 4
322  */
323 #define WM831X_FLL_N_MASK                       0x7FE0  /* FLL_N - [14:5] */
324 #define WM831X_FLL_N_SHIFT                           5  /* FLL_N - [14:5] */
325 #define WM831X_FLL_N_WIDTH                          10  /* FLL_N - [14:5] */
326 #define WM831X_FLL_GAIN_MASK                    0x000F  /* FLL_GAIN - [3:0] */
327 #define WM831X_FLL_GAIN_SHIFT                        0  /* FLL_GAIN - [3:0] */
328 #define WM831X_FLL_GAIN_WIDTH                        4  /* FLL_GAIN - [3:0] */
329 
330 /*
331  * R16534 (0x4096) - FLL Control 5
332  */
333 #define WM831X_FLL_CLK_REF_DIV_MASK             0x0018  /* FLL_CLK_REF_DIV - [4:3] */
334 #define WM831X_FLL_CLK_REF_DIV_SHIFT                 3  /* FLL_CLK_REF_DIV - [4:3] */
335 #define WM831X_FLL_CLK_REF_DIV_WIDTH                 2  /* FLL_CLK_REF_DIV - [4:3] */
336 #define WM831X_FLL_CLK_SRC_MASK                 0x0003  /* FLL_CLK_SRC - [1:0] */
337 #define WM831X_FLL_CLK_SRC_SHIFT                     0  /* FLL_CLK_SRC - [1:0] */
338 #define WM831X_FLL_CLK_SRC_WIDTH                     2  /* FLL_CLK_SRC - [1:0] */
339 
340 struct regulator_dev;
341 
342 #define WM831X_NUM_IRQ_REGS 5
343 #define WM831X_NUM_GPIO_REGS 16
344 
345 enum wm831x_parent {
346 	WM8310 = 0x8310,
347 	WM8311 = 0x8311,
348 	WM8312 = 0x8312,
349 	WM8320 = 0x8320,
350 	WM8321 = 0x8321,
351 	WM8325 = 0x8325,
352 	WM8326 = 0x8326,
353 };
354 
355 struct wm831x;
356 enum wm831x_auxadc;
357 
358 typedef int (*wm831x_auxadc_read_fn)(struct wm831x *wm831x,
359 				     enum wm831x_auxadc input);
360 
361 struct wm831x {
362 	struct mutex io_lock;
363 
364 	struct device *dev;
365 
366 	struct regmap *regmap;
367 
368 	int irq;  /* Our chip IRQ */
369 	struct mutex irq_lock;
370 	int irq_base;
371 	int irq_masks_cur[WM831X_NUM_IRQ_REGS];   /* Currently active value */
372 	int irq_masks_cache[WM831X_NUM_IRQ_REGS]; /* Cached hardware value */
373 
374 	bool soft_shutdown;
375 
376 	/* Chip revision based flags */
377 	unsigned has_gpio_ena:1;         /* Has GPIO enable bit */
378 	unsigned has_cs_sts:1;           /* Has current sink status bit */
379 	unsigned charger_irq_wake:1;     /* Are charger IRQs a wake source? */
380 
381 	int num_gpio;
382 
383 	/* Used by the interrupt controller code to post writes */
384 	int gpio_update[WM831X_NUM_GPIO_REGS];
385 	bool gpio_level[WM831X_NUM_GPIO_REGS];
386 
387 	struct mutex auxadc_lock;
388 	struct list_head auxadc_pending;
389 	u16 auxadc_active;
390 	wm831x_auxadc_read_fn auxadc_read;
391 
392 	/* The WM831x has a security key blocking access to certain
393 	 * registers.  The mutex is taken by the accessors for locking
394 	 * and unlocking the security key, locked is used to fail
395 	 * writes if the lock is held.
396 	 */
397 	struct mutex key_lock;
398 	unsigned int locked:1;
399 };
400 
401 /* Device I/O API */
402 int wm831x_reg_read(struct wm831x *wm831x, unsigned short reg);
403 int wm831x_reg_write(struct wm831x *wm831x, unsigned short reg,
404 		 unsigned short val);
405 void wm831x_reg_lock(struct wm831x *wm831x);
406 int wm831x_reg_unlock(struct wm831x *wm831x);
407 int wm831x_set_bits(struct wm831x *wm831x, unsigned short reg,
408 		    unsigned short mask, unsigned short val);
409 int wm831x_bulk_read(struct wm831x *wm831x, unsigned short reg,
410 		     int count, u16 *buf);
411 
412 int wm831x_device_init(struct wm831x *wm831x, unsigned long id, int irq);
413 void wm831x_device_exit(struct wm831x *wm831x);
414 int wm831x_device_suspend(struct wm831x *wm831x);
415 void wm831x_device_shutdown(struct wm831x *wm831x);
416 int wm831x_irq_init(struct wm831x *wm831x, int irq);
417 void wm831x_irq_exit(struct wm831x *wm831x);
418 void wm831x_auxadc_init(struct wm831x *wm831x);
419 
420 extern struct regmap_config wm831x_regmap_config;
421 
422 #endif
423