1 /*
2 * Linux driver for VMware's vmxnet3 ethernet NIC.
3 *
4 * Copyright (C) 2008-2021, VMware, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; version 2 of the License and no later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
13 * NON INFRINGEMENT. See the GNU General Public License for more
14 * details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * The full GNU General Public License is included in this distribution in
21 * the file called "COPYING".
22 *
23 * Maintained by: pv-drivers@vmware.com
24 *
25 */
26
27 #ifndef _VMXNET3_INT_H
28 #define _VMXNET3_INT_H
29
30 #include <linux/bitops.h>
31 #include <linux/ethtool.h>
32 #include <linux/delay.h>
33 #include <linux/netdevice.h>
34 #include <linux/pci.h>
35 #include <linux/compiler.h>
36 #include <linux/slab.h>
37 #include <linux/spinlock.h>
38 #include <linux/ioport.h>
39 #include <linux/highmem.h>
40 #include <linux/timer.h>
41 #include <linux/skbuff.h>
42 #include <linux/interrupt.h>
43 #include <linux/workqueue.h>
44 #include <linux/uaccess.h>
45 #include <asm/dma.h>
46 #include <asm/page.h>
47
48 #include <linux/tcp.h>
49 #include <linux/udp.h>
50 #include <linux/ip.h>
51 #include <linux/ipv6.h>
52 #include <linux/in.h>
53 #include <linux/etherdevice.h>
54 #include <asm/checksum.h>
55 #include <linux/if_vlan.h>
56 #include <linux/if_arp.h>
57 #include <linux/inetdevice.h>
58 #include <linux/log2.h>
59
60 #include "vmxnet3_defs.h"
61
62 #ifdef DEBUG
63 # define VMXNET3_DRIVER_VERSION_REPORT VMXNET3_DRIVER_VERSION_STRING"-NAPI(debug)"
64 #else
65 # define VMXNET3_DRIVER_VERSION_REPORT VMXNET3_DRIVER_VERSION_STRING"-NAPI"
66 #endif
67
68
69 /*
70 * Version numbers
71 */
72 #define VMXNET3_DRIVER_VERSION_STRING "1.6.0.0-k"
73
74 /* Each byte of this 32-bit integer encodes a version number in
75 * VMXNET3_DRIVER_VERSION_STRING.
76 */
77 #define VMXNET3_DRIVER_VERSION_NUM 0x01060000
78
79 #if defined(CONFIG_PCI_MSI)
80 /* RSS only makes sense if MSI-X is supported. */
81 #define VMXNET3_RSS
82 #endif
83
84 #define VMXNET3_REV_6 5 /* Vmxnet3 Rev. 6 */
85 #define VMXNET3_REV_5 4 /* Vmxnet3 Rev. 5 */
86 #define VMXNET3_REV_4 3 /* Vmxnet3 Rev. 4 */
87 #define VMXNET3_REV_3 2 /* Vmxnet3 Rev. 3 */
88 #define VMXNET3_REV_2 1 /* Vmxnet3 Rev. 2 */
89 #define VMXNET3_REV_1 0 /* Vmxnet3 Rev. 1 */
90
91 /*
92 * Capabilities
93 */
94
95 enum {
96 VMNET_CAP_SG = 0x0001, /* Can do scatter-gather transmits. */
97 VMNET_CAP_IP4_CSUM = 0x0002, /* Can checksum only TCP/UDP over
98 * IPv4 */
99 VMNET_CAP_HW_CSUM = 0x0004, /* Can checksum all packets. */
100 VMNET_CAP_HIGH_DMA = 0x0008, /* Can DMA to high memory. */
101 VMNET_CAP_TOE = 0x0010, /* Supports TCP/IP offload. */
102 VMNET_CAP_TSO = 0x0020, /* Supports TCP Segmentation
103 * offload */
104 VMNET_CAP_SW_TSO = 0x0040, /* Supports SW TCP Segmentation */
105 VMNET_CAP_VMXNET_APROM = 0x0080, /* Vmxnet APROM support */
106 VMNET_CAP_HW_TX_VLAN = 0x0100, /* Can we do VLAN tagging in HW */
107 VMNET_CAP_HW_RX_VLAN = 0x0200, /* Can we do VLAN untagging in HW */
108 VMNET_CAP_SW_VLAN = 0x0400, /* VLAN tagging/untagging in SW */
109 VMNET_CAP_WAKE_PCKT_RCV = 0x0800, /* Can wake on network packet recv? */
110 VMNET_CAP_ENABLE_INT_INLINE = 0x1000, /* Enable Interrupt Inline */
111 VMNET_CAP_ENABLE_HEADER_COPY = 0x2000, /* copy header for vmkernel */
112 VMNET_CAP_TX_CHAIN = 0x4000, /* Guest can use multiple tx entries
113 * for a pkt */
114 VMNET_CAP_RX_CHAIN = 0x8000, /* pkt can span multiple rx entries */
115 VMNET_CAP_LPD = 0x10000, /* large pkt delivery */
116 VMNET_CAP_BPF = 0x20000, /* BPF Support in VMXNET Virtual HW*/
117 VMNET_CAP_SG_SPAN_PAGES = 0x40000, /* Scatter-gather can span multiple*/
118 /* pages transmits */
119 VMNET_CAP_IP6_CSUM = 0x80000, /* Can do IPv6 csum offload. */
120 VMNET_CAP_TSO6 = 0x100000, /* TSO seg. offload for IPv6 pkts. */
121 VMNET_CAP_TSO256k = 0x200000, /* Can do TSO seg offload for */
122 /* pkts up to 256kB. */
123 VMNET_CAP_UPT = 0x400000 /* Support UPT */
124 };
125
126 /*
127 * Maximum devices supported.
128 */
129 #define MAX_ETHERNET_CARDS 10
130 #define MAX_PCI_PASSTHRU_DEVICE 6
131
132 struct vmxnet3_cmd_ring {
133 union Vmxnet3_GenericDesc *base;
134 u32 size;
135 u32 next2fill;
136 u32 next2comp;
137 u8 gen;
138 dma_addr_t basePA;
139 };
140
141 static inline void
vmxnet3_cmd_ring_adv_next2fill(struct vmxnet3_cmd_ring * ring)142 vmxnet3_cmd_ring_adv_next2fill(struct vmxnet3_cmd_ring *ring)
143 {
144 ring->next2fill++;
145 if (unlikely(ring->next2fill == ring->size)) {
146 ring->next2fill = 0;
147 VMXNET3_FLIP_RING_GEN(ring->gen);
148 }
149 }
150
151 static inline void
vmxnet3_cmd_ring_adv_next2comp(struct vmxnet3_cmd_ring * ring)152 vmxnet3_cmd_ring_adv_next2comp(struct vmxnet3_cmd_ring *ring)
153 {
154 VMXNET3_INC_RING_IDX_ONLY(ring->next2comp, ring->size);
155 }
156
157 static inline int
vmxnet3_cmd_ring_desc_avail(struct vmxnet3_cmd_ring * ring)158 vmxnet3_cmd_ring_desc_avail(struct vmxnet3_cmd_ring *ring)
159 {
160 return (ring->next2comp > ring->next2fill ? 0 : ring->size) +
161 ring->next2comp - ring->next2fill - 1;
162 }
163
164 struct vmxnet3_comp_ring {
165 union Vmxnet3_GenericDesc *base;
166 u32 size;
167 u32 next2proc;
168 u8 gen;
169 u8 intr_idx;
170 dma_addr_t basePA;
171 };
172
173 static inline void
vmxnet3_comp_ring_adv_next2proc(struct vmxnet3_comp_ring * ring)174 vmxnet3_comp_ring_adv_next2proc(struct vmxnet3_comp_ring *ring)
175 {
176 ring->next2proc++;
177 if (unlikely(ring->next2proc == ring->size)) {
178 ring->next2proc = 0;
179 VMXNET3_FLIP_RING_GEN(ring->gen);
180 }
181 }
182
183 struct vmxnet3_tx_data_ring {
184 struct Vmxnet3_TxDataDesc *base;
185 u32 size;
186 dma_addr_t basePA;
187 };
188
189 enum vmxnet3_buf_map_type {
190 VMXNET3_MAP_INVALID = 0,
191 VMXNET3_MAP_NONE,
192 VMXNET3_MAP_SINGLE,
193 VMXNET3_MAP_PAGE,
194 };
195
196 struct vmxnet3_tx_buf_info {
197 u32 map_type;
198 u16 len;
199 u16 sop_idx;
200 dma_addr_t dma_addr;
201 struct sk_buff *skb;
202 };
203
204 struct vmxnet3_tq_driver_stats {
205 u64 drop_total; /* # of pkts dropped by the driver, the
206 * counters below track droppings due to
207 * different reasons
208 */
209 u64 drop_too_many_frags;
210 u64 drop_oversized_hdr;
211 u64 drop_hdr_inspect_err;
212 u64 drop_tso;
213
214 u64 tx_ring_full;
215 u64 linearized; /* # of pkts linearized */
216 u64 copy_skb_header; /* # of times we have to copy skb header */
217 u64 oversized_hdr;
218 };
219
220 struct vmxnet3_tx_ctx {
221 bool ipv4;
222 bool ipv6;
223 u16 mss;
224 u32 l4_offset; /* only valid for pkts requesting tso or csum
225 * offloading. For encap offload, it refers to
226 * inner L4 offset i.e. it includes outer header
227 * encap header and inner eth and ip header size
228 */
229
230 u32 l4_hdr_size; /* only valid if mss != 0
231 * Refers to inner L4 hdr size for encap
232 * offload
233 */
234 u32 copy_size; /* # of bytes copied into the data ring */
235 union Vmxnet3_GenericDesc *sop_txd;
236 union Vmxnet3_GenericDesc *eop_txd;
237 };
238
239 struct vmxnet3_tx_queue {
240 char name[IFNAMSIZ+8]; /* To identify interrupt */
241 struct vmxnet3_adapter *adapter;
242 spinlock_t tx_lock;
243 struct vmxnet3_cmd_ring tx_ring;
244 struct vmxnet3_tx_buf_info *buf_info;
245 struct vmxnet3_tx_data_ring data_ring;
246 struct vmxnet3_comp_ring comp_ring;
247 struct Vmxnet3_TxQueueCtrl *shared;
248 struct vmxnet3_tq_driver_stats stats;
249 bool stopped;
250 int num_stop; /* # of times the queue is
251 * stopped */
252 int qid;
253 u16 txdata_desc_size;
254 } __attribute__((__aligned__(SMP_CACHE_BYTES)));
255
256 enum vmxnet3_rx_buf_type {
257 VMXNET3_RX_BUF_NONE = 0,
258 VMXNET3_RX_BUF_SKB = 1,
259 VMXNET3_RX_BUF_PAGE = 2
260 };
261
262 struct vmxnet3_rx_buf_info {
263 enum vmxnet3_rx_buf_type buf_type;
264 u16 len;
265 union {
266 struct sk_buff *skb;
267 struct page *page;
268 };
269 dma_addr_t dma_addr;
270 };
271
272 struct vmxnet3_rx_ctx {
273 struct sk_buff *skb;
274 u32 sop_idx;
275 };
276
277 struct vmxnet3_rq_driver_stats {
278 u64 drop_total;
279 u64 drop_err;
280 u64 drop_fcs;
281 u64 rx_buf_alloc_failure;
282 };
283
284 struct vmxnet3_rx_data_ring {
285 Vmxnet3_RxDataDesc *base;
286 dma_addr_t basePA;
287 u16 desc_size;
288 };
289
290 struct vmxnet3_rx_queue {
291 char name[IFNAMSIZ + 8]; /* To identify interrupt */
292 struct vmxnet3_adapter *adapter;
293 struct napi_struct napi;
294 struct vmxnet3_cmd_ring rx_ring[2];
295 struct vmxnet3_rx_data_ring data_ring;
296 struct vmxnet3_comp_ring comp_ring;
297 struct vmxnet3_rx_ctx rx_ctx;
298 u32 qid; /* rqID in RCD for buffer from 1st ring */
299 u32 qid2; /* rqID in RCD for buffer from 2nd ring */
300 u32 dataRingQid; /* rqID in RCD for buffer from data ring */
301 struct vmxnet3_rx_buf_info *buf_info[2];
302 struct Vmxnet3_RxQueueCtrl *shared;
303 struct vmxnet3_rq_driver_stats stats;
304 } __attribute__((__aligned__(SMP_CACHE_BYTES)));
305
306 #define VMXNET3_DEVICE_MAX_TX_QUEUES 32
307 #define VMXNET3_DEVICE_MAX_RX_QUEUES 32 /* Keep this value as a power of 2 */
308
309 #define VMXNET3_DEVICE_DEFAULT_TX_QUEUES 8
310 #define VMXNET3_DEVICE_DEFAULT_RX_QUEUES 8 /* Keep this value as a power of 2 */
311
312 /* Should be less than UPT1_RSS_MAX_IND_TABLE_SIZE */
313 #define VMXNET3_RSS_IND_TABLE_SIZE (VMXNET3_DEVICE_MAX_RX_QUEUES * 4)
314
315 #define VMXNET3_LINUX_MAX_MSIX_VECT (VMXNET3_DEVICE_MAX_TX_QUEUES + \
316 VMXNET3_DEVICE_MAX_RX_QUEUES + 1)
317 #define VMXNET3_LINUX_MIN_MSIX_VECT 3 /* 1 for tx, 1 for rx pair and 1 for event */
318
319
320 struct vmxnet3_intr {
321 enum vmxnet3_intr_mask_mode mask_mode;
322 enum vmxnet3_intr_type type; /* MSI-X, MSI, or INTx? */
323 u8 num_intrs; /* # of intr vectors */
324 u8 event_intr_idx; /* idx of the intr vector for event */
325 u8 mod_levels[VMXNET3_LINUX_MAX_MSIX_VECT]; /* moderation level */
326 char event_msi_vector_name[IFNAMSIZ+17];
327 #ifdef CONFIG_PCI_MSI
328 struct msix_entry msix_entries[VMXNET3_LINUX_MAX_MSIX_VECT];
329 #endif
330 };
331
332 /* Interrupt sharing schemes, share_intr */
333 #define VMXNET3_INTR_BUDDYSHARE 0 /* Corresponding tx,rx queues share irq */
334 #define VMXNET3_INTR_TXSHARE 1 /* All tx queues share one irq */
335 #define VMXNET3_INTR_DONTSHARE 2 /* each queue has its own irq */
336
337
338 #define VMXNET3_STATE_BIT_RESETTING 0
339 #define VMXNET3_STATE_BIT_QUIESCED 1
340 struct vmxnet3_adapter {
341 struct vmxnet3_tx_queue tx_queue[VMXNET3_DEVICE_MAX_TX_QUEUES];
342 struct vmxnet3_rx_queue rx_queue[VMXNET3_DEVICE_MAX_RX_QUEUES];
343 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
344 struct vmxnet3_intr intr;
345 spinlock_t cmd_lock;
346 struct Vmxnet3_DriverShared *shared;
347 struct Vmxnet3_PMConf *pm_conf;
348 struct Vmxnet3_TxQueueDesc *tqd_start; /* all tx queue desc */
349 struct Vmxnet3_RxQueueDesc *rqd_start; /* all rx queue desc */
350 struct net_device *netdev;
351 struct pci_dev *pdev;
352
353 u8 __iomem *hw_addr0; /* for BAR 0 */
354 u8 __iomem *hw_addr1; /* for BAR 1 */
355 u8 version;
356
357 #ifdef VMXNET3_RSS
358 struct UPT1_RSSConf *rss_conf;
359 bool rss;
360 #endif
361 u32 num_rx_queues;
362 u32 num_tx_queues;
363
364 /* rx buffer related */
365 unsigned skb_buf_size;
366 int rx_buf_per_pkt; /* only apply to the 1st ring */
367 dma_addr_t shared_pa;
368 dma_addr_t queue_desc_pa;
369 dma_addr_t coal_conf_pa;
370
371 /* Wake-on-LAN */
372 u32 wol;
373
374 /* Link speed */
375 u32 link_speed; /* in mbps */
376
377 u64 tx_timeout_count;
378
379 /* Ring sizes */
380 u32 tx_ring_size;
381 u32 rx_ring_size;
382 u32 rx_ring2_size;
383
384 /* Size of buffer in the data ring */
385 u16 txdata_desc_size;
386 u16 rxdata_desc_size;
387
388 bool rxdataring_enabled;
389 bool default_rss_fields;
390 enum Vmxnet3_RSSField rss_fields;
391
392 struct work_struct work;
393
394 unsigned long state; /* VMXNET3_STATE_BIT_xxx */
395
396 int share_intr;
397
398 struct Vmxnet3_CoalesceScheme *coal_conf;
399 bool default_coal_mode;
400
401 dma_addr_t adapter_pa;
402 dma_addr_t pm_conf_pa;
403 dma_addr_t rss_conf_pa;
404 bool queuesExtEnabled;
405 };
406
407 #define VMXNET3_WRITE_BAR0_REG(adapter, reg, val) \
408 writel((val), (adapter)->hw_addr0 + (reg))
409 #define VMXNET3_READ_BAR0_REG(adapter, reg) \
410 readl((adapter)->hw_addr0 + (reg))
411
412 #define VMXNET3_WRITE_BAR1_REG(adapter, reg, val) \
413 writel((val), (adapter)->hw_addr1 + (reg))
414 #define VMXNET3_READ_BAR1_REG(adapter, reg) \
415 readl((adapter)->hw_addr1 + (reg))
416
417 #define VMXNET3_WAKE_QUEUE_THRESHOLD(tq) (5)
418 #define VMXNET3_RX_ALLOC_THRESHOLD(rq, ring_idx, adapter) \
419 ((rq)->rx_ring[ring_idx].size >> 3)
420
421 #define VMXNET3_GET_ADDR_LO(dma) ((u32)(dma))
422 #define VMXNET3_GET_ADDR_HI(dma) ((u32)(((u64)(dma)) >> 32))
423
424 #define VMXNET3_VERSION_GE_2(adapter) \
425 (adapter->version >= VMXNET3_REV_2 + 1)
426 #define VMXNET3_VERSION_GE_3(adapter) \
427 (adapter->version >= VMXNET3_REV_3 + 1)
428 #define VMXNET3_VERSION_GE_4(adapter) \
429 (adapter->version >= VMXNET3_REV_4 + 1)
430 #define VMXNET3_VERSION_GE_5(adapter) \
431 (adapter->version >= VMXNET3_REV_5 + 1)
432 #define VMXNET3_VERSION_GE_6(adapter) \
433 (adapter->version >= VMXNET3_REV_6 + 1)
434
435 /* must be a multiple of VMXNET3_RING_SIZE_ALIGN */
436 #define VMXNET3_DEF_TX_RING_SIZE 512
437 #define VMXNET3_DEF_RX_RING_SIZE 1024
438 #define VMXNET3_DEF_RX_RING2_SIZE 256
439
440 #define VMXNET3_DEF_RXDATA_DESC_SIZE 128
441
442 #define VMXNET3_MAX_ETH_HDR_SIZE 22
443 #define VMXNET3_MAX_SKB_BUF_SIZE (3*1024)
444
445 #define VMXNET3_GET_RING_IDX(adapter, rqID) \
446 ((rqID >= adapter->num_rx_queues && \
447 rqID < 2 * adapter->num_rx_queues) ? 1 : 0) \
448
449 #define VMXNET3_RX_DATA_RING(adapter, rqID) \
450 (rqID >= 2 * adapter->num_rx_queues && \
451 rqID < 3 * adapter->num_rx_queues) \
452
453 #define VMXNET3_COAL_STATIC_DEFAULT_DEPTH 64
454
455 #define VMXNET3_COAL_RBC_RATE(usecs) (1000000 / usecs)
456 #define VMXNET3_COAL_RBC_USECS(rbc_rate) (1000000 / rbc_rate)
457 #define VMXNET3_RSS_FIELDS_DEFAULT (VMXNET3_RSS_FIELDS_TCPIP4 | \
458 VMXNET3_RSS_FIELDS_TCPIP6)
459
460 int
461 vmxnet3_quiesce_dev(struct vmxnet3_adapter *adapter);
462
463 int
464 vmxnet3_activate_dev(struct vmxnet3_adapter *adapter);
465
466 void
467 vmxnet3_force_close(struct vmxnet3_adapter *adapter);
468
469 void
470 vmxnet3_reset_dev(struct vmxnet3_adapter *adapter);
471
472 void
473 vmxnet3_tq_destroy_all(struct vmxnet3_adapter *adapter);
474
475 void
476 vmxnet3_rq_destroy_all(struct vmxnet3_adapter *adapter);
477
478 netdev_features_t
479 vmxnet3_fix_features(struct net_device *netdev, netdev_features_t features);
480
481 netdev_features_t
482 vmxnet3_features_check(struct sk_buff *skb,
483 struct net_device *netdev, netdev_features_t features);
484
485 int
486 vmxnet3_set_features(struct net_device *netdev, netdev_features_t features);
487
488 int
489 vmxnet3_create_queues(struct vmxnet3_adapter *adapter,
490 u32 tx_ring_size, u32 rx_ring_size, u32 rx_ring2_size,
491 u16 txdata_desc_size, u16 rxdata_desc_size);
492
493 void vmxnet3_set_ethtool_ops(struct net_device *netdev);
494
495 void vmxnet3_get_stats64(struct net_device *dev,
496 struct rtnl_link_stats64 *stats);
497
498 extern char vmxnet3_driver_name[];
499 #endif
500