1 /* 2 * Copyright (C) 2005-2006 by Texas Instruments 3 * 4 * The Inventra Controller Driver for Linux is free software; you 5 * can redistribute it and/or modify it under the terms of the GNU 6 * General Public License version 2 as published by the Free Software 7 * Foundation. 8 */ 9 10 #ifndef __MUSB_HDRDF_H__ 11 #define __MUSB_HDRDF_H__ 12 13 /* 14 * DaVinci-specific definitions 15 */ 16 17 /* Integrated highspeed/otg PHY */ 18 #define USBPHY_CTL_PADDR 0x01c40034 19 #define USBPHY_DATAPOL BIT(11) /* (dm355) switch D+/D- */ 20 #define USBPHY_PHYCLKGD BIT(8) 21 #define USBPHY_SESNDEN BIT(7) /* v(sess_end) comparator */ 22 #define USBPHY_VBDTCTEN BIT(6) /* v(bus) comparator */ 23 #define USBPHY_VBUSSENS BIT(5) /* (dm355,ro) is vbus > 0.5V */ 24 #define USBPHY_PHYPLLON BIT(4) /* override pll suspend */ 25 #define USBPHY_CLKO1SEL BIT(3) 26 #define USBPHY_OSCPDWN BIT(2) 27 #define USBPHY_OTGPDWN BIT(1) 28 #define USBPHY_PHYPDWN BIT(0) 29 30 #define DM355_DEEPSLEEP_PADDR 0x01c40048 31 #define DRVVBUS_FORCE BIT(2) 32 #define DRVVBUS_OVERRIDE BIT(1) 33 34 /* For now include usb OTG module registers here */ 35 #define DAVINCI_USB_VERSION_REG 0x00 36 #define DAVINCI_USB_CTRL_REG 0x04 37 #define DAVINCI_USB_STAT_REG 0x08 38 #define DAVINCI_RNDIS_REG 0x10 39 #define DAVINCI_AUTOREQ_REG 0x14 40 #define DAVINCI_USB_INT_SOURCE_REG 0x20 41 #define DAVINCI_USB_INT_SET_REG 0x24 42 #define DAVINCI_USB_INT_SRC_CLR_REG 0x28 43 #define DAVINCI_USB_INT_MASK_REG 0x2c 44 #define DAVINCI_USB_INT_MASK_SET_REG 0x30 45 #define DAVINCI_USB_INT_MASK_CLR_REG 0x34 46 #define DAVINCI_USB_INT_SRC_MASKED_REG 0x38 47 #define DAVINCI_USB_EOI_REG 0x3c 48 #define DAVINCI_USB_EOI_INTVEC 0x40 49 50 /* BEGIN CPPI-generic (?) */ 51 52 /* CPPI related registers */ 53 #define DAVINCI_TXCPPI_CTRL_REG 0x80 54 #define DAVINCI_TXCPPI_TEAR_REG 0x84 55 #define DAVINCI_CPPI_EOI_REG 0x88 56 #define DAVINCI_CPPI_INTVEC_REG 0x8c 57 #define DAVINCI_TXCPPI_MASKED_REG 0x90 58 #define DAVINCI_TXCPPI_RAW_REG 0x94 59 #define DAVINCI_TXCPPI_INTENAB_REG 0x98 60 #define DAVINCI_TXCPPI_INTCLR_REG 0x9c 61 62 #define DAVINCI_RXCPPI_CTRL_REG 0xC0 63 #define DAVINCI_RXCPPI_MASKED_REG 0xD0 64 #define DAVINCI_RXCPPI_RAW_REG 0xD4 65 #define DAVINCI_RXCPPI_INTENAB_REG 0xD8 66 #define DAVINCI_RXCPPI_INTCLR_REG 0xDC 67 68 #define DAVINCI_RXCPPI_BUFCNT0_REG 0xE0 69 #define DAVINCI_RXCPPI_BUFCNT1_REG 0xE4 70 #define DAVINCI_RXCPPI_BUFCNT2_REG 0xE8 71 #define DAVINCI_RXCPPI_BUFCNT3_REG 0xEC 72 73 /* CPPI state RAM entries */ 74 #define DAVINCI_CPPI_STATERAM_BASE_OFFSET 0x100 75 76 #define DAVINCI_TXCPPI_STATERAM_OFFSET(chnum) \ 77 (DAVINCI_CPPI_STATERAM_BASE_OFFSET + ((chnum) * 0x40)) 78 #define DAVINCI_RXCPPI_STATERAM_OFFSET(chnum) \ 79 (DAVINCI_CPPI_STATERAM_BASE_OFFSET + 0x20 + ((chnum) * 0x40)) 80 81 /* CPPI masks */ 82 #define DAVINCI_DMA_CTRL_ENABLE 1 83 #define DAVINCI_DMA_CTRL_DISABLE 0 84 85 #define DAVINCI_DMA_ALL_CHANNELS_ENABLE 0xF 86 #define DAVINCI_DMA_ALL_CHANNELS_DISABLE 0xF 87 88 /* END CPPI-generic (?) */ 89 90 #define DAVINCI_USB_TX_ENDPTS_MASK 0x1f /* ep0 + 4 tx */ 91 #define DAVINCI_USB_RX_ENDPTS_MASK 0x1e /* 4 rx */ 92 93 #define DAVINCI_USB_USBINT_SHIFT 16 94 #define DAVINCI_USB_TXINT_SHIFT 0 95 #define DAVINCI_USB_RXINT_SHIFT 8 96 97 #define DAVINCI_INTR_DRVVBUS 0x0100 98 99 #define DAVINCI_USB_USBINT_MASK 0x01ff0000 /* 8 Mentor, DRVVBUS */ 100 #define DAVINCI_USB_TXINT_MASK \ 101 (DAVINCI_USB_TX_ENDPTS_MASK << DAVINCI_USB_TXINT_SHIFT) 102 #define DAVINCI_USB_RXINT_MASK \ 103 (DAVINCI_USB_RX_ENDPTS_MASK << DAVINCI_USB_RXINT_SHIFT) 104 105 #define DAVINCI_BASE_OFFSET 0x400 106 107 #endif /* __MUSB_HDRDF_H__ */ 108