1 #ifndef _UDA134X_CODEC_H
2 #define _UDA134X_CODEC_H
3 
4 #define UDA134X_L3ADDR	5
5 #define UDA134X_DATA0_ADDR	((UDA134X_L3ADDR << 2) | 0)
6 #define UDA134X_DATA1_ADDR	((UDA134X_L3ADDR << 2) | 1)
7 #define UDA134X_STATUS_ADDR	((UDA134X_L3ADDR << 2) | 2)
8 
9 #define UDA134X_EXTADDR_PREFIX	0xC0
10 #define UDA134X_EXTDATA_PREFIX	0xE0
11 
12 /* UDA134X registers */
13 #define UDA134X_EA000	0
14 #define UDA134X_EA001	1
15 #define UDA134X_EA010	2
16 #define UDA134X_EA011	3
17 #define UDA134X_EA100	4
18 #define UDA134X_EA101	5
19 #define UDA134X_EA110	6
20 #define UDA134X_EA111	7
21 #define UDA134X_STATUS0 8
22 #define UDA134X_STATUS1 9
23 #define UDA134X_DATA000 10
24 #define UDA134X_DATA001 11
25 #define UDA134X_DATA010 12
26 #define UDA134X_DATA011 13
27 #define UDA134X_DATA1   14
28 
29 #define UDA134X_REGS_NUM 15
30 
31 #define STATUS0_DAIFMT_MASK (~(7<<1))
32 #define STATUS0_SYSCLK_MASK (~(3<<4))
33 
34 #endif
35