1 #ifndef _ASM_POWERPC_PROCESSOR_H
2 #define _ASM_POWERPC_PROCESSOR_H
3
4 /*
5 * Copyright (C) 2001 PPC 64 Team, IBM Corp
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13 #include <asm/reg.h>
14
15 #ifdef CONFIG_VSX
16 #define TS_FPRWIDTH 2
17 #else
18 #define TS_FPRWIDTH 1
19 #endif
20
21 #ifndef __ASSEMBLY__
22 #include <linux/compiler.h>
23 #include <asm/ptrace.h>
24 #include <asm/types.h>
25
26 /* We do _not_ want to define new machine types at all, those must die
27 * in favor of using the device-tree
28 * -- BenH.
29 */
30
31 /* PREP sub-platform types see residual.h for these */
32 #define _PREP_Motorola 0x01 /* motorola prep */
33 #define _PREP_Firm 0x02 /* firmworks prep */
34 #define _PREP_IBM 0x00 /* ibm prep */
35 #define _PREP_Bull 0x03 /* bull prep */
36
37 /* CHRP sub-platform types. These are arbitrary */
38 #define _CHRP_Motorola 0x04 /* motorola chrp, the cobra */
39 #define _CHRP_IBM 0x05 /* IBM chrp, the longtrail and longtrail 2 */
40 #define _CHRP_Pegasos 0x06 /* Genesi/bplan's Pegasos and Pegasos2 */
41 #define _CHRP_briq 0x07 /* TotalImpact's briQ */
42
43 #if defined(__KERNEL__) && defined(CONFIG_PPC32)
44
45 extern int _chrp_type;
46
47 #ifdef CONFIG_PPC_PREP
48
49 /* what kind of prep workstation we are */
50 extern int _prep_type;
51
52 #endif /* CONFIG_PPC_PREP */
53
54 #endif /* defined(__KERNEL__) && defined(CONFIG_PPC32) */
55
56 /*
57 * Default implementation of macro that returns current
58 * instruction pointer ("program counter").
59 */
60 #define current_text_addr() ({ __label__ _l; _l: &&_l;})
61
62 /* Macros for adjusting thread priority (hardware multi-threading) */
63 #define HMT_very_low() asm volatile("or 31,31,31 # very low priority")
64 #define HMT_low() asm volatile("or 1,1,1 # low priority")
65 #define HMT_medium_low() asm volatile("or 6,6,6 # medium low priority")
66 #define HMT_medium() asm volatile("or 2,2,2 # medium priority")
67 #define HMT_medium_high() asm volatile("or 5,5,5 # medium high priority")
68 #define HMT_high() asm volatile("or 3,3,3 # high priority")
69
70 #ifdef __KERNEL__
71
72 struct task_struct;
73 void start_thread(struct pt_regs *regs, unsigned long fdptr, unsigned long sp);
74 void release_thread(struct task_struct *);
75
76 /* Prepare to copy thread state - unlazy all lazy status */
77 extern void prepare_to_copy(struct task_struct *tsk);
78
79 /* Create a new kernel thread. */
80 extern long kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);
81
82 /* Lazy FPU handling on uni-processor */
83 extern struct task_struct *last_task_used_math;
84 extern struct task_struct *last_task_used_altivec;
85 extern struct task_struct *last_task_used_vsx;
86 extern struct task_struct *last_task_used_spe;
87
88 #ifdef CONFIG_PPC32
89
90 #if CONFIG_TASK_SIZE > CONFIG_KERNEL_START
91 #error User TASK_SIZE overlaps with KERNEL_START address
92 #endif
93 #define TASK_SIZE (CONFIG_TASK_SIZE)
94
95 /* This decides where the kernel will search for a free chunk of vm
96 * space during mmap's.
97 */
98 #define TASK_UNMAPPED_BASE (TASK_SIZE / 8 * 3)
99 #endif
100
101 #ifdef CONFIG_PPC64
102 /* 64-bit user address space is 44-bits (16TB user VM) */
103 #define TASK_SIZE_USER64 (0x0000100000000000UL)
104
105 /*
106 * 32-bit user address space is 4GB - 1 page
107 * (this 1 page is needed so referencing of 0xFFFFFFFF generates EFAULT
108 */
109 #define TASK_SIZE_USER32 (0x0000000100000000UL - (1*PAGE_SIZE))
110
111 #define TASK_SIZE_OF(tsk) (test_tsk_thread_flag(tsk, TIF_32BIT) ? \
112 TASK_SIZE_USER32 : TASK_SIZE_USER64)
113 #define TASK_SIZE TASK_SIZE_OF(current)
114
115 /* This decides where the kernel will search for a free chunk of vm
116 * space during mmap's.
117 */
118 #define TASK_UNMAPPED_BASE_USER32 (PAGE_ALIGN(TASK_SIZE_USER32 / 4))
119 #define TASK_UNMAPPED_BASE_USER64 (PAGE_ALIGN(TASK_SIZE_USER64 / 4))
120
121 #define TASK_UNMAPPED_BASE ((is_32bit_task()) ? \
122 TASK_UNMAPPED_BASE_USER32 : TASK_UNMAPPED_BASE_USER64 )
123 #endif
124
125 #ifdef __powerpc64__
126
127 #define STACK_TOP_USER64 TASK_SIZE_USER64
128 #define STACK_TOP_USER32 TASK_SIZE_USER32
129
130 #define STACK_TOP (is_32bit_task() ? \
131 STACK_TOP_USER32 : STACK_TOP_USER64)
132
133 #define STACK_TOP_MAX STACK_TOP_USER64
134
135 #else /* __powerpc64__ */
136
137 #define STACK_TOP TASK_SIZE
138 #define STACK_TOP_MAX STACK_TOP
139
140 #endif /* __powerpc64__ */
141
142 typedef struct {
143 unsigned long seg;
144 } mm_segment_t;
145
146 #define TS_FPROFFSET 0
147 #define TS_VSRLOWOFFSET 1
148 #define TS_FPR(i) fpr[i][TS_FPROFFSET]
149
150 struct thread_struct {
151 unsigned long ksp; /* Kernel stack pointer */
152 unsigned long ksp_limit; /* if ksp <= ksp_limit stack overflow */
153
154 #ifdef CONFIG_PPC64
155 unsigned long ksp_vsid;
156 #endif
157 struct pt_regs *regs; /* Pointer to saved register state */
158 mm_segment_t fs; /* for get_fs() validation */
159 #ifdef CONFIG_PPC32
160 void *pgdir; /* root of page-table tree */
161 #endif
162 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
163 /*
164 * The following help to manage the use of Debug Control Registers
165 * om the BookE platforms.
166 */
167 unsigned long dbcr0;
168 unsigned long dbcr1;
169 #ifdef CONFIG_BOOKE
170 unsigned long dbcr2;
171 #endif
172 /*
173 * The stored value of the DBSR register will be the value at the
174 * last debug interrupt. This register can only be read from the
175 * user (will never be written to) and has value while helping to
176 * describe the reason for the last debug trap. Torez
177 */
178 unsigned long dbsr;
179 /*
180 * The following will contain addresses used by debug applications
181 * to help trace and trap on particular address locations.
182 * The bits in the Debug Control Registers above help define which
183 * of the following registers will contain valid data and/or addresses.
184 */
185 unsigned long iac1;
186 unsigned long iac2;
187 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
188 unsigned long iac3;
189 unsigned long iac4;
190 #endif
191 unsigned long dac1;
192 unsigned long dac2;
193 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
194 unsigned long dvc1;
195 unsigned long dvc2;
196 #endif
197 #endif
198 /* FP and VSX 0-31 register set */
199 double fpr[32][TS_FPRWIDTH];
200 struct {
201
202 unsigned int pad;
203 unsigned int val; /* Floating point status */
204 } fpscr;
205 int fpexc_mode; /* floating-point exception mode */
206 unsigned int align_ctl; /* alignment handling control */
207 #ifdef CONFIG_PPC64
208 unsigned long start_tb; /* Start purr when proc switched in */
209 unsigned long accum_tb; /* Total accumilated purr for process */
210 #ifdef CONFIG_HAVE_HW_BREAKPOINT
211 struct perf_event *ptrace_bps[HBP_NUM];
212 /*
213 * Helps identify source of single-step exception and subsequent
214 * hw-breakpoint enablement
215 */
216 struct perf_event *last_hit_ubp;
217 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
218 #endif
219 unsigned long dabr; /* Data address breakpoint register */
220 #ifdef CONFIG_ALTIVEC
221 /* Complete AltiVec register set */
222 vector128 vr[32] __attribute__((aligned(16)));
223 /* AltiVec status */
224 vector128 vscr __attribute__((aligned(16)));
225 unsigned long vrsave;
226 int used_vr; /* set if process has used altivec */
227 #endif /* CONFIG_ALTIVEC */
228 #ifdef CONFIG_VSX
229 /* VSR status */
230 int used_vsr; /* set if process has used altivec */
231 #endif /* CONFIG_VSX */
232 #ifdef CONFIG_SPE
233 unsigned long evr[32]; /* upper 32-bits of SPE regs */
234 u64 acc; /* Accumulator */
235 unsigned long spefscr; /* SPE & eFP status */
236 int used_spe; /* set if process has used spe */
237 #endif /* CONFIG_SPE */
238 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER
239 void* kvm_shadow_vcpu; /* KVM internal data */
240 #endif /* CONFIG_KVM_BOOK3S_32_HANDLER */
241 };
242
243 #define ARCH_MIN_TASKALIGN 16
244
245 #define INIT_SP (sizeof(init_stack) + (unsigned long) &init_stack)
246 #define INIT_SP_LIMIT \
247 (_ALIGN_UP(sizeof(init_thread_info), 16) + (unsigned long) &init_stack)
248
249 #ifdef CONFIG_SPE
250 #define SPEFSCR_INIT .spefscr = SPEFSCR_FINVE | SPEFSCR_FDBZE | SPEFSCR_FUNFE | SPEFSCR_FOVFE,
251 #else
252 #define SPEFSCR_INIT
253 #endif
254
255 #ifdef CONFIG_PPC32
256 #define INIT_THREAD { \
257 .ksp = INIT_SP, \
258 .ksp_limit = INIT_SP_LIMIT, \
259 .fs = KERNEL_DS, \
260 .pgdir = swapper_pg_dir, \
261 .fpexc_mode = MSR_FE0 | MSR_FE1, \
262 SPEFSCR_INIT \
263 }
264 #else
265 #define INIT_THREAD { \
266 .ksp = INIT_SP, \
267 .ksp_limit = INIT_SP_LIMIT, \
268 .regs = (struct pt_regs *)INIT_SP - 1, /* XXX bogus, I think */ \
269 .fs = KERNEL_DS, \
270 .fpr = {{0}}, \
271 .fpscr = { .val = 0, }, \
272 .fpexc_mode = 0, \
273 }
274 #endif
275
276 /*
277 * Return saved PC of a blocked thread. For now, this is the "user" PC
278 */
279 #define thread_saved_pc(tsk) \
280 ((tsk)->thread.regs? (tsk)->thread.regs->nip: 0)
281
282 #define task_pt_regs(tsk) ((struct pt_regs *)(tsk)->thread.regs)
283
284 unsigned long get_wchan(struct task_struct *p);
285
286 #define KSTK_EIP(tsk) ((tsk)->thread.regs? (tsk)->thread.regs->nip: 0)
287 #define KSTK_ESP(tsk) ((tsk)->thread.regs? (tsk)->thread.regs->gpr[1]: 0)
288
289 /* Get/set floating-point exception mode */
290 #define GET_FPEXC_CTL(tsk, adr) get_fpexc_mode((tsk), (adr))
291 #define SET_FPEXC_CTL(tsk, val) set_fpexc_mode((tsk), (val))
292
293 extern int get_fpexc_mode(struct task_struct *tsk, unsigned long adr);
294 extern int set_fpexc_mode(struct task_struct *tsk, unsigned int val);
295
296 #define GET_ENDIAN(tsk, adr) get_endian((tsk), (adr))
297 #define SET_ENDIAN(tsk, val) set_endian((tsk), (val))
298
299 extern int get_endian(struct task_struct *tsk, unsigned long adr);
300 extern int set_endian(struct task_struct *tsk, unsigned int val);
301
302 #define GET_UNALIGN_CTL(tsk, adr) get_unalign_ctl((tsk), (adr))
303 #define SET_UNALIGN_CTL(tsk, val) set_unalign_ctl((tsk), (val))
304
305 extern int get_unalign_ctl(struct task_struct *tsk, unsigned long adr);
306 extern int set_unalign_ctl(struct task_struct *tsk, unsigned int val);
307
__unpack_fe01(unsigned long msr_bits)308 static inline unsigned int __unpack_fe01(unsigned long msr_bits)
309 {
310 return ((msr_bits & MSR_FE0) >> 10) | ((msr_bits & MSR_FE1) >> 8);
311 }
312
__pack_fe01(unsigned int fpmode)313 static inline unsigned long __pack_fe01(unsigned int fpmode)
314 {
315 return ((fpmode << 10) & MSR_FE0) | ((fpmode << 8) & MSR_FE1);
316 }
317
318 #ifdef CONFIG_PPC64
319 #define cpu_relax() do { HMT_low(); HMT_medium(); barrier(); } while (0)
320 #else
321 #define cpu_relax() barrier()
322 #endif
323
324 /* Check that a certain kernel stack pointer is valid in task_struct p */
325 int validate_sp(unsigned long sp, struct task_struct *p,
326 unsigned long nbytes);
327
328 /*
329 * Prefetch macros.
330 */
331 #define ARCH_HAS_PREFETCH
332 #define ARCH_HAS_PREFETCHW
333 #define ARCH_HAS_SPINLOCK_PREFETCH
334
prefetch(const void * x)335 static inline void prefetch(const void *x)
336 {
337 if (unlikely(!x))
338 return;
339
340 __asm__ __volatile__ ("dcbt 0,%0" : : "r" (x));
341 }
342
prefetchw(const void * x)343 static inline void prefetchw(const void *x)
344 {
345 if (unlikely(!x))
346 return;
347
348 __asm__ __volatile__ ("dcbtst 0,%0" : : "r" (x));
349 }
350
351 #define spin_lock_prefetch(x) prefetchw(x)
352
353 #ifdef CONFIG_PPC64
354 #define HAVE_ARCH_PICK_MMAP_LAYOUT
355 #endif
356
357 #ifdef CONFIG_PPC64
get_clean_sp(struct pt_regs * regs,int is_32)358 static inline unsigned long get_clean_sp(struct pt_regs *regs, int is_32)
359 {
360 unsigned long sp;
361
362 if (is_32)
363 sp = regs->gpr[1] & 0x0ffffffffUL;
364 else
365 sp = regs->gpr[1];
366
367 return sp;
368 }
369 #else
get_clean_sp(struct pt_regs * regs,int is_32)370 static inline unsigned long get_clean_sp(struct pt_regs *regs, int is_32)
371 {
372 return regs->gpr[1];
373 }
374 #endif
375
376 #endif /* __KERNEL__ */
377 #endif /* __ASSEMBLY__ */
378 #endif /* _ASM_POWERPC_PROCESSOR_H */
379