1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved.
4 */
5
6 #ifndef __SOC_TEGRA_FUSE_H__
7 #define __SOC_TEGRA_FUSE_H__
8
9 #include <linux/types.h>
10
11 #define TEGRA20 0x20
12 #define TEGRA30 0x30
13 #define TEGRA114 0x35
14 #define TEGRA124 0x40
15 #define TEGRA132 0x13
16 #define TEGRA210 0x21
17 #define TEGRA186 0x18
18 #define TEGRA194 0x19
19 #define TEGRA234 0x23
20
21 #define TEGRA_FUSE_SKU_CALIB_0 0xf0
22 #define TEGRA30_FUSE_SATA_CALIB 0x124
23 #define TEGRA_FUSE_USB_CALIB_EXT_0 0x250
24
25 #ifndef __ASSEMBLY__
26
27 enum tegra_revision {
28 TEGRA_REVISION_UNKNOWN = 0,
29 TEGRA_REVISION_A01,
30 TEGRA_REVISION_A02,
31 TEGRA_REVISION_A03,
32 TEGRA_REVISION_A03p,
33 TEGRA_REVISION_A04,
34 TEGRA_REVISION_MAX,
35 };
36
37 struct tegra_sku_info {
38 int sku_id;
39 int cpu_process_id;
40 int cpu_speedo_id;
41 int cpu_speedo_value;
42 int cpu_iddq_value;
43 int soc_process_id;
44 int soc_speedo_id;
45 int soc_speedo_value;
46 int gpu_process_id;
47 int gpu_speedo_id;
48 int gpu_speedo_value;
49 enum tegra_revision revision;
50 };
51
52 #ifdef CONFIG_ARCH_TEGRA
53 extern struct tegra_sku_info tegra_sku_info;
54 u32 tegra_read_straps(void);
55 u32 tegra_read_ram_code(void);
56 int tegra_fuse_readl(unsigned long offset, u32 *value);
57 u32 tegra_read_chipid(void);
58 u8 tegra_get_chip_id(void);
59 u8 tegra_get_platform(void);
60 bool tegra_is_silicon(void);
61 int tegra194_miscreg_mask_serror(void);
62 #else
63 static struct tegra_sku_info tegra_sku_info __maybe_unused;
64
tegra_read_straps(void)65 static inline u32 tegra_read_straps(void)
66 {
67 return 0;
68 }
69
tegra_read_ram_code(void)70 static inline u32 tegra_read_ram_code(void)
71 {
72 return 0;
73 }
74
tegra_fuse_readl(unsigned long offset,u32 * value)75 static inline int tegra_fuse_readl(unsigned long offset, u32 *value)
76 {
77 return -ENODEV;
78 }
79
tegra_read_chipid(void)80 static inline u32 tegra_read_chipid(void)
81 {
82 return 0;
83 }
84
tegra_get_chip_id(void)85 static inline u8 tegra_get_chip_id(void)
86 {
87 return 0;
88 }
89
tegra_get_platform(void)90 static inline u8 tegra_get_platform(void)
91 {
92 return 0;
93 }
94
tegra_is_silicon(void)95 static inline bool tegra_is_silicon(void)
96 {
97 return false;
98 }
99
tegra194_miscreg_mask_serror(void)100 static inline int tegra194_miscreg_mask_serror(void)
101 {
102 return false;
103 }
104 #endif
105
106 struct device *tegra_soc_device_register(void);
107
108 #endif /* __ASSEMBLY__ */
109
110 #endif /* __SOC_TEGRA_FUSE_H__ */
111