1 /****************************************************************************** 2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved. 3 * 4 * Based on the r8180 driver, which is: 5 * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al. 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of version 2 of the GNU General Public License as 8 * published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope that it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 * 15 * You should have received a copy of the GNU General Public License along with 16 * this program; if not, write to the Free Software Foundation, Inc., 17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA 18 * 19 * The full GNU General Public License is included in this distribution in the 20 * file called LICENSE. 21 * 22 * Contact Information: 23 * wlanfae <wlanfae@realtek.com> 24 ******************************************************************************/ 25 26 #ifndef _RTL_CORE_H 27 #define _RTL_CORE_H 28 29 #include <linux/module.h> 30 #include <linux/kernel.h> 31 #include <linux/init.h> 32 #include <linux/ioport.h> 33 #include <linux/sched.h> 34 #include <linux/types.h> 35 #include <linux/interrupt.h> 36 #include <linux/slab.h> 37 #include <linux/netdevice.h> 38 #include <linux/pci.h> 39 #include <linux/etherdevice.h> 40 #include <linux/delay.h> 41 #include <linux/rtnetlink.h> 42 #include <linux/wireless.h> 43 #include <linux/timer.h> 44 #include <linux/proc_fs.h> 45 #include <linux/if_arp.h> 46 #include <linux/random.h> 47 #include <linux/io.h> 48 49 /* Need this defined before including local include files */ 50 #define DRV_NAME "rtl819xE" 51 52 #include "../rtllib.h" 53 54 #include "../dot11d.h" 55 56 #include "r8192E_firmware.h" 57 #include "r8192E_hw.h" 58 59 #include "r8190P_def.h" 60 #include "r8192E_dev.h" 61 62 #include "rtl_eeprom.h" 63 #include "rtl_ps.h" 64 #include "rtl_pci.h" 65 #include "rtl_cam.h" 66 67 #define DRV_COPYRIGHT \ 68 "Copyright(c) 2008 - 2010 Realsil Semiconductor Corporation" 69 #define DRV_AUTHOR "<wlanfae@realtek.com>" 70 #define DRV_VERSION "0014.0401.2010" 71 72 #define IS_HARDWARE_TYPE_819xP(_priv) \ 73 ((((struct r8192_priv *)rtllib_priv(dev))->card_8192 == NIC_8190P) || \ 74 (((struct r8192_priv *)rtllib_priv(dev))->card_8192 == NIC_8192E)) 75 #define IS_HARDWARE_TYPE_8192SE(_priv) \ 76 (((struct r8192_priv *)rtllib_priv(dev))->card_8192 == NIC_8192SE) 77 #define IS_HARDWARE_TYPE_8192CE(_priv) \ 78 (((struct r8192_priv *)rtllib_priv(dev))->card_8192 == NIC_8192CE) 79 #define IS_HARDWARE_TYPE_8192CU(_priv) \ 80 (((struct r8192_priv *)rtllib_priv(dev))->card_8192 == NIC_8192CU) 81 #define IS_HARDWARE_TYPE_8192DE(_priv) \ 82 (((struct r8192_priv *)rtllib_priv(dev))->card_8192 == NIC_8192DE) 83 #define IS_HARDWARE_TYPE_8192DU(_priv) \ 84 (((struct r8192_priv *)rtllib_priv(dev))->card_8192 == NIC_8192DU) 85 86 #define RTL_PCI_DEVICE(vend, dev, cfg) \ 87 .vendor = (vend), .device = (dev), \ 88 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID , \ 89 .driver_data = (kernel_ulong_t)&(cfg) 90 91 #define irqreturn_type irqreturn_t 92 93 #define rtl8192_interrupt(x, y, z) rtl8192_interrupt_rsl(x, y) 94 95 #define RTL_MAX_SCAN_SIZE 128 96 97 #define RTL_RATE_MAX 30 98 99 #define TOTAL_CAM_ENTRY 32 100 #define CAM_CONTENT_COUNT 8 101 102 #ifndef BIT 103 #define BIT(_i) (1<<(_i)) 104 #endif 105 106 #define IS_NIC_DOWN(priv) (!(priv)->up) 107 108 #define IS_ADAPTER_SENDS_BEACON(dev) 0 109 110 #define IS_UNDER_11N_AES_MODE(_rtllib) \ 111 ((_rtllib->pHTInfo->bCurrentHTSupport == true) && \ 112 (_rtllib->pairwise_key_type == KEY_TYPE_CCMP)) 113 114 #define HAL_MEMORY_MAPPED_IO_RANGE_8190PCI 0x1000 115 #define HAL_HW_PCI_REVISION_ID_8190PCI 0x00 116 #define HAL_MEMORY_MAPPED_IO_RANGE_8192PCIE 0x4000 117 #define HAL_HW_PCI_REVISION_ID_8192PCIE 0x01 118 #define HAL_MEMORY_MAPPED_IO_RANGE_8192SE 0x4000 119 #define HAL_HW_PCI_REVISION_ID_8192SE 0x10 120 #define HAL_HW_PCI_REVISION_ID_8192CE 0x1 121 #define HAL_MEMORY_MAPPED_IO_RANGE_8192CE 0x4000 122 #define HAL_HW_PCI_REVISION_ID_8192DE 0x0 123 #define HAL_MEMORY_MAPPED_IO_RANGE_8192DE 0x4000 124 125 #define HAL_HW_PCI_8180_DEVICE_ID 0x8180 126 #define HAL_HW_PCI_8185_DEVICE_ID 0x8185 127 #define HAL_HW_PCI_8188_DEVICE_ID 0x8188 128 #define HAL_HW_PCI_8198_DEVICE_ID 0x8198 129 #define HAL_HW_PCI_8190_DEVICE_ID 0x8190 130 #define HAL_HW_PCI_8192_DEVICE_ID 0x8192 131 #define HAL_HW_PCI_8192SE_DEVICE_ID 0x8192 132 #define HAL_HW_PCI_8174_DEVICE_ID 0x8174 133 #define HAL_HW_PCI_8173_DEVICE_ID 0x8173 134 #define HAL_HW_PCI_8172_DEVICE_ID 0x8172 135 #define HAL_HW_PCI_8171_DEVICE_ID 0x8171 136 #define HAL_HW_PCI_0045_DEVICE_ID 0x0045 137 #define HAL_HW_PCI_0046_DEVICE_ID 0x0046 138 #define HAL_HW_PCI_0044_DEVICE_ID 0x0044 139 #define HAL_HW_PCI_0047_DEVICE_ID 0x0047 140 #define HAL_HW_PCI_700F_DEVICE_ID 0x700F 141 #define HAL_HW_PCI_701F_DEVICE_ID 0x701F 142 #define HAL_HW_PCI_DLINK_DEVICE_ID 0x3304 143 #define HAL_HW_PCI_8192CET_DEVICE_ID 0x8191 144 #define HAL_HW_PCI_8192CE_DEVICE_ID 0x8178 145 #define HAL_HW_PCI_8191CE_DEVICE_ID 0x8177 146 #define HAL_HW_PCI_8188CE_DEVICE_ID 0x8176 147 #define HAL_HW_PCI_8192CU_DEVICE_ID 0x8191 148 #define HAL_HW_PCI_8192DE_DEVICE_ID 0x092D 149 #define HAL_HW_PCI_8192DU_DEVICE_ID 0x092D 150 151 #define RTL819X_DEFAULT_RF_TYPE RF_1T2R 152 153 #define RTLLIB_WATCH_DOG_TIME 2000 154 155 #define MAX_DEV_ADDR_SIZE 8 /*support till 64 bit bus width OS*/ 156 #define MAX_FIRMWARE_INFORMATION_SIZE 32 157 #define MAX_802_11_HEADER_LENGTH (40 + MAX_FIRMWARE_INFORMATION_SIZE) 158 #define ENCRYPTION_MAX_OVERHEAD 128 159 #define MAX_FRAGMENT_COUNT 8 160 #define MAX_TRANSMIT_BUFFER_SIZE \ 161 (1600 + (MAX_802_11_HEADER_LENGTH + ENCRYPTION_MAX_OVERHEAD) * \ 162 MAX_FRAGMENT_COUNT) 163 164 #define scrclng 4 165 166 #define DEFAULT_FRAG_THRESHOLD 2342U 167 #define MIN_FRAG_THRESHOLD 256U 168 #define DEFAULT_BEACONINTERVAL 0x64U 169 170 #define DEFAULT_SSID "" 171 #define DEFAULT_RETRY_RTS 7 172 #define DEFAULT_RETRY_DATA 7 173 #define PRISM_HDR_SIZE 64 174 175 #define PHY_RSSI_SLID_WIN_MAX 100 176 177 #define RTL_IOCTL_WPA_SUPPLICANT (SIOCIWFIRSTPRIV + 30) 178 179 #define TxBBGainTableLength 37 180 #define CCKTxBBGainTableLength 23 181 182 #define CHANNEL_PLAN_LEN 10 183 #define sCrcLng 4 184 185 #define NIC_SEND_HANG_THRESHOLD_NORMAL 4 186 #define NIC_SEND_HANG_THRESHOLD_POWERSAVE 8 187 188 #define MAX_TX_QUEUE 9 189 190 #define MAX_RX_QUEUE 1 191 192 #define MAX_RX_COUNT 64 193 #define MAX_TX_QUEUE_COUNT 9 194 195 enum RTL819x_PHY_PARAM { 196 RTL819X_PHY_MACPHY_REG = 0, 197 RTL819X_PHY_MACPHY_REG_PG = 1, 198 RTL8188C_PHY_MACREG = 2, 199 RTL8192C_PHY_MACREG = 3, 200 RTL819X_PHY_REG = 4, 201 RTL819X_PHY_REG_1T2R = 5, 202 RTL819X_PHY_REG_to1T1R = 6, 203 RTL819X_PHY_REG_to1T2R = 7, 204 RTL819X_PHY_REG_to2T2R = 8, 205 RTL819X_PHY_REG_PG = 9, 206 RTL819X_AGC_TAB = 10, 207 RTL819X_PHY_RADIO_A = 11, 208 RTL819X_PHY_RADIO_A_1T = 12, 209 RTL819X_PHY_RADIO_A_2T = 13, 210 RTL819X_PHY_RADIO_B = 14, 211 RTL819X_PHY_RADIO_B_GM = 15, 212 RTL819X_PHY_RADIO_C = 16, 213 RTL819X_PHY_RADIO_D = 17, 214 RTL819X_EEPROM_MAP = 18, 215 RTL819X_EFUSE_MAP = 19, 216 }; 217 218 enum nic_t { 219 NIC_UNKNOWN = 0, 220 NIC_8192E = 1, 221 NIC_8190P = 2, 222 NIC_8192SE = 4, 223 NIC_8192CE = 5, 224 NIC_8192CU = 6, 225 NIC_8192DE = 7, 226 NIC_8192DU = 8, 227 }; 228 229 enum rt_eeprom_type { 230 EEPROM_93C46, 231 EEPROM_93C56, 232 EEPROM_BOOT_EFUSE, 233 }; 234 235 enum dcmg_txcmd_op { 236 TXCMD_TXRA_HISTORY_CTRL = 0xFF900000, 237 TXCMD_RESET_TX_PKT_BUFF = 0xFF900001, 238 TXCMD_RESET_RX_PKT_BUFF = 0xFF900002, 239 TXCMD_SET_TX_DURATION = 0xFF900003, 240 TXCMD_SET_RX_RSSI = 0xFF900004, 241 TXCMD_SET_TX_PWR_TRACKING = 0xFF900005, 242 TXCMD_XXXX_CTRL, 243 }; 244 245 enum rt_rf_type_819xu { 246 RF_TYPE_MIN = 0, 247 RF_8225, 248 RF_8256, 249 RF_8258, 250 RF_6052 = 4, 251 RF_PSEUDO_11N = 5, 252 }; 253 254 enum rf_step { 255 RF_STEP_INIT = 0, 256 RF_STEP_NORMAL, 257 RF_STEP_MAX 258 }; 259 260 enum rt_status { 261 RT_STATUS_SUCCESS, 262 RT_STATUS_FAILURE, 263 RT_STATUS_PENDING, 264 RT_STATUS_RESOURCE 265 }; 266 267 enum rt_customer_id { 268 RT_CID_DEFAULT = 0, 269 RT_CID_8187_ALPHA0 = 1, 270 RT_CID_8187_SERCOMM_PS = 2, 271 RT_CID_8187_HW_LED = 3, 272 RT_CID_8187_NETGEAR = 4, 273 RT_CID_WHQL = 5, 274 RT_CID_819x_CAMEO = 6, 275 RT_CID_819x_RUNTOP = 7, 276 RT_CID_819x_Senao = 8, 277 RT_CID_TOSHIBA = 9, 278 RT_CID_819x_Netcore = 10, 279 RT_CID_Nettronix = 11, 280 RT_CID_DLINK = 12, 281 RT_CID_PRONET = 13, 282 RT_CID_COREGA = 14, 283 RT_CID_819x_ALPHA = 15, 284 RT_CID_819x_Sitecom = 16, 285 RT_CID_CCX = 17, 286 RT_CID_819x_Lenovo = 18, 287 RT_CID_819x_QMI = 19, 288 RT_CID_819x_Edimax_Belkin = 20, 289 RT_CID_819x_Sercomm_Belkin = 21, 290 RT_CID_819x_CAMEO1 = 22, 291 RT_CID_819x_MSI = 23, 292 RT_CID_819x_Acer = 24, 293 RT_CID_819x_HP = 27, 294 RT_CID_819x_CLEVO = 28, 295 RT_CID_819x_Arcadyan_Belkin = 29, 296 RT_CID_819x_SAMSUNG = 30, 297 RT_CID_819x_WNC_COREGA = 31, 298 }; 299 300 enum reset_type { 301 RESET_TYPE_NORESET = 0x00, 302 RESET_TYPE_NORMAL = 0x01, 303 RESET_TYPE_SILENT = 0x02 304 }; 305 306 enum ic_inferiority_8192s { 307 IC_INFERIORITY_A = 0, 308 IC_INFERIORITY_B = 1, 309 }; 310 311 enum pci_bridge_vendor { 312 PCI_BRIDGE_VENDOR_INTEL = 0x0, 313 PCI_BRIDGE_VENDOR_ATI, 314 PCI_BRIDGE_VENDOR_AMD, 315 PCI_BRIDGE_VENDOR_SIS , 316 PCI_BRIDGE_VENDOR_UNKNOWN, 317 PCI_BRIDGE_VENDOR_MAX , 318 }; 319 320 struct buffer { 321 struct buffer *next; 322 u32 *buf; 323 dma_addr_t dma; 324 325 }; 326 327 struct rtl_reg_debug { 328 unsigned int cmd; 329 struct { 330 unsigned char type; 331 unsigned char addr; 332 unsigned char page; 333 unsigned char length; 334 } head; 335 unsigned char buf[0xff]; 336 }; 337 338 struct rt_tx_rahis { 339 u32 cck[4]; 340 u32 ofdm[8]; 341 u32 ht_mcs[4][16]; 342 }; 343 344 struct rt_smooth_data_4rf { 345 char elements[4][100]; 346 u32 index; 347 u32 TotalNum; 348 u32 TotalVal[4]; 349 }; 350 351 struct rt_stats { 352 unsigned long txrdu; 353 unsigned long rxrdu; 354 unsigned long rxok; 355 unsigned long rxframgment; 356 unsigned long rxcmdpkt[8]; 357 unsigned long rxurberr; 358 unsigned long rxstaterr; 359 unsigned long rxdatacrcerr; 360 unsigned long rxmgmtcrcerr; 361 unsigned long rxcrcerrmin; 362 unsigned long rxcrcerrmid; 363 unsigned long rxcrcerrmax; 364 unsigned long received_rate_histogram[4][32]; 365 unsigned long received_preamble_GI[2][32]; 366 unsigned long rx_AMPDUsize_histogram[5]; 367 unsigned long rx_AMPDUnum_histogram[5]; 368 unsigned long numpacket_matchbssid; 369 unsigned long numpacket_toself; 370 unsigned long num_process_phyinfo; 371 unsigned long numqry_phystatus; 372 unsigned long numqry_phystatusCCK; 373 unsigned long numqry_phystatusHT; 374 unsigned long received_bwtype[5]; 375 unsigned long txnperr; 376 unsigned long txnpdrop; 377 unsigned long txresumed; 378 unsigned long rxoverflow; 379 unsigned long rxint; 380 unsigned long txnpokint; 381 unsigned long ints; 382 unsigned long shints; 383 unsigned long txoverflow; 384 unsigned long txlpokint; 385 unsigned long txlpdrop; 386 unsigned long txlperr; 387 unsigned long txbeokint; 388 unsigned long txbedrop; 389 unsigned long txbeerr; 390 unsigned long txbkokint; 391 unsigned long txbkdrop; 392 unsigned long txbkerr; 393 unsigned long txviokint; 394 unsigned long txvidrop; 395 unsigned long txvierr; 396 unsigned long txvookint; 397 unsigned long txvodrop; 398 unsigned long txvoerr; 399 unsigned long txbeaconokint; 400 unsigned long txbeacondrop; 401 unsigned long txbeaconerr; 402 unsigned long txmanageokint; 403 unsigned long txmanagedrop; 404 unsigned long txmanageerr; 405 unsigned long txcmdpktokint; 406 unsigned long txdatapkt; 407 unsigned long txfeedback; 408 unsigned long txfeedbackok; 409 unsigned long txoktotal; 410 unsigned long txokbytestotal; 411 unsigned long txokinperiod; 412 unsigned long txmulticast; 413 unsigned long txbytesmulticast; 414 unsigned long txbroadcast; 415 unsigned long txbytesbroadcast; 416 unsigned long txunicast; 417 unsigned long txbytesunicast; 418 unsigned long rxbytesunicast; 419 unsigned long txfeedbackfail; 420 unsigned long txerrtotal; 421 unsigned long txerrbytestotal; 422 unsigned long txerrmulticast; 423 unsigned long txerrbroadcast; 424 unsigned long txerrunicast; 425 unsigned long txretrycount; 426 unsigned long txfeedbackretry; 427 u8 last_packet_rate; 428 unsigned long slide_signal_strength[100]; 429 unsigned long slide_evm[100]; 430 unsigned long slide_rssi_total; 431 unsigned long slide_evm_total; 432 long signal_strength; 433 long signal_quality; 434 long last_signal_strength_inpercent; 435 long recv_signal_power; 436 u8 rx_rssi_percentage[4]; 437 u8 rx_evm_percentage[2]; 438 long rxSNRdB[4]; 439 struct rt_tx_rahis txrate; 440 u32 Slide_Beacon_pwdb[100]; 441 u32 Slide_Beacon_Total; 442 struct rt_smooth_data_4rf cck_adc_pwdb; 443 u32 CurrentShowTxate; 444 }; 445 446 struct channel_access_setting { 447 u16 SIFS_Timer; 448 u16 DIFS_Timer; 449 u16 SlotTimeTimer; 450 u16 EIFS_Timer; 451 u16 CWminIndex; 452 u16 CWmaxIndex; 453 }; 454 455 enum two_port_status { 456 TWO_PORT_STATUS__DEFAULT_ONLY, 457 TWO_PORT_STATUS__EXTENSION_ONLY, 458 TWO_PORT_STATUS__EXTENSION_FOLLOW_DEFAULT, 459 TWO_PORT_STATUS__DEFAULT_G_EXTENSION_N20, 460 TWO_PORT_STATUS__ADHOC, 461 TWO_PORT_STATUS__WITHOUT_ANY_ASSOCIATE 462 }; 463 464 struct txbbgain_struct { 465 long txbb_iq_amplifygain; 466 u32 txbbgain_value; 467 }; 468 469 struct ccktxbbgain { 470 u8 ccktxbb_valuearray[8]; 471 }; 472 473 struct init_gain { 474 u8 xaagccore1; 475 u8 xbagccore1; 476 u8 xcagccore1; 477 u8 xdagccore1; 478 u8 cca; 479 480 }; 481 482 struct tx_ring { 483 u32 *desc; 484 u8 nStuckCount; 485 struct tx_ring *next; 486 } __packed; 487 488 struct rtl8192_tx_ring { 489 struct tx_desc *desc; 490 dma_addr_t dma; 491 unsigned int idx; 492 unsigned int entries; 493 struct sk_buff_head queue; 494 }; 495 496 497 498 struct rtl819x_ops { 499 enum nic_t nic_type; 500 void (*get_eeprom_size)(struct net_device *dev); 501 void (*init_adapter_variable)(struct net_device *dev); 502 void (*init_before_adapter_start)(struct net_device *dev); 503 bool (*initialize_adapter)(struct net_device *dev); 504 void (*link_change)(struct net_device *dev); 505 void (*tx_fill_descriptor)(struct net_device *dev, 506 struct tx_desc *tx_desc, 507 struct cb_desc *cb_desc, 508 struct sk_buff *skb); 509 void (*tx_fill_cmd_descriptor)(struct net_device *dev, 510 struct tx_desc_cmd *entry, 511 struct cb_desc *cb_desc, 512 struct sk_buff *skb); 513 bool (*rx_query_status_descriptor)(struct net_device *dev, 514 struct rtllib_rx_stats *stats, 515 struct rx_desc *pdesc, 516 struct sk_buff *skb); 517 bool (*rx_command_packet_handler)(struct net_device *dev, 518 struct sk_buff *skb, 519 struct rx_desc *pdesc); 520 void (*stop_adapter)(struct net_device *dev, bool reset); 521 void (*update_ratr_table)(struct net_device *dev); 522 void (*irq_enable)(struct net_device *dev); 523 void (*irq_disable)(struct net_device *dev); 524 void (*irq_clear)(struct net_device *dev); 525 void (*rx_enable)(struct net_device *dev); 526 void (*tx_enable)(struct net_device *dev); 527 void (*interrupt_recognized)(struct net_device *dev, 528 u32 *p_inta, u32 *p_intb); 529 bool (*TxCheckStuckHandler)(struct net_device *dev); 530 bool (*RxCheckStuckHandler)(struct net_device *dev); 531 }; 532 533 struct r8192_priv { 534 struct pci_dev *pdev; 535 struct pci_dev *bridge_pdev; 536 537 bool bfirst_init; 538 bool bfirst_after_down; 539 bool initialized_at_probe; 540 bool being_init_adapter; 541 bool bDriverIsGoingToUnload; 542 543 int irq; 544 short irq_enabled; 545 546 short up; 547 short up_first_time; 548 struct delayed_work update_beacon_wq; 549 struct delayed_work watch_dog_wq; 550 struct delayed_work txpower_tracking_wq; 551 struct delayed_work rfpath_check_wq; 552 struct delayed_work gpio_change_rf_wq; 553 struct delayed_work initialgain_operate_wq; 554 struct delayed_work check_hw_scan_wq; 555 struct delayed_work hw_scan_simu_wq; 556 struct delayed_work start_hw_scan_wq; 557 558 struct workqueue_struct *priv_wq; 559 560 struct channel_access_setting ChannelAccessSetting; 561 562 struct mp_adapter NdisAdapter; 563 564 struct rtl819x_ops *ops; 565 struct rtllib_device *rtllib; 566 567 struct work_struct reset_wq; 568 569 struct log_int_8190 InterruptLog; 570 571 enum rt_customer_id CustomerID; 572 573 574 enum rt_rf_type_819xu rf_chip; 575 enum ic_inferiority_8192s IC_Class; 576 enum ht_channel_width CurrentChannelBW; 577 struct bb_reg_definition PHYRegDef[4]; 578 struct rate_adaptive rate_adaptive; 579 580 struct ccktxbbgain cck_txbbgain_table[CCKTxBBGainTableLength]; 581 struct ccktxbbgain cck_txbbgain_ch14_table[CCKTxBBGainTableLength]; 582 583 struct txbbgain_struct txbbgain_table[TxBBGainTableLength]; 584 585 enum acm_method AcmMethod; 586 587 struct rt_firmware *pFirmware; 588 enum rtl819x_loopback LoopbackMode; 589 enum firmware_source firmware_source; 590 591 struct timer_list watch_dog_timer; 592 struct timer_list fsync_timer; 593 struct timer_list gpio_polling_timer; 594 595 spinlock_t fw_scan_lock; 596 spinlock_t irq_lock; 597 spinlock_t irq_th_lock; 598 spinlock_t tx_lock; 599 spinlock_t rf_ps_lock; 600 spinlock_t rw_lock; 601 spinlock_t rt_h2c_lock; 602 spinlock_t rf_lock; 603 spinlock_t ps_lock; 604 605 struct sk_buff_head rx_queue; 606 struct sk_buff_head skb_queue; 607 608 struct tasklet_struct irq_rx_tasklet; 609 struct tasklet_struct irq_tx_tasklet; 610 struct tasklet_struct irq_prepare_beacon_tasklet; 611 612 struct semaphore wx_sem; 613 struct semaphore rf_sem; 614 struct mutex mutex; 615 616 struct rt_stats stats; 617 struct iw_statistics wstats; 618 struct proc_dir_entry *dir_dev; 619 620 short (*rf_set_sens)(struct net_device *dev, short sens); 621 u8 (*rf_set_chan)(struct net_device *dev, u8 ch); 622 void (*rf_close)(struct net_device *dev); 623 void (*rf_init)(struct net_device *dev); 624 625 struct rx_desc *rx_ring[MAX_RX_QUEUE]; 626 struct sk_buff *rx_buf[MAX_RX_QUEUE][MAX_RX_COUNT]; 627 dma_addr_t rx_ring_dma[MAX_RX_QUEUE]; 628 unsigned int rx_idx[MAX_RX_QUEUE]; 629 int rxringcount; 630 u16 rxbuffersize; 631 632 u64 LastRxDescTSF; 633 634 u16 EarlyRxThreshold; 635 u32 ReceiveConfig; 636 u8 AcmControl; 637 u8 RFProgType; 638 u8 retry_data; 639 u8 retry_rts; 640 u16 rts; 641 642 struct rtl8192_tx_ring tx_ring[MAX_TX_QUEUE_COUNT]; 643 int txringcount; 644 int txbuffsize; 645 int txfwbuffersize; 646 atomic_t tx_pending[0x10]; 647 648 u16 ShortRetryLimit; 649 u16 LongRetryLimit; 650 u32 TransmitConfig; 651 u8 RegCWinMin; 652 u8 keepAliveLevel; 653 654 bool sw_radio_on; 655 bool bHwRadioOff; 656 bool pwrdown; 657 bool blinked_ingpio; 658 u8 polling_timer_on; 659 660 /**********************************************************/ 661 662 enum card_type { 663 PCI, MINIPCI, 664 CARDBUS, USB 665 } card_type; 666 667 struct work_struct qos_activate; 668 669 u8 bIbssCoordinator; 670 671 short promisc; 672 short crcmon; 673 674 int txbeaconcount; 675 676 short chan; 677 short sens; 678 short max_sens; 679 u32 rx_prevlen; 680 681 u8 ScanDelay; 682 bool ps_force; 683 684 u32 irq_mask[2]; 685 686 u8 Rf_Mode; 687 enum nic_t card_8192; 688 u8 card_8192_version; 689 690 short enable_gpio0; 691 692 u8 rf_type; 693 u8 IC_Cut; 694 char nick[IW_ESSID_MAX_SIZE + 1]; 695 696 u8 RegBcnCtrlVal; 697 bool bHwAntDiv; 698 699 bool bTKIPinNmodeFromReg; 700 bool bWEPinNmodeFromReg; 701 702 bool bLedOpenDrain; 703 704 u8 check_roaming_cnt; 705 706 bool bIgnoreSilentReset; 707 u32 SilentResetRxSoltNum; 708 u32 SilentResetRxSlotIndex; 709 u32 SilentResetRxStuckEvent[MAX_SILENT_RESET_RX_SLOT_NUM]; 710 711 void *scan_cmd; 712 u8 hwscan_bw_40; 713 714 u16 nrxAMPDU_size; 715 u8 nrxAMPDU_aggr_num; 716 717 u32 last_rxdesc_tsf_high; 718 u32 last_rxdesc_tsf_low; 719 720 u16 basic_rate; 721 u8 short_preamble; 722 u8 dot11CurrentPreambleMode; 723 u8 slot_time; 724 u16 SifsTime; 725 726 u8 RegWirelessMode; 727 728 u8 firmware_version; 729 u16 FirmwareSubVersion; 730 u16 rf_pathmap; 731 bool AutoloadFailFlag; 732 733 u8 RegPciASPM; 734 u8 RegAMDPciASPM; 735 u8 RegHwSwRfOffD3; 736 u8 RegSupportPciASPM; 737 bool bSupportASPM; 738 739 u32 RfRegChnlVal[2]; 740 741 u8 ShowRateMode; 742 u8 RATRTableBitmap; 743 744 u8 EfuseMap[2][HWSET_MAX_SIZE_92S]; 745 u16 EfuseUsedBytes; 746 u8 EfuseUsedPercentage; 747 748 short epromtype; 749 u16 eeprom_vid; 750 u16 eeprom_did; 751 u16 eeprom_svid; 752 u16 eeprom_smid; 753 u8 eeprom_CustomerID; 754 u16 eeprom_ChannelPlan; 755 u8 eeprom_version; 756 757 u8 EEPROMRegulatory; 758 u8 EEPROMPwrGroup[2][3]; 759 u8 EEPROMOptional; 760 761 u8 EEPROMTxPowerLevelCCK[14]; 762 u8 EEPROMTxPowerLevelOFDM24G[14]; 763 u8 EEPROMTxPowerLevelOFDM5G[24]; 764 u8 EEPROMRfACCKChnl1TxPwLevel[3]; 765 u8 EEPROMRfAOfdmChnlTxPwLevel[3]; 766 u8 EEPROMRfCCCKChnl1TxPwLevel[3]; 767 u8 EEPROMRfCOfdmChnlTxPwLevel[3]; 768 u16 EEPROMTxPowerDiff; 769 u16 EEPROMAntPwDiff; 770 u8 EEPROMThermalMeter; 771 u8 EEPROMPwDiff; 772 u8 EEPROMCrystalCap; 773 774 u8 EEPROMBluetoothCoexist; 775 u8 EEPROMBluetoothType; 776 u8 EEPROMBluetoothAntNum; 777 u8 EEPROMBluetoothAntIsolation; 778 u8 EEPROMBluetoothRadioShared; 779 780 781 u8 EEPROMSupportWoWLAN; 782 u8 EEPROMBoardType; 783 u8 EEPROM_Def_Ver; 784 u8 EEPROMHT2T_TxPwr[6]; 785 u8 EEPROMTSSI_A; 786 u8 EEPROMTSSI_B; 787 u8 EEPROMTxPowerLevelCCK_V1[3]; 788 u8 EEPROMLegacyHTTxPowerDiff; 789 790 u8 BluetoothCoexist; 791 792 u8 CrystalCap; 793 u8 ThermalMeter[2]; 794 795 u16 FwCmdIOMap; 796 u32 FwCmdIOParam; 797 798 u8 SwChnlInProgress; 799 u8 SwChnlStage; 800 u8 SwChnlStep; 801 u8 SetBWModeInProgress; 802 803 u8 nCur40MhzPrimeSC; 804 805 u32 RfReg0Value[4]; 806 u8 NumTotalRFPath; 807 bool brfpath_rxenable[4]; 808 809 bool bTXPowerDataReadFromEEPORM; 810 811 u16 RegChannelPlan; 812 u16 ChannelPlan; 813 bool bChnlPlanFromHW; 814 815 bool RegRfOff; 816 bool isRFOff; 817 bool bInPowerSaveMode; 818 u8 bHwRfOffAction; 819 820 bool aspm_clkreq_enable; 821 u32 pci_bridge_vendor; 822 u8 RegHostPciASPMSetting; 823 u8 RegDevicePciASPMSetting; 824 825 bool RFChangeInProgress; 826 bool SetRFPowerStateInProgress; 827 bool bdisable_nic; 828 829 u8 pwrGroupCnt; 830 831 u8 ThermalValue_LCK; 832 u8 ThermalValue_IQK; 833 bool bRfPiEnable; 834 835 u32 APKoutput[2][2]; 836 bool bAPKdone; 837 838 long RegE94; 839 long RegE9C; 840 long RegEB4; 841 long RegEBC; 842 843 u32 RegC04; 844 u32 Reg874; 845 u32 RegC08; 846 u32 ADDA_backup[16]; 847 u32 IQK_MAC_backup[3]; 848 849 bool SetFwCmdInProgress; 850 u8 CurrentFwCmdIO; 851 852 u8 rssi_level; 853 854 bool bInformFWDriverControlDM; 855 u8 PwrGroupHT20[2][14]; 856 u8 PwrGroupHT40[2][14]; 857 858 u8 ThermalValue; 859 long EntryMinUndecoratedSmoothedPWDB; 860 long EntryMaxUndecoratedSmoothedPWDB; 861 u8 DynamicTxHighPowerLvl; 862 u8 LastDTPLvl; 863 u32 CurrentRATR0; 864 struct false_alarm_stats FalseAlmCnt; 865 866 u8 DMFlag; 867 u8 DM_Type; 868 869 u8 CckPwEnl; 870 u16 TSSI_13dBm; 871 u32 Pwr_Track; 872 u8 CCKPresentAttentuation_20Mdefault; 873 u8 CCKPresentAttentuation_40Mdefault; 874 char CCKPresentAttentuation_difference; 875 char CCKPresentAttentuation; 876 u8 bCckHighPower; 877 long undecorated_smoothed_pwdb; 878 long undecorated_smoothed_cck_adc_pwdb[4]; 879 880 u32 MCSTxPowerLevelOriginalOffset[6]; 881 u32 CCKTxPowerLevelOriginalOffset; 882 u8 TxPowerLevelCCK[14]; 883 u8 TxPowerLevelCCK_A[14]; 884 u8 TxPowerLevelCCK_C[14]; 885 u8 TxPowerLevelOFDM24G[14]; 886 u8 TxPowerLevelOFDM5G[14]; 887 u8 TxPowerLevelOFDM24G_A[14]; 888 u8 TxPowerLevelOFDM24G_C[14]; 889 u8 LegacyHTTxPowerDiff; 890 u8 TxPowerDiff; 891 s8 RF_C_TxPwDiff; 892 s8 RF_B_TxPwDiff; 893 u8 RfTxPwrLevelCck[2][14]; 894 u8 RfTxPwrLevelOfdm1T[2][14]; 895 u8 RfTxPwrLevelOfdm2T[2][14]; 896 u8 AntennaTxPwDiff[3]; 897 u8 TxPwrHt20Diff[2][14]; 898 u8 TxPwrLegacyHtDiff[2][14]; 899 u8 TxPwrSafetyFlag; 900 u8 HT2T_TxPwr_A[14]; 901 u8 HT2T_TxPwr_B[14]; 902 u8 CurrentCckTxPwrIdx; 903 u8 CurrentOfdm24GTxPwrIdx; 904 905 bool bdynamic_txpower; 906 bool bDynamicTxHighPower; 907 bool bDynamicTxLowPower; 908 bool bLastDTPFlag_High; 909 bool bLastDTPFlag_Low; 910 911 bool bstore_last_dtpflag; 912 bool bstart_txctrl_bydtp; 913 914 u8 rfa_txpowertrackingindex; 915 u8 rfa_txpowertrackingindex_real; 916 u8 rfa_txpowertracking_default; 917 u8 rfc_txpowertrackingindex; 918 u8 rfc_txpowertrackingindex_real; 919 u8 rfc_txpowertracking_default; 920 bool btxpower_tracking; 921 bool bcck_in_ch14; 922 923 u8 TxPowerTrackControl; 924 u8 txpower_count; 925 bool btxpower_trackingInit; 926 927 u8 OFDM_index[2]; 928 u8 CCK_index; 929 930 u8 Record_CCK_20Mindex; 931 u8 Record_CCK_40Mindex; 932 933 struct init_gain initgain_backup; 934 u8 DefaultInitialGain[4]; 935 bool bis_any_nonbepkts; 936 bool bcurrent_turbo_EDCA; 937 bool bis_cur_rdlstate; 938 939 bool bCCKinCH14; 940 941 u8 MidHighPwrTHR_L1; 942 u8 MidHighPwrTHR_L2; 943 944 bool bfsync_processing; 945 u32 rate_record; 946 u32 rateCountDiffRecord; 947 u32 ContiuneDiffCount; 948 bool bswitch_fsync; 949 u8 framesync; 950 u32 framesyncC34; 951 u8 framesyncMonitor; 952 953 bool bDMInitialGainEnable; 954 bool MutualAuthenticationFail; 955 956 bool bDisableFrameBursting; 957 958 u32 reset_count; 959 bool bpbc_pressed; 960 961 u32 txpower_checkcnt; 962 u32 txpower_tracking_callback_cnt; 963 u8 thermal_read_val[40]; 964 u8 thermal_readback_index; 965 u32 ccktxpower_adjustcnt_not_ch14; 966 u32 ccktxpower_adjustcnt_ch14; 967 968 enum reset_type ResetProgress; 969 bool bForcedSilentReset; 970 bool bDisableNormalResetCheck; 971 u16 TxCounter; 972 u16 RxCounter; 973 int IrpPendingCount; 974 bool bResetInProgress; 975 bool force_reset; 976 bool force_lps; 977 u8 InitialGainOperateType; 978 979 bool chan_forced; 980 bool bSingleCarrier; 981 bool RegBoard; 982 bool bCckContTx; 983 bool bOfdmContTx; 984 bool bStartContTx; 985 u8 RegPaModel; 986 u8 btMpCckTxPower; 987 u8 btMpOfdmTxPower; 988 989 u32 MptActType; 990 u32 MptIoOffset; 991 u32 MptIoValue; 992 u32 MptRfPath; 993 994 u32 MptBandWidth; 995 u32 MptRateIndex; 996 u8 MptChannelToSw; 997 u32 MptRCR; 998 999 u8 PwrDomainProtect; 1000 u8 H2CTxCmdSeq; 1001 1002 1003 }; 1004 1005 extern const struct ethtool_ops rtl819x_ethtool_ops; 1006 1007 void rtl8192_tx_cmd(struct net_device *dev, struct sk_buff *skb); 1008 short rtl8192_tx(struct net_device *dev, struct sk_buff *skb); 1009 1010 u8 read_nic_io_byte(struct net_device *dev, int x); 1011 u32 read_nic_io_dword(struct net_device *dev, int x); 1012 u16 read_nic_io_word(struct net_device *dev, int x) ; 1013 void write_nic_io_byte(struct net_device *dev, int x, u8 y); 1014 void write_nic_io_word(struct net_device *dev, int x, u16 y); 1015 void write_nic_io_dword(struct net_device *dev, int x, u32 y); 1016 1017 u8 read_nic_byte(struct net_device *dev, int x); 1018 u32 read_nic_dword(struct net_device *dev, int x); 1019 u16 read_nic_word(struct net_device *dev, int x) ; 1020 void write_nic_byte(struct net_device *dev, int x, u8 y); 1021 void write_nic_word(struct net_device *dev, int x, u16 y); 1022 void write_nic_dword(struct net_device *dev, int x, u32 y); 1023 1024 void force_pci_posting(struct net_device *dev); 1025 1026 void rtl8192_rx_enable(struct net_device *); 1027 void rtl8192_tx_enable(struct net_device *); 1028 1029 int rtl8192_hard_start_xmit(struct sk_buff *skb, struct net_device *dev); 1030 void rtl8192_hard_data_xmit(struct sk_buff *skb, struct net_device *dev, 1031 int rate); 1032 void rtl8192_data_hard_stop(struct net_device *dev); 1033 void rtl8192_data_hard_resume(struct net_device *dev); 1034 void rtl8192_restart(void *data); 1035 void rtl819x_watchdog_wqcallback(void *data); 1036 void rtl8192_hw_sleep_wq(void *data); 1037 void watch_dog_timer_callback(unsigned long data); 1038 void rtl8192_irq_rx_tasklet(struct r8192_priv *priv); 1039 void rtl8192_irq_tx_tasklet(struct r8192_priv *priv); 1040 int rtl8192_down(struct net_device *dev, bool shutdownrf); 1041 int rtl8192_up(struct net_device *dev); 1042 void rtl8192_commit(struct net_device *dev); 1043 void rtl8192_set_chan(struct net_device *dev, short ch); 1044 1045 void check_rfctrl_gpio_timer(unsigned long data); 1046 1047 void rtl8192_hw_wakeup_wq(void *data); 1048 irqreturn_type rtl8192_interrupt(int irq, void *netdev, struct pt_regs *regs); 1049 1050 short rtl8192_pci_initdescring(struct net_device *dev); 1051 1052 void rtl8192_cancel_deferred_work(struct r8192_priv *priv); 1053 1054 int _rtl8192_up(struct net_device *dev, bool is_silent_reset); 1055 1056 short rtl8192_is_tx_queue_empty(struct net_device *dev); 1057 void rtl8192_irq_disable(struct net_device *dev); 1058 1059 void rtl8192_tx_timeout(struct net_device *dev); 1060 void rtl8192_pci_resetdescring(struct net_device *dev); 1061 void rtl8192_SetWirelessMode(struct net_device *dev, u8 wireless_mode); 1062 void rtl8192_irq_enable(struct net_device *dev); 1063 void rtl8192_config_rate(struct net_device *dev, u16 *rate_config); 1064 void rtl8192_update_cap(struct net_device *dev, u16 cap); 1065 void rtl8192_irq_disable(struct net_device *dev); 1066 1067 void rtl819x_UpdateRxPktTimeStamp(struct net_device *dev, 1068 struct rtllib_rx_stats *stats); 1069 long rtl819x_translate_todbm(struct r8192_priv *priv, u8 signal_strength_index); 1070 void rtl819x_update_rxsignalstatistics8190pci(struct r8192_priv *priv, 1071 struct rtllib_rx_stats *pprevious_stats); 1072 u8 rtl819x_evm_dbtopercentage(char value); 1073 void rtl819x_process_cck_rxpathsel(struct r8192_priv *priv, 1074 struct rtllib_rx_stats *pprevious_stats); 1075 u8 rtl819x_query_rxpwrpercentage(char antpower); 1076 void rtl8192_record_rxdesc_forlateruse(struct rtllib_rx_stats *psrc_stats, 1077 struct rtllib_rx_stats *ptarget_stats); 1078 bool NicIFEnableNIC(struct net_device *dev); 1079 bool NicIFDisableNIC(struct net_device *dev); 1080 1081 bool MgntActSet_RF_State(struct net_device *dev, 1082 enum rt_rf_power_state StateToSet, 1083 RT_RF_CHANGE_SOURCE ChangeSource, 1084 bool ProtectOrNot); 1085 void ActUpdateChannelAccessSetting(struct net_device *dev, 1086 enum wireless_mode WirelessMode, 1087 struct channel_access_setting *ChnlAccessSetting); 1088 1089 /* proc stuff from rtl_debug.c */ 1090 void rtl8192_proc_init_one(struct net_device *dev); 1091 void rtl8192_proc_remove_one(struct net_device *dev); 1092 void rtl8192_proc_module_init(void); 1093 void rtl8192_proc_module_remove(void); 1094 1095 #endif 1096