1 /* $XFree86$ */
2 /* $XdotOrg$ */
3 /*
4 * Mode initializing code (CRT1 section) for
5 * for SiS 300/305/540/630/730 and
6 * SiS 315/550/650/M650/651/661FX/M661FX/740/741(GX)/M741/330/660/M660/760/M760
7 * (Universal module for Linux kernel framebuffer and XFree86 4.x)
8 *
9 * Copyright (C) 2001-2004 by Thomas Winischhofer, Vienna, Austria
10 *
11 * If distributed as part of the Linux kernel, the following license terms
12 * apply:
13 *
14 * * This program is free software; you can redistribute it and/or modify
15 * * it under the terms of the GNU General Public License as published by
16 * * the Free Software Foundation; either version 2 of the named License,
17 * * or any later version.
18 * *
19 * * This program is distributed in the hope that it will be useful,
20 * * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * * GNU General Public License for more details.
23 * *
24 * * You should have received a copy of the GNU General Public License
25 * * along with this program; if not, write to the Free Software
26 * * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
27 *
28 * Otherwise, the following license terms apply:
29 *
30 * * Redistribution and use in source and binary forms, with or without
31 * * modification, are permitted provided that the following conditions
32 * * are met:
33 * * 1) Redistributions of source code must retain the above copyright
34 * * notice, this list of conditions and the following disclaimer.
35 * * 2) Redistributions in binary form must reproduce the above copyright
36 * * notice, this list of conditions and the following disclaimer in the
37 * * documentation and/or other materials provided with the distribution.
38 * * 3) The name of the author may not be used to endorse or promote products
39 * * derived from this software without specific prior written permission.
40 * *
41 * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESSED OR
42 * * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
43 * * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
44 * * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
45 * * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
46 * * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
47 * * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
48 * * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
49 * * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
50 * * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
51 *
52 * Author: Thomas Winischhofer <thomas@winischhofer.net>
53 *
54 * Formerly based on non-functional code-fragements for 300 series by SiS, Inc.
55 * Used by permission.
56 *
57 * TW says: This code looks awful, I know. But please don't do anything about
58 * this otherwise debugging will be hell.
59 * The code is extremely fragile as regards the different chipsets, different
60 * video bridges and combinations thereof. If anything is changed, extreme
61 * care has to be taken that that change doesn't break it for other chipsets,
62 * bridges or combinations thereof.
63 * All comments in this file are by me, regardless if they are marked TW or not.
64 *
65 */
66
67 #include "init.h"
68
69 #ifdef SIS300
70 #include "300vtbl.h"
71 #endif
72
73 #ifdef SIS315H
74 #include "310vtbl.h"
75 #endif
76
77 #if defined(ALLOC_PRAGMA)
78 #pragma alloc_text(PAGE,SiSSetMode)
79 #endif
80
81 /*********************************************/
82 /* POINTER INITIALIZATION */
83 /*********************************************/
84
85 static void
InitCommonPointer(SiS_Private * SiS_Pr,PSIS_HW_INFO HwInfo)86 InitCommonPointer(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
87 {
88 SiS_Pr->SiS_StResInfo = SiS_StResInfo;
89 SiS_Pr->SiS_ModeResInfo = SiS_ModeResInfo;
90 SiS_Pr->SiS_StandTable = SiS_StandTable;
91
92 SiS_Pr->SiS_NTSCPhase = SiS_NTSCPhase;
93 SiS_Pr->SiS_PALPhase = SiS_PALPhase;
94 SiS_Pr->SiS_NTSCPhase2 = SiS_NTSCPhase2;
95 SiS_Pr->SiS_PALPhase2 = SiS_PALPhase2;
96 SiS_Pr->SiS_PALMPhase = SiS_PALMPhase;
97 SiS_Pr->SiS_PALNPhase = SiS_PALNPhase;
98 SiS_Pr->SiS_PALMPhase2 = SiS_PALMPhase2;
99 SiS_Pr->SiS_PALNPhase2 = SiS_PALNPhase2;
100 SiS_Pr->SiS_SpecialPhase = SiS_SpecialPhase;
101 SiS_Pr->SiS_SpecialPhaseM = SiS_SpecialPhaseM;
102 SiS_Pr->SiS_SpecialPhaseJ = SiS_SpecialPhaseJ;
103
104 SiS_Pr->SiS_NTSCTiming = SiS_NTSCTiming;
105 SiS_Pr->SiS_PALTiming = SiS_PALTiming;
106 SiS_Pr->SiS_HiTVSt1Timing = SiS_HiTVSt1Timing;
107 SiS_Pr->SiS_HiTVSt2Timing = SiS_HiTVSt2Timing;
108
109 SiS_Pr->SiS_HiTVExtTiming = SiS_HiTVExtTiming;
110 SiS_Pr->SiS_HiTVGroup3Data = SiS_HiTVGroup3Data;
111 SiS_Pr->SiS_HiTVGroup3Simu = SiS_HiTVGroup3Simu;
112 #if 0
113 SiS_Pr->SiS_HiTVTextTiming = SiS_HiTVTextTiming;
114 SiS_Pr->SiS_HiTVGroup3Text = SiS_HiTVGroup3Text;
115 #endif
116
117 SiS_Pr->SiS_StPALData = SiS_StPALData;
118 SiS_Pr->SiS_ExtPALData = SiS_ExtPALData;
119 SiS_Pr->SiS_StNTSCData = SiS_StNTSCData;
120 SiS_Pr->SiS_ExtNTSCData = SiS_ExtNTSCData;
121 SiS_Pr->SiS_St1HiTVData = SiS_StHiTVData;
122 SiS_Pr->SiS_St2HiTVData = SiS_St2HiTVData;
123 SiS_Pr->SiS_ExtHiTVData = SiS_ExtHiTVData;
124 SiS_Pr->SiS_St525iData = SiS_StNTSCData;
125 SiS_Pr->SiS_St525pData = SiS_St525pData;
126 SiS_Pr->SiS_St750pData = SiS_St750pData;
127 SiS_Pr->SiS_Ext525iData = SiS_ExtNTSCData;
128 SiS_Pr->SiS_Ext525pData = SiS_ExtNTSCData;
129 SiS_Pr->SiS_Ext750pData = SiS_Ext750pData;
130
131 SiS_Pr->pSiS_OutputSelect = &SiS_OutputSelect;
132 SiS_Pr->pSiS_SoftSetting = &SiS_SoftSetting;
133
134 SiS_Pr->SiS_LCD1280x720Data = SiS_LCD1280x720Data;
135 SiS_Pr->SiS_StLCD1280x768_2Data = SiS_StLCD1280x768_2Data;
136 SiS_Pr->SiS_ExtLCD1280x768_2Data = SiS_ExtLCD1280x768_2Data;
137 SiS_Pr->SiS_LCD1280x768_3Data = SiS_LCD1280x768_3Data;
138 SiS_Pr->SiS_LCD1280x800Data = SiS_LCD1280x800Data;
139 SiS_Pr->SiS_LCD1280x960Data = SiS_LCD1280x960Data;
140 SiS_Pr->SiS_StLCD1400x1050Data = SiS_StLCD1400x1050Data;
141 SiS_Pr->SiS_ExtLCD1400x1050Data = SiS_ExtLCD1400x1050Data;
142 SiS_Pr->SiS_LCD1680x1050Data = SiS_LCD1680x1050Data;
143 SiS_Pr->SiS_StLCD1600x1200Data = SiS_StLCD1600x1200Data;
144 SiS_Pr->SiS_ExtLCD1600x1200Data = SiS_ExtLCD1600x1200Data;
145 SiS_Pr->SiS_NoScaleData = SiS_NoScaleData;
146
147 SiS_Pr->SiS_LVDS320x480Data_1 = SiS_LVDS320x480Data_1;
148 SiS_Pr->SiS_LVDS800x600Data_1 = SiS_LVDS800x600Data_1;
149 SiS_Pr->SiS_LVDS800x600Data_2 = SiS_LVDS800x600Data_2;
150 SiS_Pr->SiS_LVDS1024x768Data_1 = SiS_LVDS1024x768Data_1;
151 SiS_Pr->SiS_LVDS1024x768Data_2 = SiS_LVDS1024x768Data_2;
152 SiS_Pr->SiS_LVDS1280x1024Data_1 = SiS_LVDS1280x1024Data_1;
153 SiS_Pr->SiS_LVDS1280x1024Data_2 = SiS_LVDS1280x1024Data_2;
154 SiS_Pr->SiS_LVDS1400x1050Data_1 = SiS_LVDS1400x1050Data_1;
155 SiS_Pr->SiS_LVDS1400x1050Data_2 = SiS_LVDS1400x1050Data_2;
156 SiS_Pr->SiS_LVDS1600x1200Data_1 = SiS_LVDS1600x1200Data_1;
157 SiS_Pr->SiS_LVDS1600x1200Data_2 = SiS_LVDS1600x1200Data_2;
158 SiS_Pr->SiS_LVDS1280x768Data_1 = SiS_LVDS1280x768Data_1;
159 SiS_Pr->SiS_LVDS1280x768Data_2 = SiS_LVDS1280x768Data_2;
160 SiS_Pr->SiS_LVDS1024x600Data_1 = SiS_LVDS1024x600Data_1;
161 SiS_Pr->SiS_LVDS1024x600Data_2 = SiS_LVDS1024x600Data_2;
162 SiS_Pr->SiS_LVDS1152x768Data_1 = SiS_LVDS1152x768Data_1;
163 SiS_Pr->SiS_LVDS1152x768Data_2 = SiS_LVDS1152x768Data_2;
164 SiS_Pr->SiS_LVDSXXXxXXXData_1 = SiS_LVDSXXXxXXXData_1;
165 SiS_Pr->SiS_LVDS1280x960Data_1 = SiS_LVDS1280x960Data_1;
166 SiS_Pr->SiS_LVDS1280x960Data_2 = SiS_LVDS1280x960Data_2;
167 SiS_Pr->SiS_LVDS640x480Data_1 = SiS_LVDS640x480Data_1;
168 SiS_Pr->SiS_LVDS1280x960Data_1 = SiS_LVDS1280x1024Data_1;
169 SiS_Pr->SiS_LVDS1280x960Data_2 = SiS_LVDS1280x1024Data_2;
170 SiS_Pr->SiS_LVDS640x480Data_1 = SiS_LVDS640x480Data_1;
171 SiS_Pr->SiS_LVDS640x480Data_2 = SiS_LVDS640x480Data_2;
172
173 SiS_Pr->SiS_LVDS848x480Data_1 = SiS_LVDS848x480Data_1;
174 SiS_Pr->SiS_LVDS848x480Data_2 = SiS_LVDS848x480Data_2;
175 SiS_Pr->SiS_LVDSBARCO1024Data_1 = SiS_LVDSBARCO1024Data_1;
176 SiS_Pr->SiS_LVDSBARCO1024Data_2 = SiS_LVDSBARCO1024Data_2;
177 SiS_Pr->SiS_LVDSBARCO1366Data_1 = SiS_LVDSBARCO1366Data_1;
178 SiS_Pr->SiS_LVDSBARCO1366Data_2 = SiS_LVDSBARCO1366Data_2;
179
180 SiS_Pr->SiS_LVDSCRT11280x768_1 = SiS_LVDSCRT11280x768_1;
181 SiS_Pr->SiS_LVDSCRT11024x600_1 = SiS_LVDSCRT11024x600_1;
182 SiS_Pr->SiS_LVDSCRT11152x768_1 = SiS_LVDSCRT11152x768_1;
183 SiS_Pr->SiS_LVDSCRT11280x768_1_H = SiS_LVDSCRT11280x768_1_H;
184 SiS_Pr->SiS_LVDSCRT11024x600_1_H = SiS_LVDSCRT11024x600_1_H;
185 SiS_Pr->SiS_LVDSCRT11152x768_1_H = SiS_LVDSCRT11152x768_1_H;
186 SiS_Pr->SiS_LVDSCRT11280x768_2 = SiS_LVDSCRT11280x768_2;
187 SiS_Pr->SiS_LVDSCRT11024x600_2 = SiS_LVDSCRT11024x600_2;
188 SiS_Pr->SiS_LVDSCRT11152x768_2 = SiS_LVDSCRT11152x768_2;
189 SiS_Pr->SiS_LVDSCRT11280x768_2_H = SiS_LVDSCRT11280x768_2_H;
190 SiS_Pr->SiS_LVDSCRT11024x600_2_H = SiS_LVDSCRT11024x600_2_H;
191 SiS_Pr->SiS_LVDSCRT11152x768_2_H = SiS_LVDSCRT11152x768_2_H;
192 SiS_Pr->SiS_LVDSCRT1320x480_1 = SiS_LVDSCRT1320x480_1;
193 SiS_Pr->SiS_LVDSCRT1640x480_1 = SiS_LVDSCRT1640x480_1;
194 SiS_Pr->SiS_LVDSCRT1640x480_1_H = SiS_LVDSCRT1640x480_1_H;
195 SiS_Pr->SiS_LVDSCRT1640x480_2 = SiS_LVDSCRT1640x480_2;
196 SiS_Pr->SiS_LVDSCRT1640x480_2_H = SiS_LVDSCRT1640x480_2_H;
197 SiS_Pr->SiS_LVDSCRT1640x480_3 = SiS_LVDSCRT1640x480_3;
198 SiS_Pr->SiS_LVDSCRT1640x480_3_H = SiS_LVDSCRT1640x480_3_H;
199
200 SiS_Pr->SiS_CHTVUNTSCData = SiS_CHTVUNTSCData;
201 SiS_Pr->SiS_CHTVONTSCData = SiS_CHTVONTSCData;
202
203 SiS_Pr->SiS_CHTVUNTSCDesData = SiS_CHTVUNTSCDesData;
204 SiS_Pr->SiS_CHTVONTSCDesData = SiS_CHTVONTSCDesData;
205 SiS_Pr->SiS_CHTVUPALDesData = SiS_CHTVUPALDesData;
206 SiS_Pr->SiS_CHTVOPALDesData = SiS_CHTVOPALDesData;
207
208 SiS_Pr->SiS_PanelMinLVDS = Panel_800x600; /* lowest value LVDS/LCDA */
209 SiS_Pr->SiS_PanelMin301 = Panel_1024x768; /* lowest value 301 */
210 }
211
212 #ifdef SIS300
213 static void
InitTo300Pointer(SiS_Private * SiS_Pr,PSIS_HW_INFO HwInfo)214 InitTo300Pointer(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
215 {
216 InitCommonPointer(SiS_Pr, HwInfo);
217
218 SiS_StandTable[0x04].CRTC[4] = 0x2b;
219 SiS_StandTable[0x05].CRTC[4] = 0x2b;
220 SiS_StandTable[0x06].CRTC[4] = 0x54;
221 SiS_StandTable[0x06].CRTC[5] = 0x80;
222 SiS_StandTable[0x0d].CRTC[4] = 0x2b;
223 SiS_StandTable[0x0e].CRTC[4] = 0x54;
224 SiS_StandTable[0x0e].CRTC[5] = 0x80;
225 SiS_StandTable[0x11].CRTC[4] = 0x54;
226 SiS_StandTable[0x11].CRTC[5] = 0x80;
227 SiS_StandTable[0x11].CRTC[16] = 0x83;
228 SiS_StandTable[0x11].CRTC[17] = 0x85;
229 SiS_StandTable[0x12].CRTC[4] = 0x54;
230 SiS_StandTable[0x12].CRTC[5] = 0x80;
231 SiS_StandTable[0x12].CRTC[16] = 0x83;
232 SiS_StandTable[0x12].CRTC[17] = 0x85;
233 SiS_StandTable[0x13].CRTC[5] = 0xa0;
234 SiS_StandTable[0x17].CRTC[5] = 0xa0;
235 SiS_StandTable[0x1a].CRTC[4] = 0x54;
236 SiS_StandTable[0x1a].CRTC[5] = 0x80;
237 SiS_StandTable[0x1a].CRTC[16] = 0xea;
238 SiS_StandTable[0x1a].CRTC[17] = 0x8c;
239 SiS_StandTable[0x1b].CRTC[4] = 0x54;
240 SiS_StandTable[0x1b].CRTC[5] = 0x80;
241 SiS_StandTable[0x1b].CRTC[16] = 0xea;
242 SiS_StandTable[0x1b].CRTC[17] = 0x8c;
243 SiS_StandTable[0x1c].CRTC[4] = 0x54;
244 SiS_StandTable[0x1c].CRTC[5] = 0x80;
245
246 SiS_Pr->SiS_SModeIDTable = SiS300_SModeIDTable;
247 SiS_Pr->SiS_VBModeIDTable = SiS300_VBModeIDTable;
248 SiS_Pr->SiS_EModeIDTable = SiS300_EModeIDTable;
249 SiS_Pr->SiS_RefIndex = SiS300_RefIndex;
250 SiS_Pr->SiS_CRT1Table = SiS300_CRT1Table;
251 if(HwInfo->jChipType == SIS_300) {
252 SiS_Pr->SiS_MCLKData_0 = SiS300_MCLKData_300; /* 300 */
253 } else {
254 SiS_Pr->SiS_MCLKData_0 = SiS300_MCLKData_630; /* 630, 730 */
255 }
256 SiS_Pr->SiS_VCLKData = SiS300_VCLKData;
257 SiS_Pr->SiS_VBVCLKData = (SiS_VBVCLKDataStruct *)SiS300_VCLKData;
258
259 SiS_Pr->SiS_SR15 = SiS300_SR15;
260
261 #ifndef LINUX_XF86
262 SiS_Pr->pSiS_SR07 = &SiS300_SR07;
263 SiS_Pr->SiS_CR40 = SiS300_CR40;
264 SiS_Pr->SiS_CR49 = SiS300_CR49;
265 SiS_Pr->pSiS_SR1F = &SiS300_SR1F;
266 SiS_Pr->pSiS_SR21 = &SiS300_SR21;
267 SiS_Pr->pSiS_SR22 = &SiS300_SR22;
268 SiS_Pr->pSiS_SR23 = &SiS300_SR23;
269 SiS_Pr->pSiS_SR24 = &SiS300_SR24;
270 SiS_Pr->SiS_SR25 = SiS300_SR25;
271 SiS_Pr->pSiS_SR31 = &SiS300_SR31;
272 SiS_Pr->pSiS_SR32 = &SiS300_SR32;
273 SiS_Pr->pSiS_SR33 = &SiS300_SR33;
274 SiS_Pr->pSiS_CRT2Data_1_2 = &SiS300_CRT2Data_1_2;
275 SiS_Pr->pSiS_CRT2Data_4_D = &SiS300_CRT2Data_4_D;
276 SiS_Pr->pSiS_CRT2Data_4_E = &SiS300_CRT2Data_4_E;
277 SiS_Pr->pSiS_CRT2Data_4_10 = &SiS300_CRT2Data_4_10;
278 SiS_Pr->pSiS_RGBSenseData = &SiS300_RGBSenseData;
279 SiS_Pr->pSiS_VideoSenseData = &SiS300_VideoSenseData;
280 SiS_Pr->pSiS_YCSenseData = &SiS300_YCSenseData;
281 SiS_Pr->pSiS_RGBSenseData2 = &SiS300_RGBSenseData2;
282 SiS_Pr->pSiS_VideoSenseData2 = &SiS300_VideoSenseData2;
283 SiS_Pr->pSiS_YCSenseData2 = &SiS300_YCSenseData2;
284 #endif
285
286 SiS_Pr->SiS_PanelDelayTbl = SiS300_PanelDelayTbl;
287 SiS_Pr->SiS_PanelDelayTblLVDS = SiS300_PanelDelayTbl;
288
289 SiS_Pr->SiS_ExtLCD1024x768Data = SiS300_ExtLCD1024x768Data;
290 SiS_Pr->SiS_St2LCD1024x768Data = SiS300_St2LCD1024x768Data;
291 SiS_Pr->SiS_ExtLCD1280x1024Data = SiS300_ExtLCD1280x1024Data;
292 SiS_Pr->SiS_St2LCD1280x1024Data = SiS300_St2LCD1280x1024Data;
293
294 SiS_Pr->SiS_CRT2Part2_1024x768_1 = SiS300_CRT2Part2_1024x768_1;
295 SiS_Pr->SiS_CRT2Part2_1280x1024_1 = SiS300_CRT2Part2_1280x1024_1;
296 SiS_Pr->SiS_CRT2Part2_1024x768_2 = SiS300_CRT2Part2_1024x768_2;
297 SiS_Pr->SiS_CRT2Part2_1280x1024_2 = SiS300_CRT2Part2_1280x1024_2;
298 SiS_Pr->SiS_CRT2Part2_1024x768_3 = SiS300_CRT2Part2_1024x768_3;
299 SiS_Pr->SiS_CRT2Part2_1280x1024_3 = SiS300_CRT2Part2_1280x1024_3;
300
301 SiS_Pr->SiS_CHTVUPALData = SiS300_CHTVUPALData;
302 SiS_Pr->SiS_CHTVOPALData = SiS300_CHTVOPALData;
303 SiS_Pr->SiS_CHTVUPALMData = SiS_CHTVUNTSCData; /* not supported on 300 series */
304 SiS_Pr->SiS_CHTVOPALMData = SiS_CHTVONTSCData; /* not supported on 300 series */
305 SiS_Pr->SiS_CHTVUPALNData = SiS300_CHTVUPALData; /* not supported on 300 series */
306 SiS_Pr->SiS_CHTVOPALNData = SiS300_CHTVOPALData; /* not supported on 300 series */
307 SiS_Pr->SiS_CHTVSOPALData = SiS300_CHTVSOPALData;
308
309 SiS_Pr->SiS_PanelType00_1 = SiS300_PanelType00_1;
310 SiS_Pr->SiS_PanelType01_1 = SiS300_PanelType01_1;
311 SiS_Pr->SiS_PanelType02_1 = SiS300_PanelType02_1;
312 SiS_Pr->SiS_PanelType03_1 = SiS300_PanelType03_1;
313 SiS_Pr->SiS_PanelType04_1 = SiS300_PanelType04_1;
314 SiS_Pr->SiS_PanelType05_1 = SiS300_PanelType05_1;
315 SiS_Pr->SiS_PanelType06_1 = SiS300_PanelType06_1;
316 SiS_Pr->SiS_PanelType07_1 = SiS300_PanelType07_1;
317 SiS_Pr->SiS_PanelType08_1 = SiS300_PanelType08_1;
318 SiS_Pr->SiS_PanelType09_1 = SiS300_PanelType09_1;
319 SiS_Pr->SiS_PanelType0a_1 = SiS300_PanelType0a_1;
320 SiS_Pr->SiS_PanelType0b_1 = SiS300_PanelType0b_1;
321 SiS_Pr->SiS_PanelType0c_1 = SiS300_PanelType0c_1;
322 SiS_Pr->SiS_PanelType0d_1 = SiS300_PanelType0d_1;
323 SiS_Pr->SiS_PanelType0e_1 = SiS300_PanelType0e_1;
324 SiS_Pr->SiS_PanelType0f_1 = SiS300_PanelType0f_1;
325 SiS_Pr->SiS_PanelType00_2 = SiS300_PanelType00_2;
326 SiS_Pr->SiS_PanelType01_2 = SiS300_PanelType01_2;
327 SiS_Pr->SiS_PanelType02_2 = SiS300_PanelType02_2;
328 SiS_Pr->SiS_PanelType03_2 = SiS300_PanelType03_2;
329 SiS_Pr->SiS_PanelType04_2 = SiS300_PanelType04_2;
330 SiS_Pr->SiS_PanelType05_2 = SiS300_PanelType05_2;
331 SiS_Pr->SiS_PanelType06_2 = SiS300_PanelType06_2;
332 SiS_Pr->SiS_PanelType07_2 = SiS300_PanelType07_2;
333 SiS_Pr->SiS_PanelType08_2 = SiS300_PanelType08_2;
334 SiS_Pr->SiS_PanelType09_2 = SiS300_PanelType09_2;
335 SiS_Pr->SiS_PanelType0a_2 = SiS300_PanelType0a_2;
336 SiS_Pr->SiS_PanelType0b_2 = SiS300_PanelType0b_2;
337 SiS_Pr->SiS_PanelType0c_2 = SiS300_PanelType0c_2;
338 SiS_Pr->SiS_PanelType0d_2 = SiS300_PanelType0d_2;
339 SiS_Pr->SiS_PanelType0e_2 = SiS300_PanelType0e_2;
340 SiS_Pr->SiS_PanelType0f_2 = SiS300_PanelType0f_2;
341 SiS_Pr->SiS_PanelTypeNS_1 = SiS300_PanelTypeNS_1;
342 SiS_Pr->SiS_PanelTypeNS_2 = SiS300_PanelTypeNS_2;
343
344 if(SiS_Pr->SiS_CustomT == CUT_BARCO1366) {
345 SiS_Pr->SiS_PanelType04_1 = SiS300_PanelType04_1a;
346 SiS_Pr->SiS_PanelType04_2 = SiS300_PanelType04_2a;
347 }
348 if(SiS_Pr->SiS_CustomT == CUT_BARCO1024) {
349 SiS_Pr->SiS_PanelType04_1 = SiS300_PanelType04_1b;
350 SiS_Pr->SiS_PanelType04_2 = SiS300_PanelType04_2b;
351 }
352
353 SiS_Pr->SiS_LVDSCRT1800x600_1 = SiS300_LVDSCRT1800x600_1;
354 SiS_Pr->SiS_LVDSCRT1800x600_1_H = SiS300_LVDSCRT1800x600_1_H;
355 SiS_Pr->SiS_LVDSCRT1800x600_2 = SiS300_LVDSCRT1800x600_2;
356 SiS_Pr->SiS_LVDSCRT1800x600_2_H = SiS300_LVDSCRT1800x600_2_H;
357 SiS_Pr->SiS_LVDSCRT11024x768_1 = SiS300_LVDSCRT11024x768_1;
358 SiS_Pr->SiS_LVDSCRT11024x768_1_H = SiS300_LVDSCRT11024x768_1_H;
359 SiS_Pr->SiS_LVDSCRT11024x768_2 = SiS300_LVDSCRT11024x768_2;
360 SiS_Pr->SiS_LVDSCRT11024x768_2_H = SiS300_LVDSCRT11024x768_2_H;
361 SiS_Pr->SiS_LVDSCRT11280x1024_1 = SiS300_LVDSCRT11280x1024_1;
362 SiS_Pr->SiS_LVDSCRT11280x1024_1_H = SiS300_LVDSCRT11280x1024_1_H;
363 SiS_Pr->SiS_LVDSCRT11280x1024_2 = SiS300_LVDSCRT11280x1024_2;
364 SiS_Pr->SiS_LVDSCRT11280x1024_2_H = SiS300_LVDSCRT11280x1024_2_H;
365 SiS_Pr->SiS_LVDSCRT1XXXxXXX_1 = SiS300_LVDSCRT1XXXxXXX_1;
366 SiS_Pr->SiS_LVDSCRT1XXXxXXX_1_H = SiS300_LVDSCRT1XXXxXXX_1_H;
367
368 SiS_Pr->SiS_CHTVCRT1UNTSC = SiS300_CHTVCRT1UNTSC;
369 SiS_Pr->SiS_CHTVCRT1ONTSC = SiS300_CHTVCRT1ONTSC;
370 SiS_Pr->SiS_CHTVCRT1UPAL = SiS300_CHTVCRT1UPAL;
371 SiS_Pr->SiS_CHTVCRT1OPAL = SiS300_CHTVCRT1OPAL;
372 SiS_Pr->SiS_CHTVCRT1SOPAL = SiS300_CHTVCRT1SOPAL;
373 SiS_Pr->SiS_CHTVReg_UNTSC = SiS300_CHTVReg_UNTSC;
374 SiS_Pr->SiS_CHTVReg_ONTSC = SiS300_CHTVReg_ONTSC;
375 SiS_Pr->SiS_CHTVReg_UPAL = SiS300_CHTVReg_UPAL;
376 SiS_Pr->SiS_CHTVReg_OPAL = SiS300_CHTVReg_OPAL;
377 SiS_Pr->SiS_CHTVReg_UPALM = SiS300_CHTVReg_UNTSC; /* not supported on 300 series */
378 SiS_Pr->SiS_CHTVReg_OPALM = SiS300_CHTVReg_ONTSC; /* not supported on 300 series */
379 SiS_Pr->SiS_CHTVReg_UPALN = SiS300_CHTVReg_UPAL; /* not supported on 300 series */
380 SiS_Pr->SiS_CHTVReg_OPALN = SiS300_CHTVReg_OPAL; /* not supported on 300 series */
381 SiS_Pr->SiS_CHTVReg_SOPAL = SiS300_CHTVReg_SOPAL;
382 SiS_Pr->SiS_CHTVVCLKUNTSC = SiS300_CHTVVCLKUNTSC;
383 SiS_Pr->SiS_CHTVVCLKONTSC = SiS300_CHTVVCLKONTSC;
384 SiS_Pr->SiS_CHTVVCLKUPAL = SiS300_CHTVVCLKUPAL;
385 SiS_Pr->SiS_CHTVVCLKOPAL = SiS300_CHTVVCLKOPAL;
386 SiS_Pr->SiS_CHTVVCLKUPALM = SiS300_CHTVVCLKUNTSC; /* not supported on 300 series */
387 SiS_Pr->SiS_CHTVVCLKOPALM = SiS300_CHTVVCLKONTSC; /* not supported on 300 series */
388 SiS_Pr->SiS_CHTVVCLKUPALN = SiS300_CHTVVCLKUPAL; /* not supported on 300 series */
389 SiS_Pr->SiS_CHTVVCLKOPALN = SiS300_CHTVVCLKOPAL; /* not supported on 300 series */
390 SiS_Pr->SiS_CHTVVCLKSOPAL = SiS300_CHTVVCLKSOPAL;
391 }
392 #endif
393
394 #ifdef SIS315H
395 static void
InitTo310Pointer(SiS_Private * SiS_Pr,PSIS_HW_INFO HwInfo)396 InitTo310Pointer(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
397 {
398 InitCommonPointer(SiS_Pr, HwInfo);
399
400 SiS_StandTable[0x04].CRTC[4] = 0x2c;
401 SiS_StandTable[0x05].CRTC[4] = 0x2c;
402 SiS_StandTable[0x06].CRTC[4] = 0x55;
403 SiS_StandTable[0x06].CRTC[5] = 0x81;
404 SiS_StandTable[0x0d].CRTC[4] = 0x2c;
405 SiS_StandTable[0x0e].CRTC[4] = 0x55;
406 SiS_StandTable[0x0e].CRTC[5] = 0x81;
407 SiS_StandTable[0x11].CRTC[4] = 0x55;
408 SiS_StandTable[0x11].CRTC[5] = 0x81;
409 SiS_StandTable[0x11].CRTC[16] = 0x82;
410 SiS_StandTable[0x11].CRTC[17] = 0x84;
411 SiS_StandTable[0x12].CRTC[4] = 0x55;
412 SiS_StandTable[0x12].CRTC[5] = 0x81;
413 SiS_StandTable[0x12].CRTC[16] = 0x82;
414 SiS_StandTable[0x12].CRTC[17] = 0x84;
415 SiS_StandTable[0x13].CRTC[5] = 0xb1;
416 SiS_StandTable[0x17].CRTC[5] = 0xb1;
417 SiS_StandTable[0x1a].CRTC[4] = 0x55;
418 SiS_StandTable[0x1a].CRTC[5] = 0x81;
419 SiS_StandTable[0x1a].CRTC[16] = 0xe9;
420 SiS_StandTable[0x1a].CRTC[17] = 0x8b;
421 SiS_StandTable[0x1b].CRTC[4] = 0x55;
422 SiS_StandTable[0x1b].CRTC[5] = 0x81;
423 SiS_StandTable[0x1b].CRTC[16] = 0xe9;
424 SiS_StandTable[0x1b].CRTC[17] = 0x8b;
425 SiS_StandTable[0x1c].CRTC[4] = 0x55;
426 SiS_StandTable[0x1c].CRTC[5] = 0x81;
427
428 SiS_Pr->SiS_SModeIDTable = SiS310_SModeIDTable;
429 SiS_Pr->SiS_EModeIDTable = SiS310_EModeIDTable;
430 SiS_Pr->SiS_RefIndex = (SiS_Ext2Struct *)SiS310_RefIndex;
431 SiS_Pr->SiS_CRT1Table = SiS310_CRT1Table;
432 if(HwInfo->jChipType >= SIS_760) {
433 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_760; /* 760 */
434 } else if(HwInfo->jChipType >= SIS_661) {
435 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_660; /* 661/741 */
436 } else if(HwInfo->jChipType == SIS_330) {
437 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_330; /* 330 */
438 } else if(HwInfo->jChipType > SIS_315PRO) {
439 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_650; /* 550, 650, 740 */
440 } else {
441 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_315; /* 315 */
442 }
443 SiS_Pr->SiS_MCLKData_1 = SiS310_MCLKData_1;
444 SiS_Pr->SiS_VCLKData = SiS310_VCLKData;
445 SiS_Pr->SiS_VBVCLKData = SiS310_VBVCLKData;
446
447 SiS_Pr->SiS_SR15 = SiS310_SR15;
448
449 #ifndef LINUX_XF86
450 SiS_Pr->pSiS_SR07 = &SiS310_SR07;
451 SiS_Pr->SiS_CR40 = SiS310_CR40;
452 SiS_Pr->SiS_CR49 = SiS310_CR49;
453 SiS_Pr->pSiS_SR1F = &SiS310_SR1F;
454 SiS_Pr->pSiS_SR21 = &SiS310_SR21;
455 SiS_Pr->pSiS_SR22 = &SiS310_SR22;
456 SiS_Pr->pSiS_SR23 = &SiS310_SR23;
457 SiS_Pr->pSiS_SR24 = &SiS310_SR24;
458 SiS_Pr->SiS_SR25 = SiS310_SR25;
459 SiS_Pr->pSiS_SR31 = &SiS310_SR31;
460 SiS_Pr->pSiS_SR32 = &SiS310_SR32;
461 SiS_Pr->pSiS_SR33 = &SiS310_SR33;
462 SiS_Pr->pSiS_CRT2Data_1_2 = &SiS310_CRT2Data_1_2;
463 SiS_Pr->pSiS_CRT2Data_4_D = &SiS310_CRT2Data_4_D;
464 SiS_Pr->pSiS_CRT2Data_4_E = &SiS310_CRT2Data_4_E;
465 SiS_Pr->pSiS_CRT2Data_4_10 = &SiS310_CRT2Data_4_10;
466 SiS_Pr->pSiS_RGBSenseData = &SiS310_RGBSenseData;
467 SiS_Pr->pSiS_VideoSenseData = &SiS310_VideoSenseData;
468 SiS_Pr->pSiS_YCSenseData = &SiS310_YCSenseData;
469 SiS_Pr->pSiS_RGBSenseData2 = &SiS310_RGBSenseData2;
470 SiS_Pr->pSiS_VideoSenseData2 = &SiS310_VideoSenseData2;
471 SiS_Pr->pSiS_YCSenseData2 = &SiS310_YCSenseData2;
472 #endif
473
474 SiS_Pr->SiS_PanelDelayTbl = SiS310_PanelDelayTbl;
475 SiS_Pr->SiS_PanelDelayTblLVDS = SiS310_PanelDelayTblLVDS;
476
477 SiS_Pr->SiS_St2LCD1024x768Data = SiS310_St2LCD1024x768Data;
478 SiS_Pr->SiS_ExtLCD1024x768Data = SiS310_ExtLCD1024x768Data;
479 SiS_Pr->SiS_St2LCD1280x1024Data = SiS310_St2LCD1280x1024Data;
480 SiS_Pr->SiS_ExtLCD1280x1024Data = SiS310_ExtLCD1280x1024Data;
481
482 SiS_Pr->SiS_CRT2Part2_1024x768_1 = SiS310_CRT2Part2_1024x768_1;
483
484 SiS_Pr->SiS_PanelType00_1 = SiS310_PanelType00_1;
485 SiS_Pr->SiS_PanelType01_1 = SiS310_PanelType01_1;
486 SiS_Pr->SiS_PanelType02_1 = SiS310_PanelType02_1;
487 SiS_Pr->SiS_PanelType03_1 = SiS310_PanelType03_1;
488 SiS_Pr->SiS_PanelType04_1 = SiS310_PanelType04_1;
489 SiS_Pr->SiS_PanelType05_1 = SiS310_PanelType05_1;
490 SiS_Pr->SiS_PanelType06_1 = SiS310_PanelType06_1;
491 SiS_Pr->SiS_PanelType07_1 = SiS310_PanelType07_1;
492 SiS_Pr->SiS_PanelType08_1 = SiS310_PanelType08_1;
493 SiS_Pr->SiS_PanelType09_1 = SiS310_PanelType09_1;
494 SiS_Pr->SiS_PanelType0a_1 = SiS310_PanelType0a_1;
495 SiS_Pr->SiS_PanelType0b_1 = SiS310_PanelType0b_1;
496 SiS_Pr->SiS_PanelType0c_1 = SiS310_PanelType0c_1;
497 SiS_Pr->SiS_PanelType0d_1 = SiS310_PanelType0d_1;
498 SiS_Pr->SiS_PanelType0e_1 = SiS310_PanelType0e_1;
499 SiS_Pr->SiS_PanelType0f_1 = SiS310_PanelType0f_1;
500 SiS_Pr->SiS_PanelType00_2 = SiS310_PanelType00_2;
501 SiS_Pr->SiS_PanelType01_2 = SiS310_PanelType01_2;
502 SiS_Pr->SiS_PanelType02_2 = SiS310_PanelType02_2;
503 SiS_Pr->SiS_PanelType03_2 = SiS310_PanelType03_2;
504 SiS_Pr->SiS_PanelType04_2 = SiS310_PanelType04_2;
505 SiS_Pr->SiS_PanelType05_2 = SiS310_PanelType05_2;
506 SiS_Pr->SiS_PanelType06_2 = SiS310_PanelType06_2;
507 SiS_Pr->SiS_PanelType07_2 = SiS310_PanelType07_2;
508 SiS_Pr->SiS_PanelType08_2 = SiS310_PanelType08_2;
509 SiS_Pr->SiS_PanelType09_2 = SiS310_PanelType09_2;
510 SiS_Pr->SiS_PanelType0a_2 = SiS310_PanelType0a_2;
511 SiS_Pr->SiS_PanelType0b_2 = SiS310_PanelType0b_2;
512 SiS_Pr->SiS_PanelType0c_2 = SiS310_PanelType0c_2;
513 SiS_Pr->SiS_PanelType0d_2 = SiS310_PanelType0d_2;
514 SiS_Pr->SiS_PanelType0e_2 = SiS310_PanelType0e_2;
515 SiS_Pr->SiS_PanelType0f_2 = SiS310_PanelType0f_2;
516 SiS_Pr->SiS_PanelTypeNS_1 = SiS310_PanelTypeNS_1;
517 SiS_Pr->SiS_PanelTypeNS_2 = SiS310_PanelTypeNS_2;
518
519 SiS_Pr->SiS_CHTVUPALData = SiS310_CHTVUPALData;
520 SiS_Pr->SiS_CHTVOPALData = SiS310_CHTVOPALData;
521 SiS_Pr->SiS_CHTVUPALMData = SiS310_CHTVUPALMData;
522 SiS_Pr->SiS_CHTVOPALMData = SiS310_CHTVOPALMData;
523 SiS_Pr->SiS_CHTVUPALNData = SiS310_CHTVUPALNData;
524 SiS_Pr->SiS_CHTVOPALNData = SiS310_CHTVOPALNData;
525 SiS_Pr->SiS_CHTVSOPALData = SiS310_CHTVSOPALData;
526
527 SiS_Pr->SiS_LVDSCRT1800x600_1 = SiS310_LVDSCRT1800x600_1;
528 SiS_Pr->SiS_LVDSCRT11024x768_1 = SiS310_LVDSCRT11024x768_1;
529 SiS_Pr->SiS_LVDSCRT11280x1024_1 = SiS310_LVDSCRT11280x1024_1;
530 SiS_Pr->SiS_LVDSCRT11400x1050_1 = SiS310_LVDSCRT11400x1050_1;
531 SiS_Pr->SiS_LVDSCRT11600x1200_1 = SiS310_LVDSCRT11600x1200_1;
532 SiS_Pr->SiS_LVDSCRT1800x600_1_H = SiS310_LVDSCRT1800x600_1_H;
533 SiS_Pr->SiS_LVDSCRT11024x768_1_H = SiS310_LVDSCRT11024x768_1_H;
534 SiS_Pr->SiS_LVDSCRT11280x1024_1_H = SiS310_LVDSCRT11280x1024_1_H;
535 SiS_Pr->SiS_LVDSCRT11400x1050_1_H = SiS310_LVDSCRT11400x1050_1_H;
536 SiS_Pr->SiS_LVDSCRT11600x1200_1_H = SiS310_LVDSCRT11600x1200_1_H;
537 SiS_Pr->SiS_LVDSCRT1800x600_2 = SiS310_LVDSCRT1800x600_2;
538 SiS_Pr->SiS_LVDSCRT11024x768_2 = SiS310_LVDSCRT11024x768_2;
539 SiS_Pr->SiS_LVDSCRT11280x1024_2 = SiS310_LVDSCRT11280x1024_2;
540 SiS_Pr->SiS_LVDSCRT11400x1050_2 = SiS310_LVDSCRT11400x1050_2;
541 SiS_Pr->SiS_LVDSCRT11600x1200_2 = SiS310_LVDSCRT11600x1200_2;
542 SiS_Pr->SiS_LVDSCRT1800x600_2_H = SiS310_LVDSCRT1800x600_2_H;
543 SiS_Pr->SiS_LVDSCRT11024x768_2_H = SiS310_LVDSCRT11024x768_2_H;
544 SiS_Pr->SiS_LVDSCRT11280x1024_2_H = SiS310_LVDSCRT11280x1024_2_H;
545 SiS_Pr->SiS_LVDSCRT11400x1050_2_H = SiS310_LVDSCRT11400x1050_2_H;
546 SiS_Pr->SiS_LVDSCRT11600x1200_2_H = SiS310_LVDSCRT11600x1200_2_H;
547 SiS_Pr->SiS_LVDSCRT1XXXxXXX_1 = SiS310_LVDSCRT1XXXxXXX_1;
548 SiS_Pr->SiS_LVDSCRT1XXXxXXX_1_H = SiS310_LVDSCRT1XXXxXXX_1_H;
549 SiS_Pr->SiS_CHTVCRT1UNTSC = SiS310_CHTVCRT1UNTSC;
550 SiS_Pr->SiS_CHTVCRT1ONTSC = SiS310_CHTVCRT1ONTSC;
551 SiS_Pr->SiS_CHTVCRT1UPAL = SiS310_CHTVCRT1UPAL;
552 SiS_Pr->SiS_CHTVCRT1OPAL = SiS310_CHTVCRT1OPAL;
553 SiS_Pr->SiS_CHTVCRT1SOPAL = SiS310_CHTVCRT1OPAL;
554
555 SiS_Pr->SiS_CHTVReg_UNTSC = SiS310_CHTVReg_UNTSC;
556 SiS_Pr->SiS_CHTVReg_ONTSC = SiS310_CHTVReg_ONTSC;
557 SiS_Pr->SiS_CHTVReg_UPAL = SiS310_CHTVReg_UPAL;
558 SiS_Pr->SiS_CHTVReg_OPAL = SiS310_CHTVReg_OPAL;
559 SiS_Pr->SiS_CHTVReg_UPALM = SiS310_CHTVReg_UPALM;
560 SiS_Pr->SiS_CHTVReg_OPALM = SiS310_CHTVReg_OPALM;
561 SiS_Pr->SiS_CHTVReg_UPALN = SiS310_CHTVReg_UPALN;
562 SiS_Pr->SiS_CHTVReg_OPALN = SiS310_CHTVReg_OPALN;
563 SiS_Pr->SiS_CHTVReg_SOPAL = SiS310_CHTVReg_OPAL;
564
565 SiS_Pr->SiS_CHTVVCLKUNTSC = SiS310_CHTVVCLKUNTSC;
566 SiS_Pr->SiS_CHTVVCLKONTSC = SiS310_CHTVVCLKONTSC;
567 SiS_Pr->SiS_CHTVVCLKUPAL = SiS310_CHTVVCLKUPAL;
568 SiS_Pr->SiS_CHTVVCLKOPAL = SiS310_CHTVVCLKOPAL;
569 SiS_Pr->SiS_CHTVVCLKUPALM = SiS310_CHTVVCLKUPALM;
570 SiS_Pr->SiS_CHTVVCLKOPALM = SiS310_CHTVVCLKOPALM;
571 SiS_Pr->SiS_CHTVVCLKUPALN = SiS310_CHTVVCLKUPALN;
572 SiS_Pr->SiS_CHTVVCLKOPALN = SiS310_CHTVVCLKOPALN;
573 SiS_Pr->SiS_CHTVVCLKSOPAL = SiS310_CHTVVCLKOPAL;
574 }
575 #endif
576
577 static void
SiSInitPtr(SiS_Private * SiS_Pr,PSIS_HW_INFO HwInfo)578 SiSInitPtr(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
579 {
580 switch(HwInfo->jChipType) {
581 #ifdef SIS315H
582 case SIS_315H:
583 case SIS_315:
584 case SIS_315PRO:
585 case SIS_550:
586 case SIS_650:
587 case SIS_740:
588 case SIS_330:
589 case SIS_661:
590 case SIS_741:
591 case SIS_660:
592 case SIS_760:
593 InitTo310Pointer(SiS_Pr, HwInfo);
594 break;
595 #endif
596 #ifdef SIS300
597 case SIS_300:
598 case SIS_540:
599 case SIS_630:
600 case SIS_730:
601 InitTo300Pointer(SiS_Pr, HwInfo);
602 break;
603 #endif
604 default:
605 break;
606 }
607 }
608
609 /*********************************************/
610 /* HELPER: Get ModeID */
611 /*********************************************/
612
613 USHORT
SiS_GetModeID(int VGAEngine,ULONG VBFlags,int HDisplay,int VDisplay,int Depth,BOOLEAN FSTN,int LCDwidth,int LCDheight)614 SiS_GetModeID(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay,
615 int Depth, BOOLEAN FSTN, int LCDwidth, int LCDheight)
616 {
617 USHORT ModeIndex = 0;
618
619 switch(HDisplay)
620 {
621 case 320:
622 if(VDisplay == 200) ModeIndex = ModeIndex_320x200[Depth];
623 else if(VDisplay == 240) {
624 if(FSTN) ModeIndex = ModeIndex_320x240_FSTN[Depth];
625 else ModeIndex = ModeIndex_320x240[Depth];
626 }
627 break;
628 case 400:
629 if(VDisplay == 300) ModeIndex = ModeIndex_400x300[Depth];
630 break;
631 case 512:
632 if(VDisplay == 384) ModeIndex = ModeIndex_512x384[Depth];
633 break;
634 case 640:
635 if(VDisplay == 480) ModeIndex = ModeIndex_640x480[Depth];
636 else if(VDisplay == 400) ModeIndex = ModeIndex_640x400[Depth];
637 break;
638 case 720:
639 if(VDisplay == 480) ModeIndex = ModeIndex_720x480[Depth];
640 else if(VDisplay == 576) ModeIndex = ModeIndex_720x576[Depth];
641 break;
642 case 768:
643 if(VDisplay == 576) ModeIndex = ModeIndex_768x576[Depth];
644 break;
645 case 800:
646 if(VDisplay == 600) ModeIndex = ModeIndex_800x600[Depth];
647 else if(VDisplay == 480) ModeIndex = ModeIndex_800x480[Depth];
648 break;
649 case 848:
650 if(VDisplay == 480) ModeIndex = ModeIndex_848x480[Depth];
651 break;
652 case 856:
653 if(VDisplay == 480) ModeIndex = ModeIndex_856x480[Depth];
654 break;
655 case 1024:
656 if(VDisplay == 768) ModeIndex = ModeIndex_1024x768[Depth];
657 else if(VDisplay == 576) ModeIndex = ModeIndex_1024x576[Depth];
658 else if((!(VBFlags & CRT1_LCDA)) && (VGAEngine == SIS_300_VGA)) {
659 if(VDisplay == 600) ModeIndex = ModeIndex_1024x600[Depth];
660 }
661 break;
662 case 1152:
663 if(VDisplay == 864) ModeIndex = ModeIndex_1152x864[Depth];
664 if((!(VBFlags & CRT1_LCDA)) && (VGAEngine == SIS_300_VGA)) {
665 if(VDisplay == 768) ModeIndex = ModeIndex_1152x768[Depth];
666 }
667 break;
668 case 1280:
669 if(VDisplay == 1024) ModeIndex = ModeIndex_1280x1024[Depth];
670 else if(VDisplay == 800) {
671 if(VGAEngine == SIS_315_VGA) {
672 if((VBFlags & CRT1_LCDA) && (LCDwidth == 1280) && (LCDheight == 800)) {
673 ModeIndex = ModeIndex_1280x800[Depth];
674 } else if(!(VBFlags & CRT1_LCDA)) {
675 ModeIndex = ModeIndex_1280x800[Depth];
676 }
677 }
678 } else if(VDisplay == 720) {
679 if((VBFlags & CRT1_LCDA) && (LCDwidth == 1280) && (LCDheight == 720)) {
680 ModeIndex = ModeIndex_1280x720[Depth];
681 } else if(!(VBFlags & CRT1_LCDA)) {
682 ModeIndex = ModeIndex_1280x720[Depth];
683 }
684 } else if(!(VBFlags & CRT1_LCDA)) {
685 if(VDisplay == 960) ModeIndex = ModeIndex_1280x960[Depth];
686 else if(VDisplay == 768) {
687 if(VGAEngine == SIS_300_VGA) {
688 ModeIndex = ModeIndex_300_1280x768[Depth];
689 } else {
690 ModeIndex = ModeIndex_310_1280x768[Depth];
691 }
692 }
693 }
694 break;
695 case 1360:
696 if(VDisplay == 768) ModeIndex = ModeIndex_1360x768[Depth];
697 if(!(VBFlags & CRT1_LCDA)) {
698 if(VGAEngine == SIS_300_VGA) {
699 if(VDisplay == 1024) ModeIndex = ModeIndex_300_1360x1024[Depth];
700 }
701 }
702 break;
703 case 1400:
704 if(VGAEngine == SIS_315_VGA) {
705 if(VDisplay == 1050) {
706 if((VBFlags & CRT1_LCDA) &&
707 (((LCDwidth == 1400) && (LCDheight == 1050)) ||
708 ((LCDwidth == 1600) && (LCDheight == 1200)))) {
709 ModeIndex = ModeIndex_1400x1050[Depth];
710 } else if(!(VBFlags & CRT1_LCDA)) {
711 ModeIndex = ModeIndex_1400x1050[Depth];
712 }
713 }
714 }
715 break;
716 case 1600:
717 if(VDisplay == 1200) ModeIndex = ModeIndex_1600x1200[Depth];
718 break;
719 case 1680:
720 if(VGAEngine == SIS_315_VGA) {
721 if(VDisplay == 1050) ModeIndex = ModeIndex_1680x1050[Depth];
722 }
723 break;
724 case 1920:
725 if(!(VBFlags & CRT1_LCDA)) {
726 if(VDisplay == 1440) ModeIndex = ModeIndex_1920x1440[Depth];
727 }
728 break;
729 case 2048:
730 if(!(VBFlags & CRT1_LCDA)) {
731 if(VDisplay == 1536) {
732 if(VGAEngine == SIS_300_VGA) {
733 ModeIndex = ModeIndex_300_2048x1536[Depth];
734 } else {
735 ModeIndex = ModeIndex_310_2048x1536[Depth];
736 }
737 }
738 }
739 break;
740 }
741
742 return(ModeIndex);
743 }
744
745 USHORT
SiS_GetModeID_LCD(int VGAEngine,ULONG VBFlags,int HDisplay,int VDisplay,int Depth,BOOLEAN FSTN,USHORT CustomT,int LCDwidth,int LCDheight)746 SiS_GetModeID_LCD(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay,
747 int Depth, BOOLEAN FSTN, USHORT CustomT, int LCDwidth, int LCDheight)
748 {
749 USHORT ModeIndex = 0;
750
751 if(VBFlags & (VB_LVDS | VB_30xBDH)) {
752
753 switch(HDisplay)
754 {
755 case 320:
756 if(CustomT != CUT_PANEL848) {
757 if(VDisplay == 200) ModeIndex = ModeIndex_320x200[Depth];
758 else if(VDisplay == 240) {
759 if(!FSTN) ModeIndex = ModeIndex_320x240[Depth];
760 else if(VGAEngine == SIS_315_VGA) {
761 ModeIndex = ModeIndex_320x240_FSTN[Depth];
762 }
763 }
764 }
765 break;
766 case 400:
767 if(CustomT != CUT_PANEL848) {
768 if(!((VGAEngine == SIS_300_VGA) && (VBFlags & VB_TRUMPION))) {
769 if(VDisplay == 300) ModeIndex = ModeIndex_400x300[Depth];
770 }
771 }
772 break;
773 case 512:
774 if(CustomT != CUT_PANEL848) {
775 if(!((VGAEngine == SIS_300_VGA) && (VBFlags & VB_TRUMPION))) {
776 if(LCDwidth != 1024 || LCDheight != 600) {
777 if(VDisplay == 384) {
778 ModeIndex = ModeIndex_512x384[Depth];
779 }
780 }
781 }
782 }
783 break;
784 case 640:
785 if(VDisplay == 480) ModeIndex = ModeIndex_640x480[Depth];
786 else if(VDisplay == 400) {
787 if(CustomT != CUT_PANEL848) ModeIndex = ModeIndex_640x400[Depth];
788 }
789 break;
790 case 800:
791 if(VDisplay == 600) ModeIndex = ModeIndex_800x600[Depth];
792 break;
793 case 848:
794 if(CustomT == CUT_PANEL848) {
795 if(VDisplay == 480) ModeIndex = ModeIndex_848x480[Depth];
796 }
797 break;
798 case 1024:
799 if(VDisplay == 768) ModeIndex = ModeIndex_1024x768[Depth];
800 else if(VGAEngine == SIS_300_VGA) {
801 if((VDisplay == 600) && (LCDheight == 600)) {
802 ModeIndex = ModeIndex_1024x600[Depth];
803 }
804 }
805 break;
806 case 1152:
807 if(VGAEngine == SIS_300_VGA) {
808 if((VDisplay == 768) && (LCDheight == 768)) {
809 ModeIndex = ModeIndex_1152x768[Depth];
810 }
811 }
812 break;
813 case 1280:
814 if(VDisplay == 1024) ModeIndex = ModeIndex_1280x1024[Depth];
815 else if(VGAEngine == SIS_315_VGA) {
816 if((VDisplay == 768) && (LCDheight == 768)) {
817 ModeIndex = ModeIndex_310_1280x768[Depth];
818 }
819 if((VDisplay == 800) && (LCDheight == 800)) {
820 ModeIndex = ModeIndex_310_1280x768[Depth];
821 }
822 }
823 break;
824 case 1360:
825 if(VGAEngine == SIS_300_VGA) {
826 if(CustomT == CUT_BARCO1366) {
827 if(VDisplay == 1024) ModeIndex = ModeIndex_300_1360x1024[Depth];
828 }
829 }
830 if(CustomT == CUT_PANEL848) {
831 if(VDisplay == 768) ModeIndex = ModeIndex_1360x768[Depth];
832 }
833 break;
834 case 1400:
835 if(VGAEngine == SIS_315_VGA) {
836 if(VDisplay == 1050) ModeIndex = ModeIndex_1400x1050[Depth];
837 }
838 break;
839 case 1600:
840 if(VGAEngine == SIS_315_VGA) {
841 if(VDisplay == 1200) ModeIndex = ModeIndex_1600x1200[Depth];
842 }
843 break;
844 }
845
846 } else if(VBFlags & VB_SISBRIDGE) {
847
848 switch(HDisplay)
849 {
850 case 320:
851 if(VDisplay == 200) ModeIndex = ModeIndex_320x200[Depth];
852 else if(VDisplay == 240) ModeIndex = ModeIndex_320x240[Depth];
853 break;
854 case 400:
855 if(VDisplay == 300) ModeIndex = ModeIndex_400x300[Depth];
856 break;
857 case 512:
858 if(VDisplay == 384) ModeIndex = ModeIndex_512x384[Depth];
859 break;
860 case 640:
861 if(VDisplay == 480) ModeIndex = ModeIndex_640x480[Depth];
862 else if(VDisplay == 400) ModeIndex = ModeIndex_640x400[Depth];
863 break;
864 case 720:
865 if(VGAEngine == SIS_315_VGA) {
866 if(VDisplay == 480) ModeIndex = ModeIndex_720x480[Depth];
867 else if(VDisplay == 576) ModeIndex = ModeIndex_720x576[Depth];
868 }
869 break;
870 case 768:
871 if(VGAEngine == SIS_315_VGA) {
872 if(VDisplay == 576) ModeIndex = ModeIndex_768x576[Depth];
873 }
874 break;
875 case 800:
876 if(VDisplay == 600) ModeIndex = ModeIndex_800x600[Depth];
877 if(VGAEngine == SIS_315_VGA) {
878 if(VDisplay == 480) ModeIndex = ModeIndex_800x480[Depth];
879 }
880 break;
881 case 848:
882 if(VGAEngine == SIS_315_VGA) {
883 if(VDisplay == 480) ModeIndex = ModeIndex_848x480[Depth];
884 }
885 break;
886 case 856:
887 if(VGAEngine == SIS_315_VGA) {
888 if(VDisplay == 480) ModeIndex = ModeIndex_856x480[Depth];
889 }
890 break;
891 case 1024:
892 if(VDisplay == 768) ModeIndex = ModeIndex_1024x768[Depth];
893 if(VGAEngine == SIS_315_VGA) {
894 if(VDisplay == 576) ModeIndex = ModeIndex_1024x576[Depth];
895 }
896 break;
897 case 1152:
898 if(VGAEngine == SIS_315_VGA) {
899 if(VDisplay == 864) ModeIndex = ModeIndex_1152x864[Depth];
900 }
901 break;
902 case 1280:
903 if(VDisplay == 1024) ModeIndex = ModeIndex_1280x1024[Depth];
904 else if(VDisplay == 768) {
905 if((LCDheight == 768) || (LCDwidth == 1680) ||
906 (VBFlags & VB_SISTMDS)) {
907 if(VGAEngine == SIS_300_VGA) {
908 ModeIndex = ModeIndex_300_1280x768[Depth];
909 } else {
910 ModeIndex = ModeIndex_310_1280x768[Depth];
911 }
912 }
913 } else if(VDisplay == 960) {
914 if((LCDheight == 960) || (VBFlags & VB_SISTMDS)) {
915 ModeIndex = ModeIndex_1280x960[Depth];
916 }
917 } else if(VGAEngine == SIS_315_VGA) {
918 if(VDisplay == 800) {
919 if((LCDheight == 800) || (LCDwidth == 1680) ||
920 (VBFlags & VB_SISTMDS)) {
921 ModeIndex = ModeIndex_1280x800[Depth];
922 }
923 } else if(VDisplay == 720) {
924 if((LCDheight == 720) || (LCDwidth == 1680) || (LCDwidth == 1400) ||
925 (VBFlags & VB_SISTMDS)) {
926 ModeIndex = ModeIndex_1280x720[Depth];
927 }
928 }
929 }
930 break;
931 case 1360:
932 if(VGAEngine == SIS_315_VGA) {
933 if(VDisplay == 768) ModeIndex = ModeIndex_1360x768[Depth];
934 }
935 break;
936 case 1400:
937 if(VGAEngine == SIS_315_VGA) {
938 if(VBFlags & (VB_301B | VB_301C | VB_302B | VB_302LV | VB_302ELV)) {
939 if((LCDwidth == 1400) || (LCDwidth == 1600) || (LCDwidth == 1680)) {
940 ModeIndex = ModeIndex_1400x1050[Depth];
941 }
942 }
943 }
944 break;
945 case 1600:
946 if(VGAEngine == SIS_315_VGA) {
947 if(VBFlags & (VB_301C | VB_302B | VB_302LV | VB_302ELV)) {
948 if(VDisplay == 1200) ModeIndex = ModeIndex_1600x1200[Depth];
949 }
950 }
951 break;
952 case 1680:
953 if(VGAEngine == SIS_315_VGA) {
954 if(VBFlags & (VB_301C | VB_302B | VB_302LV | VB_302ELV)) {
955 if(VDisplay == 1050) ModeIndex = ModeIndex_1680x1050[Depth];
956 }
957 }
958 break;
959 }
960 }
961
962 return ModeIndex;
963 }
964
965 USHORT
SiS_GetModeID_TV(int VGAEngine,ULONG VBFlags,int HDisplay,int VDisplay,int Depth)966 SiS_GetModeID_TV(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay, int Depth)
967 {
968 USHORT ModeIndex = 0;
969
970 if(VBFlags & VB_CHRONTEL) {
971
972 switch(HDisplay)
973 {
974 case 512:
975 if(VGAEngine == SIS_315_VGA) {
976 if(VDisplay == 384) ModeIndex = ModeIndex_512x384[Depth];
977 }
978 break;
979 case 640:
980 if(VDisplay == 480) ModeIndex = ModeIndex_640x480[Depth];
981 else if(VDisplay == 400) ModeIndex = ModeIndex_640x400[Depth];
982 break;
983 case 800:
984 if(VDisplay == 600) ModeIndex = ModeIndex_800x600[Depth];
985 break;
986 case 1024:
987 if(VGAEngine == SIS_315_VGA) {
988 if(VDisplay == 768) ModeIndex = ModeIndex_1024x768[Depth];
989 }
990 break;
991 }
992
993 } else if(VBFlags & VB_SISTVBRIDGE) {
994
995 switch(HDisplay)
996 {
997 case 320:
998 if(VDisplay == 200) ModeIndex = ModeIndex_320x200[Depth];
999 else if(VDisplay == 240) ModeIndex = ModeIndex_320x240[Depth];
1000 break;
1001 case 400:
1002 if(VDisplay == 300) ModeIndex = ModeIndex_400x300[Depth];
1003 break;
1004 case 512:
1005 if( ((VBFlags & TV_YPBPR) && (VBFlags & (TV_YPBPR750P | TV_YPBPR1080I))) ||
1006 (VBFlags & TV_HIVISION) ||
1007 ((!(VBFlags & (TV_YPBPR | TV_PALM))) && (VBFlags & TV_PAL)) ) {
1008 if(VDisplay == 384) ModeIndex = ModeIndex_512x384[Depth];
1009 }
1010 break;
1011 case 640:
1012 if(VDisplay == 480) ModeIndex = ModeIndex_640x480[Depth];
1013 else if(VDisplay == 400) ModeIndex = ModeIndex_640x400[Depth];
1014 break;
1015 case 720:
1016 if((!(VBFlags & TV_HIVISION)) && (!((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I)))) {
1017 if(VDisplay == 480) {
1018 /* if((VBFlags & TV_YPBPR) || (VBFlags & (TV_NTSC | TV_PALM))) */
1019 ModeIndex = ModeIndex_720x480[Depth];
1020 } else if(VDisplay == 576) {
1021 if( ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR750P)) ||
1022 ((!(VBFlags & (TV_YPBPR | TV_PALM))) && (VBFlags & TV_PAL)) )
1023 ModeIndex = ModeIndex_720x576[Depth];
1024 }
1025 }
1026 break;
1027 case 768:
1028 if((!(VBFlags & TV_HIVISION)) && (!((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I)))) {
1029 if( ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR750P)) ||
1030 ((!(VBFlags & (TV_YPBPR | TV_PALM))) && (VBFlags & TV_PAL)) ) {
1031 if(VDisplay == 576) ModeIndex = ModeIndex_768x576[Depth];
1032 }
1033 }
1034 break;
1035 case 800:
1036 if(VDisplay == 600) ModeIndex = ModeIndex_800x600[Depth];
1037 else if(VDisplay == 480) {
1038 if((VBFlags & TV_HIVISION) || ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I))) {
1039 ModeIndex = ModeIndex_800x480[Depth];
1040 }
1041 }
1042 break;
1043 case 1024:
1044 if(VDisplay == 768) {
1045 if(VBFlags & (VB_301B|VB_301C|VB_302B|VB_301LV|VB_302LV|VB_302ELV)) {
1046 ModeIndex = ModeIndex_1024x768[Depth];
1047 }
1048 } else if(VDisplay == 576) {
1049 if((VBFlags & TV_HIVISION) || ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I))) {
1050 ModeIndex = ModeIndex_1024x576[Depth];
1051 }
1052 }
1053 break;
1054 case 1280:
1055 if(VDisplay == 720) {
1056 if((VBFlags & TV_HIVISION) ||
1057 ((VBFlags & TV_YPBPR) && (VBFlags & (TV_YPBPR1080I | TV_YPBPR750P)))) {
1058 ModeIndex = ModeIndex_1280x720[Depth];
1059 }
1060 } else if(VDisplay == 1024) {
1061 if((VBFlags & TV_HIVISION) ||
1062 ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I))) {
1063 ModeIndex = ModeIndex_1280x1024[Depth];
1064 }
1065 }
1066 break;
1067 }
1068 }
1069 return ModeIndex;
1070 }
1071
1072 USHORT
SiS_GetModeID_VGA2(int VGAEngine,ULONG VBFlags,int HDisplay,int VDisplay,int Depth)1073 SiS_GetModeID_VGA2(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay, int Depth)
1074 {
1075 USHORT ModeIndex = 0;
1076
1077 if(!(VBFlags & (VB_301|VB_301B|VB_301C|VB_302B))) return 0;
1078
1079 switch(HDisplay)
1080 {
1081 case 320:
1082 if(VDisplay == 200) ModeIndex = ModeIndex_320x200[Depth];
1083 else if(VDisplay == 240) ModeIndex = ModeIndex_320x240[Depth];
1084 break;
1085 case 400:
1086 if(VDisplay == 300) ModeIndex = ModeIndex_400x300[Depth];
1087 break;
1088 case 512:
1089 if(VDisplay == 384) ModeIndex = ModeIndex_512x384[Depth];
1090 break;
1091 case 640:
1092 if(VDisplay == 480) ModeIndex = ModeIndex_640x480[Depth];
1093 else if(VDisplay == 400) ModeIndex = ModeIndex_640x400[Depth];
1094 break;
1095 case 720:
1096 if(VDisplay == 480) ModeIndex = ModeIndex_720x480[Depth];
1097 else if(VDisplay == 576) ModeIndex = ModeIndex_720x576[Depth];
1098 break;
1099 case 768:
1100 if(VDisplay == 576) ModeIndex = ModeIndex_768x576[Depth];
1101 break;
1102 case 800:
1103 if(VDisplay == 600) ModeIndex = ModeIndex_800x600[Depth];
1104 else if(VDisplay == 480) ModeIndex = ModeIndex_800x480[Depth];
1105 break;
1106 case 848:
1107 if(VDisplay == 480) ModeIndex = ModeIndex_848x480[Depth];
1108 break;
1109 case 856:
1110 if(VDisplay == 480) ModeIndex = ModeIndex_856x480[Depth];
1111 break;
1112 case 1024:
1113 if(VDisplay == 768) ModeIndex = ModeIndex_1024x768[Depth];
1114 else if(VDisplay == 576) ModeIndex = ModeIndex_1024x576[Depth];
1115 break;
1116 case 1152:
1117 if(VDisplay == 864) ModeIndex = ModeIndex_1152x864[Depth];
1118 else if(VGAEngine == SIS_300_VGA) {
1119 if(VDisplay == 768) ModeIndex = ModeIndex_1152x768[Depth];
1120 }
1121 break;
1122 case 1280:
1123 if(VDisplay == 768) {
1124 if(VGAEngine == SIS_300_VGA) {
1125 ModeIndex = ModeIndex_300_1280x768[Depth];
1126 } else {
1127 ModeIndex = ModeIndex_310_1280x768[Depth];
1128 }
1129 } else if(VDisplay == 1024) ModeIndex = ModeIndex_1280x1024[Depth];
1130 else if(VDisplay == 720) ModeIndex = ModeIndex_1280x720[Depth];
1131 else if(VDisplay == 800) ModeIndex = ModeIndex_1280x800[Depth];
1132 else if(VDisplay == 960) ModeIndex = ModeIndex_1280x960[Depth];
1133 break;
1134 case 1360:
1135 if(VDisplay == 768) ModeIndex = ModeIndex_1360x768[Depth];
1136 break;
1137 case 1400:
1138 if(VGAEngine == SIS_315_VGA) {
1139 if(VDisplay == 1050) ModeIndex = ModeIndex_1400x1050[Depth];
1140 }
1141 break;
1142 case 1600:
1143 if(VGAEngine == SIS_315_VGA) {
1144 if(VBFlags & (VB_301B|VB_301C|VB_302B)) {
1145 if(VDisplay == 1200) ModeIndex = ModeIndex_1600x1200[Depth];
1146 }
1147 }
1148 break;
1149 case 1680:
1150 if(VGAEngine == SIS_315_VGA) {
1151 if(VBFlags & (VB_301B|VB_301C|VB_302B)) {
1152 if(VDisplay == 1050) ModeIndex = ModeIndex_1680x1050[Depth];
1153 }
1154 }
1155 break;
1156 }
1157
1158 return ModeIndex;
1159 }
1160
1161
1162 /*********************************************/
1163 /* HELPER: SetReg, GetReg */
1164 /*********************************************/
1165
1166 void
SiS_SetReg(SISIOADDRESS port,USHORT index,USHORT data)1167 SiS_SetReg(SISIOADDRESS port, USHORT index, USHORT data)
1168 {
1169 OutPortByte(port,index);
1170 OutPortByte(port + 1,data);
1171 }
1172
1173 void
SiS_SetRegByte(SISIOADDRESS port,USHORT data)1174 SiS_SetRegByte(SISIOADDRESS port, USHORT data)
1175 {
1176 OutPortByte(port,data);
1177 }
1178
1179 void
SiS_SetRegShort(SISIOADDRESS port,USHORT data)1180 SiS_SetRegShort(SISIOADDRESS port, USHORT data)
1181 {
1182 OutPortWord(port,data);
1183 }
1184
1185 void
SiS_SetRegLong(SISIOADDRESS port,ULONG data)1186 SiS_SetRegLong(SISIOADDRESS port, ULONG data)
1187 {
1188 OutPortLong(port,data);
1189 }
1190
1191 UCHAR
SiS_GetReg(SISIOADDRESS port,USHORT index)1192 SiS_GetReg(SISIOADDRESS port, USHORT index)
1193 {
1194 OutPortByte(port,index);
1195 return(InPortByte(port + 1));
1196 }
1197
1198 UCHAR
SiS_GetRegByte(SISIOADDRESS port)1199 SiS_GetRegByte(SISIOADDRESS port)
1200 {
1201 return(InPortByte(port));
1202 }
1203
1204 USHORT
SiS_GetRegShort(SISIOADDRESS port)1205 SiS_GetRegShort(SISIOADDRESS port)
1206 {
1207 return(InPortWord(port));
1208 }
1209
1210 ULONG
SiS_GetRegLong(SISIOADDRESS port)1211 SiS_GetRegLong(SISIOADDRESS port)
1212 {
1213 return(InPortLong(port));
1214 }
1215
1216 void
SiS_SetRegANDOR(SISIOADDRESS Port,USHORT Index,USHORT DataAND,USHORT DataOR)1217 SiS_SetRegANDOR(SISIOADDRESS Port,USHORT Index,USHORT DataAND,USHORT DataOR)
1218 {
1219 USHORT temp;
1220
1221 temp = SiS_GetReg(Port,Index);
1222 temp = (temp & (DataAND)) | DataOR;
1223 SiS_SetReg(Port,Index,temp);
1224 }
1225
1226 void
SiS_SetRegAND(SISIOADDRESS Port,USHORT Index,USHORT DataAND)1227 SiS_SetRegAND(SISIOADDRESS Port,USHORT Index,USHORT DataAND)
1228 {
1229 USHORT temp;
1230
1231 temp = SiS_GetReg(Port,Index);
1232 temp &= DataAND;
1233 SiS_SetReg(Port,Index,temp);
1234 }
1235
1236 void
SiS_SetRegOR(SISIOADDRESS Port,USHORT Index,USHORT DataOR)1237 SiS_SetRegOR(SISIOADDRESS Port,USHORT Index,USHORT DataOR)
1238 {
1239 USHORT temp;
1240
1241 temp = SiS_GetReg(Port,Index);
1242 temp |= DataOR;
1243 SiS_SetReg(Port,Index,temp);
1244 }
1245
1246 /*********************************************/
1247 /* HELPER: DisplayOn, DisplayOff */
1248 /*********************************************/
1249
1250 void
SiS_DisplayOn(SiS_Private * SiS_Pr)1251 SiS_DisplayOn(SiS_Private *SiS_Pr)
1252 {
1253 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x01,0xDF);
1254 }
1255
1256 void
SiS_DisplayOff(SiS_Private * SiS_Pr)1257 SiS_DisplayOff(SiS_Private *SiS_Pr)
1258 {
1259 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x01,0x20);
1260 }
1261
1262
1263 /*********************************************/
1264 /* HELPER: Init Port Addresses */
1265 /*********************************************/
1266
1267 void
SiSRegInit(SiS_Private * SiS_Pr,SISIOADDRESS BaseAddr)1268 SiSRegInit(SiS_Private *SiS_Pr, SISIOADDRESS BaseAddr)
1269 {
1270 SiS_Pr->SiS_P3c4 = BaseAddr + 0x14;
1271 SiS_Pr->SiS_P3d4 = BaseAddr + 0x24;
1272 SiS_Pr->SiS_P3c0 = BaseAddr + 0x10;
1273 SiS_Pr->SiS_P3ce = BaseAddr + 0x1e;
1274 SiS_Pr->SiS_P3c2 = BaseAddr + 0x12;
1275 SiS_Pr->SiS_P3ca = BaseAddr + 0x1a;
1276 SiS_Pr->SiS_P3c6 = BaseAddr + 0x16;
1277 SiS_Pr->SiS_P3c7 = BaseAddr + 0x17;
1278 SiS_Pr->SiS_P3c8 = BaseAddr + 0x18;
1279 SiS_Pr->SiS_P3c9 = BaseAddr + 0x19;
1280 SiS_Pr->SiS_P3cb = BaseAddr + 0x1b;
1281 SiS_Pr->SiS_P3cd = BaseAddr + 0x1d;
1282 SiS_Pr->SiS_P3da = BaseAddr + 0x2a;
1283 SiS_Pr->SiS_Part1Port = BaseAddr + SIS_CRT2_PORT_04; /* Digital video interface registers (LCD) */
1284 SiS_Pr->SiS_Part2Port = BaseAddr + SIS_CRT2_PORT_10; /* 301 TV Encoder registers */
1285 SiS_Pr->SiS_Part3Port = BaseAddr + SIS_CRT2_PORT_12; /* 301 Macrovision registers */
1286 SiS_Pr->SiS_Part4Port = BaseAddr + SIS_CRT2_PORT_14; /* 301 VGA2 (and LCD) registers */
1287 SiS_Pr->SiS_Part5Port = BaseAddr + SIS_CRT2_PORT_14 + 2; /* 301 palette address port registers */
1288 SiS_Pr->SiS_DDC_Port = BaseAddr + 0x14; /* DDC Port ( = P3C4, SR11/0A) */
1289 SiS_Pr->SiS_VidCapt = BaseAddr + SIS_VIDEO_CAPTURE;
1290 SiS_Pr->SiS_VidPlay = BaseAddr + SIS_VIDEO_PLAYBACK;
1291 }
1292
1293 /*********************************************/
1294 /* HELPER: GetSysFlags */
1295 /*********************************************/
1296
1297 static void
SiS_GetSysFlags(SiS_Private * SiS_Pr,PSIS_HW_INFO HwInfo)1298 SiS_GetSysFlags(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
1299 {
1300 unsigned char cr5f, temp1, temp2;
1301
1302 /* 661 and newer: NEVER write non-zero to SR11[7:4] */
1303 /* (SR11 is used for DDC and in enable/disablebridge) */
1304 SiS_Pr->SiS_SensibleSR11 = FALSE;
1305 SiS_Pr->SiS_MyCR63 = 0x63;
1306 if(HwInfo->jChipType >= SIS_330) {
1307 SiS_Pr->SiS_MyCR63 = 0x53;
1308 if(HwInfo->jChipType >= SIS_661) {
1309 SiS_Pr->SiS_SensibleSR11 = TRUE;
1310 }
1311 }
1312
1313 /* You should use the macros, not these flags directly */
1314
1315 SiS_Pr->SiS_SysFlags = 0;
1316 if(HwInfo->jChipType == SIS_650) {
1317 cr5f = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5f) & 0xf0;
1318 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x5c,0x07);
1319 temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5c) & 0xf8;
1320 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x5c,0xf8);
1321 temp2 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5c) & 0xf8;
1322 if((!temp1) || (temp2)) {
1323 switch(cr5f) {
1324 case 0x80:
1325 case 0x90:
1326 case 0xc0:
1327 SiS_Pr->SiS_SysFlags |= SF_IsM650; break;
1328 case 0xa0:
1329 case 0xb0:
1330 case 0xe0:
1331 SiS_Pr->SiS_SysFlags |= SF_Is651; break;
1332 }
1333 } else {
1334 switch(cr5f) {
1335 case 0x90:
1336 temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5c) & 0xf8;
1337 switch(temp1) {
1338 case 0x00: SiS_Pr->SiS_SysFlags |= SF_IsM652; break;
1339 case 0x40: SiS_Pr->SiS_SysFlags |= SF_IsM653; break;
1340 default: SiS_Pr->SiS_SysFlags |= SF_IsM650; break;
1341 }
1342 break;
1343 case 0xb0:
1344 SiS_Pr->SiS_SysFlags |= SF_Is652; break;
1345 default:
1346 SiS_Pr->SiS_SysFlags |= SF_IsM650; break;
1347 }
1348 }
1349 }
1350 if(HwInfo->jChipType == SIS_760) {
1351 temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x78);
1352 if(temp1 & 0x30) SiS_Pr->SiS_SysFlags |= SF_760LFB;
1353 }
1354 }
1355
1356 /*********************************************/
1357 /* HELPER: Init PCI & Engines */
1358 /*********************************************/
1359
1360 static void
SiSInitPCIetc(SiS_Private * SiS_Pr,PSIS_HW_INFO HwInfo)1361 SiSInitPCIetc(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
1362 {
1363 switch(HwInfo->jChipType) {
1364 case SIS_300:
1365 case SIS_540:
1366 case SIS_630:
1367 case SIS_730:
1368 /* Set - PCI LINEAR ADDRESSING ENABLE (0x80)
1369 * - RELOCATED VGA IO (0x20)
1370 * - MMIO ENABLE (0x1)
1371 */
1372 SiS_SetReg(SiS_Pr->SiS_P3c4,0x20,0xa1);
1373 /* - Enable 2D (0x40)
1374 * - Enable 3D (0x02)
1375 * - Enable 3D Vertex command fetch (0x10) ?
1376 * - Enable 3D command parser (0x08) ?
1377 */
1378 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x5A);
1379 break;
1380 case SIS_315H:
1381 case SIS_315:
1382 case SIS_315PRO:
1383 case SIS_650:
1384 case SIS_740:
1385 case SIS_330:
1386 case SIS_661:
1387 case SIS_741:
1388 case SIS_660:
1389 case SIS_760:
1390 SiS_SetReg(SiS_Pr->SiS_P3c4,0x20,0xa1);
1391 /* - Enable 2D (0x40)
1392 * - Enable 3D (0x02)
1393 * - Enable 3D vertex command fetch (0x10)
1394 * - Enable 3D command parser (0x08)
1395 * - Enable 3D G/L transformation engine (0x80)
1396 */
1397 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0xDA);
1398 break;
1399 case SIS_550:
1400 SiS_SetReg(SiS_Pr->SiS_P3c4,0x20,0xa1);
1401 /* No 3D engine ! */
1402 /* - Enable 2D (0x40)
1403 */
1404 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x40);
1405 }
1406 }
1407
1408 /*********************************************/
1409 /* HELPER: SetLVDSetc */
1410 /*********************************************/
1411
1412 void
SiSSetLVDSetc(SiS_Private * SiS_Pr,PSIS_HW_INFO HwInfo)1413 SiSSetLVDSetc(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
1414 {
1415 USHORT temp;
1416
1417 SiS_Pr->SiS_IF_DEF_LVDS = 0;
1418 SiS_Pr->SiS_IF_DEF_TRUMPION = 0;
1419 SiS_Pr->SiS_IF_DEF_CH70xx = 0;
1420 SiS_Pr->SiS_IF_DEF_DSTN = 0;
1421 SiS_Pr->SiS_IF_DEF_FSTN = 0;
1422 SiS_Pr->SiS_IF_DEF_CONEX = 0;
1423
1424 SiS_Pr->SiS_ChrontelInit = 0;
1425
1426 /* Check for SiS30x first */
1427 temp = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x00);
1428 if((temp == 1) || (temp == 2)) return;
1429
1430 switch(HwInfo->jChipType) {
1431 #ifdef SIS300
1432 case SIS_540:
1433 case SIS_630:
1434 case SIS_730:
1435 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x37);
1436 temp = (temp & 0x0E) >> 1;
1437 if((temp >= 2) && (temp <= 5)) SiS_Pr->SiS_IF_DEF_LVDS = 1;
1438 if(temp == 3) SiS_Pr->SiS_IF_DEF_TRUMPION = 1;
1439 if((temp == 4) || (temp == 5)) {
1440 /* Save power status (and error check) - UNUSED */
1441 SiS_Pr->SiS_Backup70xx = SiS_GetCH700x(SiS_Pr, 0x0e);
1442 SiS_Pr->SiS_IF_DEF_CH70xx = 1;
1443 }
1444 break;
1445 #endif
1446 #ifdef SIS315H
1447 case SIS_550:
1448 case SIS_650:
1449 case SIS_740:
1450 case SIS_330:
1451 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x37);
1452 temp = (temp & 0x0E) >> 1;
1453 if((temp >= 2) && (temp <= 3)) SiS_Pr->SiS_IF_DEF_LVDS = 1;
1454 if(temp == 3) SiS_Pr->SiS_IF_DEF_CH70xx = 2;
1455 break;
1456 case SIS_661:
1457 case SIS_741:
1458 case SIS_660:
1459 case SIS_760:
1460 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38);
1461 temp = (temp & 0xe0) >> 5;
1462 if((temp >= 2) && (temp <= 3)) SiS_Pr->SiS_IF_DEF_LVDS = 1;
1463 if(temp == 3) SiS_Pr->SiS_IF_DEF_CH70xx = 2;
1464 if(temp == 4) SiS_Pr->SiS_IF_DEF_CONEX = 1; /* Not yet supported */
1465 break;
1466 #endif
1467 default:
1468 break;
1469 }
1470 }
1471
1472 /*********************************************/
1473 /* HELPER: Enable DSTN/FSTN */
1474 /*********************************************/
1475
1476 void
SiS_SetEnableDstn(SiS_Private * SiS_Pr,int enable)1477 SiS_SetEnableDstn(SiS_Private *SiS_Pr, int enable)
1478 {
1479 SiS_Pr->SiS_IF_DEF_DSTN = enable ? 1 : 0;
1480 }
1481
1482 void
SiS_SetEnableFstn(SiS_Private * SiS_Pr,int enable)1483 SiS_SetEnableFstn(SiS_Private *SiS_Pr, int enable)
1484 {
1485 SiS_Pr->SiS_IF_DEF_FSTN = enable ? 1 : 0;
1486 }
1487
1488 /*********************************************/
1489 /* HELPER: Determine ROM usage */
1490 /*********************************************/
1491
1492 BOOLEAN
SiSDetermineROMLayout661(SiS_Private * SiS_Pr,PSIS_HW_INFO HwInfo)1493 SiSDetermineROMLayout661(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
1494 {
1495 UCHAR *ROMAddr = HwInfo->pjVirtualRomBase;
1496 USHORT romversoffs, romvmaj = 1, romvmin = 0;
1497
1498 if(HwInfo->jChipType >= SIS_661) {
1499 if((ROMAddr[0x1a] == 'N') &&
1500 (ROMAddr[0x1b] == 'e') &&
1501 (ROMAddr[0x1c] == 'w') &&
1502 (ROMAddr[0x1d] == 'V')) {
1503 return TRUE;
1504 }
1505 romversoffs = ROMAddr[0x16] | (ROMAddr[0x17] << 8);
1506 if(romversoffs) {
1507 if((ROMAddr[romversoffs+1] == '.') || (ROMAddr[romversoffs+4] == '.')) {
1508 romvmaj = ROMAddr[romversoffs] - '0';
1509 romvmin = ((ROMAddr[romversoffs+2] -'0') * 10) + (ROMAddr[romversoffs+3] - '0');
1510 }
1511 }
1512 if((romvmaj != 0) || (romvmin >= 92)) {
1513 return TRUE;
1514 }
1515 } else if(IS_SIS650740) {
1516 if((ROMAddr[0x1a] == 'N') &&
1517 (ROMAddr[0x1b] == 'e') &&
1518 (ROMAddr[0x1c] == 'w') &&
1519 (ROMAddr[0x1d] == 'V')) {
1520 return TRUE;
1521 }
1522 }
1523 return FALSE;
1524 }
1525
1526 static void
SiSDetermineROMUsage(SiS_Private * SiS_Pr,PSIS_HW_INFO HwInfo)1527 SiSDetermineROMUsage(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
1528 {
1529 UCHAR *ROMAddr = HwInfo->pjVirtualRomBase;
1530 USHORT romptr = 0;
1531
1532 SiS_Pr->SiS_UseROM = FALSE;
1533 SiS_Pr->SiS_ROMNew = FALSE;
1534
1535 if((ROMAddr) && (HwInfo->UseROM)) {
1536 if(HwInfo->jChipType == SIS_300) {
1537 /* 300: We check if the code starts below 0x220 by
1538 * checking the jmp instruction at the beginning
1539 * of the BIOS image.
1540 */
1541 if((ROMAddr[3] == 0xe9) && ((ROMAddr[5] << 8) | ROMAddr[4]) > 0x21a)
1542 SiS_Pr->SiS_UseROM = TRUE;
1543 } else if(HwInfo->jChipType < SIS_315H) {
1544 /* Sony's VAIO BIOS 1.09 follows the standard, so perhaps
1545 * the others do as well
1546 */
1547 SiS_Pr->SiS_UseROM = TRUE;
1548 } else {
1549 /* 315/330 series stick to the standard(s) */
1550 SiS_Pr->SiS_UseROM = TRUE;
1551 if((SiS_Pr->SiS_ROMNew = SiSDetermineROMLayout661(SiS_Pr, HwInfo))) {
1552 /* Find out about LCD data table entry size */
1553 if((romptr = SISGETROMW(0x0102))) {
1554 if(ROMAddr[romptr + (32 * 16)] == 0xff)
1555 SiS_Pr->SiS661LCD2TableSize = 32;
1556 else if(ROMAddr[romptr + (34 * 16)] == 0xff)
1557 SiS_Pr->SiS661LCD2TableSize = 34;
1558 else if(ROMAddr[romptr + (36 * 16)] == 0xff)
1559 SiS_Pr->SiS661LCD2TableSize = 36; /* 0.94 final */
1560 }
1561 }
1562 }
1563 }
1564 }
1565
1566 /*********************************************/
1567 /* HELPER: SET SEGMENT REGISTERS */
1568 /*********************************************/
1569
1570 static void
SiS_SetSegRegLower(SiS_Private * SiS_Pr,USHORT value)1571 SiS_SetSegRegLower(SiS_Private *SiS_Pr, USHORT value)
1572 {
1573 USHORT temp;
1574
1575 value &= 0x00ff;
1576 temp = SiS_GetRegByte(SiS_Pr->SiS_P3cb) & 0xf0;
1577 temp |= (value >> 4);
1578 SiS_SetRegByte(SiS_Pr->SiS_P3cb, temp);
1579 temp = SiS_GetRegByte(SiS_Pr->SiS_P3cd) & 0xf0;
1580 temp |= (value & 0x0f);
1581 SiS_SetRegByte(SiS_Pr->SiS_P3cd, temp);
1582 }
1583
1584 static void
SiS_SetSegRegUpper(SiS_Private * SiS_Pr,USHORT value)1585 SiS_SetSegRegUpper(SiS_Private *SiS_Pr, USHORT value)
1586 {
1587 USHORT temp;
1588
1589 value &= 0x00ff;
1590 temp = SiS_GetRegByte(SiS_Pr->SiS_P3cb) & 0x0f;
1591 temp |= (value & 0xf0);
1592 SiS_SetRegByte(SiS_Pr->SiS_P3cb, temp);
1593 temp = SiS_GetRegByte(SiS_Pr->SiS_P3cd) & 0x0f;
1594 temp |= (value << 4);
1595 SiS_SetRegByte(SiS_Pr->SiS_P3cd, temp);
1596 }
1597
1598 static void
SiS_SetSegmentReg(SiS_Private * SiS_Pr,USHORT value)1599 SiS_SetSegmentReg(SiS_Private *SiS_Pr, USHORT value)
1600 {
1601 SiS_SetSegRegLower(SiS_Pr, value);
1602 SiS_SetSegRegUpper(SiS_Pr, value);
1603 }
1604
1605 static void
SiS_ResetSegmentReg(SiS_Private * SiS_Pr)1606 SiS_ResetSegmentReg(SiS_Private *SiS_Pr)
1607 {
1608 SiS_SetSegmentReg(SiS_Pr, 0);
1609 }
1610
1611 static void
SiS_SetSegmentRegOver(SiS_Private * SiS_Pr,USHORT value)1612 SiS_SetSegmentRegOver(SiS_Private *SiS_Pr, USHORT value)
1613 {
1614 USHORT temp = value >> 8;
1615
1616 temp &= 0x07;
1617 temp |= (temp << 4);
1618 SiS_SetReg(SiS_Pr->SiS_P3c4,0x1d,temp);
1619 SiS_SetSegmentReg(SiS_Pr, value);
1620 }
1621
1622 static void
SiS_ResetSegmentRegOver(SiS_Private * SiS_Pr)1623 SiS_ResetSegmentRegOver(SiS_Private *SiS_Pr)
1624 {
1625 SiS_SetSegmentRegOver(SiS_Pr, 0);
1626 }
1627
1628 static void
SiS_ResetSegmentRegisters(SiS_Private * SiS_Pr,PSIS_HW_INFO HwInfo)1629 SiS_ResetSegmentRegisters(SiS_Private *SiS_Pr,PSIS_HW_INFO HwInfo)
1630 {
1631 if((IS_SIS65x) || (HwInfo->jChipType >= SIS_661)) {
1632 SiS_ResetSegmentReg(SiS_Pr);
1633 SiS_ResetSegmentRegOver(SiS_Pr);
1634 }
1635 }
1636
1637 /*********************************************/
1638 /* HELPER: GetVBType */
1639 /*********************************************/
1640
1641 void
SiS_GetVBType(SiS_Private * SiS_Pr,PSIS_HW_INFO HwInfo)1642 SiS_GetVBType(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
1643 {
1644 USHORT flag=0, rev=0, nolcd=0;
1645
1646 SiS_Pr->SiS_VBType = 0;
1647
1648 if((SiS_Pr->SiS_IF_DEF_LVDS) || (SiS_Pr->SiS_IF_DEF_CONEX))
1649 return;
1650
1651 flag = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x00);
1652
1653 if(flag > 3) return;
1654
1655 rev = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x01);
1656
1657 if(flag >= 2) {
1658 SiS_Pr->SiS_VBType = VB_SIS302B;
1659 } else if(flag == 1) {
1660 if(rev >= 0xC0) {
1661 SiS_Pr->SiS_VBType = VB_SIS301C;
1662 } else if(rev >= 0xB0) {
1663 SiS_Pr->SiS_VBType = VB_SIS301B;
1664 /* Check if 30xB DH version (no LCD support, use Panel Link instead) */
1665 nolcd = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x23);
1666 if(!(nolcd & 0x02)) SiS_Pr->SiS_VBType |= VB_NoLCD;
1667 } else {
1668 SiS_Pr->SiS_VBType = VB_SIS301;
1669 }
1670 }
1671 if(SiS_Pr->SiS_VBType & (VB_SIS301B | VB_SIS301C | VB_SIS302B)) {
1672 if(rev >= 0xE0) {
1673 flag = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x39);
1674 if(flag == 0xff) SiS_Pr->SiS_VBType = VB_SIS302LV;
1675 else SiS_Pr->SiS_VBType = VB_SIS301C; /* VB_SIS302ELV; */
1676 } else if(rev >= 0xD0) {
1677 SiS_Pr->SiS_VBType = VB_SIS301LV;
1678 }
1679 }
1680 }
1681
1682 /*********************************************/
1683 /* HELPER: Check RAM size */
1684 /*********************************************/
1685
1686 #ifndef LINUX_XF86
1687 static BOOLEAN
SiS_CheckMemorySize(SiS_Private * SiS_Pr,PSIS_HW_INFO HwInfo,USHORT ModeNo,USHORT ModeIdIndex)1688 SiS_CheckMemorySize(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
1689 USHORT ModeNo, USHORT ModeIdIndex)
1690 {
1691 USHORT AdapterMemSize = HwInfo->ulVideoMemorySize / (1024*1024);
1692 USHORT memorysize,modeflag;
1693
1694 if(SiS_Pr->UseCustomMode) {
1695 modeflag = SiS_Pr->CModeFlag;
1696 } else {
1697 if(ModeNo <= 0x13) {
1698 modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
1699 } else {
1700 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
1701 }
1702 }
1703
1704 memorysize = modeflag & MemoryInfoFlag;
1705 memorysize >>= MemorySizeShift; /* Get required memory size */
1706 memorysize++;
1707
1708 if(AdapterMemSize < memorysize) return FALSE;
1709 return TRUE;
1710 }
1711 #endif
1712
1713 /*********************************************/
1714 /* HELPER: Get DRAM type */
1715 /*********************************************/
1716
1717 #ifdef SIS315H
1718 static UCHAR
SiS_Get310DRAMType(SiS_Private * SiS_Pr,PSIS_HW_INFO HwInfo)1719 SiS_Get310DRAMType(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
1720 {
1721 UCHAR data, temp;
1722
1723 if((*SiS_Pr->pSiS_SoftSetting) & SoftDRAMType) {
1724 data = (*SiS_Pr->pSiS_SoftSetting) & 0x03;
1725 } else {
1726 if(HwInfo->jChipType >= SIS_661) {
1727 data = SiS_GetReg(SiS_Pr->SiS_P3d4,0x78) & 0x07;
1728 if(SiS_Pr->SiS_ROMNew) {
1729 data = ((SiS_GetReg(SiS_Pr->SiS_P3d4,0x78) & 0xc0) >> 6);
1730 }
1731 } else if(IS_SIS550650740) {
1732 data = SiS_GetReg(SiS_Pr->SiS_P3c4,0x13) & 0x07;
1733 } else { /* 315, 330 */
1734 data = SiS_GetReg(SiS_Pr->SiS_P3c4,0x3a) & 0x03;
1735 if(HwInfo->jChipType == SIS_330) {
1736 if(data > 1) {
1737 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5f) & 0x30;
1738 switch(temp) {
1739 case 0x00: data = 1; break;
1740 case 0x10: data = 3; break;
1741 case 0x20: data = 3; break;
1742 case 0x30: data = 2; break;
1743 }
1744 } else {
1745 data = 0;
1746 }
1747 }
1748 }
1749 }
1750
1751 return data;
1752 }
1753
1754 USHORT
SiS_GetMCLK(SiS_Private * SiS_Pr,PSIS_HW_INFO HwInfo)1755 SiS_GetMCLK(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
1756 {
1757 UCHAR *ROMAddr = HwInfo->pjVirtualRomBase;
1758 USHORT index;
1759
1760 index = SiS_Get310DRAMType(SiS_Pr, HwInfo);
1761 if(HwInfo->jChipType >= SIS_661) {
1762 if(SiS_Pr->SiS_ROMNew) {
1763 return((USHORT)(SISGETROMW((0x90 + (index * 5) + 3))));
1764 }
1765 return(SiS_Pr->SiS_MCLKData_0[index].CLOCK);
1766 } else if(index >= 4) {
1767 index -= 4;
1768 return(SiS_Pr->SiS_MCLKData_1[index].CLOCK);
1769 } else {
1770 return(SiS_Pr->SiS_MCLKData_0[index].CLOCK);
1771 }
1772 }
1773 #endif
1774
1775 /*********************************************/
1776 /* HELPER: ClearBuffer */
1777 /*********************************************/
1778
1779 #ifndef LINUX_XF86
1780 static void
SiS_ClearBuffer(SiS_Private * SiS_Pr,PSIS_HW_INFO HwInfo,USHORT ModeNo)1781 SiS_ClearBuffer(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, USHORT ModeNo)
1782 {
1783 UCHAR *VideoMemoryAddress = HwInfo->pjVideoMemoryAddress;
1784 ULONG AdapterMemorySize = (ULONG)HwInfo->ulVideoMemorySize;
1785 USHORT *pBuffer;
1786 int i;
1787
1788 if(SiS_Pr->SiS_ModeType >= ModeEGA) {
1789 if(ModeNo > 0x13) {
1790 SiS_SetMemory(VideoMemoryAddress, AdapterMemorySize, 0);
1791 } else {
1792 pBuffer = (USHORT *)VideoMemoryAddress;
1793 for(i=0; i<0x4000; i++) pBuffer[i] = 0x0000;
1794 }
1795 } else {
1796 if(SiS_Pr->SiS_ModeType < ModeCGA) {
1797 pBuffer = (USHORT *)VideoMemoryAddress;
1798 for(i=0; i<0x4000; i++) pBuffer[i] = 0x0720;
1799 } else {
1800 SiS_SetMemory(VideoMemoryAddress, 0x8000, 0);
1801 }
1802 }
1803 }
1804 #endif
1805
1806 /*********************************************/
1807 /* HELPER: SearchModeID */
1808 /*********************************************/
1809
1810 BOOLEAN
SiS_SearchModeID(SiS_Private * SiS_Pr,USHORT * ModeNo,USHORT * ModeIdIndex)1811 SiS_SearchModeID(SiS_Private *SiS_Pr, USHORT *ModeNo, USHORT *ModeIdIndex)
1812 {
1813 UCHAR VGAINFO = SiS_Pr->SiS_VGAINFO;
1814
1815 if(*ModeNo <= 0x13) {
1816
1817 if((*ModeNo) <= 0x05) (*ModeNo) |= 0x01;
1818
1819 for(*ModeIdIndex = 0; ;(*ModeIdIndex)++) {
1820 if(SiS_Pr->SiS_SModeIDTable[*ModeIdIndex].St_ModeID == (*ModeNo)) break;
1821 if(SiS_Pr->SiS_SModeIDTable[*ModeIdIndex].St_ModeID == 0xFF) return FALSE;
1822 }
1823
1824 if(*ModeNo == 0x07) {
1825 if(VGAINFO & 0x10) (*ModeIdIndex)++; /* 400 lines */
1826 /* else 350 lines */
1827 }
1828 if(*ModeNo <= 0x03) {
1829 if(!(VGAINFO & 0x80)) (*ModeIdIndex)++;
1830 if(VGAINFO & 0x10) (*ModeIdIndex)++; /* 400 lines */
1831 /* else 350 lines */
1832 }
1833 /* else 200 lines */
1834
1835 } else {
1836
1837 for(*ModeIdIndex = 0; ;(*ModeIdIndex)++) {
1838 if(SiS_Pr->SiS_EModeIDTable[*ModeIdIndex].Ext_ModeID == (*ModeNo)) break;
1839 if(SiS_Pr->SiS_EModeIDTable[*ModeIdIndex].Ext_ModeID == 0xFF) return FALSE;
1840 }
1841
1842 }
1843 return TRUE;
1844 }
1845
1846 /*********************************************/
1847 /* HELPER: GetModePtr */
1848 /*********************************************/
1849
1850 UCHAR
SiS_GetModePtr(SiS_Private * SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex)1851 SiS_GetModePtr(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex)
1852 {
1853 UCHAR index;
1854
1855 if(ModeNo <= 0x13) {
1856 index = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_StTableIndex;
1857 } else {
1858 if(SiS_Pr->SiS_ModeType <= ModeEGA) index = 0x1B;
1859 else index = 0x0F;
1860 }
1861 return index;
1862 }
1863
1864 /*********************************************/
1865 /* HELPER: LowModeTests */
1866 /*********************************************/
1867
1868 static BOOLEAN
SiS_DoLowModeTest(SiS_Private * SiS_Pr,USHORT ModeNo,PSIS_HW_INFO HwInfo)1869 SiS_DoLowModeTest(SiS_Private *SiS_Pr, USHORT ModeNo, PSIS_HW_INFO HwInfo)
1870 {
1871 USHORT temp,temp1,temp2;
1872
1873 if((ModeNo != 0x03) && (ModeNo != 0x10) && (ModeNo != 0x12))
1874 return(TRUE);
1875 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x11);
1876 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x11,0x80);
1877 temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x00);
1878 SiS_SetReg(SiS_Pr->SiS_P3d4,0x00,0x55);
1879 temp2 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x00);
1880 SiS_SetReg(SiS_Pr->SiS_P3d4,0x00,temp1);
1881 SiS_SetReg(SiS_Pr->SiS_P3d4,0x11,temp);
1882 if((HwInfo->jChipType >= SIS_315H) ||
1883 (HwInfo->jChipType == SIS_300)) {
1884 if(temp2 == 0x55) return(FALSE);
1885 else return(TRUE);
1886 } else {
1887 if(temp2 != 0x55) return(TRUE);
1888 else {
1889 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x35,0x01);
1890 return(FALSE);
1891 }
1892 }
1893 }
1894
1895 static void
SiS_SetLowModeTest(SiS_Private * SiS_Pr,USHORT ModeNo,PSIS_HW_INFO HwInfo)1896 SiS_SetLowModeTest(SiS_Private *SiS_Pr, USHORT ModeNo, PSIS_HW_INFO HwInfo)
1897 {
1898 if(SiS_DoLowModeTest(SiS_Pr, ModeNo, HwInfo)) {
1899 SiS_Pr->SiS_SetFlag |= LowModeTests;
1900 }
1901 }
1902
1903 /*********************************************/
1904 /* HELPER: ENABLE CRT1 */
1905 /*********************************************/
1906
1907 static void
SiS_SetupCR5x(SiS_Private * SiS_Pr,PSIS_HW_INFO HwInfo)1908 SiS_SetupCR5x(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
1909 {
1910 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
1911 if(IS_SIS650) {
1912 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x51,0x1f);
1913 if(IS_SIS651) SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x51,0x20);
1914 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x56,0xe7);
1915 } else if(IS_SIS661741660760) {
1916 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x61,0xf7);
1917 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x51,0x1f);
1918 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x56,0xe7);
1919 if(!SiS_Pr->SiS_ROMNew) {
1920 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x3a,0xef);
1921 }
1922 }
1923 }
1924 }
1925
1926 static void
SiS_HandleCRT1(SiS_Private * SiS_Pr)1927 SiS_HandleCRT1(SiS_Private *SiS_Pr)
1928 {
1929 SiS_SetRegAND(SiS_Pr->SiS_P3d4,SiS_Pr->SiS_MyCR63,0xbf);
1930 #if 0
1931 if(!(SiS_GetReg(SiS_Pr->SiS_P3c4,0x15) & 0x01)) {
1932 if((SiS_GetReg(SiS_Pr->SiS_P3c4,0x15) & 0x0a) ||
1933 (SiS_GetReg(SiS_Pr->SiS_P3c4,0x16) & 0x01)) {
1934 SiS_SetRegOR(SiS_Pr->SiS_P3d4,SiS_Pr->SiS_MyCR63,0x40);
1935 }
1936 }
1937 #endif
1938 }
1939
1940 /*********************************************/
1941 /* HELPER: GetColorDepth */
1942 /*********************************************/
1943
1944 USHORT
SiS_GetColorDepth(SiS_Private * SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex)1945 SiS_GetColorDepth(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex)
1946 {
1947 USHORT ColorDepth[6] = { 1, 2, 4, 4, 6, 8};
1948 SHORT index;
1949 USHORT modeflag;
1950
1951 /* Do NOT check UseCustomMode, will skrew up FIFO */
1952 if(ModeNo == 0xfe) {
1953 modeflag = SiS_Pr->CModeFlag;
1954 } else {
1955 if(ModeNo <= 0x13)
1956 modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
1957 else
1958 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
1959 }
1960
1961 index = (modeflag & ModeInfoFlag) - ModeEGA;
1962 if(index < 0) index = 0;
1963 return(ColorDepth[index]);
1964 }
1965
1966 /*********************************************/
1967 /* HELPER: GetOffset */
1968 /*********************************************/
1969
1970 USHORT
SiS_GetOffset(SiS_Private * SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex,USHORT RefreshRateTableIndex,PSIS_HW_INFO HwInfo)1971 SiS_GetOffset(SiS_Private *SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex,
1972 USHORT RefreshRateTableIndex,PSIS_HW_INFO HwInfo)
1973 {
1974 USHORT xres, temp, colordepth, infoflag;
1975
1976 if(SiS_Pr->UseCustomMode) {
1977 infoflag = SiS_Pr->CInfoFlag;
1978 xres = SiS_Pr->CHDisplay;
1979 } else {
1980 infoflag = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag;
1981 xres = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].XRes;
1982 }
1983
1984 colordepth = SiS_GetColorDepth(SiS_Pr,ModeNo,ModeIdIndex);
1985
1986 temp = xres / 16;
1987 if(infoflag & InterlaceMode) temp <<= 1;
1988 temp *= colordepth;
1989 if(xres % 16) {
1990 colordepth >>= 1;
1991 temp += colordepth;
1992 }
1993
1994 return(temp);
1995 }
1996
1997 /*********************************************/
1998 /* SEQ */
1999 /*********************************************/
2000
2001 static void
SiS_SetSeqRegs(SiS_Private * SiS_Pr,USHORT StandTableIndex,PSIS_HW_INFO HwInfo)2002 SiS_SetSeqRegs(SiS_Private *SiS_Pr, USHORT StandTableIndex, PSIS_HW_INFO HwInfo)
2003 {
2004 UCHAR SRdata;
2005 USHORT i;
2006
2007 SiS_SetReg(SiS_Pr->SiS_P3c4,0x00,0x03); /* Set SR0 */
2008
2009 SRdata = SiS_Pr->SiS_StandTable[StandTableIndex].SR[0];
2010
2011 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
2012 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
2013 SRdata |= 0x01;
2014 }
2015 if(HwInfo->jChipType >= SIS_661) {
2016 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToTV)) {
2017 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
2018 SRdata |= 0x01; /* 8 dot clock */
2019 }
2020 }
2021 } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
2022 if(SiS_Pr->SiS_VBType & VB_NoLCD) {
2023 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
2024 SRdata |= 0x01; /* 8 dot clock */
2025 }
2026 }
2027 }
2028 }
2029
2030 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
2031 if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) {
2032 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
2033 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
2034 SRdata |= 0x01; /* 8 dot clock */
2035 }
2036 }
2037 }
2038 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
2039 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
2040 SRdata |= 0x01; /* 8 dot clock */
2041 }
2042 }
2043 }
2044
2045 SRdata |= 0x20; /* screen off */
2046
2047 SiS_SetReg(SiS_Pr->SiS_P3c4,0x01,SRdata);
2048
2049 for(i = 2; i <= 4; i++) {
2050 SRdata = SiS_Pr->SiS_StandTable[StandTableIndex].SR[i-1];
2051 SiS_SetReg(SiS_Pr->SiS_P3c4,i,SRdata);
2052 }
2053 }
2054
2055 /*********************************************/
2056 /* MISC */
2057 /*********************************************/
2058
2059 static void
SiS_SetMiscRegs(SiS_Private * SiS_Pr,USHORT StandTableIndex,PSIS_HW_INFO HwInfo)2060 SiS_SetMiscRegs(SiS_Private *SiS_Pr, USHORT StandTableIndex, PSIS_HW_INFO HwInfo)
2061 {
2062 UCHAR Miscdata;
2063
2064 Miscdata = SiS_Pr->SiS_StandTable[StandTableIndex].MISC;
2065
2066 if(HwInfo->jChipType < SIS_661) {
2067 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
2068 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
2069 Miscdata |= 0x0C;
2070 }
2071 }
2072 }
2073
2074 SiS_SetRegByte(SiS_Pr->SiS_P3c2,Miscdata);
2075 }
2076
2077 /*********************************************/
2078 /* CRTC */
2079 /*********************************************/
2080
2081 static void
SiS_SetCRTCRegs(SiS_Private * SiS_Pr,PSIS_HW_INFO HwInfo,USHORT StandTableIndex)2082 SiS_SetCRTCRegs(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
2083 USHORT StandTableIndex)
2084 {
2085 UCHAR CRTCdata;
2086 USHORT i;
2087
2088 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x11,0x7f); /* Unlock CRTC */
2089
2090 for(i = 0; i <= 0x18; i++) {
2091 CRTCdata = SiS_Pr->SiS_StandTable[StandTableIndex].CRTC[i];
2092 SiS_SetReg(SiS_Pr->SiS_P3d4,i,CRTCdata); /* Set CRTC(3d4) */
2093 }
2094 if(HwInfo->jChipType >= SIS_661) {
2095 SiS_SetupCR5x(SiS_Pr, HwInfo);
2096 for(i = 0x13; i <= 0x14; i++) {
2097 CRTCdata = SiS_Pr->SiS_StandTable[StandTableIndex].CRTC[i];
2098 SiS_SetReg(SiS_Pr->SiS_P3d4,i,CRTCdata);
2099 }
2100 } else if( ( (HwInfo->jChipType == SIS_630) ||
2101 (HwInfo->jChipType == SIS_730) ) &&
2102 (HwInfo->jChipRevision >= 0x30) ) { /* for 630S0 */
2103 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
2104 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToTV)) {
2105 SiS_SetReg(SiS_Pr->SiS_P3d4,0x18,0xFE);
2106 }
2107 }
2108 }
2109 }
2110
2111 /*********************************************/
2112 /* ATT */
2113 /*********************************************/
2114
2115 static void
SiS_SetATTRegs(SiS_Private * SiS_Pr,USHORT StandTableIndex,PSIS_HW_INFO HwInfo)2116 SiS_SetATTRegs(SiS_Private *SiS_Pr, USHORT StandTableIndex,
2117 PSIS_HW_INFO HwInfo)
2118 {
2119 UCHAR ARdata;
2120 USHORT i;
2121
2122 for(i = 0; i <= 0x13; i++) {
2123 ARdata = SiS_Pr->SiS_StandTable[StandTableIndex].ATTR[i];
2124 #if 0
2125 if((i <= 0x0f) || (i == 0x11)) {
2126 if(ds:489 & 0x08) {
2127 continue;
2128 }
2129 }
2130 #endif
2131 if(i == 0x13) {
2132 /* Pixel shift. If screen on LCD or TV is shifted left or right,
2133 * this might be the cause.
2134 */
2135 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
2136 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) ARdata=0;
2137 }
2138 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
2139 if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) {
2140 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
2141 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) ARdata=0;
2142 }
2143 }
2144 }
2145 if(HwInfo->jChipType >= SIS_661) {
2146 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToTV | SetCRT2ToLCD)) {
2147 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) ARdata=0;
2148 }
2149 } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
2150 if(HwInfo->jChipType >= SIS_315H) {
2151 if(IS_SIS550650740660) {
2152 /* 315, 330 don't do this */
2153 if(SiS_Pr->SiS_VBType & VB_SIS301B302B) {
2154 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) ARdata=0;
2155 } else {
2156 ARdata = 0;
2157 }
2158 }
2159 } else {
2160 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) ARdata=0;
2161 }
2162 }
2163 }
2164 SiS_GetRegByte(SiS_Pr->SiS_P3da); /* reset 3da */
2165 SiS_SetRegByte(SiS_Pr->SiS_P3c0,i); /* set index */
2166 SiS_SetRegByte(SiS_Pr->SiS_P3c0,ARdata); /* set data */
2167 }
2168 SiS_GetRegByte(SiS_Pr->SiS_P3da); /* reset 3da */
2169 SiS_SetRegByte(SiS_Pr->SiS_P3c0,0x14); /* set index */
2170 SiS_SetRegByte(SiS_Pr->SiS_P3c0,0x00); /* set data */
2171
2172 SiS_GetRegByte(SiS_Pr->SiS_P3da);
2173 SiS_SetRegByte(SiS_Pr->SiS_P3c0,0x20); /* Enable Attribute */
2174 SiS_GetRegByte(SiS_Pr->SiS_P3da);
2175 }
2176
2177 /*********************************************/
2178 /* GRC */
2179 /*********************************************/
2180
2181 static void
SiS_SetGRCRegs(SiS_Private * SiS_Pr,USHORT StandTableIndex)2182 SiS_SetGRCRegs(SiS_Private *SiS_Pr, USHORT StandTableIndex)
2183 {
2184 UCHAR GRdata;
2185 USHORT i;
2186
2187 for(i = 0; i <= 0x08; i++) {
2188 GRdata = SiS_Pr->SiS_StandTable[StandTableIndex].GRC[i];
2189 SiS_SetReg(SiS_Pr->SiS_P3ce,i,GRdata);
2190 }
2191
2192 if(SiS_Pr->SiS_ModeType > ModeVGA) {
2193 /* 256 color disable */
2194 SiS_SetRegAND(SiS_Pr->SiS_P3ce,0x05,0xBF);
2195 }
2196 }
2197
2198 /*********************************************/
2199 /* CLEAR EXTENDED REGISTERS */
2200 /*********************************************/
2201
2202 static void
SiS_ClearExt1Regs(SiS_Private * SiS_Pr,PSIS_HW_INFO HwInfo,USHORT ModeNo)2203 SiS_ClearExt1Regs(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, USHORT ModeNo)
2204 {
2205 USHORT i;
2206
2207 for(i = 0x0A; i <= 0x0E; i++) {
2208 SiS_SetReg(SiS_Pr->SiS_P3c4,i,0x00);
2209 }
2210
2211 if(HwInfo->jChipType >= SIS_315H) {
2212 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x37,0xFE);
2213 if(ModeNo <= 0x13) {
2214 if(ModeNo == 0x06 || ModeNo >= 0x0e) {
2215 SiS_SetReg(SiS_Pr->SiS_P3c4,0x0e,0x20);
2216 }
2217 }
2218 }
2219 }
2220
2221 /*********************************************/
2222 /* RESET VCLK */
2223 /*********************************************/
2224
2225 static void
SiS_ResetCRT1VCLK(SiS_Private * SiS_Pr,PSIS_HW_INFO HwInfo)2226 SiS_ResetCRT1VCLK(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
2227 {
2228 if(HwInfo->jChipType >= SIS_315H) {
2229 if(HwInfo->jChipType < SIS_661) {
2230 if(SiS_Pr->SiS_IF_DEF_LVDS == 0) return;
2231 }
2232 } else {
2233 if((SiS_Pr->SiS_IF_DEF_LVDS == 0) &&
2234 (!(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV)) ) {
2235 return;
2236 }
2237 }
2238
2239 if(HwInfo->jChipType >= SIS_315H) {
2240 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x31,0xCF,0x20);
2241 } else {
2242 SiS_SetReg(SiS_Pr->SiS_P3c4,0x31,0x20);
2243 }
2244 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2B,SiS_Pr->SiS_VCLKData[1].SR2B);
2245 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2C,SiS_Pr->SiS_VCLKData[1].SR2C);
2246 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2D,0x80);
2247 if(HwInfo->jChipType >= SIS_315H) {
2248 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x31,0xcf,0x10);
2249 } else {
2250 SiS_SetReg(SiS_Pr->SiS_P3c4,0x31,0x10);
2251 }
2252 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2B,SiS_Pr->SiS_VCLKData[0].SR2B);
2253 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2C,SiS_Pr->SiS_VCLKData[0].SR2C);
2254 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2D,0x80);
2255 }
2256
2257 /*********************************************/
2258 /* SYNC */
2259 /*********************************************/
2260
2261 static void
SiS_SetCRT1Sync(SiS_Private * SiS_Pr,USHORT RefreshRateTableIndex)2262 SiS_SetCRT1Sync(SiS_Private *SiS_Pr, USHORT RefreshRateTableIndex)
2263 {
2264 USHORT sync;
2265
2266 if(SiS_Pr->UseCustomMode) {
2267 sync = SiS_Pr->CInfoFlag >> 8;
2268 } else {
2269 sync = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag >> 8;
2270 }
2271
2272 sync &= 0xC0;
2273 sync |= 0x2f;
2274 SiS_SetRegByte(SiS_Pr->SiS_P3c2,sync);
2275 }
2276
2277 /*********************************************/
2278 /* CRTC/2 */
2279 /*********************************************/
2280
2281 static void
SiS_SetCRT1CRTC(SiS_Private * SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex,USHORT RefreshRateTableIndex,PSIS_HW_INFO HwInfo)2282 SiS_SetCRT1CRTC(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
2283 USHORT RefreshRateTableIndex,
2284 PSIS_HW_INFO HwInfo)
2285 {
2286 UCHAR index;
2287 USHORT temp,i,j,modeflag;
2288
2289 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x11,0x7f); /* unlock cr0-7 */
2290
2291 if(SiS_Pr->UseCustomMode) {
2292
2293 modeflag = SiS_Pr->CModeFlag;
2294
2295 for(i=0,j=0;i<=7;i++,j++) {
2296 SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]);
2297 }
2298 for(j=0x10;i<=10;i++,j++) {
2299 SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]);
2300 }
2301 for(j=0x15;i<=12;i++,j++) {
2302 SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]);
2303 }
2304 for(j=0x0A;i<=15;i++,j++) {
2305 SiS_SetReg(SiS_Pr->SiS_P3c4,j,SiS_Pr->CCRT1CRTC[i]);
2306 }
2307
2308 temp = SiS_Pr->CCRT1CRTC[16] & 0xE0;
2309 SiS_SetReg(SiS_Pr->SiS_P3c4,0x0E,temp);
2310
2311 temp = (SiS_Pr->CCRT1CRTC[16] & 0x01) << 5;
2312 if(modeflag & DoubleScanMode) temp |= 0x80;
2313 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x09,0x5F,temp);
2314
2315 } else {
2316
2317 if(ModeNo <= 0x13) {
2318 modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
2319 } else {
2320 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
2321 }
2322
2323 index = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC;
2324
2325 for(i=0,j=0;i<=7;i++,j++) {
2326 SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->SiS_CRT1Table[index].CR[i]);
2327 }
2328 for(j=0x10;i<=10;i++,j++) {
2329 SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->SiS_CRT1Table[index].CR[i]);
2330 }
2331 for(j=0x15;i<=12;i++,j++) {
2332 SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->SiS_CRT1Table[index].CR[i]);
2333 }
2334 for(j=0x0A;i<=15;i++,j++) {
2335 SiS_SetReg(SiS_Pr->SiS_P3c4,j,SiS_Pr->SiS_CRT1Table[index].CR[i]);
2336 }
2337
2338 temp = SiS_Pr->SiS_CRT1Table[index].CR[16] & 0xE0;
2339 SiS_SetReg(SiS_Pr->SiS_P3c4,0x0E,temp);
2340
2341 temp = ((SiS_Pr->SiS_CRT1Table[index].CR[16]) & 0x01) << 5;
2342 if(modeflag & DoubleScanMode) temp |= 0x80;
2343 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x09,0x5F,temp);
2344
2345 }
2346
2347 if(SiS_Pr->SiS_ModeType > ModeVGA) SiS_SetReg(SiS_Pr->SiS_P3d4,0x14,0x4F);
2348 }
2349
2350 /*********************************************/
2351 /* OFFSET & PITCH */
2352 /*********************************************/
2353 /* (partly overruled by SetPitch() in XF86) */
2354 /*********************************************/
2355
2356 static void
SiS_SetCRT1Offset(SiS_Private * SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex,USHORT RefreshRateTableIndex,PSIS_HW_INFO HwInfo)2357 SiS_SetCRT1Offset(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
2358 USHORT RefreshRateTableIndex,
2359 PSIS_HW_INFO HwInfo)
2360 {
2361 USHORT temp, DisplayUnit, infoflag;
2362
2363 if(SiS_Pr->UseCustomMode) {
2364 infoflag = SiS_Pr->CInfoFlag;
2365 } else {
2366 infoflag = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag;
2367 }
2368
2369 DisplayUnit = SiS_GetOffset(SiS_Pr,ModeNo,ModeIdIndex,
2370 RefreshRateTableIndex,HwInfo);
2371
2372 temp = (DisplayUnit >> 8) & 0x0f;
2373 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0E,0xF0,temp);
2374
2375 temp = DisplayUnit & 0xFF;
2376 SiS_SetReg(SiS_Pr->SiS_P3d4,0x13,temp);
2377
2378 if(infoflag & InterlaceMode) DisplayUnit >>= 1;
2379
2380 DisplayUnit <<= 5;
2381 temp = (DisplayUnit & 0xff00) >> 8;
2382 if(DisplayUnit & 0xff) temp++;
2383 temp++;
2384 SiS_SetReg(SiS_Pr->SiS_P3c4,0x10,temp);
2385 }
2386
2387 /*********************************************/
2388 /* VCLK */
2389 /*********************************************/
2390
2391 static void
SiS_SetCRT1VCLK(SiS_Private * SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex,PSIS_HW_INFO HwInfo,USHORT RefreshRateTableIndex)2392 SiS_SetCRT1VCLK(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
2393 PSIS_HW_INFO HwInfo, USHORT RefreshRateTableIndex)
2394 {
2395 USHORT index=0, clka, clkb;
2396
2397 if(SiS_Pr->UseCustomMode) {
2398 clka = SiS_Pr->CSR2B;
2399 clkb = SiS_Pr->CSR2C;
2400 } else {
2401 index = SiS_GetVCLK2Ptr(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex, HwInfo);
2402 if((SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) {
2403 clka = SiS_Pr->SiS_VBVCLKData[index].Part4_A;
2404 clkb = SiS_Pr->SiS_VBVCLKData[index].Part4_B;
2405 } else {
2406 clka = SiS_Pr->SiS_VCLKData[index].SR2B;
2407 clkb = SiS_Pr->SiS_VCLKData[index].SR2C;
2408 }
2409 }
2410
2411 if(HwInfo->jChipType >= SIS_315H) {
2412 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x31,0xCF);
2413 } else {
2414 SiS_SetReg(SiS_Pr->SiS_P3c4,0x31,0x00);
2415 }
2416
2417 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2B,clka);
2418 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2C,clkb);
2419
2420 if(HwInfo->jChipType >= SIS_315H) {
2421 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2D,0x01);
2422 } else {
2423 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2D,0x80);
2424 }
2425 }
2426
2427 /*********************************************/
2428 /* FIFO */
2429 /*********************************************/
2430
2431 #ifdef SIS300
2432 static USHORT
SiS_DoCalcDelay(SiS_Private * SiS_Pr,USHORT MCLK,USHORT VCLK,USHORT colordepth,USHORT key)2433 SiS_DoCalcDelay(SiS_Private *SiS_Pr, USHORT MCLK, USHORT VCLK, USHORT colordepth, USHORT key)
2434 {
2435 const UCHAR ThLowA[] = { 61, 3,52, 5,68, 7,100,11,
2436 43, 3,42, 5,54, 7, 78,11,
2437 34, 3,37, 5,47, 7, 67,11 };
2438
2439 const UCHAR ThLowB[] = { 81, 4,72, 6,88, 8,120,12,
2440 55, 4,54, 6,66, 8, 90,12,
2441 42, 4,45, 6,55, 8, 75,12 };
2442
2443 const UCHAR ThTiming[] = { 1, 2, 2, 3, 0, 1, 1, 2 };
2444
2445 USHORT tempah, tempal, tempcl, tempbx, temp;
2446 ULONG longtemp;
2447
2448 tempah = SiS_GetReg(SiS_Pr->SiS_P3c4,0x18);
2449 tempah &= 0x62;
2450 tempah >>= 1;
2451 tempal = tempah;
2452 tempah >>= 3;
2453 tempal |= tempah;
2454 tempal &= 0x07;
2455 tempcl = ThTiming[tempal];
2456 tempbx = SiS_GetReg(SiS_Pr->SiS_P3c4,0x16);
2457 tempbx >>= 6;
2458 tempah = SiS_GetReg(SiS_Pr->SiS_P3c4,0x14);
2459 tempah >>= 4;
2460 tempah &= 0x0c;
2461 tempbx |= tempah;
2462 tempbx <<= 1;
2463 if(key == 0) {
2464 tempal = ThLowA[tempbx + 1];
2465 tempal *= tempcl;
2466 tempal += ThLowA[tempbx];
2467 } else {
2468 tempal = ThLowB[tempbx + 1];
2469 tempal *= tempcl;
2470 tempal += ThLowB[tempbx];
2471 }
2472 longtemp = tempal * VCLK * colordepth;
2473 temp = longtemp % (MCLK * 16);
2474 longtemp /= (MCLK * 16);
2475 if(temp) longtemp++;
2476 return((USHORT)longtemp);
2477 }
2478
2479 static USHORT
SiS_CalcDelay(SiS_Private * SiS_Pr,USHORT VCLK,USHORT colordepth,USHORT MCLK)2480 SiS_CalcDelay(SiS_Private *SiS_Pr, USHORT VCLK, USHORT colordepth, USHORT MCLK)
2481 {
2482 USHORT tempax, tempbx;
2483
2484 tempbx = SiS_DoCalcDelay(SiS_Pr, MCLK, VCLK, colordepth, 0);
2485 tempax = SiS_DoCalcDelay(SiS_Pr, MCLK, VCLK, colordepth, 1);
2486 if(tempax < 4) tempax = 4;
2487 tempax -= 4;
2488 if(tempbx < tempax) tempbx = tempax;
2489 return(tempbx);
2490 }
2491
2492 static void
SiS_SetCRT1FIFO_300(SiS_Private * SiS_Pr,USHORT ModeNo,PSIS_HW_INFO HwInfo,USHORT RefreshRateTableIndex)2493 SiS_SetCRT1FIFO_300(SiS_Private *SiS_Pr, USHORT ModeNo, PSIS_HW_INFO HwInfo,
2494 USHORT RefreshRateTableIndex)
2495 {
2496 USHORT ThresholdLow = 0;
2497 USHORT index, VCLK, MCLK, colorth=0;
2498 USHORT tempah, temp;
2499
2500 if(ModeNo > 0x13) {
2501
2502 if(SiS_Pr->UseCustomMode) {
2503 VCLK = SiS_Pr->CSRClock;
2504 } else {
2505 index = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
2506 index &= 0x3F;
2507 VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK; /* Get VCLK */
2508 }
2509
2510 switch (SiS_Pr->SiS_ModeType - ModeEGA) { /* Get half colordepth */
2511 case 0 : colorth = 1; break;
2512 case 1 : colorth = 1; break;
2513 case 2 : colorth = 2; break;
2514 case 3 : colorth = 2; break;
2515 case 4 : colorth = 3; break;
2516 case 5 : colorth = 4; break;
2517 }
2518
2519 index = SiS_GetReg(SiS_Pr->SiS_P3c4,0x3A);
2520 index &= 0x07;
2521 MCLK = SiS_Pr->SiS_MCLKData_0[index].CLOCK; /* Get MCLK */
2522
2523 tempah = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35);
2524 tempah &= 0xc3;
2525 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x16,0x3c,tempah);
2526
2527 do {
2528 ThresholdLow = SiS_CalcDelay(SiS_Pr, VCLK, colorth, MCLK);
2529 ThresholdLow++;
2530 if(ThresholdLow < 0x13) break;
2531 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x16,0xfc);
2532 ThresholdLow = 0x13;
2533 tempah = SiS_GetReg(SiS_Pr->SiS_P3c4,0x16);
2534 tempah >>= 6;
2535 if(!(tempah)) break;
2536 tempah--;
2537 tempah <<= 6;
2538 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x16,0x3f,tempah);
2539 } while(0);
2540
2541 } else ThresholdLow = 2;
2542
2543 /* Write CRT/CPU threshold low, CRT/Engine threshold high */
2544 temp = (ThresholdLow << 4) | 0x0f;
2545 SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,temp);
2546
2547 temp = (ThresholdLow & 0x10) << 1;
2548 if(ModeNo > 0x13) temp |= 0x40;
2549 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0f,0x9f,temp);
2550
2551 /* What is this? */
2552 SiS_SetReg(SiS_Pr->SiS_P3c4,0x3B,0x09);
2553
2554 /* Write CRT/CPU threshold high */
2555 temp = ThresholdLow + 3;
2556 if(temp > 0x0f) temp = 0x0f;
2557 SiS_SetReg(SiS_Pr->SiS_P3c4,0x09,temp);
2558 }
2559
2560 static USHORT
SiS_CalcDelay2(SiS_Private * SiS_Pr,UCHAR key,PSIS_HW_INFO HwInfo)2561 SiS_CalcDelay2(SiS_Private *SiS_Pr, UCHAR key, PSIS_HW_INFO HwInfo)
2562 {
2563 USHORT data,index;
2564 const UCHAR LatencyFactor[] = {
2565 97, 88, 86, 79, 77, 00, /*; 64 bit BQ=2 */
2566 00, 87, 85, 78, 76, 54, /*; 64 bit BQ=1 */
2567 97, 88, 86, 79, 77, 00, /*; 128 bit BQ=2 */
2568 00, 79, 77, 70, 68, 48, /*; 128 bit BQ=1 */
2569 80, 72, 69, 63, 61, 00, /*; 64 bit BQ=2 */
2570 00, 70, 68, 61, 59, 37, /*; 64 bit BQ=1 */
2571 86, 77, 75, 68, 66, 00, /*; 128 bit BQ=2 */
2572 00, 68, 66, 59, 57, 37 /*; 128 bit BQ=1 */
2573 };
2574 const UCHAR LatencyFactor730[] = {
2575 69, 63, 61,
2576 86, 79, 77,
2577 103, 96, 94,
2578 120,113,111,
2579 137,130,128, /* --- Table ends with this entry, data below */
2580 137,130,128, /* to avoid using illegal values */
2581 137,130,128,
2582 137,130,128,
2583 137,130,128,
2584 137,130,128,
2585 137,130,128,
2586 137,130,128,
2587 137,130,128,
2588 137,130,128,
2589 137,130,128,
2590 137,130,128,
2591 };
2592
2593 if(HwInfo->jChipType == SIS_730) {
2594 index = ((key & 0x0f) * 3) + ((key & 0xC0) >> 6);
2595 data = LatencyFactor730[index];
2596 } else {
2597 index = (key & 0xE0) >> 5;
2598 if(key & 0x10) index +=6;
2599 if(!(key & 0x01)) index += 24;
2600 data = SiS_GetReg(SiS_Pr->SiS_P3c4,0x14);
2601 if(data & 0x0080) index += 12;
2602 data = LatencyFactor[index];
2603 }
2604 return(data);
2605 }
2606
2607 static void
SiS_SetCRT1FIFO_630(SiS_Private * SiS_Pr,USHORT ModeNo,PSIS_HW_INFO HwInfo,USHORT RefreshRateTableIndex)2608 SiS_SetCRT1FIFO_630(SiS_Private *SiS_Pr, USHORT ModeNo,
2609 PSIS_HW_INFO HwInfo,
2610 USHORT RefreshRateTableIndex)
2611 {
2612 USHORT i,index,data,VCLK,MCLK,colorth=0;
2613 ULONG B,eax,bl,data2;
2614 USHORT ThresholdLow=0;
2615 UCHAR FQBQData[]= {
2616 0x01,0x21,0x41,0x61,0x81,
2617 0x31,0x51,0x71,0x91,0xb1,
2618 0x00,0x20,0x40,0x60,0x80,
2619 0x30,0x50,0x70,0x90,0xb0,
2620 0xFF
2621 };
2622 UCHAR FQBQData730[]= {
2623 0x34,0x74,0xb4,
2624 0x23,0x63,0xa3,
2625 0x12,0x52,0x92,
2626 0x01,0x41,0x81,
2627 0x00,0x40,0x80,
2628 0xff
2629 };
2630
2631 i=0;
2632 if(ModeNo > 0x13) {
2633 if(SiS_Pr->UseCustomMode) {
2634 VCLK = SiS_Pr->CSRClock;
2635 } else {
2636 index = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
2637 index &= 0x3F;
2638 VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK; /* Get VCLK */
2639 }
2640
2641 index = SiS_GetReg(SiS_Pr->SiS_P3c4,0x1A);
2642 index &= 0x07;
2643 MCLK = SiS_Pr->SiS_MCLKData_0[index].CLOCK; /* Get MCLK */
2644
2645 data2 = SiS_Pr->SiS_ModeType - ModeEGA; /* Get half colordepth */
2646 switch (data2) {
2647 case 0 : colorth = 1; break;
2648 case 1 : colorth = 1; break;
2649 case 2 : colorth = 2; break;
2650 case 3 : colorth = 2; break;
2651 case 4 : colorth = 3; break;
2652 case 5 : colorth = 4; break;
2653 }
2654
2655 if(HwInfo->jChipType == SIS_730) {
2656
2657 do {
2658 B = SiS_CalcDelay2(SiS_Pr, FQBQData730[i], HwInfo) * VCLK * colorth;
2659 bl = B / (MCLK * 16);
2660
2661 if(B == bl * 16 * MCLK) {
2662 bl = bl + 1;
2663 } else {
2664 bl = bl + 2;
2665 }
2666
2667 if(bl > 0x13) {
2668 if(FQBQData730[i+1] == 0xFF) {
2669 ThresholdLow = 0x13;
2670 break;
2671 }
2672 i++;
2673 } else {
2674 ThresholdLow = bl;
2675 break;
2676 }
2677 } while(FQBQData730[i] != 0xFF);
2678
2679 } else {
2680
2681 do {
2682 B = SiS_CalcDelay2(SiS_Pr, FQBQData[i], HwInfo) * VCLK * colorth;
2683 bl = B / (MCLK * 16);
2684
2685 if(B == bl * 16 * MCLK) {
2686 bl = bl + 1;
2687 } else {
2688 bl = bl + 2;
2689 }
2690
2691 if(bl > 0x13) {
2692 if(FQBQData[i+1] == 0xFF) {
2693 ThresholdLow = 0x13;
2694 break;
2695 }
2696 i++;
2697 } else {
2698 ThresholdLow = bl;
2699 break;
2700 }
2701 } while(FQBQData[i] != 0xFF);
2702 }
2703 }
2704 else {
2705 if(HwInfo->jChipType == SIS_730) {
2706 } else {
2707 i = 9;
2708 }
2709 ThresholdLow = 0x02;
2710 }
2711
2712 /* Write foreground and background queue */
2713 if(HwInfo->jChipType == SIS_730) {
2714
2715 data2 = FQBQData730[i];
2716 data2 = (data2 & 0xC0) >> 5;
2717 data2 <<= 8;
2718
2719 #ifndef LINUX_XF86
2720 SiS_SetRegLong(0xcf8,0x80000050);
2721 eax = SiS_GetRegLong(0xcfc);
2722 eax &= 0xfffff9ff;
2723 eax |= data2;
2724 SiS_SetRegLong(0xcfc,eax);
2725 #else
2726 /* We use pci functions X offers. We use pcitag 0, because
2727 * we want to read/write to the host bridge (which is always
2728 * 00:00.0 on 630, 730 and 540), not the VGA device.
2729 */
2730 eax = pciReadLong(0x00000000, 0x50);
2731 eax &= 0xfffff9ff;
2732 eax |= data2;
2733 pciWriteLong(0x00000000, 0x50, eax);
2734 #endif
2735
2736 /* Write GUI grant timer (PCI config 0xA3) */
2737 data2 = FQBQData730[i] << 8;
2738 data2 = (data2 & 0x0f00) | ((data2 & 0x3000) >> 8);
2739 data2 <<= 20;
2740
2741 #ifndef LINUX_XF86
2742 SiS_SetRegLong(0xcf8,0x800000A0);
2743 eax = SiS_GetRegLong(0xcfc);
2744 eax &= 0x00ffffff;
2745 eax |= data2;
2746 SiS_SetRegLong(0xcfc,eax);
2747 #else
2748 eax = pciReadLong(0x00000000, 0xA0);
2749 eax &= 0x00ffffff;
2750 eax |= data2;
2751 pciWriteLong(0x00000000, 0xA0, eax);
2752 #endif
2753
2754 } else {
2755
2756 data2 = FQBQData[i];
2757 data2 = (data2 & 0xf0) >> 4;
2758 data2 <<= 24;
2759
2760 #ifndef LINUX_XF86
2761 SiS_SetRegLong(0xcf8,0x80000050);
2762 eax = SiS_GetRegLong(0xcfc);
2763 eax &= 0xf0ffffff;
2764 eax |= data2;
2765 SiS_SetRegLong(0xcfc,eax);
2766 #else
2767 eax = pciReadLong(0x00000000, 0x50);
2768 eax &= 0xf0ffffff;
2769 eax |= data2;
2770 pciWriteLong(0x00000000, 0x50, eax);
2771 #endif
2772
2773 /* Write GUI grant timer (PCI config 0xA3) */
2774 data2 = FQBQData[i];
2775 data2 &= 0x0f;
2776 data2 <<= 24;
2777
2778 #ifndef LINUX_XF86
2779 SiS_SetRegLong(0xcf8,0x800000A0);
2780 eax = SiS_GetRegLong(0xcfc);
2781 eax &= 0xf0ffffff;
2782 eax |= data2;
2783 SiS_SetRegLong(0xcfc,eax);
2784 #else
2785 eax = pciReadLong(0x00000000, 0xA0);
2786 eax &= 0xf0ffffff;
2787 eax |= data2;
2788 pciWriteLong(0x00000000, 0xA0, eax);
2789 #endif
2790
2791 }
2792
2793 /* Write CRT/CPU threshold low, CRT/Engine threshold high */
2794 data = ((ThresholdLow & 0x0f) << 4) | 0x0f;
2795 SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,data);
2796
2797 data = (ThresholdLow & 0x10) << 1;
2798 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0F,0xDF,data);
2799
2800 /* What is this? */
2801 SiS_SetReg(SiS_Pr->SiS_P3c4,0x3B,0x09);
2802
2803 /* Write CRT/CPU threshold high (gap = 3) */
2804 data = ThresholdLow + 3;
2805 if(data > 0x0f) data = 0x0f;
2806 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x09,0x80,data);
2807 }
2808 #endif
2809
2810 #ifdef SIS315H
2811 static void
SiS_SetCRT1FIFO_310(SiS_Private * SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex,PSIS_HW_INFO HwInfo)2812 SiS_SetCRT1FIFO_310(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
2813 PSIS_HW_INFO HwInfo)
2814 {
2815 USHORT modeflag;
2816
2817 /* disable auto-threshold */
2818 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x3D,0xFE);
2819
2820 if(SiS_Pr->UseCustomMode) {
2821 modeflag = SiS_Pr->CModeFlag;
2822 } else {
2823 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
2824 }
2825
2826 SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,0xAE);
2827 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x09,0xF0);
2828 if(ModeNo > 0x13) {
2829 if(HwInfo->jChipType >= SIS_661) {
2830 if(!(modeflag & HalfDCLK)) {
2831 SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,0x34);
2832 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x3D,0x01);
2833 }
2834 } else {
2835 if((!(modeflag & DoubleScanMode)) || (!(modeflag & HalfDCLK))) {
2836 SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,0x34);
2837 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x3D,0x01);
2838 }
2839 }
2840 }
2841 }
2842 #endif
2843
2844 /*********************************************/
2845 /* MODE REGISTERS */
2846 /*********************************************/
2847
2848 static void
SiS_SetVCLKState(SiS_Private * SiS_Pr,PSIS_HW_INFO HwInfo,USHORT ModeNo,USHORT RefreshRateTableIndex,USHORT ModeIdIndex)2849 SiS_SetVCLKState(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
2850 USHORT ModeNo, USHORT RefreshRateTableIndex,
2851 USHORT ModeIdIndex)
2852 {
2853 USHORT data=0, VCLK=0, index=0;
2854
2855 if(ModeNo > 0x13) {
2856 if(SiS_Pr->UseCustomMode) {
2857 VCLK = SiS_Pr->CSRClock;
2858 } else {
2859 index = SiS_GetVCLK2Ptr(SiS_Pr,ModeNo,ModeIdIndex,
2860 RefreshRateTableIndex,HwInfo);
2861 VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK;
2862 }
2863 }
2864
2865 if(HwInfo->jChipType < SIS_315H) {
2866
2867 if(VCLK > 150) data |= 0x80;
2868 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x07,0x7B,data);
2869
2870 data = 0x00;
2871 if(VCLK >= 150) data |= 0x08;
2872 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x32,0xF7,data);
2873
2874 } else {
2875
2876 if(VCLK >= 166) data |= 0x0c;
2877 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x32,0xf3,data);
2878
2879 if(VCLK >= 166) {
2880 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1f,0xe7);
2881 }
2882 }
2883
2884 /* DAC speed */
2885 if(HwInfo->jChipType >= SIS_661) {
2886
2887 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x07,0xE8,0x10);
2888
2889 } else {
2890
2891 data = 0x03;
2892 if((VCLK >= 135) && (VCLK < 160)) data = 0x02;
2893 else if((VCLK >= 160) && (VCLK < 260)) data = 0x01;
2894 else if(VCLK >= 260) data = 0x00;
2895
2896 if(HwInfo->jChipType == SIS_540) {
2897 if((VCLK == 203) || (VCLK < 234)) data = 0x02;
2898 }
2899
2900 if(HwInfo->jChipType < SIS_315H) {
2901 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x07,0xFC,data);
2902 } else {
2903 if(HwInfo->jChipType > SIS_315PRO) {
2904 if(ModeNo > 0x13) data &= 0xfc;
2905 }
2906 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x07,0xF8,data);
2907 }
2908
2909 }
2910 }
2911
2912 static void
SiS_SetCRT1ModeRegs(SiS_Private * SiS_Pr,PSIS_HW_INFO HwInfo,USHORT ModeNo,USHORT ModeIdIndex,USHORT RefreshRateTableIndex)2913 SiS_SetCRT1ModeRegs(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
2914 USHORT ModeNo,USHORT ModeIdIndex,USHORT RefreshRateTableIndex)
2915 {
2916 USHORT data,infoflag=0,modeflag;
2917 USHORT resindex,xres;
2918 #ifdef SIS315H
2919 USHORT data2,data3;
2920 ULONG longdata;
2921 UCHAR *ROMAddr = HwInfo->pjVirtualRomBase;
2922 #endif
2923
2924 if(SiS_Pr->UseCustomMode) {
2925 modeflag = SiS_Pr->CModeFlag;
2926 infoflag = SiS_Pr->CInfoFlag;
2927 xres = SiS_Pr->CHDisplay;
2928 } else {
2929 resindex = SiS_GetResInfo(SiS_Pr,ModeNo,ModeIdIndex);
2930 if(ModeNo > 0x13) {
2931 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
2932 infoflag = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag;
2933 xres = SiS_Pr->SiS_ModeResInfo[resindex].HTotal;
2934 } else {
2935 modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
2936 xres = SiS_Pr->SiS_StResInfo[resindex].HTotal;
2937 }
2938 }
2939
2940 /* Disable DPMS */
2941 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1F,0x3F);
2942
2943 data = 0;
2944 if(ModeNo > 0x13) {
2945 if(SiS_Pr->SiS_ModeType > ModeEGA) {
2946 data |= 0x02;
2947 data |= ((SiS_Pr->SiS_ModeType - ModeVGA) << 2);
2948 }
2949 if(infoflag & InterlaceMode) data |= 0x20;
2950 }
2951 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x06,0xC0,data);
2952
2953 if(HwInfo->jChipType != SIS_300) {
2954 data = 0;
2955 if(infoflag & InterlaceMode) {
2956 if(xres <= 800) data = 0x0020;
2957 else if(xres <= 1024) data = 0x0035;
2958 else data = 0x0048;
2959 }
2960 SiS_SetReg(SiS_Pr->SiS_P3d4,0x19,(data & 0xFF));
2961 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x1a,0xFC,(data >> 8));
2962 }
2963
2964 if(modeflag & HalfDCLK) {
2965 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x01,0x08);
2966 }
2967
2968 data = 0;
2969 if(modeflag & LineCompareOff) data = 0x08;
2970 if(HwInfo->jChipType == SIS_300) {
2971 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0F,0xF7,data);
2972 } else {
2973 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0F,0xB7,data);
2974 if(SiS_Pr->SiS_ModeType == ModeEGA) {
2975 if(ModeNo > 0x13) {
2976 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x0F,0x40);
2977 }
2978 }
2979 }
2980
2981 if(HwInfo->jChipType >= SIS_661) {
2982 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x31,0xfb);
2983 }
2984
2985 #ifdef SIS315H
2986 if(HwInfo->jChipType == SIS_315PRO) {
2987
2988 data = SiS_Get310DRAMType(SiS_Pr, HwInfo);
2989 data = SiS_Pr->SiS_SR15[2][data];
2990 if(SiS_Pr->SiS_ModeType == ModeText) {
2991 data &= 0xc7;
2992 } else {
2993 data2 = SiS_GetOffset(SiS_Pr,ModeNo,ModeIdIndex,
2994 RefreshRateTableIndex,HwInfo);
2995 data2 >>= 1;
2996 if(infoflag & InterlaceMode) data2 >>= 1;
2997 data3 = SiS_GetColorDepth(SiS_Pr,ModeNo,ModeIdIndex) >> 1;
2998 if(!data3) data3++;
2999 data2 /= data3;
3000 if(data2 >= 0x50) {
3001 data &= 0x0f;
3002 data |= 0x50;
3003 }
3004 }
3005 SiS_SetReg(SiS_Pr->SiS_P3c4,0x17,data);
3006
3007 } else if( (HwInfo->jChipType == SIS_330) ||
3008 ((HwInfo->jChipType == SIS_760) && (SiS_Pr->SiS_SysFlags & SF_760LFB))) {
3009
3010 data = SiS_Get310DRAMType(SiS_Pr, HwInfo);
3011 if(HwInfo->jChipType == SIS_330) {
3012 data = SiS_Pr->SiS_SR15[2][data];
3013 } else {
3014 if(SiS_Pr->SiS_ROMNew) data = ROMAddr[0xf6];
3015 else if(SiS_Pr->SiS_UseROM) data = ROMAddr[0x100 + data];
3016 else data = 0xba;
3017 }
3018 if(SiS_Pr->SiS_ModeType <= ModeEGA) {
3019 data &= 0xc7;
3020 } else {
3021 if(SiS_Pr->UseCustomMode) {
3022 data2 = SiS_Pr->CSRClock;
3023 } else {
3024 data2 = SiS_GetVCLK2Ptr(SiS_Pr,ModeNo,ModeIdIndex,
3025 RefreshRateTableIndex,HwInfo);
3026 data2 = SiS_Pr->SiS_VCLKData[data2].CLOCK;
3027 }
3028
3029 data3 = SiS_GetColorDepth(SiS_Pr,ModeNo,ModeIdIndex) >> 1;
3030 if(data3) data2 *= data3;
3031
3032 longdata = SiS_GetMCLK(SiS_Pr, HwInfo) * 1024;
3033
3034 data2 = longdata / data2;
3035
3036 if(HwInfo->jChipType == SIS_330) {
3037 if(SiS_Pr->SiS_ModeType != Mode16Bpp) {
3038 if (data2 >= 0x19c) data = 0xba;
3039 else if(data2 >= 0x140) data = 0x7a;
3040 else if(data2 >= 0x101) data = 0x3a;
3041 else if(data2 >= 0xf5) data = 0x32;
3042 else if(data2 >= 0xe2) data = 0x2a;
3043 else if(data2 >= 0xc4) data = 0x22;
3044 else if(data2 >= 0xac) data = 0x1a;
3045 else if(data2 >= 0x9e) data = 0x12;
3046 else if(data2 >= 0x8e) data = 0x0a;
3047 else data = 0x02;
3048 } else {
3049 if(data2 >= 0x127) data = 0xba;
3050 else data = 0x7a;
3051 }
3052 } else { /* 760+LFB */
3053 if (data2 >= 0x190) data = 0xba;
3054 else if(data2 >= 0xff) data = 0x7a;
3055 else if(data2 >= 0xd3) data = 0x3a;
3056 else if(data2 >= 0xa9) data = 0x1a;
3057 else if(data2 >= 0x93) data = 0x0a;
3058 else data = 0x02;
3059 }
3060 }
3061 SiS_SetReg(SiS_Pr->SiS_P3c4,0x17,data);
3062 }
3063 #endif
3064
3065 data = 0x60;
3066 if(SiS_Pr->SiS_ModeType != ModeText) {
3067 data ^= 0x60;
3068 if(SiS_Pr->SiS_ModeType != ModeEGA) {
3069 data ^= 0xA0;
3070 }
3071 }
3072 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x21,0x1F,data);
3073
3074 SiS_SetVCLKState(SiS_Pr, HwInfo, ModeNo, RefreshRateTableIndex, ModeIdIndex);
3075
3076 #ifdef SIS315H
3077 if(HwInfo->jChipType >= SIS_315H) {
3078 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x31) & 0x40) {
3079 SiS_SetReg(SiS_Pr->SiS_P3d4,0x52,0x2c);
3080 } else {
3081 SiS_SetReg(SiS_Pr->SiS_P3d4,0x52,0x6c);
3082 }
3083 }
3084 #endif
3085 }
3086
3087 /*********************************************/
3088 /* LOAD DAC */
3089 /*********************************************/
3090
3091 #if 0
3092 static void
3093 SiS_ClearDAC(SiS_Private *SiS_Pr, ULONG port)
3094 {
3095 int i;
3096
3097 OutPortByte(port, 0);
3098 port++;
3099 for (i=0; i < (256 * 3); i++) {
3100 OutPortByte(port, 0);
3101 }
3102 }
3103 #endif
3104
3105 static void
SiS_WriteDAC(SiS_Private * SiS_Pr,SISIOADDRESS DACData,USHORT shiftflag,USHORT dl,USHORT ah,USHORT al,USHORT dh)3106 SiS_WriteDAC(SiS_Private *SiS_Pr, SISIOADDRESS DACData, USHORT shiftflag,
3107 USHORT dl, USHORT ah, USHORT al, USHORT dh)
3108 {
3109 USHORT temp,bh,bl;
3110
3111 bh = ah;
3112 bl = al;
3113 if(dl != 0) {
3114 temp = bh;
3115 bh = dh;
3116 dh = temp;
3117 if(dl == 1) {
3118 temp = bl;
3119 bl = dh;
3120 dh = temp;
3121 } else {
3122 temp = bl;
3123 bl = bh;
3124 bh = temp;
3125 }
3126 }
3127 if(shiftflag) {
3128 dh <<= 2;
3129 bh <<= 2;
3130 bl <<= 2;
3131 }
3132 SiS_SetRegByte(DACData,(USHORT)dh);
3133 SiS_SetRegByte(DACData,(USHORT)bh);
3134 SiS_SetRegByte(DACData,(USHORT)bl);
3135 }
3136
3137 void
SiS_LoadDAC(SiS_Private * SiS_Pr,PSIS_HW_INFO HwInfo,USHORT ModeNo,USHORT ModeIdIndex)3138 SiS_LoadDAC(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
3139 USHORT ModeNo, USHORT ModeIdIndex)
3140 {
3141 USHORT data,data2;
3142 USHORT time,i,j,k,m,n,o;
3143 USHORT si,di,bx,dl,al,ah,dh;
3144 USHORT shiftflag;
3145 SISIOADDRESS DACAddr, DACData;
3146 const USHORT *table = NULL;
3147
3148 if(ModeNo <= 0x13) {
3149 data = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
3150 } else {
3151 if(SiS_Pr->UseCustomMode) {
3152 data = SiS_Pr->CModeFlag;
3153 } else {
3154 data = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
3155 }
3156 }
3157
3158 data &= DACInfoFlag;
3159 time = 64;
3160 if(data == 0x00) table = SiS_MDA_DAC;
3161 if(data == 0x08) table = SiS_CGA_DAC;
3162 if(data == 0x10) table = SiS_EGA_DAC;
3163 if(data == 0x18) {
3164 time = 256;
3165 table = SiS_VGA_DAC;
3166 }
3167 if(time == 256) j = 16;
3168 else j = time;
3169
3170 if( ( (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) && /* 301B-DH LCD */
3171 (SiS_Pr->SiS_VBType & VB_NoLCD) ) ||
3172 (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) || /* LCDA */
3173 (!(SiS_Pr->SiS_SetFlag & ProgrammingCRT2)) ) { /* Programming CRT1 */
3174 DACAddr = SiS_Pr->SiS_P3c8;
3175 DACData = SiS_Pr->SiS_P3c9;
3176 shiftflag = 0;
3177 SiS_SetRegByte(SiS_Pr->SiS_P3c6,0xFF);
3178 } else {
3179 shiftflag = 1;
3180 DACAddr = SiS_Pr->SiS_Part5Port;
3181 DACData = SiS_Pr->SiS_Part5Port + 1;
3182 }
3183
3184 SiS_SetRegByte(DACAddr,0x00);
3185
3186 for(i=0; i<j; i++) {
3187 data = table[i];
3188 for(k=0; k<3; k++) {
3189 data2 = 0;
3190 if(data & 0x01) data2 = 0x2A;
3191 if(data & 0x02) data2 += 0x15;
3192 if(shiftflag) data2 <<= 2;
3193 SiS_SetRegByte(DACData, data2);
3194 data >>= 2;
3195 }
3196 }
3197
3198 if(time == 256) {
3199 for(i = 16; i < 32; i++) {
3200 data = table[i];
3201 if(shiftflag) data <<= 2;
3202 for(k = 0; k < 3; k++) SiS_SetRegByte(DACData, data);
3203 }
3204 si = 32;
3205 for(m = 0; m < 9; m++) {
3206 di = si;
3207 bx = si + 4;
3208 dl = 0;
3209 for(n = 0; n < 3; n++) {
3210 for(o = 0; o < 5; o++) {
3211 dh = table[si];
3212 ah = table[di];
3213 al = table[bx];
3214 si++;
3215 SiS_WriteDAC(SiS_Pr, DACData, shiftflag, dl, ah, al, dh);
3216 }
3217 si -= 2;
3218 for(o = 0; o < 3; o++) {
3219 dh = table[bx];
3220 ah = table[di];
3221 al = table[si];
3222 si--;
3223 SiS_WriteDAC(SiS_Pr, DACData, shiftflag, dl, ah, al, dh);
3224 }
3225 dl++;
3226 } /* for n < 3 */
3227 si += 5;
3228 } /* for m < 9 */
3229 }
3230 }
3231
3232 /*********************************************/
3233 /* SET CRT1 REGISTER GROUP */
3234 /*********************************************/
3235
3236 static void
SiS_SetCRT1Group(SiS_Private * SiS_Pr,PSIS_HW_INFO HwInfo,USHORT ModeNo,USHORT ModeIdIndex)3237 SiS_SetCRT1Group(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
3238 USHORT ModeNo, USHORT ModeIdIndex)
3239 {
3240 USHORT StandTableIndex,RefreshRateTableIndex;
3241
3242 SiS_Pr->SiS_CRT1Mode = ModeNo;
3243 StandTableIndex = SiS_GetModePtr(SiS_Pr, ModeNo, ModeIdIndex);
3244 if(SiS_Pr->SiS_SetFlag & LowModeTests) {
3245 if(SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SwitchCRT2)) {
3246 SiS_DisableBridge(SiS_Pr, HwInfo);
3247 }
3248 }
3249
3250 SiS_ResetSegmentRegisters(SiS_Pr, HwInfo);
3251
3252 SiS_SetSeqRegs(SiS_Pr, StandTableIndex, HwInfo);
3253 SiS_SetMiscRegs(SiS_Pr, StandTableIndex, HwInfo);
3254 SiS_SetCRTCRegs(SiS_Pr, HwInfo, StandTableIndex);
3255 SiS_SetATTRegs(SiS_Pr, StandTableIndex, HwInfo);
3256 SiS_SetGRCRegs(SiS_Pr, StandTableIndex);
3257 SiS_ClearExt1Regs(SiS_Pr, HwInfo, ModeNo);
3258 SiS_ResetCRT1VCLK(SiS_Pr, HwInfo);
3259
3260 SiS_Pr->SiS_SelectCRT2Rate = 0;
3261 SiS_Pr->SiS_SetFlag &= (~ProgrammingCRT2);
3262
3263 #ifdef LINUX_XF86
3264 xf86DrvMsgVerb(0, X_PROBED, 4, "(init: VBType=0x%04x, VBInfo=0x%04x)\n",
3265 SiS_Pr->SiS_VBType, SiS_Pr->SiS_VBInfo);
3266 #endif
3267
3268 if(SiS_Pr->SiS_VBInfo & SetSimuScanMode) {
3269 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
3270 SiS_Pr->SiS_SetFlag |= ProgrammingCRT2;
3271 }
3272 }
3273
3274 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
3275 SiS_Pr->SiS_SetFlag |= ProgrammingCRT2;
3276 }
3277
3278 RefreshRateTableIndex = SiS_GetRatePtr(SiS_Pr, ModeNo, ModeIdIndex, HwInfo);
3279
3280 if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) {
3281 SiS_Pr->SiS_SetFlag &= ~ProgrammingCRT2;
3282 }
3283
3284 if(RefreshRateTableIndex != 0xFFFF) {
3285 SiS_SetCRT1Sync(SiS_Pr, RefreshRateTableIndex);
3286 SiS_SetCRT1CRTC(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex, HwInfo);
3287 SiS_SetCRT1Offset(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex, HwInfo);
3288 SiS_SetCRT1VCLK(SiS_Pr, ModeNo, ModeIdIndex, HwInfo, RefreshRateTableIndex);
3289 }
3290
3291 #ifdef SIS300
3292 if(HwInfo->jChipType == SIS_300) {
3293 SiS_SetCRT1FIFO_300(SiS_Pr, ModeNo,HwInfo,RefreshRateTableIndex);
3294 } else if((HwInfo->jChipType == SIS_630) ||
3295 (HwInfo->jChipType == SIS_730) ||
3296 (HwInfo->jChipType == SIS_540)) {
3297 SiS_SetCRT1FIFO_630(SiS_Pr, ModeNo, HwInfo, RefreshRateTableIndex);
3298 }
3299 #endif
3300 #ifdef SIS315H
3301 if(HwInfo->jChipType >= SIS_315H) {
3302 SiS_SetCRT1FIFO_310(SiS_Pr, ModeNo, ModeIdIndex, HwInfo);
3303 }
3304 #endif
3305
3306 SiS_SetCRT1ModeRegs(SiS_Pr, HwInfo, ModeNo, ModeIdIndex, RefreshRateTableIndex);
3307
3308 SiS_LoadDAC(SiS_Pr, HwInfo, ModeNo, ModeIdIndex);
3309
3310 #ifndef LINUX_XF86
3311 if(SiS_Pr->SiS_flag_clearbuffer) {
3312 SiS_ClearBuffer(SiS_Pr,HwInfo,ModeNo);
3313 }
3314 #endif
3315
3316 if(!(SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SwitchCRT2 | SetCRT2ToLCDA))) {
3317 SiS_WaitRetrace1(SiS_Pr);
3318 SiS_DisplayOn(SiS_Pr);
3319 }
3320 }
3321
3322 /*********************************************/
3323 /* HELPER: RESET VIDEO BRIDGE */
3324 /*********************************************/
3325
3326 static void
SiS_ResetVB(SiS_Private * SiS_Pr,PSIS_HW_INFO HwInfo)3327 SiS_ResetVB(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
3328 {
3329 UCHAR *ROMAddr = HwInfo->pjVirtualRomBase;
3330 USHORT temp;
3331
3332 if(SiS_Pr->SiS_UseROM) {
3333 if(HwInfo->jChipType < SIS_330) {
3334 temp = ROMAddr[VB310Data_1_2_Offset] | 0x40;
3335 if(SiS_Pr->SiS_ROMNew) temp = ROMAddr[0x80] | 0x40;
3336 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x02,temp);
3337 } else if(HwInfo->jChipType >= SIS_661) {
3338 temp = ROMAddr[0x7e];
3339 if(SiS_Pr->SiS_ROMNew) temp = ROMAddr[0x80];
3340 if(HwInfo->jChipType >= SIS_660) temp |= 0x40;
3341 else if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x7b) >= 100) temp |= 0x40;
3342 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x02,temp);
3343 }
3344 }
3345 }
3346
3347 /*********************************************/
3348 /* HELPER: SET VIDEO REGISTERS */
3349 /*********************************************/
3350
3351 static void
SiS_StrangeStuff(SiS_Private * SiS_Pr,PSIS_HW_INFO HwInfo)3352 SiS_StrangeStuff(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
3353 {
3354 if((IS_SIS651) || (IS_SISM650)) {
3355 SiS_SetReg(SiS_Pr->SiS_VidCapt, 0x3f, 0x00); /* Fiddle with capture regs */
3356 SiS_SetReg(SiS_Pr->SiS_VidCapt, 0x00, 0x00);
3357 SiS_SetReg(SiS_Pr->SiS_VidPlay, 0x00, 0x86); /* (BIOS does NOT unlock) */
3358 SiS_SetRegAND(SiS_Pr->SiS_VidPlay, 0x30, 0xfe); /* Fiddle with video regs */
3359 SiS_SetRegAND(SiS_Pr->SiS_VidPlay, 0x3f, 0xef);
3360 }
3361 /* !!! This does not support modes < 0x13 !!! */
3362 }
3363
3364 /*********************************************/
3365 /* XFree86: SET SCREEN PITCH */
3366 /*********************************************/
3367
3368 #ifdef LINUX_XF86
3369 static void
SiS_SetPitchCRT1(SiS_Private * SiS_Pr,ScrnInfoPtr pScrn)3370 SiS_SetPitchCRT1(SiS_Private *SiS_Pr, ScrnInfoPtr pScrn)
3371 {
3372 SISPtr pSiS = SISPTR(pScrn);
3373 UShort HDisplay = pSiS->scrnPitch >> 3;
3374
3375 SiS_SetReg(SiS_Pr->SiS_P3d4,0x13,(HDisplay & 0xFF));
3376 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0E,0xF0,(HDisplay>>8));
3377 }
3378
3379 static void
SiS_SetPitchCRT2(SiS_Private * SiS_Pr,ScrnInfoPtr pScrn)3380 SiS_SetPitchCRT2(SiS_Private *SiS_Pr, ScrnInfoPtr pScrn)
3381 {
3382 SISPtr pSiS = SISPTR(pScrn);
3383 UShort HDisplay = pSiS->scrnPitch2 >> 3;
3384
3385 /* Unlock CRT2 */
3386 if(pSiS->VGAEngine == SIS_315_VGA)
3387 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2F, 0x01);
3388 else
3389 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x24, 0x01);
3390
3391 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x07,(HDisplay & 0xFF));
3392 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x09,0xF0,(HDisplay >> 8));
3393 }
3394
3395 static void
SiS_SetPitch(SiS_Private * SiS_Pr,ScrnInfoPtr pScrn)3396 SiS_SetPitch(SiS_Private *SiS_Pr, ScrnInfoPtr pScrn)
3397 {
3398 SISPtr pSiS = SISPTR(pScrn);
3399 BOOLEAN isslavemode = FALSE;
3400
3401 if( (pSiS->VBFlags & VB_VIDEOBRIDGE) &&
3402 ( ((pSiS->VGAEngine == SIS_300_VGA) &&
3403 (SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00) & 0xa0) == 0x20) ||
3404 ((pSiS->VGAEngine == SIS_315_VGA) &&
3405 (SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00) & 0x50) == 0x10) ) ) {
3406 isslavemode = TRUE;
3407 }
3408
3409 /* We need to set pitch for CRT1 if bridge is in slave mode, too */
3410 if((pSiS->VBFlags & DISPTYPE_DISP1) || (isslavemode)) {
3411 SiS_SetPitchCRT1(SiS_Pr, pScrn);
3412 }
3413 /* We must not set the pitch for CRT2 if bridge is in slave mode */
3414 if((pSiS->VBFlags & DISPTYPE_DISP2) && (!isslavemode)) {
3415 SiS_SetPitchCRT2(SiS_Pr, pScrn);
3416 }
3417 }
3418 #endif
3419
3420 /*********************************************/
3421 /* SiSSetMode() */
3422 /*********************************************/
3423
3424 #ifdef LINUX_XF86
3425 /* We need pScrn for setting the pitch correctly */
3426 BOOLEAN
SiSSetMode(SiS_Private * SiS_Pr,PSIS_HW_INFO HwInfo,ScrnInfoPtr pScrn,USHORT ModeNo,BOOLEAN dosetpitch)3427 SiSSetMode(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,ScrnInfoPtr pScrn,USHORT ModeNo, BOOLEAN dosetpitch)
3428 #else
3429 BOOLEAN
3430 SiSSetMode(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,USHORT ModeNo)
3431 #endif
3432 {
3433 USHORT ModeIdIndex;
3434 SISIOADDRESS BaseAddr = HwInfo->ulIOAddress;
3435 unsigned char backupreg=0;
3436 #ifndef LINUX_XF86
3437 USHORT KeepLockReg;
3438 ULONG temp;
3439
3440 SiS_Pr->UseCustomMode = FALSE;
3441 SiS_Pr->CRT1UsesCustomMode = FALSE;
3442 #endif
3443
3444 if(SiS_Pr->UseCustomMode) {
3445 ModeNo = 0xfe;
3446 }
3447
3448 SiSInitPtr(SiS_Pr, HwInfo);
3449 SiSRegInit(SiS_Pr, BaseAddr);
3450 SiS_GetSysFlags(SiS_Pr, HwInfo);
3451
3452 #if defined(LINUX_XF86) && (defined(i386) || defined(__i386) || defined(__i386__) || defined(__AMD64__))
3453 if(pScrn) SiS_Pr->SiS_VGAINFO = SiS_GetSetBIOSScratch(pScrn, 0x489, 0xff);
3454 else
3455 #endif
3456 SiS_Pr->SiS_VGAINFO = 0x11;
3457
3458 SiSInitPCIetc(SiS_Pr, HwInfo);
3459 SiSSetLVDSetc(SiS_Pr, HwInfo);
3460 SiSDetermineROMUsage(SiS_Pr, HwInfo);
3461
3462 SiS_Pr->SiS_flag_clearbuffer = 0;
3463
3464 if(!SiS_Pr->UseCustomMode) {
3465 #ifndef LINUX_XF86
3466 if(!(ModeNo & 0x80)) SiS_Pr->SiS_flag_clearbuffer = 1;
3467 #endif
3468 ModeNo &= 0x7f;
3469 }
3470
3471 #ifndef LINUX_XF86
3472 KeepLockReg = SiS_GetReg(SiS_Pr->SiS_P3c4,0x05);
3473 #endif
3474 SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x86);
3475
3476 SiS_UnLockCRT2(SiS_Pr, HwInfo);
3477
3478 if(!SiS_Pr->UseCustomMode) {
3479 if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return FALSE;
3480 } else {
3481 ModeIdIndex = 0;
3482 }
3483
3484 SiS_GetVBType(SiS_Pr, HwInfo);
3485
3486 /* Init/restore some VB registers */
3487
3488 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
3489 if(HwInfo->jChipType >= SIS_315H) {
3490 SiS_ResetVB(SiS_Pr, HwInfo);
3491 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x32,0x10);
3492 SiS_SetRegOR(SiS_Pr->SiS_Part2Port,0x00,0x0c);
3493 backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38);
3494 } else {
3495 backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35);
3496 }
3497 }
3498
3499 /* Get VB information (connectors, connected devices) */
3500 SiS_GetVBInfo(SiS_Pr, ModeNo, ModeIdIndex, HwInfo, (SiS_Pr->UseCustomMode) ? 0 : 1);
3501 SiS_SetYPbPr(SiS_Pr, HwInfo);
3502 SiS_SetTVMode(SiS_Pr, ModeNo, ModeIdIndex, HwInfo);
3503 SiS_GetLCDResInfo(SiS_Pr, ModeNo, ModeIdIndex, HwInfo);
3504 SiS_SetLowModeTest(SiS_Pr, ModeNo, HwInfo);
3505
3506 #ifndef LINUX_XF86
3507 /* 3. Check memory size (Kernel framebuffer driver only) */
3508 temp = SiS_CheckMemorySize(SiS_Pr, HwInfo, ModeNo, ModeIdIndex);
3509 if(!temp) return(0);
3510 #endif
3511
3512 if(HwInfo->jChipType >= SIS_315H) {
3513 SiS_SetupCR5x(SiS_Pr, HwInfo);
3514 }
3515
3516 if(SiS_Pr->UseCustomMode) {
3517 SiS_Pr->CRT1UsesCustomMode = TRUE;
3518 SiS_Pr->CSRClock_CRT1 = SiS_Pr->CSRClock;
3519 SiS_Pr->CModeFlag_CRT1 = SiS_Pr->CModeFlag;
3520 } else {
3521 SiS_Pr->CRT1UsesCustomMode = FALSE;
3522 }
3523
3524 /* Set mode on CRT1 */
3525 if( (SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SetCRT2ToLCDA)) ||
3526 (!(SiS_Pr->SiS_VBInfo & SwitchCRT2)) ) {
3527 SiS_SetCRT1Group(SiS_Pr, HwInfo, ModeNo, ModeIdIndex);
3528 }
3529
3530 /* Set mode on CRT2 */
3531 if(SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SwitchCRT2 | SetCRT2ToLCDA)) {
3532 if( (SiS_Pr->SiS_VBType & VB_SISVB) ||
3533 (SiS_Pr->SiS_IF_DEF_LVDS == 1) ||
3534 (SiS_Pr->SiS_IF_DEF_CH70xx != 0) ||
3535 (SiS_Pr->SiS_IF_DEF_TRUMPION != 0) ) {
3536 SiS_SetCRT2Group(SiS_Pr, HwInfo, ModeNo);
3537 }
3538 }
3539
3540 SiS_HandleCRT1(SiS_Pr);
3541
3542 SiS_StrangeStuff(SiS_Pr, HwInfo);
3543
3544 SiS_DisplayOn(SiS_Pr);
3545 SiS_SetRegByte(SiS_Pr->SiS_P3c6,0xFF);
3546
3547 if(HwInfo->jChipType >= SIS_315H) {
3548 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
3549 if(!(SiS_IsDualEdge(SiS_Pr, HwInfo))) {
3550 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x13,0xfb);
3551 }
3552 }
3553 }
3554
3555 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
3556 if(HwInfo->jChipType >= SIS_315H) {
3557 if(!SiS_Pr->SiS_ROMNew) {
3558 if(SiS_IsVAMode(SiS_Pr,HwInfo)) {
3559 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x35,0x01);
3560 } else {
3561 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x35,0xFE);
3562 }
3563 }
3564
3565 SiS_SetReg(SiS_Pr->SiS_P3d4,0x38,backupreg);
3566
3567 if((IS_SIS650) && (SiS_GetReg(SiS_Pr->SiS_P3d4,0x30) & 0xfc)) {
3568 if((ModeNo == 0x03) || (ModeNo == 0x10)) {
3569 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x51,0x80);
3570 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x56,0x08);
3571 }
3572 }
3573
3574 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x30) & SetCRT2ToLCD) {
3575 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x38,0xfc);
3576 }
3577 } else if((HwInfo->jChipType == SIS_630) ||
3578 (HwInfo->jChipType == SIS_730)) {
3579 SiS_SetReg(SiS_Pr->SiS_P3d4,0x35,backupreg);
3580 }
3581 }
3582
3583 #ifdef LINUX_XF86
3584 if(pScrn) {
3585 /* SetPitch: Adapt to virtual size & position */
3586 if((ModeNo > 0x13) && (dosetpitch)) {
3587 SiS_SetPitch(SiS_Pr, pScrn);
3588 }
3589
3590 /* Backup/Set ModeNo in BIOS scratch area */
3591 SiS_GetSetModeID(pScrn, ModeNo);
3592 }
3593 #endif
3594
3595 #ifndef LINUX_XF86 /* We never lock registers in XF86 */
3596 if(KeepLockReg == 0xA1) SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x86);
3597 else SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x00);
3598 #endif
3599
3600 return TRUE;
3601 }
3602
3603 /*********************************************/
3604 /* XFree86: SiSBIOSSetMode() */
3605 /* for non-Dual-Head mode */
3606 /*********************************************/
3607
3608 #ifdef LINUX_XF86
3609 BOOLEAN
SiSBIOSSetMode(SiS_Private * SiS_Pr,PSIS_HW_INFO HwInfo,ScrnInfoPtr pScrn,DisplayModePtr mode,BOOLEAN IsCustom)3610 SiSBIOSSetMode(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, ScrnInfoPtr pScrn,
3611 DisplayModePtr mode, BOOLEAN IsCustom)
3612 {
3613 SISPtr pSiS = SISPTR(pScrn);
3614 UShort ModeNo=0;
3615
3616 SiS_Pr->UseCustomMode = FALSE;
3617
3618 if((IsCustom) && (SiS_CheckBuildCustomMode(pScrn, mode, pSiS->VBFlags))) {
3619
3620 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, "Setting custom mode %dx%d\n",
3621 SiS_Pr->CHDisplay,
3622 (mode->Flags & V_INTERLACE ? SiS_Pr->CVDisplay * 2 :
3623 (mode->Flags & V_DBLSCAN ? SiS_Pr->CVDisplay / 2 :
3624 SiS_Pr->CVDisplay)));
3625
3626 return(SiSSetMode(SiS_Pr, HwInfo, pScrn, ModeNo, TRUE));
3627
3628 }
3629
3630 ModeNo = SiS_CalcModeIndex(pScrn, mode, pSiS->VBFlags, pSiS->HaveCustomModes);
3631 if(!ModeNo) return FALSE;
3632
3633 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, "Setting standard mode 0x%x\n", ModeNo);
3634
3635 return(SiSSetMode(SiS_Pr, HwInfo, pScrn, ModeNo, TRUE));
3636 }
3637
3638 /*********************************************/
3639 /* XFree86: SiSBIOSSetModeCRT2() */
3640 /* for Dual-Head modes */
3641 /*********************************************/
3642 BOOLEAN
SiSBIOSSetModeCRT2(SiS_Private * SiS_Pr,PSIS_HW_INFO HwInfo,ScrnInfoPtr pScrn,DisplayModePtr mode,BOOLEAN IsCustom)3643 SiSBIOSSetModeCRT2(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, ScrnInfoPtr pScrn,
3644 DisplayModePtr mode, BOOLEAN IsCustom)
3645 {
3646 USHORT ModeIdIndex;
3647 SISIOADDRESS BaseAddr = HwInfo->ulIOAddress;
3648 UShort ModeNo = 0;
3649 unsigned char backupreg=0;
3650 SISPtr pSiS = SISPTR(pScrn);
3651 #ifdef SISDUALHEAD
3652 SISEntPtr pSiSEnt = pSiS->entityPrivate;
3653 #endif
3654
3655 SiS_Pr->UseCustomMode = FALSE;
3656
3657 /* Remember: Custom modes for CRT2 are ONLY supported
3658 * -) on 315/330 series,
3659 * -) on the 30x/B/C, and
3660 * -) if CRT2 is LCD or VGA
3661 */
3662
3663 if((IsCustom) && (SiS_CheckBuildCustomMode(pScrn, mode, pSiS->VBFlags))) {
3664
3665 ModeNo = 0xfe;
3666
3667 } else {
3668
3669 BOOLEAN havecustommodes = pSiS->HaveCustomModes;
3670
3671 #ifdef SISMERGED
3672 if(pSiS->MergedFB) havecustommodes = pSiS->HaveCustomModes2;
3673 #endif
3674
3675 ModeNo = SiS_CalcModeIndex(pScrn, mode, pSiS->VBFlags, havecustommodes);
3676 if(!ModeNo) return FALSE;
3677
3678 }
3679
3680 SiSRegInit(SiS_Pr, BaseAddr);
3681 SiSInitPtr(SiS_Pr, HwInfo);
3682 SiS_GetSysFlags(SiS_Pr, HwInfo);
3683 #if (defined(i386) || defined(__i386) || defined(__i386__) || defined(__AMD64__))
3684 SiS_Pr->SiS_VGAINFO = SiS_GetSetBIOSScratch(pScrn, 0x489, 0xff);
3685 #else
3686 SiS_Pr->SiS_VGAINFO = 0x11;
3687 #endif
3688 SiSInitPCIetc(SiS_Pr, HwInfo);
3689 SiSSetLVDSetc(SiS_Pr, HwInfo);
3690 SiSDetermineROMUsage(SiS_Pr, HwInfo);
3691
3692 /* Save mode info so we can set it from within SetMode for CRT1 */
3693 #ifdef SISDUALHEAD
3694 if(pSiS->DualHeadMode) {
3695 pSiSEnt->CRT2ModeNo = ModeNo;
3696 pSiSEnt->CRT2DMode = mode;
3697 pSiSEnt->CRT2IsCustom = IsCustom;
3698 pSiSEnt->CRT2CR30 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x30);
3699 pSiSEnt->CRT2CR31 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x31);
3700 pSiSEnt->CRT2CR35 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35);
3701 pSiSEnt->CRT2CR38 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38);
3702 #if 0
3703 /* We can't set CRT2 mode before CRT1 mode is set */
3704 if(pSiSEnt->CRT1ModeNo == -1) {
3705 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
3706 "Setting CRT2 mode delayed until after setting CRT1 mode\n");
3707 return TRUE;
3708 }
3709 #endif
3710 pSiSEnt->CRT2ModeSet = TRUE;
3711 }
3712 #endif
3713
3714 /* We don't clear the buffer under X */
3715 SiS_Pr->SiS_flag_clearbuffer=0;
3716
3717 if(SiS_Pr->UseCustomMode) {
3718
3719 USHORT temptemp = SiS_Pr->CVDisplay;
3720
3721 if(SiS_Pr->CModeFlag & DoubleScanMode) temptemp >>= 1;
3722 else if(SiS_Pr->CInfoFlag & InterlaceMode) temptemp <<= 1;
3723
3724 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
3725 "Setting custom mode %dx%d on CRT2\n",
3726 SiS_Pr->CHDisplay, temptemp);
3727
3728 } else {
3729
3730 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
3731 "Setting standard mode 0x%x on CRT2\n", ModeNo);
3732
3733 }
3734
3735 SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x86);
3736
3737 SiS_UnLockCRT2(SiS_Pr, HwInfo);
3738
3739 if(!SiS_Pr->UseCustomMode) {
3740 if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return FALSE;
3741 } else {
3742 ModeIdIndex = 0;
3743 }
3744
3745 SiS_GetVBType(SiS_Pr, HwInfo);
3746
3747 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
3748 if(HwInfo->jChipType >= SIS_315H) {
3749 SiS_ResetVB(SiS_Pr, HwInfo);
3750 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x32,0x10);
3751 SiS_SetRegOR(SiS_Pr->SiS_Part2Port,0x00,0x0c);
3752 backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38);
3753 } else {
3754 backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35);
3755 }
3756 }
3757
3758 /* Get VB information (connectors, connected devices) */
3759 if(!SiS_Pr->UseCustomMode) {
3760 SiS_GetVBInfo(SiS_Pr, ModeNo, ModeIdIndex, HwInfo, 1);
3761 } else {
3762 /* If this is a custom mode, we don't check the modeflag for CRT2Mode */
3763 SiS_GetVBInfo(SiS_Pr, ModeNo, ModeIdIndex, HwInfo, 0);
3764 }
3765 SiS_SetYPbPr(SiS_Pr, HwInfo);
3766 SiS_SetTVMode(SiS_Pr, ModeNo, ModeIdIndex, HwInfo);
3767 SiS_GetLCDResInfo(SiS_Pr, ModeNo, ModeIdIndex, HwInfo);
3768 SiS_SetLowModeTest(SiS_Pr, ModeNo, HwInfo);
3769
3770 /* Set mode on CRT2 */
3771 if( (SiS_Pr->SiS_VBType & VB_SISVB) ||
3772 (SiS_Pr->SiS_IF_DEF_LVDS == 1) ||
3773 (SiS_Pr->SiS_IF_DEF_CH70xx != 0) ||
3774 (SiS_Pr->SiS_IF_DEF_TRUMPION != 0) ) {
3775 SiS_SetCRT2Group(SiS_Pr, HwInfo, ModeNo);
3776 }
3777
3778 SiS_StrangeStuff(SiS_Pr, HwInfo);
3779
3780 SiS_DisplayOn(SiS_Pr);
3781 SiS_SetRegByte(SiS_Pr->SiS_P3c6,0xFF);
3782
3783 if(HwInfo->jChipType >= SIS_315H) {
3784 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
3785 if(!(SiS_IsDualEdge(SiS_Pr, HwInfo))) {
3786 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x13,0xfb);
3787 }
3788 }
3789 }
3790
3791 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
3792 if(HwInfo->jChipType >= SIS_315H) {
3793 if(!SiS_Pr->SiS_ROMNew) {
3794 if(SiS_IsVAMode(SiS_Pr,HwInfo)) {
3795 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x35,0x01);
3796 } else {
3797 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x35,0xFE);
3798 }
3799 }
3800
3801 SiS_SetReg(SiS_Pr->SiS_P3d4,0x38,backupreg);
3802
3803 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x30) & SetCRT2ToLCD) {
3804 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x38,0xfc);
3805 }
3806 } else if((HwInfo->jChipType == SIS_630) ||
3807 (HwInfo->jChipType == SIS_730)) {
3808 SiS_SetReg(SiS_Pr->SiS_P3d4,0x35,backupreg);
3809 }
3810 }
3811
3812 /* SetPitch: Adapt to virtual size & position */
3813 SiS_SetPitchCRT2(SiS_Pr, pScrn);
3814
3815 return TRUE;
3816 }
3817
3818 /*********************************************/
3819 /* XFree86: SiSBIOSSetModeCRT1() */
3820 /* for Dual-Head modes */
3821 /*********************************************/
3822
3823 BOOLEAN
SiSBIOSSetModeCRT1(SiS_Private * SiS_Pr,PSIS_HW_INFO HwInfo,ScrnInfoPtr pScrn,DisplayModePtr mode,BOOLEAN IsCustom)3824 SiSBIOSSetModeCRT1(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, ScrnInfoPtr pScrn,
3825 DisplayModePtr mode, BOOLEAN IsCustom)
3826 {
3827 SISPtr pSiS = SISPTR(pScrn);
3828 SISIOADDRESS BaseAddr = HwInfo->ulIOAddress;
3829 USHORT ModeIdIndex, ModeNo=0;
3830 UCHAR backupreg=0;
3831 #ifdef SISDUALHEAD
3832 SISEntPtr pSiSEnt = pSiS->entityPrivate;
3833 UCHAR backupcr30, backupcr31, backupcr38, backupcr35, backupp40d=0;
3834 BOOLEAN backupcustom;
3835 #endif
3836
3837 SiS_Pr->UseCustomMode = FALSE;
3838
3839 if((IsCustom) && (SiS_CheckBuildCustomMode(pScrn, mode, pSiS->VBFlags))) {
3840
3841 USHORT temptemp = SiS_Pr->CVDisplay;
3842
3843 if(SiS_Pr->CModeFlag & DoubleScanMode) temptemp >>= 1;
3844 else if(SiS_Pr->CInfoFlag & InterlaceMode) temptemp <<= 1;
3845
3846 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
3847 "Setting custom mode %dx%d on CRT1\n",
3848 SiS_Pr->CHDisplay, temptemp);
3849 ModeNo = 0xfe;
3850
3851 } else {
3852
3853 ModeNo = SiS_CalcModeIndex(pScrn, mode, pSiS->VBFlags, pSiS->HaveCustomModes);
3854 if(!ModeNo) return FALSE;
3855
3856 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
3857 "Setting standard mode 0x%x on CRT1\n", ModeNo);
3858 }
3859
3860 SiSInitPtr(SiS_Pr, HwInfo);
3861 SiSRegInit(SiS_Pr, BaseAddr);
3862 SiS_GetSysFlags(SiS_Pr, HwInfo);
3863 #if (defined(i386) || defined(__i386) || defined(__i386__) || defined(__AMD64__))
3864 SiS_Pr->SiS_VGAINFO = SiS_GetSetBIOSScratch(pScrn, 0x489, 0xff);
3865 #else
3866 SiS_Pr->SiS_VGAINFO = 0x11;
3867 #endif
3868 SiSInitPCIetc(SiS_Pr, HwInfo);
3869 SiSSetLVDSetc(SiS_Pr, HwInfo);
3870 SiSDetermineROMUsage(SiS_Pr, HwInfo);
3871
3872 /* We don't clear the buffer under X */
3873 SiS_Pr->SiS_flag_clearbuffer = 0;
3874
3875 SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x86);
3876
3877 SiS_UnLockCRT2(SiS_Pr, HwInfo);
3878
3879 if(!SiS_Pr->UseCustomMode) {
3880 if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return FALSE;
3881 } else {
3882 ModeIdIndex = 0;
3883 }
3884
3885 /* Determine VBType */
3886 SiS_GetVBType(SiS_Pr, HwInfo);
3887
3888 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
3889 if(HwInfo->jChipType >= SIS_315H) {
3890 backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38);
3891 } else {
3892 backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35);
3893 }
3894 }
3895
3896 /* Get VB information (connectors, connected devices) */
3897 /* (We don't care if the current mode is a CRT2 mode) */
3898 SiS_GetVBInfo(SiS_Pr, ModeNo, ModeIdIndex, HwInfo, 0);
3899 SiS_SetYPbPr(SiS_Pr, HwInfo);
3900 SiS_SetTVMode(SiS_Pr, ModeNo, ModeIdIndex, HwInfo);
3901 SiS_GetLCDResInfo(SiS_Pr, ModeNo, ModeIdIndex, HwInfo);
3902 SiS_SetLowModeTest(SiS_Pr, ModeNo, HwInfo);
3903
3904 if(HwInfo->jChipType >= SIS_315H) {
3905 SiS_SetupCR5x(SiS_Pr, HwInfo);
3906 }
3907
3908 /* Set mode on CRT1 */
3909 SiS_SetCRT1Group(SiS_Pr, HwInfo, ModeNo, ModeIdIndex);
3910 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
3911 SiS_SetCRT2Group(SiS_Pr, HwInfo, ModeNo);
3912 }
3913
3914 /* SetPitch: Adapt to virtual size & position */
3915 SiS_SetPitchCRT1(SiS_Pr, pScrn);
3916
3917 #ifdef SISDUALHEAD
3918 if(pSiS->DualHeadMode) {
3919 pSiSEnt->CRT1ModeNo = ModeNo;
3920 pSiSEnt->CRT1DMode = mode;
3921 }
3922 #endif
3923
3924 if(SiS_Pr->UseCustomMode) {
3925 SiS_Pr->CRT1UsesCustomMode = TRUE;
3926 SiS_Pr->CSRClock_CRT1 = SiS_Pr->CSRClock;
3927 SiS_Pr->CModeFlag_CRT1 = SiS_Pr->CModeFlag;
3928 } else {
3929 SiS_Pr->CRT1UsesCustomMode = FALSE;
3930 }
3931
3932 /* Reset CRT2 if changing mode on CRT1 */
3933 #ifdef SISDUALHEAD
3934 if(pSiS->DualHeadMode) {
3935 if(pSiSEnt->CRT2ModeNo != -1) {
3936 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
3937 "(Re-)Setting mode for CRT2\n");
3938 backupcustom = SiS_Pr->UseCustomMode;
3939 backupcr30 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x30);
3940 backupcr31 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x31);
3941 backupcr35 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35);
3942 backupcr38 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38);
3943 if(SiS_Pr->SiS_VBType & VB_SISVB) {
3944 /* Backup LUT-enable */
3945 if(pSiSEnt->CRT2ModeSet) {
3946 backupp40d = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x0d) & 0x08;
3947 }
3948 }
3949 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
3950 SiS_SetReg(SiS_Pr->SiS_P3d4,0x30,pSiSEnt->CRT2CR30);
3951 SiS_SetReg(SiS_Pr->SiS_P3d4,0x31,pSiSEnt->CRT2CR31);
3952 SiS_SetReg(SiS_Pr->SiS_P3d4,0x35,pSiSEnt->CRT2CR35);
3953 SiS_SetReg(SiS_Pr->SiS_P3d4,0x38,pSiSEnt->CRT2CR38);
3954 }
3955 SiSBIOSSetModeCRT2(SiS_Pr, HwInfo, pSiSEnt->pScrn_1,
3956 pSiSEnt->CRT2DMode, pSiSEnt->CRT2IsCustom);
3957 SiS_SetReg(SiS_Pr->SiS_P3d4,0x30,backupcr30);
3958 SiS_SetReg(SiS_Pr->SiS_P3d4,0x31,backupcr31);
3959 SiS_SetReg(SiS_Pr->SiS_P3d4,0x35,backupcr35);
3960 SiS_SetReg(SiS_Pr->SiS_P3d4,0x38,backupcr38);
3961 if(SiS_Pr->SiS_VBType & VB_SISVB) {
3962 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x0d, ~0x08, backupp40d);
3963 }
3964 SiS_Pr->UseCustomMode = backupcustom;
3965 }
3966 }
3967 #endif
3968
3969 /* Warning: From here, the custom mode entries in SiS_Pr are
3970 * possibly overwritten
3971 */
3972
3973 SiS_HandleCRT1(SiS_Pr);
3974
3975 SiS_StrangeStuff(SiS_Pr, HwInfo);
3976
3977 SiS_DisplayOn(SiS_Pr);
3978 SiS_SetRegByte(SiS_Pr->SiS_P3c6,0xFF);
3979
3980 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
3981 if(HwInfo->jChipType >= SIS_315H) {
3982 SiS_SetReg(SiS_Pr->SiS_P3d4,0x38,backupreg);
3983 } else if((HwInfo->jChipType == SIS_630) ||
3984 (HwInfo->jChipType == SIS_730)) {
3985 SiS_SetReg(SiS_Pr->SiS_P3d4,0x35,backupreg);
3986 }
3987 }
3988
3989 /* Backup/Set ModeNo in BIOS scratch area */
3990 SiS_GetSetModeID(pScrn,ModeNo);
3991
3992 return TRUE;
3993 }
3994 #endif /* Linux_XF86 */
3995
3996
3997 #ifdef LINUX_XF86
3998 BOOLEAN
SiS_GetPanelID(SiS_Private * SiS_Pr,PSIS_HW_INFO HwInfo)3999 SiS_GetPanelID(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
4000 {
4001 const USHORT PanelTypeTable300[16] = {
4002 0xc101, 0xc117, 0x0121, 0xc135, 0xc142, 0xc152, 0xc162, 0xc072,
4003 0xc181, 0xc192, 0xc1a1, 0xc1b6, 0xc1c2, 0xc0d2, 0xc1e2, 0xc1f2
4004 };
4005 const USHORT PanelTypeTable31030x[16] = {
4006 0xc102, 0xc112, 0x0122, 0xc132, 0xc142, 0xc152, 0xc169, 0xc179,
4007 0x0189, 0xc192, 0xc1a2, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
4008 };
4009 const USHORT PanelTypeTable310LVDS[16] = {
4010 0xc111, 0xc122, 0xc133, 0xc144, 0xc155, 0xc166, 0xc177, 0xc188,
4011 0xc199, 0xc0aa, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
4012 };
4013 USHORT tempax,tempbx,temp;
4014
4015 if(HwInfo->jChipType < SIS_315H) {
4016
4017 tempax = SiS_GetReg(SiS_Pr->SiS_P3c4,0x18);
4018 tempbx = tempax & 0x0F;
4019 if(!(tempax & 0x10)){
4020 if(SiS_Pr->SiS_IF_DEF_LVDS == 1){
4021 tempbx = 0;
4022 temp = SiS_GetReg(SiS_Pr->SiS_P3c4,0x38);
4023 if(temp & 0x40) tempbx |= 0x08;
4024 if(temp & 0x20) tempbx |= 0x02;
4025 if(temp & 0x01) tempbx |= 0x01;
4026 temp = SiS_GetReg(SiS_Pr->SiS_P3c4,0x39);
4027 if(temp & 0x80) tempbx |= 0x04;
4028 } else {
4029 return 0;
4030 }
4031 }
4032 tempbx = PanelTypeTable300[tempbx];
4033 tempbx |= LCDSync;
4034 temp = tempbx & 0x00FF;
4035 SiS_SetReg(SiS_Pr->SiS_P3d4,0x36,temp);
4036 temp = (tempbx & 0xFF00) >> 8;
4037 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x37,~(LCDSyncBit|LCDRGB18Bit),temp);
4038
4039 } else {
4040
4041 if(HwInfo->jChipType >= SIS_661) return 0;
4042
4043 tempax = SiS_GetReg(SiS_Pr->SiS_P3c4,0x1a);
4044 tempax &= 0x1e;
4045 tempax >>= 1;
4046 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
4047 if(tempax == 0) {
4048 /* TODO: Include HUGE detection routine
4049 (Probably not worth bothering)
4050 */
4051 return 0;
4052 }
4053 temp = tempax & 0xff;
4054 tempax--;
4055 tempbx = PanelTypeTable310LVDS[tempax];
4056 } else {
4057 tempbx = PanelTypeTable31030x[tempax];
4058 temp = tempbx & 0xff;
4059 }
4060 SiS_SetReg(SiS_Pr->SiS_P3d4,0x36,temp);
4061 tempbx = (tempbx & 0xff00) >> 8;
4062 temp = tempbx & 0xc1;
4063 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x37,~(LCDSyncBit|LCDRGB18Bit),temp);
4064 if(SiS_Pr->SiS_VBType & VB_SISVB) {
4065 temp = tempbx & 0x04;
4066 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x39,0xfb,temp);
4067 }
4068
4069 }
4070 return 1;
4071 }
4072 #endif
4073
4074 #ifndef GETBITSTR
4075 #define BITMASK(h,l) (((unsigned)(1U << ((h)-(l)+1))-1)<<(l))
4076 #define GENMASK(mask) BITMASK(1?mask,0?mask)
4077 #define GETBITS(var,mask) (((var) & GENMASK(mask)) >> (0?mask))
4078 #define GETBITSTR(val,from,to) ((GETBITS(val,from)) << (0?to))
4079 #endif
4080
4081 static void
SiS_CalcCRRegisters(SiS_Private * SiS_Pr,int depth)4082 SiS_CalcCRRegisters(SiS_Private *SiS_Pr, int depth)
4083 {
4084 SiS_Pr->CCRT1CRTC[0] = ((SiS_Pr->CHTotal >> 3) - 5) & 0xff; /* CR0 */
4085 SiS_Pr->CCRT1CRTC[1] = (SiS_Pr->CHDisplay >> 3) - 1; /* CR1 */
4086 SiS_Pr->CCRT1CRTC[2] = (SiS_Pr->CHBlankStart >> 3) - 1; /* CR2 */
4087 SiS_Pr->CCRT1CRTC[3] = (((SiS_Pr->CHBlankEnd >> 3) - 1) & 0x1F) | 0x80; /* CR3 */
4088 SiS_Pr->CCRT1CRTC[4] = (SiS_Pr->CHSyncStart >> 3) + 3; /* CR4 */
4089 SiS_Pr->CCRT1CRTC[5] = ((((SiS_Pr->CHBlankEnd >> 3) - 1) & 0x20) << 2) | /* CR5 */
4090 (((SiS_Pr->CHSyncEnd >> 3) + 3) & 0x1F);
4091
4092 SiS_Pr->CCRT1CRTC[6] = (SiS_Pr->CVTotal - 2) & 0xFF; /* CR6 */
4093 SiS_Pr->CCRT1CRTC[7] = (((SiS_Pr->CVTotal - 2) & 0x100) >> 8) /* CR7 */
4094 | (((SiS_Pr->CVDisplay - 1) & 0x100) >> 7)
4095 | ((SiS_Pr->CVSyncStart & 0x100) >> 6)
4096 | (((SiS_Pr->CVBlankStart - 1) & 0x100) >> 5)
4097 | 0x10
4098 | (((SiS_Pr->CVTotal - 2) & 0x200) >> 4)
4099 | (((SiS_Pr->CVDisplay - 1) & 0x200) >> 3)
4100 | ((SiS_Pr->CVSyncStart & 0x200) >> 2);
4101
4102 SiS_Pr->CCRT1CRTC[16] = ((((SiS_Pr->CVBlankStart - 1) & 0x200) >> 4) >> 5); /* CR9 */
4103
4104 if(depth != 8) {
4105 if(SiS_Pr->CHDisplay >= 1600) SiS_Pr->CCRT1CRTC[16] |= 0x60; /* SRE */
4106 else if(SiS_Pr->CHDisplay >= 640) SiS_Pr->CCRT1CRTC[16] |= 0x40;
4107 }
4108
4109 #if 0
4110 if (mode->VScan >= 32)
4111 regp->CRTC[9] |= 0x1F;
4112 else if (mode->VScan > 1)
4113 regp->CRTC[9] |= mode->VScan - 1;
4114 #endif
4115
4116 SiS_Pr->CCRT1CRTC[8] = (SiS_Pr->CVSyncStart ) & 0xFF; /* CR10 */
4117 SiS_Pr->CCRT1CRTC[9] = ((SiS_Pr->CVSyncEnd ) & 0x0F) | 0x80; /* CR11 */
4118 SiS_Pr->CCRT1CRTC[10] = (SiS_Pr->CVDisplay - 1) & 0xFF; /* CR12 */
4119 SiS_Pr->CCRT1CRTC[11] = (SiS_Pr->CVBlankStart - 1) & 0xFF; /* CR15 */
4120 SiS_Pr->CCRT1CRTC[12] = (SiS_Pr->CVBlankEnd - 1) & 0xFF; /* CR16 */
4121
4122 SiS_Pr->CCRT1CRTC[13] = /* SRA */
4123 GETBITSTR((SiS_Pr->CVTotal -2), 10:10, 0:0) |
4124 GETBITSTR((SiS_Pr->CVDisplay -1), 10:10, 1:1) |
4125 GETBITSTR((SiS_Pr->CVBlankStart-1), 10:10, 2:2) |
4126 GETBITSTR((SiS_Pr->CVSyncStart ), 10:10, 3:3) |
4127 GETBITSTR((SiS_Pr->CVBlankEnd -1), 8:8, 4:4) |
4128 GETBITSTR((SiS_Pr->CVSyncEnd ), 4:4, 5:5) ;
4129
4130 SiS_Pr->CCRT1CRTC[14] = /* SRB */
4131 GETBITSTR((SiS_Pr->CHTotal >> 3) - 5, 9:8, 1:0) |
4132 GETBITSTR((SiS_Pr->CHDisplay >> 3) - 1, 9:8, 3:2) |
4133 GETBITSTR((SiS_Pr->CHBlankStart >> 3) - 1, 9:8, 5:4) |
4134 GETBITSTR((SiS_Pr->CHSyncStart >> 3) + 3, 9:8, 7:6) ;
4135
4136
4137 SiS_Pr->CCRT1CRTC[15] = /* SRC */
4138 GETBITSTR((SiS_Pr->CHBlankEnd >> 3) - 1, 7:6, 1:0) |
4139 GETBITSTR((SiS_Pr->CHSyncEnd >> 3) + 3, 5:5, 2:2) ;
4140 }
4141
4142 void
SiS_CalcLCDACRT1Timing(SiS_Private * SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex)4143 SiS_CalcLCDACRT1Timing(SiS_Private *SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex)
4144 {
4145 USHORT modeflag, tempax, tempbx, VGAHDE = SiS_Pr->SiS_VGAHDE;
4146 int i,j;
4147
4148 /* 1:1 data: use data set by setcrt1crtc() */
4149 if(SiS_Pr->SiS_LCDInfo & LCDPass11) return;
4150
4151 if(ModeNo <= 0x13) {
4152 modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
4153 } else if(SiS_Pr->UseCustomMode) {
4154 modeflag = SiS_Pr->CModeFlag;
4155 } else {
4156 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
4157 }
4158
4159 if(modeflag & HalfDCLK) VGAHDE >>= 1;
4160
4161 SiS_Pr->CHDisplay = VGAHDE;
4162 SiS_Pr->CHBlankStart = VGAHDE;
4163
4164 SiS_Pr->CVDisplay = SiS_Pr->SiS_VGAVDE;
4165 SiS_Pr->CVBlankStart = SiS_Pr->SiS_VGAVDE;
4166
4167 tempbx = SiS_Pr->PanelHT - SiS_Pr->PanelXRes;
4168 tempax = SiS_Pr->SiS_VGAHDE; /* not /2 ! */
4169 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
4170 tempax = SiS_Pr->PanelXRes;
4171 }
4172 tempbx += tempax;
4173 if(modeflag & HalfDCLK) tempbx -= VGAHDE;
4174 SiS_Pr->CHTotal = SiS_Pr->CHBlankEnd = tempbx;
4175
4176 tempax = VGAHDE;
4177 tempbx = SiS_Pr->CHTotal;
4178 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
4179 tempbx = SiS_Pr->PanelXRes;
4180 if(modeflag & HalfDCLK) tempbx >>= 1;
4181 tempax += ((tempbx - tempax) >> 1);
4182 }
4183
4184 tempax += SiS_Pr->PanelHRS;
4185 SiS_Pr->CHSyncStart = tempax;
4186 tempax += SiS_Pr->PanelHRE;
4187 SiS_Pr->CHSyncEnd = tempax;
4188
4189 tempbx = SiS_Pr->PanelVT - SiS_Pr->PanelYRes;
4190 tempax = SiS_Pr->SiS_VGAVDE;
4191 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
4192 tempax = SiS_Pr->PanelYRes;
4193 }
4194 SiS_Pr->CVTotal = SiS_Pr->CVBlankEnd = tempbx + tempax;
4195
4196 tempax = SiS_Pr->SiS_VGAVDE;
4197 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
4198 tempax += (SiS_Pr->PanelYRes - tempax) >> 1;
4199 }
4200 tempax += SiS_Pr->PanelVRS;
4201 SiS_Pr->CVSyncStart = tempax;
4202 tempax += SiS_Pr->PanelVRE;
4203 SiS_Pr->CVSyncEnd = tempax;
4204
4205 SiS_CalcCRRegisters(SiS_Pr, 8);
4206 SiS_Pr->CCRT1CRTC[16] &= ~0xE0;
4207
4208 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x11,0x7f);
4209
4210 for(i=0,j=0;i<=7;i++,j++) {
4211 SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]);
4212 }
4213 for(j=0x10;i<=10;i++,j++) {
4214 SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]);
4215 }
4216 for(j=0x15;i<=12;i++,j++) {
4217 SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]);
4218 }
4219 for(j=0x0A;i<=15;i++,j++) {
4220 SiS_SetReg(SiS_Pr->SiS_P3c4,j,SiS_Pr->CCRT1CRTC[i]);
4221 }
4222
4223 tempax = SiS_Pr->CCRT1CRTC[16] & 0xE0;
4224 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0E,0x1F,tempax);
4225
4226 tempax = (SiS_Pr->CCRT1CRTC[16] & 0x01) << 5;
4227 if(modeflag & DoubleScanMode) tempax |= 0x80;
4228 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x09,0x5F,tempax);
4229
4230 #ifdef TWDEBUG
4231 xf86DrvMsg(0, X_INFO, "%d %d %d %d %d %d %d %d (%d %d %d %d)\n",
4232 SiS_Pr->CHDisplay, SiS_Pr->CHSyncStart, SiS_Pr->CHSyncEnd, SiS_Pr->CHTotal,
4233 SiS_Pr->CVDisplay, SiS_Pr->CVSyncStart, SiS_Pr->CVSyncEnd, SiS_Pr->CVTotal,
4234 SiS_Pr->CHBlankStart, SiS_Pr->CHBlankEnd, SiS_Pr->CVBlankStart, SiS_Pr->CVBlankEnd);
4235
4236 xf86DrvMsg(0, X_INFO, " {{0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,\n",
4237 SiS_Pr->CCRT1CRTC[0], SiS_Pr->CCRT1CRTC[1],
4238 SiS_Pr->CCRT1CRTC[2], SiS_Pr->CCRT1CRTC[3],
4239 SiS_Pr->CCRT1CRTC[4], SiS_Pr->CCRT1CRTC[5],
4240 SiS_Pr->CCRT1CRTC[6], SiS_Pr->CCRT1CRTC[7]);
4241 xf86DrvMsg(0, X_INFO, " 0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,\n",
4242 SiS_Pr->CCRT1CRTC[8], SiS_Pr->CCRT1CRTC[9],
4243 SiS_Pr->CCRT1CRTC[10], SiS_Pr->CCRT1CRTC[11],
4244 SiS_Pr->CCRT1CRTC[12], SiS_Pr->CCRT1CRTC[13],
4245 SiS_Pr->CCRT1CRTC[14], SiS_Pr->CCRT1CRTC[15]);
4246 xf86DrvMsg(0, X_INFO, " 0x%02x}},\n", SiS_Pr->CCRT1CRTC[16]);
4247 #endif
4248 }
4249
4250 /* ================ XFREE86 ================= */
4251
4252 /* Helper functions */
4253
4254 #ifdef LINUX_XF86
4255
4256 USHORT
SiS_CheckBuildCustomMode(ScrnInfoPtr pScrn,DisplayModePtr mode,int VBFlags)4257 SiS_CheckBuildCustomMode(ScrnInfoPtr pScrn, DisplayModePtr mode, int VBFlags)
4258 {
4259 SISPtr pSiS = SISPTR(pScrn);
4260 int out_n, out_dn, out_div, out_sbit, out_scale;
4261 int depth = pSiS->CurrentLayout.bitsPerPixel;
4262 unsigned int vclk[5];
4263
4264 #define Midx 0
4265 #define Nidx 1
4266 #define VLDidx 2
4267 #define Pidx 3
4268 #define PSNidx 4
4269
4270 pSiS->SiS_Pr->CModeFlag = 0;
4271
4272 pSiS->SiS_Pr->CDClock = mode->Clock;
4273
4274 pSiS->SiS_Pr->CHDisplay = mode->HDisplay;
4275 pSiS->SiS_Pr->CHSyncStart = mode->HSyncStart;
4276 pSiS->SiS_Pr->CHSyncEnd = mode->HSyncEnd;
4277 pSiS->SiS_Pr->CHTotal = mode->HTotal;
4278
4279 pSiS->SiS_Pr->CVDisplay = mode->VDisplay;
4280 pSiS->SiS_Pr->CVSyncStart = mode->VSyncStart;
4281 pSiS->SiS_Pr->CVSyncEnd = mode->VSyncEnd;
4282 pSiS->SiS_Pr->CVTotal = mode->VTotal;
4283
4284 pSiS->SiS_Pr->CFlags = mode->Flags;
4285
4286 if(pSiS->SiS_Pr->CFlags & V_INTERLACE) {
4287 pSiS->SiS_Pr->CVDisplay >>= 1;
4288 pSiS->SiS_Pr->CVSyncStart >>= 1;
4289 pSiS->SiS_Pr->CVSyncEnd >>= 1;
4290 pSiS->SiS_Pr->CVTotal >>= 1;
4291 }
4292 if(pSiS->SiS_Pr->CFlags & V_DBLSCAN) {
4293 /* pSiS->SiS_Pr->CDClock <<= 1; */
4294 pSiS->SiS_Pr->CVDisplay <<= 1;
4295 pSiS->SiS_Pr->CVSyncStart <<= 1;
4296 pSiS->SiS_Pr->CVSyncEnd <<= 1;
4297 pSiS->SiS_Pr->CVTotal <<= 1;
4298 }
4299
4300 pSiS->SiS_Pr->CHBlankStart = pSiS->SiS_Pr->CHDisplay;
4301 pSiS->SiS_Pr->CHBlankEnd = pSiS->SiS_Pr->CHTotal;
4302 pSiS->SiS_Pr->CVBlankStart = pSiS->SiS_Pr->CVSyncStart - 1;
4303 pSiS->SiS_Pr->CVBlankEnd = pSiS->SiS_Pr->CVTotal;
4304
4305 if(SiS_compute_vclk(pSiS->SiS_Pr->CDClock, &out_n, &out_dn, &out_div, &out_sbit, &out_scale)) {
4306 pSiS->SiS_Pr->CSR2B = (out_div == 2) ? 0x80 : 0x00;
4307 pSiS->SiS_Pr->CSR2B |= ((out_n - 1) & 0x7f);
4308 pSiS->SiS_Pr->CSR2C = (out_dn - 1) & 0x1f;
4309 pSiS->SiS_Pr->CSR2C |= (((out_scale - 1) & 3) << 5);
4310 pSiS->SiS_Pr->CSR2C |= ((out_sbit & 0x01) << 7);
4311 #ifdef TWDEBUG
4312 xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Clock %d: n %d dn %d div %d sb %d sc %d\n",
4313 pSiS->SiS_Pr->CDClock, out_n, out_dn, out_div, out_sbit, out_scale);
4314 #endif
4315 } else {
4316 SiSCalcClock(pScrn, pSiS->SiS_Pr->CDClock, 2, vclk);
4317 pSiS->SiS_Pr->CSR2B = (vclk[VLDidx] == 2) ? 0x80 : 0x00;
4318 pSiS->SiS_Pr->CSR2B |= (vclk[Midx] - 1) & 0x7f;
4319 pSiS->SiS_Pr->CSR2C = (vclk[Nidx] - 1) & 0x1f;
4320 if(vclk[Pidx] <= 4) {
4321 /* postscale 1,2,3,4 */
4322 pSiS->SiS_Pr->CSR2C |= ((vclk[Pidx] - 1) & 3) << 5;
4323 } else {
4324 /* postscale 6,8 */
4325 pSiS->SiS_Pr->CSR2C |= (((vclk[Pidx] / 2) - 1) & 3) << 5;
4326 pSiS->SiS_Pr->CSR2C |= 0x80;
4327 }
4328 #ifdef TWDEBUG
4329 xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Clock %d: n %d dn %d div %d sc %d\n",
4330 pSiS->SiS_Pr->CDClock, vclk[Midx], vclk[Nidx], vclk[VLDidx], vclk[Pidx]);
4331 #endif
4332 }
4333
4334 pSiS->SiS_Pr->CSRClock = (pSiS->SiS_Pr->CDClock / 1000) + 1;
4335
4336 SiS_CalcCRRegisters(pSiS->SiS_Pr, depth);
4337
4338 switch(depth) {
4339 case 8: pSiS->SiS_Pr->CModeFlag |= 0x223b; break;
4340 case 16: pSiS->SiS_Pr->CModeFlag |= 0x227d; break;
4341 case 32: pSiS->SiS_Pr->CModeFlag |= 0x22ff; break;
4342 default: return 0;
4343 }
4344
4345 if(pSiS->SiS_Pr->CFlags & V_DBLSCAN)
4346 pSiS->SiS_Pr->CModeFlag |= DoubleScanMode;
4347
4348 if((pSiS->SiS_Pr->CVDisplay >= 1024) ||
4349 (pSiS->SiS_Pr->CVTotal >= 1024) ||
4350 (pSiS->SiS_Pr->CHDisplay >= 1024))
4351 pSiS->SiS_Pr->CModeFlag |= LineCompareOff;
4352
4353 if(pSiS->SiS_Pr->CFlags & V_CLKDIV2)
4354 pSiS->SiS_Pr->CModeFlag |= HalfDCLK;
4355
4356 pSiS->SiS_Pr->CInfoFlag = 0x0007;
4357
4358 if(pSiS->SiS_Pr->CFlags & V_NHSYNC)
4359 pSiS->SiS_Pr->CInfoFlag |= 0x4000;
4360
4361 if(pSiS->SiS_Pr->CFlags & V_NVSYNC)
4362 pSiS->SiS_Pr->CInfoFlag |= 0x8000;
4363
4364 if(pSiS->SiS_Pr->CFlags & V_INTERLACE)
4365 pSiS->SiS_Pr->CInfoFlag |= InterlaceMode;
4366
4367 pSiS->SiS_Pr->UseCustomMode = TRUE;
4368 #ifdef TWDEBUG
4369 xf86DrvMsg(0, X_INFO, "Custom mode %dx%d:\n",
4370 pSiS->SiS_Pr->CHDisplay,pSiS->SiS_Pr->CVDisplay);
4371 xf86DrvMsg(0, X_INFO, "Modeflag %04x, Infoflag %04x\n",
4372 pSiS->SiS_Pr->CModeFlag, pSiS->SiS_Pr->CInfoFlag);
4373 xf86DrvMsg(0, X_INFO, " {{0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,\n",
4374 pSiS->SiS_Pr->CCRT1CRTC[0], pSiS->SiS_Pr->CCRT1CRTC[1],
4375 pSiS->SiS_Pr->CCRT1CRTC[2], pSiS->SiS_Pr->CCRT1CRTC[3],
4376 pSiS->SiS_Pr->CCRT1CRTC[4], pSiS->SiS_Pr->CCRT1CRTC[5],
4377 pSiS->SiS_Pr->CCRT1CRTC[6], pSiS->SiS_Pr->CCRT1CRTC[7]);
4378 xf86DrvMsg(0, X_INFO, " 0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,\n",
4379 pSiS->SiS_Pr->CCRT1CRTC[8], pSiS->SiS_Pr->CCRT1CRTC[9],
4380 pSiS->SiS_Pr->CCRT1CRTC[10], pSiS->SiS_Pr->CCRT1CRTC[11],
4381 pSiS->SiS_Pr->CCRT1CRTC[12], pSiS->SiS_Pr->CCRT1CRTC[13],
4382 pSiS->SiS_Pr->CCRT1CRTC[14], pSiS->SiS_Pr->CCRT1CRTC[15]);
4383 xf86DrvMsg(0, X_INFO, " 0x%02x}},\n", pSiS->SiS_Pr->CCRT1CRTC[16]);
4384 xf86DrvMsg(0, X_INFO, "Clock: 0x%02x, 0x%02x, %d\n",
4385 pSiS->SiS_Pr->CSR2B, pSiS->SiS_Pr->CSR2C, pSiS->SiS_Pr->CSRClock);
4386 #endif
4387 return 1;
4388 }
4389
4390 /* Build a list of supported modes */
4391 DisplayModePtr
SiSBuildBuiltInModeList(ScrnInfoPtr pScrn,BOOLEAN includelcdmodes,BOOLEAN isfordvi)4392 SiSBuildBuiltInModeList(ScrnInfoPtr pScrn, BOOLEAN includelcdmodes, BOOLEAN isfordvi)
4393 {
4394 SISPtr pSiS = SISPTR(pScrn);
4395 unsigned short VRE, VBE, VRS, VBS, VDE, VT;
4396 unsigned short HRE, HBE, HRS, HBS, HDE, HT;
4397 unsigned char sr_data, cr_data, cr_data2, cr_data3;
4398 unsigned char sr2b, sr2c;
4399 float num, denum, postscalar, divider;
4400 int A, B, C, D, E, F, temp, i, j, k, l, index, vclkindex;
4401 DisplayModePtr new = NULL, current = NULL, first = NULL;
4402 BOOLEAN done = FALSE;
4403 #if 0
4404 DisplayModePtr backup = NULL;
4405 #endif
4406
4407 pSiS->backupmodelist = NULL;
4408 pSiS->AddedPlasmaModes = FALSE;
4409
4410 /* Initialize our pointers */
4411 if(pSiS->VGAEngine == SIS_300_VGA) {
4412 #ifdef SIS300
4413 InitTo300Pointer(pSiS->SiS_Pr, &pSiS->sishw_ext);
4414 #else
4415 return NULL;
4416 #endif
4417 } else if(pSiS->VGAEngine == SIS_315_VGA) {
4418 #ifdef SIS315H
4419 InitTo310Pointer(pSiS->SiS_Pr, &pSiS->sishw_ext);
4420 #else
4421 return NULL;
4422 #endif
4423 } else return NULL;
4424
4425 i = 0;
4426 while(pSiS->SiS_Pr->SiS_RefIndex[i].Ext_InfoFlag != 0xFFFF) {
4427
4428 index = pSiS->SiS_Pr->SiS_RefIndex[i].Ext_CRT1CRTC;
4429
4430 /* 0x5a (320x240) is a pure FTSN mode, not DSTN! */
4431 if((!pSiS->FSTN) &&
4432 (pSiS->SiS_Pr->SiS_RefIndex[i].ModeID == 0x5a)) {
4433 i++;
4434 continue;
4435 }
4436 if((pSiS->FSTN) &&
4437 (pSiS->SiS_Pr->SiS_RefIndex[i].XRes == 320) &&
4438 (pSiS->SiS_Pr->SiS_RefIndex[i].YRes == 240) &&
4439 (pSiS->SiS_Pr->SiS_RefIndex[i].ModeID != 0x5a)) {
4440 i++;
4441 continue;
4442 }
4443
4444 if(!(new = xalloc(sizeof(DisplayModeRec)))) return first;
4445 memset(new, 0, sizeof(DisplayModeRec));
4446 if(!(new->name = xalloc(10))) {
4447 xfree(new);
4448 return first;
4449 }
4450 if(!first) first = new;
4451 if(current) {
4452 current->next = new;
4453 new->prev = current;
4454 }
4455
4456 current = new;
4457
4458 sprintf(current->name, "%dx%d", pSiS->SiS_Pr->SiS_RefIndex[i].XRes,
4459 pSiS->SiS_Pr->SiS_RefIndex[i].YRes);
4460
4461 current->status = MODE_OK;
4462
4463 current->type = M_T_DEFAULT;
4464
4465 vclkindex = pSiS->SiS_Pr->SiS_RefIndex[i].Ext_CRTVCLK;
4466 if(pSiS->VGAEngine == SIS_300_VGA) vclkindex &= 0x3F;
4467
4468 sr2b = pSiS->SiS_Pr->SiS_VCLKData[vclkindex].SR2B;
4469 sr2c = pSiS->SiS_Pr->SiS_VCLKData[vclkindex].SR2C;
4470
4471 divider = (sr2b & 0x80) ? 2.0 : 1.0;
4472 postscalar = (sr2c & 0x80) ?
4473 ( (((sr2c >> 5) & 0x03) == 0x02) ? 6.0 : 8.0) : (((sr2c >> 5) & 0x03) + 1.0);
4474 num = (sr2b & 0x7f) + 1.0;
4475 denum = (sr2c & 0x1f) + 1.0;
4476
4477 #ifdef TWDEBUG
4478 xf86DrvMsg(0, X_INFO, "------------\n");
4479 xf86DrvMsg(0, X_INFO, "sr2b: %x sr2c %x div %f ps %f num %f denum %f\n",
4480 sr2b, sr2c, divider, postscalar, num, denum);
4481 #endif
4482
4483 current->Clock = (int)(14318 * (divider / postscalar) * (num / denum));
4484
4485 sr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[14];
4486 /* inSISIDXREG(SISSR, 0x0b, sr_data); */
4487
4488 cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[0];
4489 /* inSISIDXREG(SISCR, 0x00, cr_data); */
4490
4491 /* Horizontal total */
4492 HT = (cr_data & 0xff) |
4493 ((unsigned short) (sr_data & 0x03) << 8);
4494 A = HT + 5;
4495
4496 cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[1];
4497 /* inSISIDXREG(SISCR, 0x01, cr_data); */
4498
4499 /* Horizontal display enable end */
4500 HDE = (cr_data & 0xff) |
4501 ((unsigned short) (sr_data & 0x0C) << 6);
4502 E = HDE + 1; /* 0x80 0x64 */
4503
4504 cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[4];
4505 /* inSISIDXREG(SISCR, 0x04, cr_data); */
4506
4507 /* Horizontal retrace (=sync) start */
4508 HRS = (cr_data & 0xff) |
4509 ((unsigned short) (sr_data & 0xC0) << 2);
4510 F = HRS - E - 3; /* 0x06 0x06 */
4511
4512 cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[2];
4513 /* inSISIDXREG(SISCR, 0x02, cr_data); */
4514
4515 /* Horizontal blank start */
4516 HBS = (cr_data & 0xff) |
4517 ((unsigned short) (sr_data & 0x30) << 4);
4518
4519 sr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[15];
4520 /* inSISIDXREG(SISSR, 0x0c, sr_data); */
4521
4522 cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[3];
4523 /* inSISIDXREG(SISCR, 0x03, cr_data); */
4524
4525 cr_data2 = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[5];
4526 /* inSISIDXREG(SISCR, 0x05, cr_data2); */
4527
4528 /* Horizontal blank end */
4529 HBE = (cr_data & 0x1f) |
4530 ((unsigned short) (cr_data2 & 0x80) >> 2) |
4531 ((unsigned short) (sr_data & 0x03) << 6);
4532
4533 /* Horizontal retrace (=sync) end */
4534 HRE = (cr_data2 & 0x1f) | ((sr_data & 0x04) << 3);
4535
4536 temp = HBE - ((E - 1) & 255);
4537 B = (temp > 0) ? temp : (temp + 256);
4538
4539 temp = HRE - ((E + F + 3) & 63);
4540 C = (temp > 0) ? temp : (temp + 64); /* 0x0b 0x0b */
4541
4542 D = B - F - C;
4543
4544 if((pSiS->SiS_Pr->SiS_RefIndex[i].XRes == 320) &&
4545 ((pSiS->SiS_Pr->SiS_RefIndex[i].YRes == 200) ||
4546 (pSiS->SiS_Pr->SiS_RefIndex[i].YRes == 240))) {
4547
4548 /* Terrible hack, but correct CRTC data for
4549 * these modes only produces a black screen...
4550 * (HRE is 0, leading into a too large C and
4551 * a negative D. The CRT controller does not
4552 * seem to like correcting HRE to 50
4553 */
4554 current->HDisplay = 320;
4555 current->HSyncStart = 328;
4556 current->HSyncEnd = 376;
4557 current->HTotal = 400;
4558
4559 } else {
4560
4561 current->HDisplay = (E * 8);
4562 current->HSyncStart = (E * 8) + (F * 8);
4563 current->HSyncEnd = (E * 8) + (F * 8) + (C * 8);
4564 current->HTotal = (E * 8) + (F * 8) + (C * 8) + (D * 8);
4565
4566 }
4567
4568 #ifdef TWDEBUG
4569 xf86DrvMsg(0, X_INFO,
4570 "H: A %d B %d C %d D %d E %d F %d HT %d HDE %d HRS %d HBS %d HBE %d HRE %d\n",
4571 A, B, C, D, E, F, HT, HDE, HRS, HBS, HBE, HRE);
4572 #endif
4573
4574 sr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[13];
4575 /* inSISIDXREG(SISSR, 0x0A, sr_data); */
4576
4577 cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[6];
4578 /* inSISIDXREG(SISCR, 0x06, cr_data); */
4579
4580 cr_data2 = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[7];
4581 /* inSISIDXREG(SISCR, 0x07, cr_data2); */
4582
4583 /* Vertical total */
4584 VT = (cr_data & 0xFF) |
4585 ((unsigned short) (cr_data2 & 0x01) << 8) |
4586 ((unsigned short)(cr_data2 & 0x20) << 4) |
4587 ((unsigned short) (sr_data & 0x01) << 10);
4588 A = VT + 2;
4589
4590 cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[10];
4591 /* inSISIDXREG(SISCR, 0x12, cr_data); */
4592
4593 /* Vertical display enable end */
4594 VDE = (cr_data & 0xff) |
4595 ((unsigned short) (cr_data2 & 0x02) << 7) |
4596 ((unsigned short) (cr_data2 & 0x40) << 3) |
4597 ((unsigned short) (sr_data & 0x02) << 9);
4598 E = VDE + 1;
4599
4600 cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[8];
4601 /* inSISIDXREG(SISCR, 0x10, cr_data); */
4602
4603 /* Vertical retrace (=sync) start */
4604 VRS = (cr_data & 0xff) |
4605 ((unsigned short) (cr_data2 & 0x04) << 6) |
4606 ((unsigned short) (cr_data2 & 0x80) << 2) |
4607 ((unsigned short) (sr_data & 0x08) << 7);
4608 F = VRS + 1 - E;
4609
4610 cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[11];
4611 /* inSISIDXREG(SISCR, 0x15, cr_data); */
4612
4613 cr_data3 = (pSiS->SiS_Pr->SiS_CRT1Table[index].CR[16] & 0x01) << 5;
4614 /* inSISIDXREG(SISCR, 0x09, cr_data3); */
4615
4616 /* Vertical blank start */
4617 VBS = (cr_data & 0xff) |
4618 ((unsigned short) (cr_data2 & 0x08) << 5) |
4619 ((unsigned short) (cr_data3 & 0x20) << 4) |
4620 ((unsigned short) (sr_data & 0x04) << 8);
4621
4622 cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[12];
4623 /* inSISIDXREG(SISCR, 0x16, cr_data); */
4624
4625 /* Vertical blank end */
4626 VBE = (cr_data & 0xff) |
4627 ((unsigned short) (sr_data & 0x10) << 4);
4628 temp = VBE - ((E - 1) & 511);
4629 B = (temp > 0) ? temp : (temp + 512);
4630
4631 cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[9];
4632 /* inSISIDXREG(SISCR, 0x11, cr_data); */
4633
4634 /* Vertical retrace (=sync) end */
4635 VRE = (cr_data & 0x0f) | ((sr_data & 0x20) >> 1);
4636 temp = VRE - ((E + F - 1) & 31);
4637 C = (temp > 0) ? temp : (temp + 32);
4638
4639 D = B - F - C;
4640
4641 current->VDisplay = VDE + 1;
4642 current->VSyncStart = VRS + 1;
4643 current->VSyncEnd = ((VRS & ~0x1f) | VRE) + 1;
4644 if(VRE <= (VRS & 0x1f)) current->VSyncEnd += 32;
4645 current->VTotal = E + D + C + F;
4646
4647 #if 0
4648 current->VDisplay = E;
4649 current->VSyncStart = E + D;
4650 current->VSyncEnd = E + D + C;
4651 current->VTotal = E + D + C + F;
4652 #endif
4653
4654 #ifdef TWDEBUG
4655 xf86DrvMsg(0, X_INFO,
4656 "V: A %d B %d C %d D %d E %d F %d VT %d VDE %d VRS %d VBS %d VBE %d VRE %d\n",
4657 A, B, C, D, E, F, VT, VDE, VRS, VBS, VBE, VRE);
4658 #endif
4659
4660 if(pSiS->SiS_Pr->SiS_RefIndex[i].Ext_InfoFlag & 0x4000)
4661 current->Flags |= V_NHSYNC;
4662 else
4663 current->Flags |= V_PHSYNC;
4664
4665 if(pSiS->SiS_Pr->SiS_RefIndex[i].Ext_InfoFlag & 0x8000)
4666 current->Flags |= V_NVSYNC;
4667 else
4668 current->Flags |= V_PVSYNC;
4669
4670 if(pSiS->SiS_Pr->SiS_RefIndex[i].Ext_InfoFlag & 0x0080)
4671 current->Flags |= V_INTERLACE;
4672
4673 j = 0;
4674 while(pSiS->SiS_Pr->SiS_EModeIDTable[j].Ext_ModeID != 0xff) {
4675 if(pSiS->SiS_Pr->SiS_EModeIDTable[j].Ext_ModeID ==
4676 pSiS->SiS_Pr->SiS_RefIndex[i].ModeID) {
4677 if(pSiS->SiS_Pr->SiS_EModeIDTable[j].Ext_ModeFlag & DoubleScanMode) {
4678 current->Flags |= V_DBLSCAN;
4679 }
4680 break;
4681 }
4682 j++;
4683 }
4684
4685 if(current->Flags & V_INTERLACE) {
4686 current->VDisplay <<= 1;
4687 current->VSyncStart <<= 1;
4688 current->VSyncEnd <<= 1;
4689 current->VTotal <<= 1;
4690 current->VTotal |= 1;
4691 }
4692 if(current->Flags & V_DBLSCAN) {
4693 current->Clock >>= 1;
4694 current->VDisplay >>= 1;
4695 current->VSyncStart >>= 1;
4696 current->VSyncEnd >>= 1;
4697 current->VTotal >>= 1;
4698 }
4699
4700 #if 0
4701 if((backup = xalloc(sizeof(DisplayModeRec)))) {
4702 if(!pSiS->backupmodelist) pSiS->backupmodelist = backup;
4703 else {
4704 pSiS->backupmodelist->next = backup;
4705 backup->prev = pSiS->backupmodelist;
4706 }
4707 backup->next = NULL;
4708 backup->HDisplay = current->HDisplay;
4709 backup->HSyncStart = current->HSyncStart;
4710 backup->HSyncEnd = current->HSyncEnd;
4711 backup->HTotal = current->HTotal;
4712 backup->VDisplay = current->VDisplay;
4713 backup->VSyncStart = current->VSyncStart;
4714 backup->VSyncEnd = current->VSyncEnd;
4715 backup->VTotal = current->VTotal;
4716 backup->Flags = current->Flags;
4717 backup->Clock = current->Clock;
4718 }
4719 #endif
4720
4721 #ifdef TWDEBUG
4722 xf86DrvMsg(pScrn->scrnIndex, X_INFO,
4723 "Built-in: %s %.2f %d %d %d %d %d %d %d %d\n",
4724 current->name, (float)current->Clock / 1000,
4725 current->HDisplay, current->HSyncStart, current->HSyncEnd, current->HTotal,
4726 current->VDisplay, current->VSyncStart, current->VSyncEnd, current->VTotal);
4727 #else
4728 (void)VBS; (void)HBS; (void)A;
4729 #endif
4730
4731 i++;
4732 }
4733
4734 /* Add non-standard LCD modes for panel's detailed timings */
4735
4736 if(!includelcdmodes) return first;
4737
4738 if(pSiS->SiS_Pr->CP_Vendor) {
4739 xf86DrvMsg(0, X_INFO, "Checking database for vendor %x, product %x\n",
4740 pSiS->SiS_Pr->CP_Vendor, pSiS->SiS_Pr->CP_Product);
4741 }
4742
4743 i = 0;
4744 while((!done) && (SiS_PlasmaTable[i].vendor) && (pSiS->SiS_Pr->CP_Vendor)) {
4745
4746 if(SiS_PlasmaTable[i].vendor == pSiS->SiS_Pr->CP_Vendor) {
4747
4748 for(j=0; j<SiS_PlasmaTable[i].productnum; j++) {
4749
4750 if(SiS_PlasmaTable[i].product[j] == pSiS->SiS_Pr->CP_Product) {
4751
4752 xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
4753 "Identified %s panel, adding specific modes\n",
4754 SiS_PlasmaTable[i].plasmaname);
4755
4756 for(k=0; k<SiS_PlasmaTable[i].modenum; k++) {
4757
4758 if(isfordvi) {
4759 if(!(SiS_PlasmaTable[i].plasmamodes[k] & 0x80)) continue;
4760 } else {
4761 if(!(SiS_PlasmaTable[i].plasmamodes[k] & 0x40)) continue;
4762 }
4763
4764 if(!(new = xalloc(sizeof(DisplayModeRec)))) return first;
4765
4766 memset(new, 0, sizeof(DisplayModeRec));
4767 if(!(new->name = xalloc(10))) {
4768 xfree(new);
4769 return first;
4770 }
4771 if(!first) first = new;
4772 if(current) {
4773 current->next = new;
4774 new->prev = current;
4775 }
4776
4777 current = new;
4778
4779 pSiS->AddedPlasmaModes = TRUE;
4780
4781 l = SiS_PlasmaTable[i].plasmamodes[k] & 0x3f;
4782
4783 sprintf(current->name, "%dx%d", SiS_PlasmaMode[l].HDisplay,
4784 SiS_PlasmaMode[l].VDisplay);
4785
4786 current->status = MODE_OK;
4787
4788 current->type = M_T_BUILTIN;
4789
4790 current->Clock = SiS_PlasmaMode[l].clock;
4791 current->SynthClock = current->Clock;
4792
4793 current->HDisplay = SiS_PlasmaMode[l].HDisplay;
4794 current->HSyncStart = current->HDisplay + SiS_PlasmaMode[l].HFrontPorch;
4795 current->HSyncEnd = current->HSyncStart + SiS_PlasmaMode[l].HSyncWidth;
4796 current->HTotal = SiS_PlasmaMode[l].HTotal;
4797
4798 current->VDisplay = SiS_PlasmaMode[l].VDisplay;
4799 current->VSyncStart = current->VDisplay + SiS_PlasmaMode[l].VFrontPorch;
4800 current->VSyncEnd = current->VSyncStart + SiS_PlasmaMode[l].VSyncWidth;
4801 current->VTotal = SiS_PlasmaMode[l].VTotal;
4802
4803 current->CrtcHDisplay = current->HDisplay;
4804 current->CrtcHBlankStart = current->HSyncStart;
4805 current->CrtcHSyncStart = current->HSyncStart;
4806 current->CrtcHSyncEnd = current->HSyncEnd;
4807 current->CrtcHBlankEnd = current->HSyncEnd;
4808 current->CrtcHTotal = current->HTotal;
4809
4810 current->CrtcVDisplay = current->VDisplay;
4811 current->CrtcVBlankStart = current->VSyncStart;
4812 current->CrtcVSyncStart = current->VSyncStart;
4813 current->CrtcVSyncEnd = current->VSyncEnd;
4814 current->CrtcVBlankEnd = current->VSyncEnd;
4815 current->CrtcVTotal = current->VTotal;
4816
4817 if(SiS_PlasmaMode[l].SyncFlags & SIS_PL_HSYNCP)
4818 current->Flags |= V_PHSYNC;
4819 else
4820 current->Flags |= V_NHSYNC;
4821
4822 if(SiS_PlasmaMode[l].SyncFlags & SIS_PL_VSYNCP)
4823 current->Flags |= V_PVSYNC;
4824 else
4825 current->Flags |= V_NVSYNC;
4826
4827 if(current->HDisplay > pSiS->LCDwidth)
4828 pSiS->LCDwidth = pSiS->SiS_Pr->CP_MaxX = current->HDisplay;
4829 if(current->VDisplay > pSiS->LCDheight)
4830 pSiS->LCDheight = pSiS->SiS_Pr->CP_MaxY = current->VDisplay;
4831
4832 }
4833 done = TRUE;
4834 break;
4835 }
4836 }
4837 }
4838
4839 i++;
4840
4841 }
4842
4843 if(pSiS->SiS_Pr->CP_HaveCustomData) {
4844
4845 for(i=0; i<7; i++) {
4846
4847 if(pSiS->SiS_Pr->CP_DataValid[i]) {
4848
4849 if(!(new = xalloc(sizeof(DisplayModeRec)))) return first;
4850
4851 memset(new, 0, sizeof(DisplayModeRec));
4852 if(!(new->name = xalloc(10))) {
4853 xfree(new);
4854 return first;
4855 }
4856 if(!first) first = new;
4857 if(current) {
4858 current->next = new;
4859 new->prev = current;
4860 }
4861
4862 current = new;
4863
4864 sprintf(current->name, "%dx%d", pSiS->SiS_Pr->CP_HDisplay[i],
4865 pSiS->SiS_Pr->CP_VDisplay[i]);
4866
4867 current->status = MODE_OK;
4868
4869 current->type = M_T_BUILTIN;
4870
4871 current->Clock = pSiS->SiS_Pr->CP_Clock[i];
4872 current->SynthClock = current->Clock;
4873
4874 current->HDisplay = pSiS->SiS_Pr->CP_HDisplay[i];
4875 current->HSyncStart = pSiS->SiS_Pr->CP_HSyncStart[i];
4876 current->HSyncEnd = pSiS->SiS_Pr->CP_HSyncEnd[i];
4877 current->HTotal = pSiS->SiS_Pr->CP_HTotal[i];
4878
4879 current->VDisplay = pSiS->SiS_Pr->CP_VDisplay[i];
4880 current->VSyncStart = pSiS->SiS_Pr->CP_VSyncStart[i];
4881 current->VSyncEnd = pSiS->SiS_Pr->CP_VSyncEnd[i];
4882 current->VTotal = pSiS->SiS_Pr->CP_VTotal[i];
4883
4884 current->CrtcHDisplay = current->HDisplay;
4885 current->CrtcHBlankStart = pSiS->SiS_Pr->CP_HBlankStart[i];
4886 current->CrtcHSyncStart = current->HSyncStart;
4887 current->CrtcHSyncEnd = current->HSyncEnd;
4888 current->CrtcHBlankEnd = pSiS->SiS_Pr->CP_HBlankEnd[i];
4889 current->CrtcHTotal = current->HTotal;
4890
4891 current->CrtcVDisplay = current->VDisplay;
4892 current->CrtcVBlankStart = pSiS->SiS_Pr->CP_VBlankStart[i];
4893 current->CrtcVSyncStart = current->VSyncStart;
4894 current->CrtcVSyncEnd = current->VSyncEnd;
4895 current->CrtcVBlankEnd = pSiS->SiS_Pr->CP_VBlankEnd[i];
4896 current->CrtcVTotal = current->VTotal;
4897
4898 if(pSiS->SiS_Pr->CP_SyncValid[i]) {
4899 if(pSiS->SiS_Pr->CP_HSync_P[i])
4900 current->Flags |= V_PHSYNC;
4901 else
4902 current->Flags |= V_NHSYNC;
4903
4904 if(pSiS->SiS_Pr->CP_VSync_P[i])
4905 current->Flags |= V_PVSYNC;
4906 else
4907 current->Flags |= V_NVSYNC;
4908 } else {
4909 /* No sync data? Use positive sync... */
4910 current->Flags |= V_PHSYNC;
4911 current->Flags |= V_PVSYNC;
4912 }
4913 }
4914 }
4915 }
4916
4917 return first;
4918
4919 }
4920
4921 /* Build a list of supported modes */
4922 int
SiSTranslateToVESA(ScrnInfoPtr pScrn,int modenumber)4923 SiSTranslateToVESA(ScrnInfoPtr pScrn, int modenumber)
4924 {
4925 SISPtr pSiS = SISPTR(pScrn);
4926 int i;
4927
4928 /* Initialize our pointers */
4929 if(pSiS->VGAEngine == SIS_300_VGA) {
4930 #ifdef SIS300
4931 InitTo300Pointer(pSiS->SiS_Pr, &pSiS->sishw_ext);
4932 #else
4933 return -1;
4934 #endif
4935 } else if(pSiS->VGAEngine == SIS_315_VGA) {
4936 #ifdef SIS315H
4937 InitTo310Pointer(pSiS->SiS_Pr, &pSiS->sishw_ext);
4938 #else
4939 return -1;
4940 #endif
4941 } else return -1;
4942
4943 if(modenumber <= 0x13) return modenumber;
4944
4945 i = 0;
4946 while(pSiS->SiS_Pr->SiS_EModeIDTable[i].Ext_ModeID != 0xff) {
4947 if(pSiS->SiS_Pr->SiS_EModeIDTable[i].Ext_ModeID == modenumber) {
4948 return (int)pSiS->SiS_Pr->SiS_EModeIDTable[i].Ext_VESAID;
4949 }
4950 i++;
4951 }
4952 return -1;
4953 }
4954 #endif /* Xfree86 */
4955
4956 #ifdef LINUX_KERNEL
4957 int
sisfb_mode_rate_to_dclock(SiS_Private * SiS_Pr,PSIS_HW_INFO HwInfo,unsigned char modeno,unsigned char rateindex)4958 sisfb_mode_rate_to_dclock(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
4959 unsigned char modeno, unsigned char rateindex)
4960 {
4961 USHORT ModeNo = modeno;
4962 USHORT ModeIdIndex = 0, ClockIndex = 0;
4963 USHORT RefreshRateTableIndex = 0;
4964 int Clock;
4965
4966 if(HwInfo->jChipType < SIS_315H) {
4967 #ifdef SIS300
4968 InitTo300Pointer(SiS_Pr, HwInfo);
4969 #else
4970 return 65 * 1000;
4971 #endif
4972 } else {
4973 #ifdef SIS315H
4974 InitTo310Pointer(SiS_Pr, HwInfo);
4975 #else
4976 return 65 * 1000;
4977 #endif
4978 }
4979
4980 if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) {;
4981 printk(KERN_ERR "Could not find mode %x\n", ModeNo);
4982 return 65 * 1000;
4983 }
4984
4985 RefreshRateTableIndex = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].REFindex;
4986 RefreshRateTableIndex += (rateindex - 1);
4987 ClockIndex = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
4988 if(HwInfo->jChipType < SIS_315H) {
4989 ClockIndex &= 0x3F;
4990 }
4991 Clock = SiS_Pr->SiS_VCLKData[ClockIndex].CLOCK * 1000;
4992
4993 return(Clock);
4994 }
4995
4996 BOOLEAN
sisfb_gettotalfrommode(SiS_Private * SiS_Pr,PSIS_HW_INFO HwInfo,unsigned char modeno,int * htotal,int * vtotal,unsigned char rateindex)4997 sisfb_gettotalfrommode(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
4998 unsigned char modeno, int *htotal, int *vtotal, unsigned char rateindex)
4999 {
5000 USHORT ModeNo = modeno;
5001 USHORT ModeIdIndex = 0, CRT1Index = 0;
5002 USHORT RefreshRateTableIndex = 0;
5003 unsigned char sr_data, cr_data, cr_data2;
5004
5005 if(HwInfo->jChipType < SIS_315H) {
5006 #ifdef SIS300
5007 InitTo300Pointer(SiS_Pr, HwInfo);
5008 #else
5009 return FALSE;
5010 #endif
5011 } else {
5012 #ifdef SIS315H
5013 InitTo310Pointer(SiS_Pr, HwInfo);
5014 #else
5015 return FALSE;
5016 #endif
5017 }
5018
5019 if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return FALSE;
5020
5021 RefreshRateTableIndex = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].REFindex;
5022 RefreshRateTableIndex += (rateindex - 1);
5023 CRT1Index = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC;
5024
5025 sr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[14];
5026 cr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[0];
5027 *htotal = (((cr_data & 0xff) | ((unsigned short) (sr_data & 0x03) << 8)) + 5) * 8;
5028
5029 sr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[13];
5030 cr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[6];
5031 cr_data2 = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[7];
5032 *vtotal = ((cr_data & 0xFF) |
5033 ((unsigned short)(cr_data2 & 0x01) << 8) |
5034 ((unsigned short)(cr_data2 & 0x20) << 4) |
5035 ((unsigned short)(sr_data & 0x01) << 10)) + 2;
5036
5037 if(SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag & InterlaceMode)
5038 *vtotal *= 2;
5039
5040 return TRUE;
5041 }
5042
5043 int
sisfb_mode_rate_to_ddata(SiS_Private * SiS_Pr,PSIS_HW_INFO HwInfo,unsigned char modeno,unsigned char rateindex,struct fb_var_screeninfo * var)5044 sisfb_mode_rate_to_ddata(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
5045 unsigned char modeno, unsigned char rateindex,
5046 struct fb_var_screeninfo *var)
5047 {
5048 USHORT ModeNo = modeno;
5049 USHORT ModeIdIndex = 0, index = 0;
5050 USHORT RefreshRateTableIndex = 0;
5051 unsigned short VRE, VBE, VRS, VBS, VDE, VT;
5052 unsigned short HRE, HBE, HRS, HBS, HDE, HT;
5053 unsigned char sr_data, cr_data, cr_data2, cr_data3;
5054 int A, B, C, D, E, F, temp, j;
5055
5056 if(HwInfo->jChipType < SIS_315H) {
5057 #ifdef SIS300
5058 InitTo300Pointer(SiS_Pr, HwInfo);
5059 #else
5060 return 0;
5061 #endif
5062 } else {
5063 #ifdef SIS315H
5064 InitTo310Pointer(SiS_Pr, HwInfo);
5065 #else
5066 return 0;
5067 #endif
5068 }
5069
5070 if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return 0;
5071
5072 RefreshRateTableIndex = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].REFindex;
5073 RefreshRateTableIndex += (rateindex - 1);
5074 index = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC;
5075
5076 sr_data = SiS_Pr->SiS_CRT1Table[index].CR[14];
5077
5078 cr_data = SiS_Pr->SiS_CRT1Table[index].CR[0];
5079
5080 /* Horizontal total */
5081 HT = (cr_data & 0xff) |
5082 ((unsigned short) (sr_data & 0x03) << 8);
5083 A = HT + 5;
5084
5085 cr_data = SiS_Pr->SiS_CRT1Table[index].CR[1];
5086
5087 /* Horizontal display enable end */
5088 HDE = (cr_data & 0xff) |
5089 ((unsigned short) (sr_data & 0x0C) << 6);
5090 E = HDE + 1;
5091
5092 cr_data = SiS_Pr->SiS_CRT1Table[index].CR[4];
5093
5094 /* Horizontal retrace (=sync) start */
5095 HRS = (cr_data & 0xff) |
5096 ((unsigned short) (sr_data & 0xC0) << 2);
5097 F = HRS - E - 3;
5098
5099 cr_data = SiS_Pr->SiS_CRT1Table[index].CR[2];
5100
5101 /* Horizontal blank start */
5102 HBS = (cr_data & 0xff) |
5103 ((unsigned short) (sr_data & 0x30) << 4);
5104
5105 sr_data = SiS_Pr->SiS_CRT1Table[index].CR[15];
5106
5107 cr_data = SiS_Pr->SiS_CRT1Table[index].CR[3];
5108
5109 cr_data2 = SiS_Pr->SiS_CRT1Table[index].CR[5];
5110
5111 /* Horizontal blank end */
5112 HBE = (cr_data & 0x1f) |
5113 ((unsigned short) (cr_data2 & 0x80) >> 2) |
5114 ((unsigned short) (sr_data & 0x03) << 6);
5115
5116 /* Horizontal retrace (=sync) end */
5117 HRE = (cr_data2 & 0x1f) | ((sr_data & 0x04) << 3);
5118
5119 temp = HBE - ((E - 1) & 255);
5120 B = (temp > 0) ? temp : (temp + 256);
5121
5122 temp = HRE - ((E + F + 3) & 63);
5123 C = (temp > 0) ? temp : (temp + 64);
5124
5125 D = B - F - C;
5126
5127 if((SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].XRes == 320) &&
5128 ((SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].YRes == 200) ||
5129 (SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].YRes == 240))) {
5130
5131 /* Terrible hack, but the correct CRTC data for
5132 * these modes only produces a black screen...
5133 */
5134 var->left_margin = (400 - 376);
5135 var->right_margin = (328 - 320);
5136 var->hsync_len = (376 - 328);
5137
5138 } else {
5139
5140 var->left_margin = D * 8;
5141 var->right_margin = F * 8;
5142 var->hsync_len = C * 8;
5143
5144 }
5145
5146 sr_data = SiS_Pr->SiS_CRT1Table[index].CR[13];
5147
5148 cr_data = SiS_Pr->SiS_CRT1Table[index].CR[6];
5149
5150 cr_data2 = SiS_Pr->SiS_CRT1Table[index].CR[7];
5151
5152 /* Vertical total */
5153 VT = (cr_data & 0xFF) |
5154 ((unsigned short) (cr_data2 & 0x01) << 8) |
5155 ((unsigned short)(cr_data2 & 0x20) << 4) |
5156 ((unsigned short) (sr_data & 0x01) << 10);
5157 A = VT + 2;
5158
5159 cr_data = SiS_Pr->SiS_CRT1Table[index].CR[10];
5160
5161 /* Vertical display enable end */
5162 VDE = (cr_data & 0xff) |
5163 ((unsigned short) (cr_data2 & 0x02) << 7) |
5164 ((unsigned short) (cr_data2 & 0x40) << 3) |
5165 ((unsigned short) (sr_data & 0x02) << 9);
5166 E = VDE + 1;
5167
5168 cr_data = SiS_Pr->SiS_CRT1Table[index].CR[8];
5169
5170 /* Vertical retrace (=sync) start */
5171 VRS = (cr_data & 0xff) |
5172 ((unsigned short) (cr_data2 & 0x04) << 6) |
5173 ((unsigned short) (cr_data2 & 0x80) << 2) |
5174 ((unsigned short) (sr_data & 0x08) << 7);
5175 F = VRS + 1 - E;
5176
5177 cr_data = SiS_Pr->SiS_CRT1Table[index].CR[11];
5178
5179 cr_data3 = (SiS_Pr->SiS_CRT1Table[index].CR[16] & 0x01) << 5;
5180
5181 /* Vertical blank start */
5182 VBS = (cr_data & 0xff) |
5183 ((unsigned short) (cr_data2 & 0x08) << 5) |
5184 ((unsigned short) (cr_data3 & 0x20) << 4) |
5185 ((unsigned short) (sr_data & 0x04) << 8);
5186
5187 cr_data = SiS_Pr->SiS_CRT1Table[index].CR[12];
5188
5189 /* Vertical blank end */
5190 VBE = (cr_data & 0xff) |
5191 ((unsigned short) (sr_data & 0x10) << 4);
5192 temp = VBE - ((E - 1) & 511);
5193 B = (temp > 0) ? temp : (temp + 512);
5194
5195 cr_data = SiS_Pr->SiS_CRT1Table[index].CR[9];
5196
5197 /* Vertical retrace (=sync) end */
5198 VRE = (cr_data & 0x0f) | ((sr_data & 0x20) >> 1);
5199 temp = VRE - ((E + F - 1) & 31);
5200 C = (temp > 0) ? temp : (temp + 32);
5201
5202 D = B - F - C;
5203
5204 var->upper_margin = D;
5205 var->lower_margin = F;
5206 var->vsync_len = C;
5207
5208 if(SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag & 0x8000)
5209 var->sync &= ~FB_SYNC_VERT_HIGH_ACT;
5210 else
5211 var->sync |= FB_SYNC_VERT_HIGH_ACT;
5212
5213 if(SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag & 0x4000)
5214 var->sync &= ~FB_SYNC_HOR_HIGH_ACT;
5215 else
5216 var->sync |= FB_SYNC_HOR_HIGH_ACT;
5217
5218 var->vmode = FB_VMODE_NONINTERLACED;
5219 if(SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag & 0x0080)
5220 var->vmode = FB_VMODE_INTERLACED;
5221 else {
5222 j = 0;
5223 while(SiS_Pr->SiS_EModeIDTable[j].Ext_ModeID != 0xff) {
5224 if(SiS_Pr->SiS_EModeIDTable[j].Ext_ModeID ==
5225 SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].ModeID) {
5226 if(SiS_Pr->SiS_EModeIDTable[j].Ext_ModeFlag & DoubleScanMode) {
5227 var->vmode = FB_VMODE_DOUBLE;
5228 }
5229 break;
5230 }
5231 j++;
5232 }
5233 }
5234
5235 if((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) {
5236 #if 0 /* Do this? */
5237 var->upper_margin <<= 1;
5238 var->lower_margin <<= 1;
5239 var->vsync_len <<= 1;
5240 #endif
5241 } else if((var->vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE) {
5242 var->upper_margin >>= 1;
5243 var->lower_margin >>= 1;
5244 var->vsync_len >>= 1;
5245 }
5246
5247 return 1;
5248 }
5249
5250 #endif
5251
5252