1 /*
2  * Copyright 2012-15 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25 
26 #ifndef __DAL_AMDGPU_DM_MST_TYPES_H__
27 #define __DAL_AMDGPU_DM_MST_TYPES_H__
28 
29 #define DP_BRANCH_DEVICE_ID_90CC24 0x90CC24
30 
31 #define SYNAPTICS_RC_COMMAND       0x4B2
32 #define SYNAPTICS_RC_RESULT        0x4B3
33 #define SYNAPTICS_RC_LENGTH        0x4B8
34 #define SYNAPTICS_RC_OFFSET        0x4BC
35 #define SYNAPTICS_RC_DATA          0x4C0
36 
37 struct amdgpu_display_manager;
38 struct amdgpu_dm_connector;
39 
40 int dm_mst_get_pbn_divider(struct dc_link *link);
41 
42 void amdgpu_dm_initialize_dp_connector(struct amdgpu_display_manager *dm,
43 				       struct amdgpu_dm_connector *aconnector,
44 				       int link_index);
45 
46 void
47 dm_dp_create_fake_mst_encoders(struct amdgpu_device *adev);
48 
49 struct dsc_mst_fairness_vars {
50 	int pbn;
51 	bool dsc_enabled;
52 	int bpp_x16;
53 	struct amdgpu_dm_connector *aconnector;
54 };
55 
56 int compute_mst_dsc_configs_for_state(struct drm_atomic_state *state,
57 				      struct dc_state *dc_state,
58 				      struct dsc_mst_fairness_vars *vars);
59 
60 bool needs_dsc_aux_workaround(struct dc_link *link);
61 
62 int pre_validate_dsc(struct drm_atomic_state *state,
63 		     struct dm_atomic_state **dm_state_ptr,
64 		     struct dsc_mst_fairness_vars *vars);
65 
66 enum dc_status dm_dp_mst_is_port_support_mode(
67 	struct amdgpu_dm_connector *aconnector,
68 	struct dc_stream_state *stream);
69 
70 #endif
71