1 /*
2 * Copyright (C) 2010 Bluecherry, LLC www.bluecherrydvr.com
3 * Copyright (C) 2010 Ben Collins <bcollins@bluecherry.net>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
18 */
19
20 #ifndef __SOLO6X10_H
21 #define __SOLO6X10_H
22
23 #include <linux/version.h>
24 #include <linux/pci.h>
25 #include <linux/i2c.h>
26 #include <linux/semaphore.h>
27 #include <linux/mutex.h>
28 #include <linux/list.h>
29 #include <linux/wait.h>
30 #include <linux/delay.h>
31 #include <linux/slab.h>
32 #include <asm/io.h>
33 #include <linux/atomic.h>
34 #include <linux/videodev2.h>
35 #include <media/v4l2-dev.h>
36 #include <media/videobuf-core.h>
37 #include "registers.h"
38
39 #ifndef PCI_VENDOR_ID_SOFTLOGIC
40 #define PCI_VENDOR_ID_SOFTLOGIC 0x9413
41 #define PCI_DEVICE_ID_SOLO6010 0x6010
42 #define PCI_DEVICE_ID_SOLO6110 0x6110
43 #endif
44
45 #ifndef PCI_VENDOR_ID_BLUECHERRY
46 #define PCI_VENDOR_ID_BLUECHERRY 0x1BB3
47 /* Neugent Softlogic 6010 based cards */
48 #define PCI_DEVICE_ID_NEUSOLO_4 0x4304
49 #define PCI_DEVICE_ID_NEUSOLO_9 0x4309
50 #define PCI_DEVICE_ID_NEUSOLO_16 0x4310
51 /* Bluecherry Softlogic 6010 based cards */
52 #define PCI_DEVICE_ID_BC_SOLO_4 0x4E04
53 #define PCI_DEVICE_ID_BC_SOLO_9 0x4E09
54 #define PCI_DEVICE_ID_BC_SOLO_16 0x4E10
55 /* Bluecherry Softlogic 6110 based cards */
56 #define PCI_DEVICE_ID_BC_6110_4 0x5304
57 #define PCI_DEVICE_ID_BC_6110_8 0x5308
58 #define PCI_DEVICE_ID_BC_6110_16 0x5310
59 #endif /* Bluecherry */
60
61 #define SOLO6X10_NAME "solo6x10"
62
63 #define SOLO_MAX_CHANNELS 16
64
65 /* Make sure these two match */
66 #define SOLO6X10_VERSION "2.1.0"
67 #define SOLO6X10_VER_MAJOR 2
68 #define SOLO6X10_VER_MINOR 0
69 #define SOLO6X10_VER_SUB 0
70 #define SOLO6X10_VER_NUM \
71 KERNEL_VERSION(SOLO6X10_VER_MAJOR, SOLO6X10_VER_MINOR, SOLO6X10_VER_SUB)
72
73 #define FLAGS_6110 1
74
75 /*
76 * The SOLO6x10 actually has 8 i2c channels, but we only use 2.
77 * 0 - Techwell chip(s)
78 * 1 - SAA7128
79 */
80 #define SOLO_I2C_ADAPTERS 2
81 #define SOLO_I2C_TW 0
82 #define SOLO_I2C_SAA 1
83
84 /* DMA Engine setup */
85 #define SOLO_NR_P2M 4
86 #define SOLO_NR_P2M_DESC 256
87 /* MPEG and JPEG share the same interrupt and locks so they must be together
88 * in the same dma channel. */
89 #define SOLO_P2M_DMA_ID_MP4E 0
90 #define SOLO_P2M_DMA_ID_JPEG 0
91 #define SOLO_P2M_DMA_ID_MP4D 1
92 #define SOLO_P2M_DMA_ID_G723D 1
93 #define SOLO_P2M_DMA_ID_DISP 2
94 #define SOLO_P2M_DMA_ID_OSG 2
95 #define SOLO_P2M_DMA_ID_G723E 3
96 #define SOLO_P2M_DMA_ID_VIN 3
97
98 /* Encoder standard modes */
99 #define SOLO_ENC_MODE_CIF 2
100 #define SOLO_ENC_MODE_HD1 1
101 #define SOLO_ENC_MODE_D1 9
102
103 #define SOLO_DEFAULT_GOP 30
104 #define SOLO_DEFAULT_QP 3
105
106 /* There is 8MB memory available for solo to buffer MPEG4 frames.
107 * This gives us 512 * 16kbyte queues. */
108 #define SOLO_NR_RING_BUFS 512
109
110 #define SOLO_CLOCK_MHZ 108
111
112 #ifndef V4L2_BUF_FLAG_MOTION_ON
113 #define V4L2_BUF_FLAG_MOTION_ON 0x0400
114 #define V4L2_BUF_FLAG_MOTION_DETECTED 0x0800
115 #endif
116 #ifndef V4L2_CID_MOTION_ENABLE
117 #define PRIVATE_CIDS
118 #define V4L2_CID_MOTION_ENABLE (V4L2_CID_PRIVATE_BASE+0)
119 #define V4L2_CID_MOTION_THRESHOLD (V4L2_CID_PRIVATE_BASE+1)
120 #define V4L2_CID_MOTION_TRACE (V4L2_CID_PRIVATE_BASE+2)
121 #endif
122
123 enum SOLO_I2C_STATE {
124 IIC_STATE_IDLE,
125 IIC_STATE_START,
126 IIC_STATE_READ,
127 IIC_STATE_WRITE,
128 IIC_STATE_STOP
129 };
130
131 struct p2m_desc {
132 u32 ctrl;
133 u32 ext;
134 u32 ta;
135 u32 fa;
136 };
137
138 struct solo_p2m_dev {
139 struct mutex mutex;
140 struct completion completion;
141 int error;
142 };
143
144 #define OSD_TEXT_MAX 30
145
146 enum solo_enc_types {
147 SOLO_ENC_TYPE_STD,
148 SOLO_ENC_TYPE_EXT,
149 };
150
151 struct solo_enc_dev {
152 struct solo_dev *solo_dev;
153 /* V4L2 Items */
154 struct video_device *vfd;
155 /* General accounting */
156 wait_queue_head_t thread_wait;
157 spinlock_t lock;
158 atomic_t readers;
159 u8 ch;
160 u8 mode, gop, qp, interlaced, interval;
161 u8 reset_gop;
162 u8 bw_weight;
163 u8 motion_detected;
164 u16 motion_thresh;
165 u16 width;
166 u16 height;
167 char osd_text[OSD_TEXT_MAX + 1];
168 };
169
170 struct solo_enc_buf {
171 u8 vop;
172 u8 ch;
173 enum solo_enc_types type;
174 u32 off;
175 u32 size;
176 u32 jpeg_off;
177 u32 jpeg_size;
178 struct timeval ts;
179 };
180
181 /* The SOLO6x10 PCI Device */
182 struct solo_dev {
183 /* General stuff */
184 struct pci_dev *pdev;
185 u8 __iomem *reg_base;
186 int nr_chans;
187 int nr_ext;
188 u32 flags;
189 u32 irq_mask;
190 u32 motion_mask;
191 spinlock_t reg_io_lock;
192
193 /* tw28xx accounting */
194 u8 tw2865, tw2864, tw2815;
195 u8 tw28_cnt;
196
197 /* i2c related items */
198 struct i2c_adapter i2c_adap[SOLO_I2C_ADAPTERS];
199 enum SOLO_I2C_STATE i2c_state;
200 struct mutex i2c_mutex;
201 int i2c_id;
202 wait_queue_head_t i2c_wait;
203 struct i2c_msg *i2c_msg;
204 unsigned int i2c_msg_num;
205 unsigned int i2c_msg_ptr;
206
207 /* P2M DMA Engine */
208 struct solo_p2m_dev p2m_dev[SOLO_NR_P2M];
209
210 /* V4L2 Display items */
211 struct video_device *vfd;
212 unsigned int erasing;
213 unsigned int frame_blank;
214 u8 cur_disp_ch;
215 wait_queue_head_t disp_thread_wait;
216
217 /* V4L2 Encoder items */
218 struct solo_enc_dev *v4l2_enc[SOLO_MAX_CHANNELS];
219 u16 enc_bw_remain;
220 /* IDX into hw mp4 encoder */
221 u8 enc_idx;
222 /* Our software ring of enc buf references */
223 u16 enc_wr_idx;
224 struct solo_enc_buf enc_buf[SOLO_NR_RING_BUFS];
225
226 /* Current video settings */
227 u32 video_type;
228 u16 video_hsize, video_vsize;
229 u16 vout_hstart, vout_vstart;
230 u16 vin_hstart, vin_vstart;
231 u8 fps;
232
233 /* Audio components */
234 struct snd_card *snd_card;
235 struct snd_pcm *snd_pcm;
236 atomic_t snd_users;
237 int g723_hw_idx;
238 };
239
solo_reg_read(struct solo_dev * solo_dev,int reg)240 static inline u32 solo_reg_read(struct solo_dev *solo_dev, int reg)
241 {
242 unsigned long flags;
243 u32 ret;
244 u16 val;
245
246 spin_lock_irqsave(&solo_dev->reg_io_lock, flags);
247
248 ret = readl(solo_dev->reg_base + reg);
249 rmb();
250 pci_read_config_word(solo_dev->pdev, PCI_STATUS, &val);
251 rmb();
252
253 spin_unlock_irqrestore(&solo_dev->reg_io_lock, flags);
254
255 return ret;
256 }
257
solo_reg_write(struct solo_dev * solo_dev,int reg,u32 data)258 static inline void solo_reg_write(struct solo_dev *solo_dev, int reg, u32 data)
259 {
260 unsigned long flags;
261 u16 val;
262
263 spin_lock_irqsave(&solo_dev->reg_io_lock, flags);
264
265 writel(data, solo_dev->reg_base + reg);
266 wmb();
267 pci_read_config_word(solo_dev->pdev, PCI_STATUS, &val);
268 rmb();
269
270 spin_unlock_irqrestore(&solo_dev->reg_io_lock, flags);
271 }
272
273 void solo_irq_on(struct solo_dev *solo_dev, u32 mask);
274 void solo_irq_off(struct solo_dev *solo_dev, u32 mask);
275
276 /* Init/exit routeines for subsystems */
277 int solo_disp_init(struct solo_dev *solo_dev);
278 void solo_disp_exit(struct solo_dev *solo_dev);
279
280 int solo_gpio_init(struct solo_dev *solo_dev);
281 void solo_gpio_exit(struct solo_dev *solo_dev);
282
283 int solo_i2c_init(struct solo_dev *solo_dev);
284 void solo_i2c_exit(struct solo_dev *solo_dev);
285
286 int solo_p2m_init(struct solo_dev *solo_dev);
287 void solo_p2m_exit(struct solo_dev *solo_dev);
288
289 int solo_v4l2_init(struct solo_dev *solo_dev);
290 void solo_v4l2_exit(struct solo_dev *solo_dev);
291
292 int solo_enc_init(struct solo_dev *solo_dev);
293 void solo_enc_exit(struct solo_dev *solo_dev);
294
295 int solo_enc_v4l2_init(struct solo_dev *solo_dev);
296 void solo_enc_v4l2_exit(struct solo_dev *solo_dev);
297
298 int solo_g723_init(struct solo_dev *solo_dev);
299 void solo_g723_exit(struct solo_dev *solo_dev);
300
301 /* ISR's */
302 int solo_i2c_isr(struct solo_dev *solo_dev);
303 void solo_p2m_isr(struct solo_dev *solo_dev, int id);
304 void solo_p2m_error_isr(struct solo_dev *solo_dev, u32 status);
305 void solo_enc_v4l2_isr(struct solo_dev *solo_dev);
306 void solo_g723_isr(struct solo_dev *solo_dev);
307 void solo_motion_isr(struct solo_dev *solo_dev);
308 void solo_video_in_isr(struct solo_dev *solo_dev);
309
310 /* i2c read/write */
311 u8 solo_i2c_readbyte(struct solo_dev *solo_dev, int id, u8 addr, u8 off);
312 void solo_i2c_writebyte(struct solo_dev *solo_dev, int id, u8 addr, u8 off,
313 u8 data);
314
315 /* P2M DMA */
316 int solo_p2m_dma_t(struct solo_dev *solo_dev, u8 id, int wr,
317 dma_addr_t dma_addr, u32 ext_addr, u32 size);
318 int solo_p2m_dma(struct solo_dev *solo_dev, u8 id, int wr,
319 void *sys_addr, u32 ext_addr, u32 size);
320 int solo_p2m_dma_sg(struct solo_dev *solo_dev, u8 id,
321 struct p2m_desc *pdesc, int wr,
322 struct scatterlist *sglist, u32 sg_off,
323 u32 ext_addr, u32 size);
324 void solo_p2m_push_desc(struct p2m_desc *desc, int wr, dma_addr_t dma_addr,
325 u32 ext_addr, u32 size, int repeat, u32 ext_size);
326 int solo_p2m_dma_desc(struct solo_dev *solo_dev, u8 id,
327 struct p2m_desc *desc, int desc_count);
328
329 /* Set the threshold for motion detection */
330 void solo_set_motion_threshold(struct solo_dev *solo_dev, u8 ch, u16 val);
331 #define SOLO_DEF_MOT_THRESH 0x0300
332
333 /* Write text on OSD */
334 int solo_osd_print(struct solo_enc_dev *solo_enc);
335
336 #endif /* __SOLO6X10_H */
337