1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
2 /*
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * Copyright(c) 2018 Intel Corporation. All rights reserved.
7 *
8 * Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
9 */
10
11 #ifndef __SOUND_SOC_SOF_PRIV_H
12 #define __SOUND_SOC_SOF_PRIV_H
13
14 #include <linux/device.h>
15 #include <sound/hdaudio.h>
16 #include <sound/sof.h>
17 #include <sound/sof/info.h>
18 #include <sound/sof/pm.h>
19 #include <sound/sof/trace.h>
20 #include <uapi/sound/sof/fw.h>
21 #include <sound/sof/ext_manifest.h>
22
23 struct snd_sof_pcm_stream;
24
25 /* Flag definitions used in sof_core_debug (sof_debug module parameter) */
26 #define SOF_DBG_ENABLE_TRACE BIT(0)
27 #define SOF_DBG_RETAIN_CTX BIT(1) /* prevent DSP D3 on FW exception */
28 #define SOF_DBG_VERIFY_TPLG BIT(2) /* verify topology during load */
29 #define SOF_DBG_DYNAMIC_PIPELINES_OVERRIDE BIT(3) /* 0: use topology token
30 * 1: override topology
31 */
32 #define SOF_DBG_DYNAMIC_PIPELINES_ENABLE BIT(4) /* 0: use static pipelines
33 * 1: use dynamic pipelines
34 */
35 #define SOF_DBG_DISABLE_MULTICORE BIT(5) /* schedule all pipelines/widgets
36 * on primary core
37 */
38 #define SOF_DBG_PRINT_ALL_DUMPS BIT(6) /* Print all ipc and dsp dumps */
39 #define SOF_DBG_IGNORE_D3_PERSISTENT BIT(7) /* ignore the DSP D3 persistent capability
40 * and always download firmware upon D3 exit
41 */
42 #define SOF_DBG_PRINT_DMA_POSITION_UPDATE_LOGS BIT(8) /* print DMA position updates
43 * in dmesg logs
44 */
45 #define SOF_DBG_PRINT_IPC_SUCCESS_LOGS BIT(9) /* print IPC success
46 * in dmesg logs
47 */
48 #define SOF_DBG_FORCE_NOCODEC BIT(10) /* ignore all codec-related
49 * configurations
50 */
51 #define SOF_DBG_DUMP_IPC_MESSAGE_PAYLOAD BIT(11) /* On top of the IPC message header
52 * dump the message payload also
53 */
54 #define SOF_DBG_DSPLESS_MODE BIT(15) /* Do not initialize and use the DSP */
55
56 /* Flag definitions used for controlling the DSP dump behavior */
57 #define SOF_DBG_DUMP_REGS BIT(0)
58 #define SOF_DBG_DUMP_MBOX BIT(1)
59 #define SOF_DBG_DUMP_TEXT BIT(2)
60 #define SOF_DBG_DUMP_PCI BIT(3)
61 /* Output this dump (at the DEBUG level) only when SOF_DBG_PRINT_ALL_DUMPS is set */
62 #define SOF_DBG_DUMP_OPTIONAL BIT(4)
63
64 /* global debug state set by SOF_DBG_ flags */
65 bool sof_debug_check_flag(int mask);
66
67 /* max BARs mmaped devices can use */
68 #define SND_SOF_BARS 8
69
70 /* time in ms for runtime suspend delay */
71 #define SND_SOF_SUSPEND_DELAY_MS 2000
72
73 /* DMA buffer size for trace */
74 #define DMA_BUF_SIZE_FOR_TRACE (PAGE_SIZE * 16)
75
76 #define SOF_IPC_DSP_REPLY 0
77 #define SOF_IPC_HOST_REPLY 1
78
79 /* convenience constructor for DAI driver streams */
80 #define SOF_DAI_STREAM(sname, scmin, scmax, srates, sfmt) \
81 {.stream_name = sname, .channels_min = scmin, .channels_max = scmax, \
82 .rates = srates, .formats = sfmt}
83
84 #define SOF_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE | \
85 SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_FLOAT)
86
87 /* So far the primary core on all DSPs has ID 0 */
88 #define SOF_DSP_PRIMARY_CORE 0
89
90 /* max number of DSP cores */
91 #define SOF_MAX_DSP_NUM_CORES 8
92
93 struct sof_dsp_power_state {
94 u32 state;
95 u32 substate; /* platform-specific */
96 };
97
98 /* System suspend target state */
99 enum sof_system_suspend_state {
100 SOF_SUSPEND_NONE = 0,
101 SOF_SUSPEND_S0IX,
102 SOF_SUSPEND_S3,
103 SOF_SUSPEND_S4,
104 SOF_SUSPEND_S5,
105 };
106
107 enum sof_dfsentry_type {
108 SOF_DFSENTRY_TYPE_IOMEM = 0,
109 SOF_DFSENTRY_TYPE_BUF,
110 };
111
112 enum sof_debugfs_access_type {
113 SOF_DEBUGFS_ACCESS_ALWAYS = 0,
114 SOF_DEBUGFS_ACCESS_D0_ONLY,
115 };
116
117 struct sof_compr_stream {
118 u64 copied_total;
119 u32 sampling_rate;
120 u16 channels;
121 u16 sample_container_bytes;
122 size_t posn_offset;
123 };
124
125 struct snd_sof_dev;
126 struct snd_sof_ipc_msg;
127 struct snd_sof_ipc;
128 struct snd_sof_debugfs_map;
129 struct snd_soc_tplg_ops;
130 struct snd_soc_component;
131 struct snd_sof_pdata;
132
133 /**
134 * struct snd_sof_platform_stream_params - platform dependent stream parameters
135 * @stream_tag: Stream tag to use
136 * @use_phy_addr: Use the provided @phy_addr for configuration
137 * @phy_addr: Platform dependent address to be used, if @use_phy_addr
138 * is true
139 * @no_ipc_position: Disable position update IPC from firmware
140 */
141 struct snd_sof_platform_stream_params {
142 u16 stream_tag;
143 bool use_phy_address;
144 u32 phy_addr;
145 bool no_ipc_position;
146 bool cont_update_posn;
147 };
148
149 /**
150 * struct sof_firmware - Container struct for SOF firmware
151 * @fw: Pointer to the firmware
152 * @payload_offset: Offset of the data within the loaded firmware image to be
153 * loaded to the DSP (skipping for example ext_manifest section)
154 */
155 struct sof_firmware {
156 const struct firmware *fw;
157 u32 payload_offset;
158 };
159
160 /*
161 * SOF DSP HW abstraction operations.
162 * Used to abstract DSP HW architecture and any IO busses between host CPU
163 * and DSP device(s).
164 */
165 struct snd_sof_dsp_ops {
166
167 /* probe/remove/shutdown */
168 int (*probe)(struct snd_sof_dev *sof_dev); /* mandatory */
169 int (*remove)(struct snd_sof_dev *sof_dev); /* optional */
170 int (*shutdown)(struct snd_sof_dev *sof_dev); /* optional */
171
172 /* DSP core boot / reset */
173 int (*run)(struct snd_sof_dev *sof_dev); /* mandatory */
174 int (*stall)(struct snd_sof_dev *sof_dev, unsigned int core_mask); /* optional */
175 int (*reset)(struct snd_sof_dev *sof_dev); /* optional */
176 int (*core_get)(struct snd_sof_dev *sof_dev, int core); /* optional */
177 int (*core_put)(struct snd_sof_dev *sof_dev, int core); /* optional */
178
179 /*
180 * Register IO: only used by respective drivers themselves,
181 * TODO: consider removing these operations and calling respective
182 * implementations directly
183 */
184 void (*write8)(struct snd_sof_dev *sof_dev, void __iomem *addr,
185 u8 value); /* optional */
186 u8 (*read8)(struct snd_sof_dev *sof_dev,
187 void __iomem *addr); /* optional */
188 void (*write)(struct snd_sof_dev *sof_dev, void __iomem *addr,
189 u32 value); /* optional */
190 u32 (*read)(struct snd_sof_dev *sof_dev,
191 void __iomem *addr); /* optional */
192 void (*write64)(struct snd_sof_dev *sof_dev, void __iomem *addr,
193 u64 value); /* optional */
194 u64 (*read64)(struct snd_sof_dev *sof_dev,
195 void __iomem *addr); /* optional */
196
197 /* memcpy IO */
198 int (*block_read)(struct snd_sof_dev *sof_dev,
199 enum snd_sof_fw_blk_type type, u32 offset,
200 void *dest, size_t size); /* mandatory */
201 int (*block_write)(struct snd_sof_dev *sof_dev,
202 enum snd_sof_fw_blk_type type, u32 offset,
203 void *src, size_t size); /* mandatory */
204
205 /* Mailbox IO */
206 void (*mailbox_read)(struct snd_sof_dev *sof_dev,
207 u32 offset, void *dest,
208 size_t size); /* optional */
209 void (*mailbox_write)(struct snd_sof_dev *sof_dev,
210 u32 offset, void *src,
211 size_t size); /* optional */
212
213 /* doorbell */
214 irqreturn_t (*irq_handler)(int irq, void *context); /* optional */
215 irqreturn_t (*irq_thread)(int irq, void *context); /* optional */
216
217 /* ipc */
218 int (*send_msg)(struct snd_sof_dev *sof_dev,
219 struct snd_sof_ipc_msg *msg); /* mandatory */
220
221 /* FW loading */
222 int (*load_firmware)(struct snd_sof_dev *sof_dev); /* mandatory */
223 int (*load_module)(struct snd_sof_dev *sof_dev,
224 struct snd_sof_mod_hdr *hdr); /* optional */
225
226 /* connect pcm substream to a host stream */
227 int (*pcm_open)(struct snd_sof_dev *sdev,
228 struct snd_pcm_substream *substream); /* optional */
229 /* disconnect pcm substream to a host stream */
230 int (*pcm_close)(struct snd_sof_dev *sdev,
231 struct snd_pcm_substream *substream); /* optional */
232
233 /* host stream hw params */
234 int (*pcm_hw_params)(struct snd_sof_dev *sdev,
235 struct snd_pcm_substream *substream,
236 struct snd_pcm_hw_params *params,
237 struct snd_sof_platform_stream_params *platform_params); /* optional */
238
239 /* host stream hw_free */
240 int (*pcm_hw_free)(struct snd_sof_dev *sdev,
241 struct snd_pcm_substream *substream); /* optional */
242
243 /* host stream trigger */
244 int (*pcm_trigger)(struct snd_sof_dev *sdev,
245 struct snd_pcm_substream *substream,
246 int cmd); /* optional */
247
248 /* host stream pointer */
249 snd_pcm_uframes_t (*pcm_pointer)(struct snd_sof_dev *sdev,
250 struct snd_pcm_substream *substream); /* optional */
251
252 /* pcm ack */
253 int (*pcm_ack)(struct snd_sof_dev *sdev, struct snd_pcm_substream *substream); /* optional */
254
255 /*
256 * optional callback to retrieve the link DMA position for the substream
257 * when the position is not reported in the shared SRAM windows but
258 * instead from a host-accessible hardware counter.
259 */
260 u64 (*get_stream_position)(struct snd_sof_dev *sdev,
261 struct snd_soc_component *component,
262 struct snd_pcm_substream *substream); /* optional */
263
264 /* host read DSP stream data */
265 int (*ipc_msg_data)(struct snd_sof_dev *sdev,
266 struct snd_sof_pcm_stream *sps,
267 void *p, size_t sz); /* mandatory */
268
269 /* host side configuration of the stream's data offset in stream mailbox area */
270 int (*set_stream_data_offset)(struct snd_sof_dev *sdev,
271 struct snd_sof_pcm_stream *sps,
272 size_t posn_offset); /* optional */
273
274 /* pre/post firmware run */
275 int (*pre_fw_run)(struct snd_sof_dev *sof_dev); /* optional */
276 int (*post_fw_run)(struct snd_sof_dev *sof_dev); /* optional */
277
278 /* parse platform specific extended manifest, optional */
279 int (*parse_platform_ext_manifest)(struct snd_sof_dev *sof_dev,
280 const struct sof_ext_man_elem_header *hdr);
281
282 /* DSP PM */
283 int (*suspend)(struct snd_sof_dev *sof_dev,
284 u32 target_state); /* optional */
285 int (*resume)(struct snd_sof_dev *sof_dev); /* optional */
286 int (*runtime_suspend)(struct snd_sof_dev *sof_dev); /* optional */
287 int (*runtime_resume)(struct snd_sof_dev *sof_dev); /* optional */
288 int (*runtime_idle)(struct snd_sof_dev *sof_dev); /* optional */
289 int (*set_hw_params_upon_resume)(struct snd_sof_dev *sdev); /* optional */
290 int (*set_power_state)(struct snd_sof_dev *sdev,
291 const struct sof_dsp_power_state *target_state); /* optional */
292
293 /* DSP clocking */
294 int (*set_clk)(struct snd_sof_dev *sof_dev, u32 freq); /* optional */
295
296 /* debug */
297 const struct snd_sof_debugfs_map *debug_map; /* optional */
298 int debug_map_count; /* optional */
299 void (*dbg_dump)(struct snd_sof_dev *sof_dev,
300 u32 flags); /* optional */
301 void (*ipc_dump)(struct snd_sof_dev *sof_dev); /* optional */
302 int (*debugfs_add_region_item)(struct snd_sof_dev *sdev,
303 enum snd_sof_fw_blk_type blk_type, u32 offset,
304 size_t size, const char *name,
305 enum sof_debugfs_access_type access_type); /* optional */
306
307 /* host DMA trace (IPC3) */
308 int (*trace_init)(struct snd_sof_dev *sdev,
309 struct snd_dma_buffer *dmatb,
310 struct sof_ipc_dma_trace_params_ext *dtrace_params); /* optional */
311 int (*trace_release)(struct snd_sof_dev *sdev); /* optional */
312 int (*trace_trigger)(struct snd_sof_dev *sdev,
313 int cmd); /* optional */
314
315 /* misc */
316 int (*get_bar_index)(struct snd_sof_dev *sdev,
317 u32 type); /* optional */
318 int (*get_mailbox_offset)(struct snd_sof_dev *sdev);/* mandatory for common loader code */
319 int (*get_window_offset)(struct snd_sof_dev *sdev,
320 u32 id);/* mandatory for common loader code */
321
322 /* machine driver ops */
323 int (*machine_register)(struct snd_sof_dev *sdev,
324 void *pdata); /* optional */
325 void (*machine_unregister)(struct snd_sof_dev *sdev,
326 void *pdata); /* optional */
327 struct snd_soc_acpi_mach * (*machine_select)(struct snd_sof_dev *sdev); /* optional */
328 void (*set_mach_params)(struct snd_soc_acpi_mach *mach,
329 struct snd_sof_dev *sdev); /* optional */
330
331 /* IPC client ops */
332 int (*register_ipc_clients)(struct snd_sof_dev *sdev); /* optional */
333 void (*unregister_ipc_clients)(struct snd_sof_dev *sdev); /* optional */
334
335 /* DAI ops */
336 struct snd_soc_dai_driver *drv;
337 int num_drv;
338
339 /* ALSA HW info flags, will be stored in snd_pcm_runtime.hw.info */
340 u32 hw_info;
341
342 const struct dsp_arch_ops *dsp_arch_ops;
343 };
344
345 /* DSP architecture specific callbacks for oops and stack dumps */
346 struct dsp_arch_ops {
347 void (*dsp_oops)(struct snd_sof_dev *sdev, const char *level, void *oops);
348 void (*dsp_stack)(struct snd_sof_dev *sdev, const char *level, void *oops,
349 u32 *stack, u32 stack_words);
350 };
351
352 #define sof_dsp_arch_ops(sdev) ((sdev)->pdata->desc->ops->dsp_arch_ops)
353
354 /* FS entry for debug files that can expose DSP memories, registers */
355 struct snd_sof_dfsentry {
356 size_t size;
357 size_t buf_data_size; /* length of buffered data for file read operation */
358 enum sof_dfsentry_type type;
359 /*
360 * access_type specifies if the
361 * memory -> DSP resource (memory, register etc) is always accessible
362 * or if it is accessible only when the DSP is in D0.
363 */
364 enum sof_debugfs_access_type access_type;
365 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_ENABLE_DEBUGFS_CACHE)
366 char *cache_buf; /* buffer to cache the contents of debugfs memory */
367 #endif
368 struct snd_sof_dev *sdev;
369 struct list_head list; /* list in sdev dfsentry list */
370 union {
371 void __iomem *io_mem;
372 void *buf;
373 };
374 };
375
376 /* Debug mapping for any DSP memory or registers that can used for debug */
377 struct snd_sof_debugfs_map {
378 const char *name;
379 u32 bar;
380 u32 offset;
381 u32 size;
382 /*
383 * access_type specifies if the memory is always accessible
384 * or if it is accessible only when the DSP is in D0.
385 */
386 enum sof_debugfs_access_type access_type;
387 };
388
389 /* mailbox descriptor, used for host <-> DSP IPC */
390 struct snd_sof_mailbox {
391 u32 offset;
392 size_t size;
393 };
394
395 /* IPC message descriptor for host <-> DSP IO */
396 struct snd_sof_ipc_msg {
397 /* message data */
398 void *msg_data;
399 void *reply_data;
400 size_t msg_size;
401 size_t reply_size;
402 int reply_error;
403
404 /* notification, firmware initiated messages */
405 void *rx_data;
406
407 wait_queue_head_t waitq;
408 bool ipc_complete;
409 };
410
411 /**
412 * struct sof_ipc_fw_tracing_ops - IPC-specific firmware tracing ops
413 * @init: Function pointer for initialization of the tracing
414 * @free: Optional function pointer for freeing of the tracing
415 * @fw_crashed: Optional function pointer to notify the tracing of a firmware crash
416 * @suspend: Function pointer for system/runtime suspend
417 * @resume: Function pointer for system/runtime resume
418 */
419 struct sof_ipc_fw_tracing_ops {
420 int (*init)(struct snd_sof_dev *sdev);
421 void (*free)(struct snd_sof_dev *sdev);
422 void (*fw_crashed)(struct snd_sof_dev *sdev);
423 void (*suspend)(struct snd_sof_dev *sdev, pm_message_t pm_state);
424 int (*resume)(struct snd_sof_dev *sdev);
425 };
426
427 /**
428 * struct sof_ipc_pm_ops - IPC-specific PM ops
429 * @ctx_save: Optional function pointer for context save
430 * @ctx_restore: Optional function pointer for context restore
431 * @set_core_state: Optional function pointer for turning on/off a DSP core
432 * @set_pm_gate: Optional function pointer for pm gate settings
433 */
434 struct sof_ipc_pm_ops {
435 int (*ctx_save)(struct snd_sof_dev *sdev);
436 int (*ctx_restore)(struct snd_sof_dev *sdev);
437 int (*set_core_state)(struct snd_sof_dev *sdev, int core_idx, bool on);
438 int (*set_pm_gate)(struct snd_sof_dev *sdev, u32 flags);
439 };
440
441 /**
442 * struct sof_ipc_fw_loader_ops - IPC/FW-specific loader ops
443 * @validate: Function pointer for validating the firmware image
444 * @parse_ext_manifest: Function pointer for parsing the manifest of the firmware
445 * @load_fw_to_dsp: Optional function pointer for loading the firmware to the
446 * DSP.
447 * The function implements generic, hardware independent way
448 * of loading the initial firmware and its modules (if any).
449 */
450 struct sof_ipc_fw_loader_ops {
451 int (*validate)(struct snd_sof_dev *sdev);
452 size_t (*parse_ext_manifest)(struct snd_sof_dev *sdev);
453 int (*load_fw_to_dsp)(struct snd_sof_dev *sdev);
454 };
455
456 struct sof_ipc_tplg_ops;
457 struct sof_ipc_pcm_ops;
458
459 /**
460 * struct sof_ipc_ops - IPC-specific ops
461 * @tplg: Pointer to IPC-specific topology ops
462 * @pm: Pointer to PM ops
463 * @pcm: Pointer to PCM ops
464 * @fw_loader: Pointer to Firmware Loader ops
465 * @fw_tracing: Optional pointer to Firmware tracing ops
466 *
467 * @init: Optional pointer for IPC related initialization
468 * @exit: Optional pointer for IPC related cleanup
469 * @post_fw_boot: Optional pointer to execute IPC related tasks after firmware
470 * boot.
471 *
472 * @tx_msg: Function pointer for sending a 'short' IPC message
473 * @set_get_data: Function pointer for set/get data ('large' IPC message). This
474 * function may split up the 'large' message and use the @tx_msg
475 * path to transfer individual chunks, or use other means to transfer
476 * the message.
477 * @get_reply: Function pointer for fetching the reply to
478 * sdev->ipc->msg.reply_data
479 * @rx_msg: Function pointer for handling a received message
480 *
481 * Note: both @tx_msg and @set_get_data considered as TX functions and they are
482 * serialized for the duration of the instructed transfer. A large message sent
483 * via @set_get_data is a single transfer even if at the hardware level it is
484 * handled with multiple chunks.
485 */
486 struct sof_ipc_ops {
487 const struct sof_ipc_tplg_ops *tplg;
488 const struct sof_ipc_pm_ops *pm;
489 const struct sof_ipc_pcm_ops *pcm;
490 const struct sof_ipc_fw_loader_ops *fw_loader;
491 const struct sof_ipc_fw_tracing_ops *fw_tracing;
492
493 int (*init)(struct snd_sof_dev *sdev);
494 void (*exit)(struct snd_sof_dev *sdev);
495 int (*post_fw_boot)(struct snd_sof_dev *sdev);
496
497 int (*tx_msg)(struct snd_sof_dev *sdev, void *msg_data, size_t msg_bytes,
498 void *reply_data, size_t reply_bytes, bool no_pm);
499 int (*set_get_data)(struct snd_sof_dev *sdev, void *data, size_t data_bytes,
500 bool set);
501 int (*get_reply)(struct snd_sof_dev *sdev);
502 void (*rx_msg)(struct snd_sof_dev *sdev);
503 };
504
505 /* SOF generic IPC data */
506 struct snd_sof_ipc {
507 struct snd_sof_dev *sdev;
508
509 /* protects messages and the disable flag */
510 struct mutex tx_mutex;
511 /* disables further sending of ipc's */
512 bool disable_ipc_tx;
513
514 /* Maximum allowed size of a single IPC message/reply */
515 size_t max_payload_size;
516
517 struct snd_sof_ipc_msg msg;
518
519 /* IPC ops based on version */
520 const struct sof_ipc_ops *ops;
521 };
522
523 /* Helper to retrieve the IPC ops */
524 #define sof_ipc_get_ops(sdev, ops_name) \
525 (((sdev)->ipc && (sdev)->ipc->ops) ? (sdev)->ipc->ops->ops_name : NULL)
526
527 /*
528 * SOF Device Level.
529 */
530 struct snd_sof_dev {
531 struct device *dev;
532 spinlock_t ipc_lock; /* lock for IPC users */
533 spinlock_t hw_lock; /* lock for HW IO access */
534
535 /*
536 * When true the DSP is not used.
537 * It is set under the following condition:
538 * User sets the SOF_DBG_DSPLESS_MODE flag in sof_debug module parameter
539 * and
540 * the platform advertises that it can support such mode
541 * pdata->desc->dspless_mode_supported is true.
542 */
543 bool dspless_mode_selected;
544
545 /* Main, Base firmware image */
546 struct sof_firmware basefw;
547
548 /*
549 * ASoC components. plat_drv fields are set dynamically so
550 * can't use const
551 */
552 struct snd_soc_component_driver plat_drv;
553
554 /* current DSP power state */
555 struct sof_dsp_power_state dsp_power_state;
556 /* mutex to protect the dsp_power_state access */
557 struct mutex power_state_access;
558
559 /* Intended power target of system suspend */
560 enum sof_system_suspend_state system_suspend_target;
561
562 /* DSP firmware boot */
563 wait_queue_head_t boot_wait;
564 enum sof_fw_state fw_state;
565 bool first_boot;
566
567 /* work queue in case the probe is implemented in two steps */
568 struct work_struct probe_work;
569 bool probe_completed;
570
571 /* DSP HW differentiation */
572 struct snd_sof_pdata *pdata;
573
574 /* IPC */
575 struct snd_sof_ipc *ipc;
576 struct snd_sof_mailbox fw_info_box; /* FW shared memory */
577 struct snd_sof_mailbox dsp_box; /* DSP initiated IPC */
578 struct snd_sof_mailbox host_box; /* Host initiated IPC */
579 struct snd_sof_mailbox stream_box; /* Stream position update */
580 struct snd_sof_mailbox debug_box; /* Debug info updates */
581 struct snd_sof_ipc_msg *msg;
582 int ipc_irq;
583 u32 next_comp_id; /* monotonic - reset during S3 */
584
585 /* memory bases for mmaped DSPs - set by dsp_init() */
586 void __iomem *bar[SND_SOF_BARS]; /* DSP base address */
587 int mmio_bar;
588 int mailbox_bar;
589 size_t dsp_oops_offset;
590
591 /* debug */
592 struct dentry *debugfs_root;
593 struct list_head dfsentry_list;
594 bool dbg_dump_printed;
595 bool ipc_dump_printed;
596
597 /* firmware loader */
598 struct sof_ipc_fw_ready fw_ready;
599 struct sof_ipc_fw_version fw_version;
600 struct sof_ipc_cc_version *cc_version;
601
602 /* topology */
603 struct snd_soc_tplg_ops *tplg_ops;
604 struct list_head pcm_list;
605 struct list_head kcontrol_list;
606 struct list_head widget_list;
607 struct list_head pipeline_list;
608 struct list_head dai_list;
609 struct list_head dai_link_list;
610 struct list_head route_list;
611 struct snd_soc_component *component;
612 u32 enabled_cores_mask; /* keep track of enabled cores */
613 bool led_present;
614
615 /* FW configuration */
616 struct sof_ipc_window *info_window;
617
618 /* IPC timeouts in ms */
619 int ipc_timeout;
620 int boot_timeout;
621
622 /* firmwre tracing */
623 bool fw_trace_is_supported; /* set with Kconfig or module parameter */
624 void *fw_trace_data; /* private data used by firmware tracing implementation */
625
626 bool msi_enabled;
627
628 /* DSP core context */
629 u32 num_cores;
630
631 /*
632 * ref count per core that will be modified during system suspend/resume and during pcm
633 * hw_params/hw_free. This doesn't need to be protected with a mutex because pcm
634 * hw_params/hw_free are already protected by the PCM mutex in the ALSA framework in
635 * sound/core/ when streams are active and during system suspend/resume, streams are
636 * already suspended.
637 */
638 int dsp_core_ref_count[SOF_MAX_DSP_NUM_CORES];
639
640 /*
641 * Used to keep track of registered IPC client devices so that they can
642 * be removed when the parent SOF module is removed.
643 */
644 struct list_head ipc_client_list;
645
646 /* mutex to protect client list */
647 struct mutex ipc_client_mutex;
648
649 /*
650 * Used for tracking the IPC client's RX registration for DSP initiated
651 * message handling.
652 */
653 struct list_head ipc_rx_handler_list;
654
655 /*
656 * Used for tracking the IPC client's registration for DSP state change
657 * notification
658 */
659 struct list_head fw_state_handler_list;
660
661 /* to protect the ipc_rx_handler_list and dsp_state_handler_list list */
662 struct mutex client_event_handler_mutex;
663
664 /* quirks to override topology values */
665 bool mclk_id_override;
666 u16 mclk_id_quirk; /* same size as in IPC3 definitions */
667
668 void *private; /* core does not touch this */
669 };
670
671 /*
672 * Device Level.
673 */
674
675 int snd_sof_device_probe(struct device *dev, struct snd_sof_pdata *plat_data);
676 int snd_sof_device_remove(struct device *dev);
677 int snd_sof_device_shutdown(struct device *dev);
678 bool snd_sof_device_probe_completed(struct device *dev);
679
680 int snd_sof_runtime_suspend(struct device *dev);
681 int snd_sof_runtime_resume(struct device *dev);
682 int snd_sof_runtime_idle(struct device *dev);
683 int snd_sof_resume(struct device *dev);
684 int snd_sof_suspend(struct device *dev);
685 int snd_sof_dsp_power_down_notify(struct snd_sof_dev *sdev);
686 int snd_sof_prepare(struct device *dev);
687 void snd_sof_complete(struct device *dev);
688
689 void snd_sof_new_platform_drv(struct snd_sof_dev *sdev);
690
691 /*
692 * Compress support
693 */
694 extern struct snd_compress_ops sof_compressed_ops;
695
696 /*
697 * Firmware loading.
698 */
699 int snd_sof_load_firmware_raw(struct snd_sof_dev *sdev);
700 int snd_sof_load_firmware_memcpy(struct snd_sof_dev *sdev);
701 int snd_sof_run_firmware(struct snd_sof_dev *sdev);
702 void snd_sof_fw_unload(struct snd_sof_dev *sdev);
703
704 /*
705 * IPC low level APIs.
706 */
707 struct snd_sof_ipc *snd_sof_ipc_init(struct snd_sof_dev *sdev);
708 void snd_sof_ipc_free(struct snd_sof_dev *sdev);
709 void snd_sof_ipc_get_reply(struct snd_sof_dev *sdev);
710 void snd_sof_ipc_reply(struct snd_sof_dev *sdev, u32 msg_id);
snd_sof_ipc_msgs_rx(struct snd_sof_dev * sdev)711 static inline void snd_sof_ipc_msgs_rx(struct snd_sof_dev *sdev)
712 {
713 sdev->ipc->ops->rx_msg(sdev);
714 }
715 int sof_ipc_tx_message(struct snd_sof_ipc *ipc, void *msg_data, size_t msg_bytes,
716 void *reply_data, size_t reply_bytes);
sof_ipc_tx_message_no_reply(struct snd_sof_ipc * ipc,void * msg_data,size_t msg_bytes)717 static inline int sof_ipc_tx_message_no_reply(struct snd_sof_ipc *ipc, void *msg_data,
718 size_t msg_bytes)
719 {
720 return sof_ipc_tx_message(ipc, msg_data, msg_bytes, NULL, 0);
721 }
722 int sof_ipc_set_get_data(struct snd_sof_ipc *ipc, void *msg_data,
723 size_t msg_bytes, bool set);
724 int sof_ipc_tx_message_no_pm(struct snd_sof_ipc *ipc, void *msg_data, size_t msg_bytes,
725 void *reply_data, size_t reply_bytes);
sof_ipc_tx_message_no_pm_no_reply(struct snd_sof_ipc * ipc,void * msg_data,size_t msg_bytes)726 static inline int sof_ipc_tx_message_no_pm_no_reply(struct snd_sof_ipc *ipc, void *msg_data,
727 size_t msg_bytes)
728 {
729 return sof_ipc_tx_message_no_pm(ipc, msg_data, msg_bytes, NULL, 0);
730 }
731 int sof_ipc_send_msg(struct snd_sof_dev *sdev, void *msg_data, size_t msg_bytes,
732 size_t reply_bytes);
733
snd_sof_ipc_process_reply(struct snd_sof_dev * sdev,u32 msg_id)734 static inline void snd_sof_ipc_process_reply(struct snd_sof_dev *sdev, u32 msg_id)
735 {
736 snd_sof_ipc_get_reply(sdev);
737 snd_sof_ipc_reply(sdev, msg_id);
738 }
739
740 /*
741 * Trace/debug
742 */
743 int snd_sof_dbg_init(struct snd_sof_dev *sdev);
744 void snd_sof_free_debug(struct snd_sof_dev *sdev);
745 int snd_sof_debugfs_buf_item(struct snd_sof_dev *sdev,
746 void *base, size_t size,
747 const char *name, mode_t mode);
748 void sof_print_oops_and_stack(struct snd_sof_dev *sdev, const char *level,
749 u32 panic_code, u32 tracep_code, void *oops,
750 struct sof_ipc_panic_info *panic_info,
751 void *stack, size_t stack_words);
752 void snd_sof_handle_fw_exception(struct snd_sof_dev *sdev, const char *msg);
753 int snd_sof_dbg_memory_info_init(struct snd_sof_dev *sdev);
754 int snd_sof_debugfs_add_region_item_iomem(struct snd_sof_dev *sdev,
755 enum snd_sof_fw_blk_type blk_type, u32 offset, size_t size,
756 const char *name, enum sof_debugfs_access_type access_type);
757 /* Firmware tracing */
758 int sof_fw_trace_init(struct snd_sof_dev *sdev);
759 void sof_fw_trace_free(struct snd_sof_dev *sdev);
760 void sof_fw_trace_fw_crashed(struct snd_sof_dev *sdev);
761 void sof_fw_trace_suspend(struct snd_sof_dev *sdev, pm_message_t pm_state);
762 int sof_fw_trace_resume(struct snd_sof_dev *sdev);
763
764 /*
765 * DSP Architectures.
766 */
sof_stack(struct snd_sof_dev * sdev,const char * level,void * oops,u32 * stack,u32 stack_words)767 static inline void sof_stack(struct snd_sof_dev *sdev, const char *level,
768 void *oops, u32 *stack, u32 stack_words)
769 {
770 sof_dsp_arch_ops(sdev)->dsp_stack(sdev, level, oops, stack,
771 stack_words);
772 }
773
sof_oops(struct snd_sof_dev * sdev,const char * level,void * oops)774 static inline void sof_oops(struct snd_sof_dev *sdev, const char *level, void *oops)
775 {
776 if (sof_dsp_arch_ops(sdev)->dsp_oops)
777 sof_dsp_arch_ops(sdev)->dsp_oops(sdev, level, oops);
778 }
779
780 extern const struct dsp_arch_ops sof_xtensa_arch_ops;
781
782 /*
783 * Firmware state tracking
784 */
785 void sof_set_fw_state(struct snd_sof_dev *sdev, enum sof_fw_state new_state);
786
787 /*
788 * Utilities
789 */
790 void sof_io_write(struct snd_sof_dev *sdev, void __iomem *addr, u32 value);
791 void sof_io_write64(struct snd_sof_dev *sdev, void __iomem *addr, u64 value);
792 u32 sof_io_read(struct snd_sof_dev *sdev, void __iomem *addr);
793 u64 sof_io_read64(struct snd_sof_dev *sdev, void __iomem *addr);
794 void sof_mailbox_write(struct snd_sof_dev *sdev, u32 offset,
795 void *message, size_t bytes);
796 void sof_mailbox_read(struct snd_sof_dev *sdev, u32 offset,
797 void *message, size_t bytes);
798 int sof_block_write(struct snd_sof_dev *sdev, enum snd_sof_fw_blk_type blk_type,
799 u32 offset, void *src, size_t size);
800 int sof_block_read(struct snd_sof_dev *sdev, enum snd_sof_fw_blk_type blk_type,
801 u32 offset, void *dest, size_t size);
802
803 int sof_ipc_msg_data(struct snd_sof_dev *sdev,
804 struct snd_sof_pcm_stream *sps,
805 void *p, size_t sz);
806 int sof_set_stream_data_offset(struct snd_sof_dev *sdev,
807 struct snd_sof_pcm_stream *sps,
808 size_t posn_offset);
809
810 int sof_stream_pcm_open(struct snd_sof_dev *sdev,
811 struct snd_pcm_substream *substream);
812 int sof_stream_pcm_close(struct snd_sof_dev *sdev,
813 struct snd_pcm_substream *substream);
814
815 int sof_machine_check(struct snd_sof_dev *sdev);
816
817 /* SOF client support */
818 #if IS_ENABLED(CONFIG_SND_SOC_SOF_CLIENT)
819 int sof_client_dev_register(struct snd_sof_dev *sdev, const char *name, u32 id,
820 const void *data, size_t size);
821 void sof_client_dev_unregister(struct snd_sof_dev *sdev, const char *name, u32 id);
822 int sof_register_clients(struct snd_sof_dev *sdev);
823 void sof_unregister_clients(struct snd_sof_dev *sdev);
824 void sof_client_ipc_rx_dispatcher(struct snd_sof_dev *sdev, void *msg_buf);
825 void sof_client_fw_state_dispatcher(struct snd_sof_dev *sdev);
826 int sof_suspend_clients(struct snd_sof_dev *sdev, pm_message_t state);
827 int sof_resume_clients(struct snd_sof_dev *sdev);
828 #else /* CONFIG_SND_SOC_SOF_CLIENT */
sof_client_dev_register(struct snd_sof_dev * sdev,const char * name,u32 id,const void * data,size_t size)829 static inline int sof_client_dev_register(struct snd_sof_dev *sdev, const char *name,
830 u32 id, const void *data, size_t size)
831 {
832 return 0;
833 }
834
sof_client_dev_unregister(struct snd_sof_dev * sdev,const char * name,u32 id)835 static inline void sof_client_dev_unregister(struct snd_sof_dev *sdev,
836 const char *name, u32 id)
837 {
838 }
839
sof_register_clients(struct snd_sof_dev * sdev)840 static inline int sof_register_clients(struct snd_sof_dev *sdev)
841 {
842 return 0;
843 }
844
sof_unregister_clients(struct snd_sof_dev * sdev)845 static inline void sof_unregister_clients(struct snd_sof_dev *sdev)
846 {
847 }
848
sof_client_ipc_rx_dispatcher(struct snd_sof_dev * sdev,void * msg_buf)849 static inline void sof_client_ipc_rx_dispatcher(struct snd_sof_dev *sdev, void *msg_buf)
850 {
851 }
852
sof_client_fw_state_dispatcher(struct snd_sof_dev * sdev)853 static inline void sof_client_fw_state_dispatcher(struct snd_sof_dev *sdev)
854 {
855 }
856
sof_suspend_clients(struct snd_sof_dev * sdev,pm_message_t state)857 static inline int sof_suspend_clients(struct snd_sof_dev *sdev, pm_message_t state)
858 {
859 return 0;
860 }
861
sof_resume_clients(struct snd_sof_dev * sdev)862 static inline int sof_resume_clients(struct snd_sof_dev *sdev)
863 {
864 return 0;
865 }
866 #endif /* CONFIG_SND_SOC_SOF_CLIENT */
867
868 /* Main ops for IPC implementations */
869 extern const struct sof_ipc_ops ipc3_ops;
870 extern const struct sof_ipc_ops ipc4_ops;
871
872 #endif
873