1 /*
2  * Copyright 2015 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  */
23 #ifndef _SMUMGR_H_
24 #define _SMUMGR_H_
25 #include <linux/types.h>
26 #include "amd_powerplay.h"
27 #include "hwmgr.h"
28 
29 enum SMU_TABLE {
30 	SMU_UVD_TABLE = 0,
31 	SMU_VCE_TABLE,
32 	SMU_BIF_TABLE,
33 };
34 
35 enum SMU_TYPE {
36 	SMU_SoftRegisters = 0,
37 	SMU_Discrete_DpmTable,
38 };
39 
40 enum SMU_MEMBER {
41 	HandshakeDisables = 0,
42 	VoltageChangeTimeout,
43 	AverageGraphicsActivity,
44 	AverageMemoryActivity,
45 	PreVBlankGap,
46 	VBlankTimeout,
47 	UcodeLoadStatus,
48 	UvdBootLevel,
49 	VceBootLevel,
50 	LowSclkInterruptThreshold,
51 	DRAM_LOG_ADDR_H,
52 	DRAM_LOG_ADDR_L,
53 	DRAM_LOG_PHY_ADDR_H,
54 	DRAM_LOG_PHY_ADDR_L,
55 	DRAM_LOG_BUFF_SIZE,
56 };
57 
58 
59 enum SMU_MAC_DEFINITION {
60 	SMU_MAX_LEVELS_GRAPHICS = 0,
61 	SMU_MAX_LEVELS_MEMORY,
62 	SMU_MAX_LEVELS_LINK,
63 	SMU_MAX_ENTRIES_SMIO,
64 	SMU_MAX_LEVELS_VDDC,
65 	SMU_MAX_LEVELS_VDDGFX,
66 	SMU_MAX_LEVELS_VDDCI,
67 	SMU_MAX_LEVELS_MVDD,
68 	SMU_UVD_MCLK_HANDSHAKE_DISABLE,
69 };
70 
71 enum SMU9_TABLE_ID {
72 	PPTABLE = 0,
73 	WMTABLE,
74 	AVFSTABLE,
75 	TOOLSTABLE,
76 	AVFSFUSETABLE
77 };
78 
79 enum SMU10_TABLE_ID {
80 	SMU10_WMTABLE = 0,
81 	SMU10_CLOCKTABLE,
82 };
83 
84 extern int smum_download_powerplay_table(struct pp_hwmgr *hwmgr, void **table);
85 
86 extern int smum_upload_powerplay_table(struct pp_hwmgr *hwmgr);
87 
88 extern int smum_send_msg_to_smc(struct pp_hwmgr *hwmgr, uint16_t msg, uint32_t *resp);
89 
90 extern int smum_send_msg_to_smc_with_parameter(struct pp_hwmgr *hwmgr,
91 					uint16_t msg, uint32_t parameter,
92 					uint32_t *resp);
93 
94 extern int smum_update_sclk_threshold(struct pp_hwmgr *hwmgr);
95 
96 extern int smum_update_smc_table(struct pp_hwmgr *hwmgr, uint32_t type);
97 extern int smum_process_firmware_header(struct pp_hwmgr *hwmgr);
98 extern int smum_thermal_avfs_enable(struct pp_hwmgr *hwmgr);
99 extern int smum_thermal_setup_fan_table(struct pp_hwmgr *hwmgr);
100 extern int smum_init_smc_table(struct pp_hwmgr *hwmgr);
101 extern int smum_populate_all_graphic_levels(struct pp_hwmgr *hwmgr);
102 extern int smum_populate_all_memory_levels(struct pp_hwmgr *hwmgr);
103 extern int smum_initialize_mc_reg_table(struct pp_hwmgr *hwmgr);
104 extern uint32_t smum_get_offsetof(struct pp_hwmgr *hwmgr,
105 				uint32_t type, uint32_t member);
106 extern uint32_t smum_get_mac_definition(struct pp_hwmgr *hwmgr, uint32_t value);
107 
108 extern bool smum_is_dpm_running(struct pp_hwmgr *hwmgr);
109 
110 extern bool smum_is_hw_avfs_present(struct pp_hwmgr *hwmgr);
111 
112 extern int smum_update_dpm_settings(struct pp_hwmgr *hwmgr, void *profile_setting);
113 
114 extern int smum_smc_table_manager(struct pp_hwmgr *hwmgr, uint8_t *table, uint16_t table_id, bool rw);
115 
116 extern int smum_stop_smc(struct pp_hwmgr *hwmgr);
117 
118 #endif
119