1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) 2018, The Linux Foundation. All rights reserved. */ 3 4 #ifndef _DT_BINDINGS_POWER_QCOM_RPMPD_H 5 #define _DT_BINDINGS_POWER_QCOM_RPMPD_H 6 7 /* SDM845 Power Domain Indexes */ 8 #define SDM845_EBI 0 9 #define SDM845_MX 1 10 #define SDM845_MX_AO 2 11 #define SDM845_CX 3 12 #define SDM845_CX_AO 4 13 #define SDM845_LMX 5 14 #define SDM845_LCX 6 15 #define SDM845_GFX 7 16 #define SDM845_MSS 8 17 18 /* SDX55 Power Domain Indexes */ 19 #define SDX55_MSS 0 20 #define SDX55_MX 1 21 #define SDX55_CX 2 22 23 /* SDX65 Power Domain Indexes */ 24 #define SDX65_MSS 0 25 #define SDX65_MX 1 26 #define SDX65_MX_AO 2 27 #define SDX65_CX 3 28 #define SDX65_CX_AO 4 29 #define SDX65_MXC 5 30 31 /* SM6350 Power Domain Indexes */ 32 #define SM6350_CX 0 33 #define SM6350_GFX 1 34 #define SM6350_LCX 2 35 #define SM6350_LMX 3 36 #define SM6350_MSS 4 37 #define SM6350_MX 5 38 39 /* SM8150 Power Domain Indexes */ 40 #define SM8150_MSS 0 41 #define SM8150_EBI 1 42 #define SM8150_LMX 2 43 #define SM8150_LCX 3 44 #define SM8150_GFX 4 45 #define SM8150_MX 5 46 #define SM8150_MX_AO 6 47 #define SM8150_CX 7 48 #define SM8150_CX_AO 8 49 #define SM8150_MMCX 9 50 #define SM8150_MMCX_AO 10 51 52 /* SM8250 Power Domain Indexes */ 53 #define SM8250_CX 0 54 #define SM8250_CX_AO 1 55 #define SM8250_EBI 2 56 #define SM8250_GFX 3 57 #define SM8250_LCX 4 58 #define SM8250_LMX 5 59 #define SM8250_MMCX 6 60 #define SM8250_MMCX_AO 7 61 #define SM8250_MX 8 62 #define SM8250_MX_AO 9 63 64 /* SM8350 Power Domain Indexes */ 65 #define SM8350_CX 0 66 #define SM8350_CX_AO 1 67 #define SM8350_EBI 2 68 #define SM8350_GFX 3 69 #define SM8350_LCX 4 70 #define SM8350_LMX 5 71 #define SM8350_MMCX 6 72 #define SM8350_MMCX_AO 7 73 #define SM8350_MX 8 74 #define SM8350_MX_AO 9 75 #define SM8350_MXC 10 76 #define SM8350_MXC_AO 11 77 #define SM8350_MSS 12 78 79 /* SM8450 Power Domain Indexes */ 80 #define SM8450_CX 0 81 #define SM8450_CX_AO 1 82 #define SM8450_EBI 2 83 #define SM8450_GFX 3 84 #define SM8450_LCX 4 85 #define SM8450_LMX 5 86 #define SM8450_MMCX 6 87 #define SM8450_MMCX_AO 7 88 #define SM8450_MX 8 89 #define SM8450_MX_AO 9 90 #define SM8450_MXC 10 91 #define SM8450_MXC_AO 11 92 #define SM8450_MSS 12 93 94 /* SC7180 Power Domain Indexes */ 95 #define SC7180_CX 0 96 #define SC7180_CX_AO 1 97 #define SC7180_GFX 2 98 #define SC7180_MX 3 99 #define SC7180_MX_AO 4 100 #define SC7180_LMX 5 101 #define SC7180_LCX 6 102 #define SC7180_MSS 7 103 104 /* SC7280 Power Domain Indexes */ 105 #define SC7280_CX 0 106 #define SC7280_CX_AO 1 107 #define SC7280_EBI 2 108 #define SC7280_GFX 3 109 #define SC7280_MX 4 110 #define SC7280_MX_AO 5 111 #define SC7280_LMX 6 112 #define SC7280_LCX 7 113 #define SC7280_MSS 8 114 115 /* SC8180X Power Domain Indexes */ 116 #define SC8180X_CX 0 117 #define SC8180X_CX_AO 1 118 #define SC8180X_EBI 2 119 #define SC8180X_GFX 3 120 #define SC8180X_LCX 4 121 #define SC8180X_LMX 5 122 #define SC8180X_MMCX 6 123 #define SC8180X_MMCX_AO 7 124 #define SC8180X_MSS 8 125 #define SC8180X_MX 9 126 #define SC8180X_MX_AO 10 127 128 /* SC8280XP Power Domain Indexes */ 129 #define SC8280XP_CX 0 130 #define SC8280XP_CX_AO 1 131 #define SC8280XP_DDR 2 132 #define SC8280XP_EBI 3 133 #define SC8280XP_GFX 4 134 #define SC8280XP_LCX 5 135 #define SC8280XP_LMX 6 136 #define SC8280XP_MMCX 7 137 #define SC8280XP_MMCX_AO 8 138 #define SC8280XP_MSS 9 139 #define SC8280XP_MX 10 140 #define SC8280XP_MXC 12 141 #define SC8280XP_MX_AO 11 142 #define SC8280XP_NSP 13 143 #define SC8280XP_QPHY 14 144 #define SC8280XP_XO 15 145 146 /* SDM845 Power Domain performance levels */ 147 #define RPMH_REGULATOR_LEVEL_RETENTION 16 148 #define RPMH_REGULATOR_LEVEL_MIN_SVS 48 149 #define RPMH_REGULATOR_LEVEL_LOW_SVS 64 150 #define RPMH_REGULATOR_LEVEL_SVS 128 151 #define RPMH_REGULATOR_LEVEL_SVS_L0 144 152 #define RPMH_REGULATOR_LEVEL_SVS_L1 192 153 #define RPMH_REGULATOR_LEVEL_SVS_L2 224 154 #define RPMH_REGULATOR_LEVEL_NOM 256 155 #define RPMH_REGULATOR_LEVEL_NOM_L1 320 156 #define RPMH_REGULATOR_LEVEL_NOM_L2 336 157 #define RPMH_REGULATOR_LEVEL_TURBO 384 158 #define RPMH_REGULATOR_LEVEL_TURBO_L1 416 159 160 /* MDM9607 Power Domains */ 161 #define MDM9607_VDDCX 0 162 #define MDM9607_VDDCX_AO 1 163 #define MDM9607_VDDCX_VFL 2 164 #define MDM9607_VDDMX 3 165 #define MDM9607_VDDMX_AO 4 166 #define MDM9607_VDDMX_VFL 5 167 168 /* MSM8226 Power Domain Indexes */ 169 #define MSM8226_VDDCX 0 170 #define MSM8226_VDDCX_AO 1 171 #define MSM8226_VDDCX_VFC 2 172 173 /* MSM8939 Power Domains */ 174 #define MSM8939_VDDMDCX 0 175 #define MSM8939_VDDMDCX_AO 1 176 #define MSM8939_VDDMDCX_VFC 2 177 #define MSM8939_VDDCX 3 178 #define MSM8939_VDDCX_AO 4 179 #define MSM8939_VDDCX_VFC 5 180 #define MSM8939_VDDMX 6 181 #define MSM8939_VDDMX_AO 7 182 183 /* MSM8916 Power Domain Indexes */ 184 #define MSM8916_VDDCX 0 185 #define MSM8916_VDDCX_AO 1 186 #define MSM8916_VDDCX_VFC 2 187 #define MSM8916_VDDMX 3 188 #define MSM8916_VDDMX_AO 4 189 190 /* MSM8953 Power Domain Indexes */ 191 #define MSM8953_VDDMD 0 192 #define MSM8953_VDDMD_AO 1 193 #define MSM8953_VDDCX 2 194 #define MSM8953_VDDCX_AO 3 195 #define MSM8953_VDDCX_VFL 4 196 #define MSM8953_VDDMX 5 197 #define MSM8953_VDDMX_AO 6 198 199 /* MSM8976 Power Domain Indexes */ 200 #define MSM8976_VDDCX 0 201 #define MSM8976_VDDCX_AO 1 202 #define MSM8976_VDDCX_VFL 2 203 #define MSM8976_VDDMX 3 204 #define MSM8976_VDDMX_AO 4 205 #define MSM8976_VDDMX_VFL 5 206 207 /* MSM8994 Power Domain Indexes */ 208 #define MSM8994_VDDCX 0 209 #define MSM8994_VDDCX_AO 1 210 #define MSM8994_VDDCX_VFC 2 211 #define MSM8994_VDDMX 3 212 #define MSM8994_VDDMX_AO 4 213 #define MSM8994_VDDGFX 5 214 #define MSM8994_VDDGFX_VFC 6 215 216 /* MSM8996 Power Domain Indexes */ 217 #define MSM8996_VDDCX 0 218 #define MSM8996_VDDCX_AO 1 219 #define MSM8996_VDDCX_VFC 2 220 #define MSM8996_VDDMX 3 221 #define MSM8996_VDDMX_AO 4 222 #define MSM8996_VDDSSCX 5 223 #define MSM8996_VDDSSCX_VFC 6 224 225 /* MSM8998 Power Domain Indexes */ 226 #define MSM8998_VDDCX 0 227 #define MSM8998_VDDCX_AO 1 228 #define MSM8998_VDDCX_VFL 2 229 #define MSM8998_VDDMX 3 230 #define MSM8998_VDDMX_AO 4 231 #define MSM8998_VDDMX_VFL 5 232 #define MSM8998_SSCCX 6 233 #define MSM8998_SSCCX_VFL 7 234 #define MSM8998_SSCMX 8 235 #define MSM8998_SSCMX_VFL 9 236 237 /* QCS404 Power Domains */ 238 #define QCS404_VDDMX 0 239 #define QCS404_VDDMX_AO 1 240 #define QCS404_VDDMX_VFL 2 241 #define QCS404_LPICX 3 242 #define QCS404_LPICX_VFL 4 243 #define QCS404_LPIMX 5 244 #define QCS404_LPIMX_VFL 6 245 246 /* SDM660 Power Domains */ 247 #define SDM660_VDDCX 0 248 #define SDM660_VDDCX_AO 1 249 #define SDM660_VDDCX_VFL 2 250 #define SDM660_VDDMX 3 251 #define SDM660_VDDMX_AO 4 252 #define SDM660_VDDMX_VFL 5 253 #define SDM660_SSCCX 6 254 #define SDM660_SSCCX_VFL 7 255 #define SDM660_SSCMX 8 256 #define SDM660_SSCMX_VFL 9 257 258 /* SM6115 Power Domains */ 259 #define SM6115_VDDCX 0 260 #define SM6115_VDDCX_AO 1 261 #define SM6115_VDDCX_VFL 2 262 #define SM6115_VDDMX 3 263 #define SM6115_VDDMX_AO 4 264 #define SM6115_VDDMX_VFL 5 265 #define SM6115_VDD_LPI_CX 6 266 #define SM6115_VDD_LPI_MX 7 267 268 /* SM6125 Power Domains */ 269 #define SM6125_VDDCX 0 270 #define SM6125_VDDCX_AO 1 271 #define SM6125_VDDCX_VFL 2 272 #define SM6125_VDDMX 3 273 #define SM6125_VDDMX_AO 4 274 #define SM6125_VDDMX_VFL 5 275 276 /* QCM2290 Power Domains */ 277 #define QCM2290_VDDCX 0 278 #define QCM2290_VDDCX_AO 1 279 #define QCM2290_VDDCX_VFL 2 280 #define QCM2290_VDDMX 3 281 #define QCM2290_VDDMX_AO 4 282 #define QCM2290_VDDMX_VFL 5 283 #define QCM2290_VDD_LPI_CX 6 284 #define QCM2290_VDD_LPI_MX 7 285 286 /* RPM SMD Power Domain performance levels */ 287 #define RPM_SMD_LEVEL_RETENTION 16 288 #define RPM_SMD_LEVEL_RETENTION_PLUS 32 289 #define RPM_SMD_LEVEL_MIN_SVS 48 290 #define RPM_SMD_LEVEL_LOW_SVS 64 291 #define RPM_SMD_LEVEL_SVS 128 292 #define RPM_SMD_LEVEL_SVS_PLUS 192 293 #define RPM_SMD_LEVEL_NOM 256 294 #define RPM_SMD_LEVEL_NOM_PLUS 320 295 #define RPM_SMD_LEVEL_TURBO 384 296 #define RPM_SMD_LEVEL_TURBO_NO_CPR 416 297 #define RPM_SMD_LEVEL_TURBO_HIGH 448 298 #define RPM_SMD_LEVEL_BINNING 512 299 300 #endif 301