1 #ifndef __ASM_SH_SE7724_H 2 #define __ASM_SH_SE7724_H 3 4 /* 5 * linux/include/asm-sh/se7724.h 6 * 7 * Copyright (C) 2009 Renesas Solutions Corp. 8 * 9 * Kuninori Morimoto <morimoto.kuninori@renesas.com> 10 * 11 * Hitachi UL SolutionEngine 7724 Support. 12 * 13 * Based on se7722.h 14 * Copyright (C) 2007 Nobuhiro Iwamatsu 15 * 16 * This file is subject to the terms and conditions of the GNU General Public 17 * License. See the file "COPYING" in the main directory of this archive 18 * for more details. 19 * 20 */ 21 #include <asm/addrspace.h> 22 23 /* SH Eth */ 24 #define SH_ETH_ADDR (0xA4600000) 25 #define SH_ETH_MAHR (SH_ETH_ADDR + 0x1C0) 26 #define SH_ETH_MALR (SH_ETH_ADDR + 0x1C8) 27 28 #define PA_LED (0xba203000) /* 8bit LED */ 29 #define IRQ_MODE (0xba200010) 30 #define IRQ0_SR (0xba200014) 31 #define IRQ1_SR (0xba200018) 32 #define IRQ2_SR (0xba20001c) 33 #define IRQ0_MR (0xba200020) 34 #define IRQ1_MR (0xba200024) 35 #define IRQ2_MR (0xba200028) 36 37 /* IRQ */ 38 #define IRQ0_IRQ 32 39 #define IRQ1_IRQ 33 40 #define IRQ2_IRQ 34 41 42 /* Bits in IRQ012 registers */ 43 #define SE7724_FPGA_IRQ_BASE 220 44 45 /* IRQ0 */ 46 #define IRQ0_BASE SE7724_FPGA_IRQ_BASE 47 #define IRQ0_KEY (IRQ0_BASE + 12) 48 #define IRQ0_RMII (IRQ0_BASE + 13) 49 #define IRQ0_SMC (IRQ0_BASE + 14) 50 #define IRQ0_MASK 0x7fff 51 #define IRQ0_END IRQ0_SMC 52 /* IRQ1 */ 53 #define IRQ1_BASE (IRQ0_END + 1) 54 #define IRQ1_TS (IRQ1_BASE + 0) 55 #define IRQ1_MASK 0x0001 56 #define IRQ1_END IRQ1_TS 57 /* IRQ2 */ 58 #define IRQ2_BASE (IRQ1_END + 1) 59 #define IRQ2_USB0 (IRQ1_BASE + 0) 60 #define IRQ2_USB1 (IRQ1_BASE + 1) 61 #define IRQ2_MASK 0x0003 62 #define IRQ2_END IRQ2_USB1 63 64 #define SE7724_FPGA_IRQ_NR (IRQ2_END - IRQ0_BASE) 65 66 /* arch/sh/boards/se/7724/irq.c */ 67 void init_se7724_IRQ(void); 68 69 #define __IO_PREFIX se7724 70 #include <asm/io_generic.h> 71 72 #endif /* __ASM_SH_SE7724_H */ 73