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Searched defs:SDMA0_PHASE0_QUANTUM__VALUE_MASK (Results 1 – 11 of 11) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/sdma0/
Dsdma0_4_1_sh_mask.h599 #define SDMA0_PHASE0_QUANTUM__VALUE_MASK … macro
Dsdma0_4_0_sh_mask.h600 #define SDMA0_PHASE0_QUANTUM__VALUE_MASK 0x00FFFF00L macro
Dsdma0_4_2_2_sh_mask.h608 #define SDMA0_PHASE0_QUANTUM__VALUE_MASK … macro
Dsdma0_4_2_sh_mask.h602 #define SDMA0_PHASE0_QUANTUM__VALUE_MASK … macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/oss/
Doss_2_0_sh_mask.h1013 #define SDMA0_PHASE0_QUANTUM__VALUE_MASK 0xffff00 macro
Doss_2_4_sh_mask.h1103 #define SDMA0_PHASE0_QUANTUM__VALUE_MASK 0xffff00 macro
Doss_3_0_1_sh_mask.h1123 #define SDMA0_PHASE0_QUANTUM__VALUE_MASK 0xffff00 macro
Doss_3_0_sh_mask.h1629 #define SDMA0_PHASE0_QUANTUM__VALUE_MASK 0xffff00 macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/sdma/
Dsdma_4_4_0_sh_mask.h295 #define SDMA0_PHASE0_QUANTUM__VALUE_MASK … macro
/linux-6.6.21/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_10_1_0_sh_mask.h314 #define SDMA0_PHASE0_QUANTUM__VALUE_MASK … macro
Dgc_10_3_0_sh_mask.h315 #define SDMA0_PHASE0_QUANTUM__VALUE_MASK … macro