1 /* linux/arch/arm/mach-s3c6400/include/mach/map.h 2 * 3 * Copyright 2008 Openmoko, Inc. 4 * Copyright 2008 Simtec Electronics 5 * http://armlinux.simtec.co.uk/ 6 * Ben Dooks <ben@simtec.co.uk> 7 * 8 * S3C64XX - Memory map definitions 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License version 2 as 12 * published by the Free Software Foundation. 13 */ 14 15 #ifndef __ASM_ARCH_MAP_H 16 #define __ASM_ARCH_MAP_H __FILE__ 17 18 #include <plat/map-base.h> 19 20 /* 21 * Post-mux Chip Select Regions Xm0CSn_ 22 * These may be used by SROM, NAND or CF depending on settings 23 */ 24 25 #define S3C64XX_PA_XM0CSN0 (0x10000000) 26 #define S3C64XX_PA_XM0CSN1 (0x18000000) 27 #define S3C64XX_PA_XM0CSN2 (0x20000000) 28 #define S3C64XX_PA_XM0CSN3 (0x28000000) 29 #define S3C64XX_PA_XM0CSN4 (0x30000000) 30 #define S3C64XX_PA_XM0CSN5 (0x38000000) 31 32 /* HSMMC units */ 33 #define S3C64XX_PA_HSMMC(x) (0x7C200000 + ((x) * 0x100000)) 34 #define S3C64XX_PA_HSMMC0 S3C64XX_PA_HSMMC(0) 35 #define S3C64XX_PA_HSMMC1 S3C64XX_PA_HSMMC(1) 36 #define S3C64XX_PA_HSMMC2 S3C64XX_PA_HSMMC(2) 37 38 #define S3C_PA_UART (0x7F005000) 39 #define S3C_PA_UART0 (S3C_PA_UART + 0x00) 40 #define S3C_PA_UART1 (S3C_PA_UART + 0x400) 41 #define S3C_PA_UART2 (S3C_PA_UART + 0x800) 42 #define S3C_PA_UART3 (S3C_PA_UART + 0xC00) 43 #define S3C_UART_OFFSET (0x400) 44 45 /* See notes on UART VA mapping in debug-macro.S */ 46 #define S3C_VA_UARTx(x) (S3C_VA_UART + (S3C_PA_UART & 0xfffff) + ((x) * S3C_UART_OFFSET)) 47 48 #define S3C_VA_UART0 S3C_VA_UARTx(0) 49 #define S3C_VA_UART1 S3C_VA_UARTx(1) 50 #define S3C_VA_UART2 S3C_VA_UARTx(2) 51 #define S3C_VA_UART3 S3C_VA_UARTx(3) 52 53 #define S3C64XX_PA_SROM (0x70000000) 54 55 #define S3C64XX_PA_ONENAND0 (0x70100000) 56 #define S3C64XX_PA_ONENAND0_BUF (0x20000000) 57 #define S3C64XX_SZ_ONENAND0_BUF (SZ_64M) 58 59 /* NAND and OneNAND1 controllers occupy the same register region 60 (depending on SoC POP version) */ 61 #define S3C64XX_PA_ONENAND1 (0x70200000) 62 #define S3C64XX_PA_ONENAND1_BUF (0x28000000) 63 #define S3C64XX_SZ_ONENAND1_BUF (SZ_64M) 64 65 #define S3C64XX_PA_NAND (0x70200000) 66 #define S3C64XX_PA_FB (0x77100000) 67 #define S3C64XX_PA_USB_HSOTG (0x7C000000) 68 #define S3C64XX_PA_WATCHDOG (0x7E004000) 69 #define S3C64XX_PA_RTC (0x7E005000) 70 #define S3C64XX_PA_KEYPAD (0x7E00A000) 71 #define S3C64XX_PA_ADC (0x7E00B000) 72 #define S3C64XX_PA_SYSCON (0x7E00F000) 73 #define S3C64XX_PA_AC97 (0x7F001000) 74 #define S3C64XX_PA_IIS0 (0x7F002000) 75 #define S3C64XX_PA_IIS1 (0x7F003000) 76 #define S3C64XX_PA_TIMER (0x7F006000) 77 #define S3C64XX_PA_IIC0 (0x7F004000) 78 #define S3C64XX_PA_SPI0 (0x7F00B000) 79 #define S3C64XX_PA_SPI1 (0x7F00C000) 80 #define S3C64XX_PA_PCM0 (0x7F009000) 81 #define S3C64XX_PA_PCM1 (0x7F00A000) 82 #define S3C64XX_PA_IISV4 (0x7F00D000) 83 #define S3C64XX_PA_IIC1 (0x7F00F000) 84 85 #define S3C64XX_PA_GPIO (0x7F008000) 86 #define S3C64XX_VA_GPIO S3C_ADDR_CPU(0x00000000) 87 #define S3C64XX_SZ_GPIO SZ_4K 88 89 #define S3C64XX_PA_SDRAM (0x50000000) 90 91 #define S3C64XX_PA_CFCON (0x70300000) 92 93 #define S3C64XX_PA_VIC0 (0x71200000) 94 #define S3C64XX_PA_VIC1 (0x71300000) 95 96 #define S3C64XX_PA_MODEM (0x74108000) 97 #define S3C64XX_VA_MODEM S3C_ADDR_CPU(0x00100000) 98 99 #define S3C64XX_PA_USBHOST (0x74300000) 100 101 #define S3C64XX_PA_USB_HSPHY (0x7C100000) 102 #define S3C64XX_VA_USB_HSPHY S3C_ADDR_CPU(0x00200000) 103 104 /* place VICs close together */ 105 #define VA_VIC0 (S3C_VA_IRQ + 0x00) 106 #define VA_VIC1 (S3C_VA_IRQ + 0x10000) 107 108 /* compatibiltiy defines. */ 109 #define S3C_PA_TIMER S3C64XX_PA_TIMER 110 #define S3C_PA_HSMMC0 S3C64XX_PA_HSMMC0 111 #define S3C_PA_HSMMC1 S3C64XX_PA_HSMMC1 112 #define S3C_PA_HSMMC2 S3C64XX_PA_HSMMC2 113 #define S3C_PA_IIC S3C64XX_PA_IIC0 114 #define S3C_PA_IIC1 S3C64XX_PA_IIC1 115 #define S3C_PA_NAND S3C64XX_PA_NAND 116 #define S3C_PA_ONENAND S3C64XX_PA_ONENAND0 117 #define S3C_PA_ONENAND_BUF S3C64XX_PA_ONENAND0_BUF 118 #define S3C_SZ_ONENAND_BUF S3C64XX_SZ_ONENAND0_BUF 119 #define S3C_PA_FB S3C64XX_PA_FB 120 #define S3C_PA_USBHOST S3C64XX_PA_USBHOST 121 #define S3C_PA_USB_HSOTG S3C64XX_PA_USB_HSOTG 122 #define S3C_VA_USB_HSPHY S3C64XX_VA_USB_HSPHY 123 #define S3C_PA_RTC S3C64XX_PA_RTC 124 #define S3C_PA_WDT S3C64XX_PA_WATCHDOG 125 126 #define SAMSUNG_PA_ADC S3C64XX_PA_ADC 127 #define SAMSUNG_PA_CFCON S3C64XX_PA_CFCON 128 #define SAMSUNG_PA_KEYPAD S3C64XX_PA_KEYPAD 129 130 #endif /* __ASM_ARCH_6400_MAP_H */ 131