1 /* 2 * Generic IEEE 1394 definitions 3 */ 4 5 #ifndef _IEEE1394_IEEE1394_H 6 #define _IEEE1394_IEEE1394_H 7 8 #define TCODE_WRITEQ 0x0 9 #define TCODE_WRITEB 0x1 10 #define TCODE_WRITE_RESPONSE 0x2 11 #define TCODE_READQ 0x4 12 #define TCODE_READB 0x5 13 #define TCODE_READQ_RESPONSE 0x6 14 #define TCODE_READB_RESPONSE 0x7 15 #define TCODE_CYCLE_START 0x8 16 #define TCODE_LOCK_REQUEST 0x9 17 #define TCODE_ISO_DATA 0xa 18 #define TCODE_STREAM_DATA 0xa 19 #define TCODE_LOCK_RESPONSE 0xb 20 21 #define RCODE_COMPLETE 0x0 22 #define RCODE_CONFLICT_ERROR 0x4 23 #define RCODE_DATA_ERROR 0x5 24 #define RCODE_TYPE_ERROR 0x6 25 #define RCODE_ADDRESS_ERROR 0x7 26 27 #define EXTCODE_MASK_SWAP 0x1 28 #define EXTCODE_COMPARE_SWAP 0x2 29 #define EXTCODE_FETCH_ADD 0x3 30 #define EXTCODE_LITTLE_ADD 0x4 31 #define EXTCODE_BOUNDED_ADD 0x5 32 #define EXTCODE_WRAP_ADD 0x6 33 34 #define ACK_COMPLETE 0x1 35 #define ACK_PENDING 0x2 36 #define ACK_BUSY_X 0x4 37 #define ACK_BUSY_A 0x5 38 #define ACK_BUSY_B 0x6 39 #define ACK_DATA_ERROR 0xd 40 #define ACK_TYPE_ERROR 0xe 41 42 /* Non-standard "ACK codes" for internal use */ 43 #define ACKX_NONE (-1) 44 #define ACKX_SEND_ERROR (-2) 45 #define ACKX_ABORTED (-3) 46 #define ACKX_TIMEOUT (-4) 47 48 49 #define IEEE1394_SPEED_100 0x00 50 #define IEEE1394_SPEED_200 0x01 51 #define IEEE1394_SPEED_400 0x02 52 #define IEEE1394_SPEED_800 0x03 53 #define IEEE1394_SPEED_1600 0x04 54 #define IEEE1394_SPEED_3200 0x05 55 /* The current highest tested speed supported by the subsystem */ 56 #define IEEE1394_SPEED_MAX IEEE1394_SPEED_800 57 58 /* Maps speed values above to a string representation */ 59 extern const char *hpsb_speedto_str[]; 60 61 62 #define SELFID_PWRCL_NO_POWER 0x0 63 #define SELFID_PWRCL_PROVIDE_15W 0x1 64 #define SELFID_PWRCL_PROVIDE_30W 0x2 65 #define SELFID_PWRCL_PROVIDE_45W 0x3 66 #define SELFID_PWRCL_USE_1W 0x4 67 #define SELFID_PWRCL_USE_3W 0x5 68 #define SELFID_PWRCL_USE_6W 0x6 69 #define SELFID_PWRCL_USE_10W 0x7 70 71 #define SELFID_PORT_CHILD 0x3 72 #define SELFID_PORT_PARENT 0x2 73 #define SELFID_PORT_NCONN 0x1 74 #define SELFID_PORT_NONE 0x0 75 76 77 #include <asm/byteorder.h> 78 79 #ifdef __BIG_ENDIAN_BITFIELD 80 81 struct selfid { 82 u32 packet_identifier:2; /* always binary 10 */ 83 u32 phy_id:6; 84 /* byte */ 85 u32 extended:1; /* if true is struct ext_selfid */ 86 u32 link_active:1; 87 u32 gap_count:6; 88 /* byte */ 89 u32 speed:2; 90 u32 phy_delay:2; 91 u32 contender:1; 92 u32 power_class:3; 93 /* byte */ 94 u32 port0:2; 95 u32 port1:2; 96 u32 port2:2; 97 u32 initiated_reset:1; 98 u32 more_packets:1; 99 } __attribute__((packed)); 100 101 struct ext_selfid { 102 u32 packet_identifier:2; /* always binary 10 */ 103 u32 phy_id:6; 104 /* byte */ 105 u32 extended:1; /* if false is struct selfid */ 106 u32 seq_nr:3; 107 u32 reserved:2; 108 u32 porta:2; 109 /* byte */ 110 u32 portb:2; 111 u32 portc:2; 112 u32 portd:2; 113 u32 porte:2; 114 /* byte */ 115 u32 portf:2; 116 u32 portg:2; 117 u32 porth:2; 118 u32 reserved2:1; 119 u32 more_packets:1; 120 } __attribute__((packed)); 121 122 #elif defined __LITTLE_ENDIAN_BITFIELD /* __BIG_ENDIAN_BITFIELD */ 123 124 /* 125 * Note: these mean to be bit fields of a big endian SelfID as seen on a little 126 * endian machine. Without swapping. 127 */ 128 129 struct selfid { 130 u32 phy_id:6; 131 u32 packet_identifier:2; /* always binary 10 */ 132 /* byte */ 133 u32 gap_count:6; 134 u32 link_active:1; 135 u32 extended:1; /* if true is struct ext_selfid */ 136 /* byte */ 137 u32 power_class:3; 138 u32 contender:1; 139 u32 phy_delay:2; 140 u32 speed:2; 141 /* byte */ 142 u32 more_packets:1; 143 u32 initiated_reset:1; 144 u32 port2:2; 145 u32 port1:2; 146 u32 port0:2; 147 } __attribute__((packed)); 148 149 struct ext_selfid { 150 u32 phy_id:6; 151 u32 packet_identifier:2; /* always binary 10 */ 152 /* byte */ 153 u32 porta:2; 154 u32 reserved:2; 155 u32 seq_nr:3; 156 u32 extended:1; /* if false is struct selfid */ 157 /* byte */ 158 u32 porte:2; 159 u32 portd:2; 160 u32 portc:2; 161 u32 portb:2; 162 /* byte */ 163 u32 more_packets:1; 164 u32 reserved2:1; 165 u32 porth:2; 166 u32 portg:2; 167 u32 portf:2; 168 } __attribute__((packed)); 169 170 #else 171 #error What? PDP endian? 172 #endif /* __BIG_ENDIAN_BITFIELD */ 173 174 175 #endif /* _IEEE1394_IEEE1394_H */ 176